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Issues list

Migrate PyPi release to github actions enhancement
#393 opened Dec 10, 2022 by davekeeshan
2 of 4 tasks
6
Support for switch in MyHDL enhancement
#386 opened Dec 5, 2022 by davekeeshan
4
User Defined code not working (verilog_code/vhdl_code) enhancement
#384 opened Nov 30, 2022 by davekeeshan
9
Update VCD support for real numbers enhancement
#340 opened Apr 21, 2020 by capacollo
Support of conversion of slice type enhancement
#332 opened Mar 31, 2020 by LarsRlrs
3
Few lines of example MyHDL on the website frontpage or in the repo's readme enhancement
#325 opened Nov 22, 2019 by sneak
@cfelton
1
Support older Revisions of VHDL explicitly enhancement
#308 opened Mar 21, 2019 by jlusiardi
3
use setuptools_scm for versioning enhancement
#300 opened Feb 3, 2019 by jck 0.12
Enhancement request hierarchical conversion enhancement help wanted
#282 opened Nov 11, 2018 by wuye0109
2
@always does not correctly convert to VHDL enhancement help wanted
#262 opened Jun 11, 2018 by NicoPy
16
VHDL conversion : Add variable initialisation enhancement
#254 opened Feb 28, 2018 by NicoPy Loading… 0.12
15
Support for SystemVerilog? conversion enhancement help wanted
#249 opened Feb 22, 2018 by dj-on-github
7
Exception printing intbv/modbv with Python3 enhancement help wanted
#202 opened Nov 9, 2016 by MarioSchwalbe
11
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