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Snapshot 20061210

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commit 5c3b2f41932b0ffedf51e3d5d80eccb17e91ac70 1 parent 0ae45e5
steve authored

Showing 1 changed file with 3 additions and 3 deletions. Show diff stats Hide diff stats

  1. +3 3 verilog.spec
6 verilog.spec
... ... @@ -1,10 +1,10 @@
1 1 Summary: Icarus Verilog
2 2 Name: verilog
3   -Version: 0.9.0.20061209
  3 +Version: 0.9.0.20061210
4 4 Release: 0
5 5 License: GPL
6 6 Group: Applications/Engineering
7   -Source: ftp://icarus.com/pub/eda/verilog//verilog-20061209.tar.gz
  7 +Source: ftp://icarus.com/pub/eda/verilog//verilog-20061210.tar.gz
8 8 URL: http://www.icarus.com/eda/verilog/index.html
9 9 Packager: Stephen Williams <steve@icarus.com>
10 10
@@ -22,7 +22,7 @@ engineering formats, including simulation. It strives to be true
22 22 to the IEEE-1364 standard.
23 23
24 24 %prep
25   -%setup -n verilog-20061209
  25 +%setup -n verilog-20061210
26 26
27 27 %build
28 28 %ifarch x86_64

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