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Fix a number of file/line issues in the compiler.

This patch fixes a bunch of objects to have the correct file/line
information. It also adds support for getting file/line information
for events (named events have a definition line).
  • Loading branch information...
1 parent 2a9e15e commit 629ee5b8990bc9efa0bf7050df8f9881ec18bb0e @caryr caryr committed with steveicarus Feb 9, 2011
Showing with 112 additions and 38 deletions.
  1. +25 −10 elaborate.cc
  2. +34 −16 expr_synth.cc
  3. +2 −0 ivl.def
  4. +5 −0 ivl_target.h
  5. +5 −1 net_expr.cc
  6. +11 −6 netmisc.cc
  7. +7 −5 pad_to_width.cc
  8. +13 −0 t-dll-api.cc
  9. +2 −0 t-dll.cc
  10. +8 −0 t-dll.h
View
35 elaborate.cc
@@ -853,9 +853,9 @@ void PGBuiltin::elaborate(Design*des, NetScope*scope) const
sig = new NetNet(scope, scope->local_symbol(),
NetNet::WIRE, instance_width);
+ sig->set_line(*this);
sig->data_type(IVL_VT_LOGIC);
sig->local_flag(true);
- sig->set_line(*this);
connect(rep->pin(0), sig->pin(0));
}
@@ -914,6 +914,7 @@ void PGBuiltin::elaborate(Design*des, NetScope*scope) const
scope->local_symbol(),
sig->vector_width(),
array_count);
+ cc->set_line(*this);
des->add_node(cc);
/* Connect the concat to the signal. */
@@ -927,6 +928,7 @@ void PGBuiltin::elaborate(Design*des, NetScope*scope) const
NetNet*tmp2 = new NetNet(scope,
scope->local_symbol(),
NetNet::WIRE, 1);
+ tmp2->set_line(*this);
tmp2->local_flag(true);
tmp2->data_type(IVL_VT_LOGIC);
connect(cc->pin(gdx+1), tmp2->pin(0));
@@ -942,6 +944,7 @@ void PGBuiltin::elaborate(Design*des, NetScope*scope) const
connect(tmp1->pin(1), sig->pin(0));
NetNet*tmp2 = new NetNet(scope, scope->local_symbol(),
NetNet::WIRE, 1);
+ tmp2->set_line(*this);
tmp2->local_flag(true);
tmp2->data_type(sig->data_type());
connect(tmp1->pin(0), tmp2->pin(0));
@@ -1669,6 +1672,7 @@ void PGModule::elaborate_mod_(Design*des, Module*rmod, NetScope*scope) const
case NetNet::POUTPUT:
ctmp = new NetConcat(scope, scope->local_symbol(),
prts_vector_width, prts.size());
+ ctmp->set_line(*this);
des->add_node(ctmp);
connect(ctmp->pin(0), sig->pin(0));
for (unsigned ldx = 0 ; ldx < prts.size() ; ldx += 1) {
@@ -1692,6 +1696,7 @@ void PGModule::elaborate_mod_(Design*des, Module*rmod, NetScope*scope) const
NetPartSelect*ptmp = new NetPartSelect(sig, spin,
sp->vector_width(),
NetPartSelect::VP);
+ ptmp->set_line(*this);
des->add_node(ptmp);
connect(ptmp->pin(0), sp->pin(0));
spin += sp->vector_width();
@@ -1706,8 +1711,8 @@ void PGModule::elaborate_mod_(Design*des, Module*rmod, NetScope*scope) const
sig->vector_width(),
sp->vector_width(),
spin);
- des->add_node(ttmp);
ttmp->set_line(*this);
+ des->add_node(ttmp);
connect(ttmp->pin(0), sig->pin(0));
connect(ttmp->pin(1), sp->pin(0));
spin += sp->vector_width();
@@ -1762,6 +1767,7 @@ void PGModule::elaborate_udp_(Design*des, PUdp*udp, NetScope*scope) const
assert(udp);
NetUDP*net = new NetUDP(scope, my_name, udp->ports.count(), udp);
+ net->set_line(*this);
net->rise_time(rise_expr);
net->fall_time(fall_expr);
net->decay_time(decay_expr);
@@ -2263,6 +2269,7 @@ NetProc* PAssign::elaborate(Design*des, NetScope*scope) const
bl->append(a1);
if (st) bl->append(st);
if (count_) bl->append(a2);
+ bl->set_line(*this);
return bl;
}
@@ -2487,6 +2494,7 @@ NetProc* PBlock::elaborate(Design*des, NetScope*scope) const
cur->append(tmp);
}
+ cur->set_line(*this);
return cur;
}
@@ -2817,7 +2825,7 @@ NetProc* PCallTask::elaborate_usr(Design*des, NetScope*scope) const
}
NetBlock*block = new NetBlock(NetBlock::SEQU, 0);
-
+ block->set_line(*this);
/* Detect the case where the definition of the task is known
empty. In this case, we need not bother with calls to the
@@ -2832,6 +2840,7 @@ NetProc* PCallTask::elaborate_usr(Design*des, NetScope*scope) const
allocate the local storage. */
if (task->is_auto()) {
NetAlloc*ap = new NetAlloc(task);
+ ap->set_line(*this);
block->append(ap);
}
@@ -2867,6 +2876,7 @@ NetProc* PCallTask::elaborate_usr(Design*des, NetScope*scope) const
ivl_assert(*this, rv->expr_width() >= wid);
NetAssign*pr = new NetAssign(lv, rv);
+ pr->set_line(*this);
block->append(pr);
}
@@ -2922,6 +2932,7 @@ NetProc* PCallTask::elaborate_usr(Design*des, NetScope*scope) const
/* Generate the assignment statement. */
NetAssign*ass = new NetAssign(lv, rv);
+ ass->set_line(*this);
block->append(ass);
}
@@ -2930,6 +2941,7 @@ NetProc* PCallTask::elaborate_usr(Design*des, NetScope*scope) const
the local storage. */
if (task->is_auto()) {
NetFree*fp = new NetFree(task);
+ fp->set_line(*this);
block->append(fp);
}
@@ -3035,22 +3047,24 @@ NetProc* PDelayStatement::elaborate(Design*des, NetScope*scope) const
integers, and applying the proper scaling. */
NetExpr*dex = elaborate_delay_expr(delay_, des, scope);
+ NetPDelay *obj;
if (NetEConst*tmp = dynamic_cast<NetEConst*>(dex)) {
if (statement_)
- return new NetPDelay(tmp->value().as_ulong64(),
- statement_->elaborate(des, scope));
+ obj = new NetPDelay(tmp->value().as_ulong64(),
+ statement_->elaborate(des, scope));
else
- return new NetPDelay(tmp->value().as_ulong64(), 0);
+ obj = new NetPDelay(tmp->value().as_ulong64(), 0);
delete dex;
} else {
if (statement_)
- return new NetPDelay(dex, statement_->elaborate(des, scope));
+ obj = new NetPDelay(dex, statement_->elaborate(des, scope));
else
- return new NetPDelay(dex, 0);
+ obj = new NetPDelay(dex, 0);
}
-
+ obj->set_line(*this);
+ return obj;
}
/*
@@ -3300,7 +3314,6 @@ NetProc* PEventStatement::elaborate_st(Design*des, NetScope*scope,
}
NetNet*expr = tmp->synthesize(des, scope, tmp);
- expr->set_line(*this);
if (expr == 0) {
expr_[idx]->dump(cerr);
cerr << endl;
@@ -3546,6 +3559,7 @@ NetProc* PForever::elaborate(Design*des, NetScope*scope) const
if (stat == 0) return 0;
NetForever*proc = new NetForever(stat);
+ proc->set_line(*this);
return proc;
}
@@ -3843,6 +3857,7 @@ NetProc* PRepeat::elaborate(Design*des, NetScope*scope) const
}
NetRepeat*proc = new NetRepeat(expr, stat);
+ proc->set_line( *this );
return proc;
}
View
50 expr_synth.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 1999-2010 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 1999-2011 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -119,12 +119,14 @@ NetNet* NetEBAdd::synthesize(Design*des, NetScope*scope, NetExpr*root)
perm_string path = lsig->scope()->local_symbol();
NetNet*osig = new NetNet(lsig->scope(), path, NetNet::IMPLICIT, width);
+ osig->set_line(*this);
osig->local_flag(true);
osig->data_type(expr_type());
osig->set_signed(has_sign());
perm_string oname = osig->scope()->local_symbol();
NetAddSub *adder = new NetAddSub(lsig->scope(), oname, width);
+ adder->set_line(*this);
connect(lsig->pin(0), adder->pin_DataA());
connect(rsig->pin(0), adder->pin_DataB());
connect(osig->pin(0), adder->pin_Result());
@@ -173,6 +175,7 @@ NetNet* NetEBBits::synthesize(Design*des, NetScope*scope, NetExpr*root)
assert(lsig->vector_width() == rsig->vector_width());
NetNet*osig = new NetNet(scope, scope->local_symbol(),
NetNet::IMPLICIT, width);
+ osig->set_line(*this);
osig->local_flag(true);
osig->data_type(expr_type());
@@ -379,10 +382,10 @@ NetNet* NetEBPow::synthesize(Design*des, NetScope*scope, NetExpr*root)
NetPow*powr = new NetPow(scope, scope->local_symbol(), width,
lsig->vector_width(),
rsig->vector_width());
+ powr->set_line(*this);
des->add_node(powr);
powr->set_signed( has_sign() );
- powr->set_line(*this);
connect(powr->pin_DataA(), lsig->pin(0));
connect(powr->pin_DataB(), rsig->pin(0));
@@ -416,10 +419,10 @@ NetNet* NetEBMult::synthesize(Design*des, NetScope*scope, NetExpr*root)
width,
lsig->vector_width(),
rsig->vector_width());
+ mult->set_line(*this);
des->add_node(mult);
mult->set_signed( has_sign() );
- mult->set_line(*this);
connect(mult->pin_DataA(), lsig->pin(0));
connect(mult->pin_DataB(), rsig->pin(0));
@@ -528,6 +531,7 @@ NetNet* NetEBLogic::synthesize(Design*des, NetScope*scope, NetExpr*root)
NetNet*osig = new NetNet(scope, scope->local_symbol(),
NetNet::IMPLICIT, 1);
+ osig->set_line(*this);
osig->data_type(expr_type());
osig->local_flag(true);
@@ -543,6 +547,7 @@ NetNet* NetEBLogic::synthesize(Design*des, NetScope*scope, NetExpr*root)
NetLogic*olog = new NetLogic(scope, oname,
lsig->pin_count()+rsig->pin_count()+1,
NetLogic::OR, 1);
+ olog->set_line(*this);
connect(osig->pin(0), olog->pin(0));
@@ -565,6 +570,7 @@ NetNet* NetEBLogic::synthesize(Design*des, NetScope*scope, NetExpr*root)
perm_string oname = scope->local_symbol();
olog = new NetLogic(scope, oname, 3, NetLogic::AND, 1);
+ olog->set_line(*this);
connect(osig->pin(0), olog->pin(0));
des->add_node(olog);
@@ -622,6 +628,7 @@ NetNet* NetEBShift::synthesize(Design*des, NetScope*scope, NetExpr*root)
NetNet*osig = new NetNet(scope, scope->local_symbol(),
NetNet::IMPLICIT, expr_width());
+ osig->set_line(*this);
osig->data_type(expr_type());
osig->local_flag(true);
@@ -637,13 +644,14 @@ NetNet* NetEBShift::synthesize(Design*des, NetScope*scope, NetExpr*root)
NetPartSelect*psel = new NetPartSelect(lsig, shift<0? ushift : 0,
part_width,
NetPartSelect::VP);
+ psel->set_line(*this);
des->add_node(psel);
NetNet*psig = new NetNet(scope, scope->local_symbol(),
NetNet::IMPLICIT, part_width);
+ psig->set_line(*this);
psig->data_type(expr_type());
psig->local_flag(true);
- psig->set_line(*this);
connect(psig->pin(0), psel->pin(0));
// Handle the special case of a signed right shift. In
@@ -652,8 +660,8 @@ NetNet* NetEBShift::synthesize(Design*des, NetScope*scope, NetExpr*root)
if (signed_flag && right_flag) {
NetSignExtend*pad = new NetSignExtend(scope, scope->local_symbol(),
osig->vector_width());
- des->add_node(pad);
pad->set_line(*this);
+ des->add_node(pad);
connect(pad->pin(1), psig->pin(0));
connect(pad->pin(0), osig->pin(0));
@@ -669,9 +677,9 @@ NetNet* NetEBShift::synthesize(Design*des, NetScope*scope, NetExpr*root)
NetNet*zsig = new NetNet(scope, scope->local_symbol(),
NetNet::WIRE, znum.len());
+ zsig->set_line(*this);
zsig->data_type(osig->data_type());
zsig->local_flag(true);
- zsig->set_line(*this);
connect(zcon->pin(0), zsig->pin(0));
NetConcat*ccat = new NetConcat(scope, scope->local_symbol(),
@@ -699,6 +707,7 @@ NetNet* NetEBShift::synthesize(Design*des, NetScope*scope, NetExpr*root)
NetNet*osig = new NetNet(scope, scope->local_symbol(),
NetNet::IMPLICIT, expr_width());
+ osig->set_line(*this);
osig->data_type(expr_type());
osig->local_flag(true);
@@ -760,6 +769,7 @@ NetNet* NetEConcat::synthesize(Design*des, NetScope*scope, NetExpr*root)
/* Make a NetNet object to carry the output vector. */
perm_string path = scope->local_symbol();
NetNet*osig = new NetNet(scope, path, NetNet::IMPLICIT, expr_width());
+ osig->set_line(*this);
osig->local_flag(true);
osig->data_type(data_type);
@@ -805,14 +815,14 @@ NetNet* NetEConst::synthesize(Design*des, NetScope*scope, NetExpr*)
}
NetNet*osig = new NetNet(scope, path, NetNet::IMPLICIT, width);
+ osig->set_line(*this);
osig->local_flag(true);
osig->data_type(expr_type());
osig->set_signed(has_sign());
- osig->set_line(*this);
NetConst*con = new NetConst(scope, scope->local_symbol(), value());
- des->add_node(con);
con->set_line(*this);
+ des->add_node(con);
connect(osig->pin(0), con->pin(0));
return osig;
@@ -826,14 +836,14 @@ NetNet* NetECReal::synthesize(Design*des, NetScope*scope, NetExpr*)
perm_string path = scope->local_symbol();
NetNet*osig = new NetNet(scope, path, NetNet::WIRE, 1);
+ osig->set_line(*this);
osig->local_flag(true);
osig->data_type(IVL_VT_REAL);
osig->set_signed(has_sign());
- osig->set_line(*this);
NetLiteral*con = new NetLiteral(scope, scope->local_symbol(), value_);
- des->add_node(con);
con->set_line(*this);
+ des->add_node(con);
connect(osig->pin(0), con->pin(0));
return osig;
@@ -860,6 +870,7 @@ NetNet* NetEUBits::synthesize(Design*des, NetScope*scope, NetExpr*root)
unsigned width = isig->vector_width();
NetNet*osig = new NetNet(scope, scope->local_symbol(),
NetNet::IMPLICIT, width);
+ osig->set_line(*this);
osig->data_type(expr_type());
osig->local_flag(true);
@@ -869,6 +880,7 @@ NetNet* NetEUBits::synthesize(Design*des, NetScope*scope, NetExpr*root)
switch (op()) {
case '~':
gate = new NetLogic(scope, oname, 2, NetLogic::NOT, width);
+ gate->set_line(*this);
break;
default:
gate = NULL;
@@ -906,8 +918,8 @@ NetNet* NetEUnary::synthesize(Design*des, NetScope*scope, NetExpr*root)
sig->data_type(sub->data_type());
NetAbs*tmp = new NetAbs(scope, scope->local_symbol(), sub->vector_width());
- des->add_node(tmp);
tmp->set_line(*this);
+ des->add_node(tmp);
connect(tmp->pin(1), sub->pin(0));
connect(tmp->pin(0), sig->pin(0));
@@ -970,10 +982,12 @@ NetNet* NetEUReduce::synthesize(Design*des, NetScope*scope, NetExpr*root)
NetUReduce*gate = new NetUReduce(scope, scope->local_symbol(),
rtype, isig->vector_width());
+ gate->set_line(*this);
des->add_node(gate);
NetNet*osig = new NetNet(scope, scope->local_symbol(),
NetNet::IMPLICIT, 1);
+ osig->set_line(*this);
osig->data_type(expr_type());
osig->local_flag(true);
@@ -1081,9 +1095,9 @@ NetNet* NetESelect::synthesize(Design *des, NetScope*scope, NetExpr*root)
NetNet*tmp = new NetNet(scope, scope->local_symbol(),
NetNet::WIRE, select_width);
+ tmp->set_line(*this);
tmp->data_type(sub->data_type());
tmp->local_flag(true);
- tmp->set_line(*this);
connect(sel->pin(0), tmp->pin(0));
unsigned concat_count = 1;
@@ -1108,9 +1122,9 @@ NetNet* NetESelect::synthesize(Design *des, NetScope*scope, NetExpr*root)
tmp = new NetNet(scope, scope->local_symbol(),
NetNet::WIRE, expr_width());
+ tmp->set_line(*this);
tmp->data_type(sub->data_type());
tmp->local_flag(true);
- tmp->set_line(*this);
connect(cat->pin(0), tmp->pin(0));
}
return tmp;
@@ -1152,9 +1166,9 @@ NetNet* NetESelect::synthesize(Design *des, NetScope*scope, NetExpr*root)
NetNet*net = new NetNet(scope, scope->local_symbol(),
NetNet::IMPLICIT, expr_width());
+ net->set_line(*this);
net->data_type(expr_type());
net->local_flag(true);
- net->set_line(*this);
if (has_sign()) {
NetSignExtend*pad = new NetSignExtend(scope,
scope->local_symbol(),
@@ -1183,9 +1197,9 @@ NetNet* NetESelect::synthesize(Design *des, NetScope*scope, NetExpr*root)
NetNet*tmp = new NetNet(scope, scope->local_symbol(),
NetNet::IMPLICIT, pad_width);
+ tmp->set_line(*this);
tmp->data_type(expr_type());
tmp->local_flag(true);
- tmp->set_line(*this);
connect(tmp->pin(0), con->pin(0));
connect(cat->pin(0), net->pin(0));
@@ -1237,6 +1251,7 @@ NetNet* NetETernary::synthesize(Design *des, NetScope*scope, NetExpr*root)
unsigned width=expr_width();
NetNet*osig = new NetNet(csig->scope(), path, NetNet::IMPLICIT, width);
+ osig->set_line(*this);
osig->data_type(expr_type());
osig->local_flag(true);
@@ -1259,6 +1274,7 @@ NetNet* NetETernary::synthesize(Design *des, NetScope*scope, NetExpr*root)
perm_string oname = csig->scope()->local_symbol();
NetMux *mux = new NetMux(csig->scope(), oname, width,
2, csig->vector_width());
+ mux->set_line(*this);
connect(tsig->pin(0), mux->pin_Data(1));
connect(fsig->pin(0), mux->pin_Data(0));
connect(osig->pin(0), mux->pin_Result());
@@ -1321,6 +1337,7 @@ static NetEvWait* make_func_trigger(Design*des, NetScope*scope, NetExpr*root)
NetEvProbe*pr = new NetEvProbe(scope, scope->local_symbol(),
ev, NetEvProbe::ANYEDGE,
nset->count());
+ pr->set_line(*root);
for (unsigned idx = 0 ; idx < nset->count() ; idx += 1)
connect(nset[0][idx], pr->pin(idx));
@@ -1369,10 +1386,10 @@ NetNet* NetESFunc::synthesize(Design*des, NetScope*scope, NetExpr*root)
NetNet*osig = new NetNet(scope, scope->local_symbol(),
NetNet::WIRE, def->wid);
+ osig->set_line(*this);
osig->local_flag(true);
osig->set_signed(def->type==IVL_VT_REAL? true : false);
osig->data_type(def->type);
- osig->set_line(*this);
connect(net->pin(0), osig->pin(0));
@@ -1437,6 +1454,7 @@ NetNet* NetEUFunc::synthesize(Design*des, NetScope*scope, NetExpr*root)
/* Create an output signal and connect it to the function. */
NetNet*osig = new NetNet(scope_, scope_->local_symbol(), NetNet::WIRE,
result_sig_->vector_width());
+ osig->set_line(*this);
osig->local_flag(true);
osig->data_type(result_sig_->expr_type());
connect(net->pin(0), osig->pin(0));
View
2 ivl.def
@@ -37,6 +37,8 @@ ivl_enum_width
ivl_event_any
ivl_event_basename
+ivl_event_file
+ivl_event_lineno
ivl_event_name
ivl_event_nany
ivl_event_neg
View
5 ivl_target.h
@@ -685,6 +685,8 @@ extern unsigned ivl_enum_width(ivl_enumtype_t net);
*
* Named events are referenced in trigger statements.
*
+ * Named events have file and line number information.
+ *
* Edge events are created implicitly by the @(...) Verilog syntax to
* watch for the correct type of edge for the functor being
* watched. The nodes to watch are collected into groups based on the
@@ -705,6 +707,9 @@ extern ivl_nexus_t ivl_event_neg(ivl_event_t net, unsigned idx);
extern unsigned ivl_event_npos(ivl_event_t net);
extern ivl_nexus_t ivl_event_pos(ivl_event_t net, unsigned idx);
+extern const char*ivl_event_file(ivl_event_t net);
+extern unsigned ivl_event_lineno(ivl_event_t net);
+
/* EXPRESSIONS
*
View
6 net_expr.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2002-2010 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 2002-2011 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -120,6 +120,7 @@ NetEBAdd* NetEBAdd::dup_expr() const
{
NetEBAdd*result = new NetEBAdd(op_, left_->dup_expr(),
right_->dup_expr());
+ result->set_line(*this);
return result;
}
@@ -225,6 +226,7 @@ NetEBDiv* NetEBDiv::dup_expr() const
{
NetEBDiv*result = new NetEBDiv(op_, left_->dup_expr(),
right_->dup_expr());
+ result->set_line(*this);
return result;
}
@@ -280,6 +282,7 @@ NetEBMult* NetEBMult::dup_expr() const
{
NetEBMult*result = new NetEBMult(op_, left_->dup_expr(),
right_->dup_expr());
+ result->set_line(*this);
return result;
}
@@ -347,6 +350,7 @@ NetEBShift* NetEBShift::dup_expr() const
{
NetEBShift*result = new NetEBShift(op_, left_->dup_expr(),
right_->dup_expr());
+ result->set_line(*this);
return result;
}
View
17 netmisc.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2001-2010 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 2001-2011 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -81,12 +81,14 @@ NetNet* sub_net_from(Design*des, NetScope*scope, long val, NetNet*sig)
{
NetNet*zero_net = new NetNet(scope, scope->local_symbol(),
NetNet::WIRE, sig->vector_width());
+ zero_net->set_line(*sig);
zero_net->data_type(sig->data_type());
zero_net->local_flag(true);
if (sig->data_type() == IVL_VT_REAL) {
verireal zero (val);
NetLiteral*zero_obj = new NetLiteral(scope, scope->local_symbol(), zero);
+ zero_obj->set_line(*sig);
des->add_node(zero_obj);
connect(zero_net->pin(0), zero_obj->pin(0));
@@ -95,12 +97,14 @@ NetNet* sub_net_from(Design*des, NetScope*scope, long val, NetNet*sig)
verinum zero ((int64_t)val);
zero = pad_to_width(zero, sig->vector_width());
NetConst*zero_obj = new NetConst(scope, scope->local_symbol(), zero);
+ zero_obj->set_line(*sig);
des->add_node(zero_obj);
connect(zero_net->pin(0), zero_obj->pin(0));
}
NetAddSub*adder = new NetAddSub(scope, scope->local_symbol(), sig->vector_width());
+ adder->set_line(*sig);
des->add_node(adder);
adder->attribute(perm_string::literal("LPM_Direction"), verinum("SUB"));
@@ -109,6 +113,7 @@ NetNet* sub_net_from(Design*des, NetScope*scope, long val, NetNet*sig)
NetNet*tmp = new NetNet(scope, scope->local_symbol(),
NetNet::WIRE, sig->vector_width());
+ tmp->set_line(*sig);
tmp->data_type(sig->data_type());
tmp->local_flag(true);
@@ -123,8 +128,8 @@ NetNet* cast_to_int2(Design*des, NetScope*scope, NetNet*src, unsigned wid)
return src;
NetNet*tmp = new NetNet(scope, scope->local_symbol(), NetNet::WIRE, wid);
- tmp->data_type(IVL_VT_BOOL);
tmp->set_line(*src);
+ tmp->data_type(IVL_VT_BOOL);
tmp->local_flag(true);
NetCastInt2*cast = new NetCastInt2(scope, scope->local_symbol(), wid);
@@ -143,8 +148,8 @@ NetNet* cast_to_int4(Design*des, NetScope*scope, NetNet*src, unsigned wid)
return src;
NetNet*tmp = new NetNet(scope, scope->local_symbol(), NetNet::WIRE, wid);
- tmp->data_type(IVL_VT_LOGIC);
tmp->set_line(*src);
+ tmp->data_type(IVL_VT_LOGIC);
tmp->local_flag(true);
NetCastInt4*cast = new NetCastInt4(scope, scope->local_symbol(), wid);
@@ -163,8 +168,8 @@ NetNet* cast_to_real(Design*des, NetScope*scope, NetNet*src)
return src;
NetNet*tmp = new NetNet(scope, scope->local_symbol(), NetNet::WIRE);
- tmp->data_type(IVL_VT_REAL);
tmp->set_line(*src);
+ tmp->data_type(IVL_VT_REAL);
tmp->local_flag(true);
NetCastReal*cast = new NetCastReal(scope, scope->local_symbol(), src->get_signed());
@@ -441,13 +446,13 @@ NetExpr* condition_reduce(NetExpr*expr)
verinum zero (verinum::V0, expr->expr_width());
NetEConst*ezero = new NetEConst(zero);
- ezero->cast_signed(expr->has_sign());
ezero->set_line(*expr);
+ ezero->cast_signed(expr->has_sign());
ezero->set_width(expr->expr_width());
NetEBComp*cmp = new NetEBComp('n', expr, ezero);
- cmp->cast_signed(false);
cmp->set_line(*expr);
+ cmp->cast_signed(false);
return cmp;
}
View
12 pad_to_width.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 1999-2009 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 1999-2011 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -64,30 +64,32 @@ NetNet*pad_to_width(Design*des, NetNet*net, unsigned wid, const LineInfo&info)
// Make the NetConcat and connect the input net to the lsb input.
NetConcat*cc = new NetConcat(scope, scope->local_symbol(), wid, 2);
+ cc->set_line(info);
des->add_node(cc);
connect(cc->pin(1), net->pin(0));
// Make a NetConst of the desired width and connect in to the
// lsb input of the NetConcat.
verinum pad(verinum::V0, wid - net->vector_width());
NetConst*con = new NetConst(scope, scope->local_symbol(), pad);
+ con->set_line(info);
des->add_node(con);
connect(cc->pin(2), con->pin(0));
// Make a NetNet for the NetConst to NetConcat link.
NetNet*tmp = new NetNet(scope, scope->local_symbol(),
NetNet::WIRE, wid - net->vector_width());
- tmp->data_type( net->data_type() );
tmp->set_line(info);
+ tmp->data_type( net->data_type() );
tmp->local_flag(true);
connect(cc->pin(2), tmp->pin(0));
// Create a NetNet of the output width and connect it to the
// NetConcat node output pin.
tmp = new NetNet(scope, scope->local_symbol(),
NetNet::WIRE, wid);
- tmp->data_type( net->data_type() );
tmp->set_line(info);
+ tmp->data_type( net->data_type() );
tmp->local_flag(true);
connect(cc->pin(0), tmp->pin(0));
@@ -127,14 +129,14 @@ NetNet*crop_to_width(Design*des, NetNet*net, unsigned wid)
return net;
NetPartSelect*ps = new NetPartSelect(net, 0, wid, NetPartSelect::VP);
- des->add_node(ps);
ps->set_line(*net);
+ des->add_node(ps);
NetNet*tmp = new NetNet(scope, scope->local_symbol(),
NetNet::WIRE, wid);
+ tmp->set_line(*net);
tmp->data_type(net->data_type());
tmp->local_flag(true);
- tmp->set_line(*net);
connect(ps->pin(0), tmp->pin(0));
return tmp;
View
13 t-dll-api.cc
@@ -290,6 +290,19 @@ extern "C" const char* ivl_event_basename(ivl_event_t net)
return net->name;
}
+
+extern "C" const char*ivl_event_file(ivl_event_t net)
+{
+ assert(net);
+ return net->file.str();
+}
+
+extern "C" unsigned ivl_event_lineno(ivl_event_t net)
+{
+ assert(net);
+ return net->lineno;
+}
+
extern "C" ivl_scope_t ivl_event_scope(ivl_event_t net)
{
return net->scope;
View
2 t-dll.cc
@@ -802,6 +802,8 @@ void dll_target::event(const NetEvent*net)
{
struct ivl_event_s *obj = new struct ivl_event_s;
+ FILE_NAME(obj, net);
+
ivl_scope_t scop = find_scope(des_, net->scope());
obj->name = net->name();
obj->scope = scop;
View
8 t-dll.h
@@ -202,6 +202,8 @@ struct ivl_delaypath_s {
struct ivl_event_s {
perm_string name;
ivl_scope_t scope;
+ perm_string file;
+ unsigned lineno;
unsigned nany, nneg, npos;
ivl_nexus_t*pins;
};
@@ -806,6 +808,12 @@ static inline void FILE_NAME(ivl_expr_t expr, const LineInfo*info)
expr->lineno = info->get_lineno();
}
+static inline void FILE_NAME(ivl_event_t event, const LineInfo*info)
+{
+ event->file = info->get_file();
+ event->lineno = info->get_lineno();
+}
+
static inline void FILE_NAME(ivl_lpm_t lpm, const LineInfo*info)
{
lpm->file = info->get_file();

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