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Allow SystemVerilog [size] dimension for unpacked arrays.

IEEE 1800-2005/9 says "each fixed-size dimension shall be represented by
an address range, such as [1:1024], or a single positive number to
specify the size of a fixed-size unpacked array, as in C. In other
words, [size] becomes the same as [0:size-1]."

This patch implements that translation in the parser.  It issues a
warning when doing so when the generation flag is less than 2005-sv.
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1 parent ce5c263 commit 97d2389cb09b8a5be8838c7ec2c4cc1321c25d13 @jaredcasper jaredcasper committed with steveicarus Nov 21, 2010
Showing with 26 additions and 0 deletions.
  1. +26 −0 parse.y
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26 parse.y
@@ -3463,6 +3463,19 @@ dimensions
tmp->push_back(index);
$$ = tmp;
}
+ | '[' expression ']'
+ { if (generation_flag < GN_VER2005_SV) {
+ warn_count += 1;
+ cerr << @2 << ": warning: Use of SystemVerilog [size] dimension. "
+ << "Use at least -g2005-sv to remove this warning." << endl;
+ }
+ list<index_component_t> *tmp = new list<index_component_t>;
+ index_component_t index;
+ index.msb = new PENumber(new verinum((uint64_t)0, integer_width));
+ index.lsb = new PEBinary('-', $2, new PENumber(new verinum((uint64_t)1, integer_width)));
+ tmp->push_back(index);
+ $$ = tmp;
+ }
| dimensions '[' expression ':' expression ']'
{ list<index_component_t> *tmp = $1;
index_component_t index;
@@ -3471,6 +3484,19 @@ dimensions
tmp->push_back(index);
$$ = tmp;
}
+ | dimensions '[' expression ']'
+ { if (generation_flag < GN_VER2005_SV) {
+ warn_count += 1;
+ cerr << @2 << ": warning: Use of SystemVerilog [size] dimension. "
+ << "Use at least -g2005-sv to remove this warning." << endl;
+ }
+ list<index_component_t> *tmp = $1;
+ index_component_t index;
+ index.msb = new PENumber(new verinum((uint64_t)0, integer_width));
+ index.lsb = new PEBinary('-', $3, new PENumber(new verinum((uint64_t)1, integer_width)));
+ tmp->push_back(index);
+ $$ = tmp;
+ }
/* This is used to express the return type of a function. */
function_range_or_type_opt

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