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Support wide divide nodes.
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steve committed Jan 3, 2006
1 parent 368c27c commit e1ce72e
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Showing 3 changed files with 31 additions and 22 deletions.
24 changes: 20 additions & 4 deletions vvp/arith.cc
Expand Up @@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: arith.cc,v 1.47 2005/11/10 13:27:16 steve Exp $"
#ident "$Id: arith.cc,v 1.48 2006/01/03 06:19:31 steve Exp $"
#endif

# include "arith.h"
Expand Down Expand Up @@ -67,17 +67,30 @@ vvp_arith_div::~vvp_arith_div()
{
}

void vvp_arith_div::wide_(vvp_net_ptr_t ptr)
void vvp_arith_div::wide4_(vvp_net_ptr_t ptr)
{
assert(0);
vvp_vector2_t a2 (op_a_);
if (a2.is_NaN()) {
vvp_send_vec4(ptr.ptr()->out, x_val_);
return;
}

vvp_vector2_t b2 (op_b_);
if (b2.is_NaN()) {
vvp_send_vec4(ptr.ptr()->out, x_val_);
return;
}

vvp_vector2_t res2 = a2 / b2;
vvp_send_vec4(ptr.ptr()->out, vector2_to_vector4(res2, wid_));
}

void vvp_arith_div::recv_vec4(vvp_net_ptr_t ptr, const vvp_vector4_t&bit)
{
dispatch_operand_(ptr, bit);

if (wid_ > 8 * sizeof(unsigned long)) {
wide_(ptr);
wide4_(ptr);
return ;
}

Expand Down Expand Up @@ -767,6 +780,9 @@ void vvp_arith_sub_real::recv_real(vvp_net_ptr_t ptr, double bit)

/*
* $Log: arith.cc,v $
* Revision 1.48 2006/01/03 06:19:31 steve
* Support wide divide nodes.
*
* Revision 1.47 2005/11/10 13:27:16 steve
* Handle very wide % and / operations using expanded vector2 support.
*
Expand Down
7 changes: 5 additions & 2 deletions vvp/arith.h
Expand Up @@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: arith.h,v 1.32 2005/07/06 04:29:25 steve Exp $"
#ident "$Id: arith.h,v 1.33 2006/01/03 06:19:31 steve Exp $"
#endif

# include "vvp_net.h"
Expand Down Expand Up @@ -59,7 +59,7 @@ class vvp_arith_div : public vvp_arith_ {
~vvp_arith_div();
void recv_vec4(vvp_net_ptr_t ptr, const vvp_vector4_t&bit);
private:
void wide_(vvp_net_ptr_t ptr);
void wide4_(vvp_net_ptr_t ptr);
bool signed_flag_;
};

Expand Down Expand Up @@ -233,6 +233,9 @@ class vvp_arith_sub_real : public vvp_arith_real_ {

/*
* $Log: arith.h,v $
* Revision 1.33 2006/01/03 06:19:31 steve
* Support wide divide nodes.
*
* Revision 1.32 2005/07/06 04:29:25 steve
* Implement real valued signals and arith nodes.
*
Expand Down
22 changes: 6 additions & 16 deletions vvp/vvp_net.cc
Expand Up @@ -16,7 +16,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ident "$Id: vvp_net.cc,v 1.49 2005/11/26 17:16:05 steve Exp $"
#ident "$Id: vvp_net.cc,v 1.50 2006/01/03 06:19:31 steve Exp $"

# include "config.h"
# include "vvp_net.h"
Expand Down Expand Up @@ -600,20 +600,6 @@ template <class T> T coerce_to_width(const T&that, unsigned width)

return res;
}
#if 0
vvp_vector4_t coerce_to_width(const vvp_vector4_t&that, unsigned width)
{
if (that.size() == width)
return that;

assert(that.size() > width);
vvp_vector4_t res (width);
for (unsigned idx = 0 ; idx < width ; idx += 1)
res.set_bit(idx, that.value(idx));

return res;
}
#endif

vvp_vector2_t::vvp_vector2_t()
{
Expand All @@ -628,7 +614,8 @@ vvp_vector2_t::vvp_vector2_t(unsigned long v, unsigned wid)
const unsigned words = (wid_ + bits_per_word-1) / bits_per_word;

vec_ = new unsigned long[words];
for (unsigned idx = 0 ; idx < words ; idx += 1)
vec_[0] = v;
for (unsigned idx = 1 ; idx < words ; idx += 1)
vec_[idx] = 0;
}

Expand Down Expand Up @@ -2140,6 +2127,9 @@ vvp_bit4_t compare_gtge_signed(const vvp_vector4_t&a,

/*
* $Log: vvp_net.cc,v $
* Revision 1.50 2006/01/03 06:19:31 steve
* Support wide divide nodes.
*
* Revision 1.49 2005/11/26 17:16:05 steve
* Force instruction that can be indexed.
*
Expand Down

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