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This directory contains the sources for a RISC-V Forth meta-compiler. Like any meta-compiler it has several pieces: * a RISC-V assembler * a RISC-V disassembler * a compiler that consumes target assembler and Forth source code and generates a target memory image * some kind of "tethering" connection, either over a serial line or a debug interface (eg, JTAG), that allows interactive coding and exploration Initially I'm targeting the HiFive1 board from SiFive, which features an FE310 chip containing an RV32IMAC core, and a debug interface based on the FTDI FT2232-HL. Currently muforth talks to the core via SiFive's RISC-V-enabled port of openocd. (In the future I want muforth to talk directly to the FTDI chip, doing all the JTAG itself.) As more cores, chips, and boards are released, I'll try to follow along with support. To get started, check out the documentation at http://muforth.nimblemachines.com/getting-started-with-risc-v/