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radeonsi: initial WIP SI code

This commit adds initial support for acceleration
on SI chips.  egltri is starting to work.

The SI/R600 llvm backend is currently included in mesa
but that may change in the future.

The plan is to write a single gallium driver and
use gallium to support X acceleration.

This commit contains patches from:
Tom Stellard <thomas.stellard@amd.com>
Michel Dänzer <michel.daenzer@amd.com>
Alex Deucher <alexander.deucher@amd.com>
Vadim Girlin <vadimgirlin@gmail.com>

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

The following commits were squashed in:

======================================================================

radeonsi: Remove unused winsys pointer

This was removed from r600g in commit:

commit 96d8829
Author: Marek Olšák <maraeo@gmail.com>
Date:   Fri Feb 17 01:49:49 2012 +0100

    gallium: remove unused winsys pointers in pipe_screen and pipe_context

    A winsys is already a private object of a driver.

======================================================================

radeonsi: Copy color clamping CAPs from r600

Not sure if the values of these CAPS are correct for radeonsi, but the
same changed were made to r600g in commit:

commit bc1c836
Author: Marek Olšák <maraeo@gmail.com>
Date:   Mon Jan 23 03:11:17 2012 +0100

    st/mesa: do vertex and fragment color clamping in shaders

    For ARB_color_buffer_float. Most hardware can't do it and st/mesa is
    the perfect place for a fallback.
    The exceptions are:
    - r500 (vertex clamp only)
    - nv50 (both)
    - nvc0 (both)
    - softpipe (both)

    We also have to take into account that r300 can do CLAMPED vertex colors only,
    while r600 can do UNCLAMPED vertex colors only. The difference can be expressed
    with the two new CAPs.

======================================================================

radeonsi: Remove PIPE_CAP_OUTPUT_READ

This CAP was dropped in commit:

commit 04e3240
Author: Marek Olšák <maraeo@gmail.com>
Date:   Thu Feb 23 23:44:36 2012 +0100

    gallium: remove PIPE_SHADER_CAP_OUTPUT_READ

    r600g is the only driver which has made use of it. The reason the CAP was
    added was to fix some piglit tests when the GLSL pass lower_output_reads
    didn't exist.

    However, not removing output reads breaks the fallback for glClampColorARB,
    which assumes outputs are not readable. The fix would be non-trivial
    and my personal preference is to remove the CAP, considering that reading
    outputs is uncommon and that we can now use lower_output_reads to fix
    the issue that the CAP was supposed to workaround in the first place.

======================================================================

radeonsi: Add missing parameters to rws->buffer_get_tiling() call

This was changed in commit:

commit c0c979e
Author: Jerome Glisse <jglisse@redhat.com>
Date:   Mon Jan 30 17:22:13 2012 -0500

    r600g: add support for common surface allocator for tiling v13

    Tiled surface have all kind of alignment constraint that needs to
    be met. Instead of having all this code duplicated btw ddx and
    mesa use common code in libdrm_radeon this also ensure that both
    ddx and mesa compute those alignment in the same way.

    v2 fix evergreen
    v3 fix compressed texture and workaround cube texture issue by
       disabling 2D array mode for cubemap (need to check if r7xx and
       newer are also affected by the issue)
    v4 fix texture array
    v5 fix evergreen and newer, split surface values computation from
       mipmap tree generation so that we can get them directly from the
       ddx
    v6 final fix to evergreen tile split value
    v7 fix mipmap offset to avoid to use random value, use color view
       depth view to address different layer as hardware is doing some
       magic rotation depending on the layer
    v8 fix COLOR_VIEW on r6xx for linear array mode, use COLOR_VIEW on
       evergreen, align bytes per pixel to a multiple of a dword
    v9 fix handling of stencil on evergreen, half fix for compressed
       texture
    v10 fix evergreen compressed texture proper support for stencil
        tile split. Fix stencil issue when array mode was clear by
        the kernel, always program stencil bo. On evergreen depth
        buffer bo need to be big enough to hold depth buffer + stencil
        buffer as even with stencil disabled things get written there.
    v11 rebase on top of mesa, fix pitch issue with 1d surface on evergreen,
        old ddx overestimate those. Fix linear case when pitch*height < 64.
        Fix r300g.
    v12 Fix linear case when pitch*height < 64 for old path, adapt to
        libdrm API change
    v13 add libdrm check

    Signed-off-by: Jerome Glisse <jglisse@redhat.com>

======================================================================

radeonsi: Remove PIPE_TRANSFER_MAP_PERMANENTLY

This was removed in commit:

commit 62f44f6
Author: Marek Olšák <maraeo@gmail.com>
Date:   Mon Mar 5 13:45:00 2012 +0100

    Revert "gallium: add flag PIPE_TRANSFER_MAP_PERMANENTLY"

    This reverts commit 0950086.

    It was decided to refactor the transfer API instead of adding workarounds
    to address the performance issues.

======================================================================

radeonsi: Handle PIPE_VIDEO_CAP_PREFERED_FORMAT.

Reintroduced in commit 9d9afcb.

======================================================================

radeonsi: nuke the fallback for vertex and fragment color clamping

Ported from r600g commit c2b800c.

======================================================================

radeonsi: don't expose transform_feedback2 without kernel support

Ported from r600g commit 15146fd.

======================================================================

radeonsi: Handle PIPE_CAP_GLSL_FEATURE_LEVEL.

Ported from r600g part of commit 171be75.

======================================================================

radeonsi: set minimum point size to 1.0 for non-sprite non-aa points.

Ported from r600g commit f183cc9.

======================================================================

radeonsi: rework and consolidate stencilref state setting.

Ported from r600g commit a236194.

======================================================================

radeonsi: cleanup setting DB_SHADER_CONTROL.

Ported from r600g commit 3d061ca.

======================================================================

radeonsi: Get rid of register masks.

Ported from r600g commits
3d061ca..9344ab3.

======================================================================

radeonsi: get rid of r600_context_reg.

Ported from r600g commits
9344ab3..bed20f0.

======================================================================

radeonsi: Fix regression from 'Get rid of register masks'.

======================================================================

radeonsi: optimize r600_resource_va.

Ported from r600g commit 669d876.

======================================================================

radeonsi: remove u8,u16,u32,u64 types.

Ported from r600g commit 78293b9.

======================================================================

radeonsi: merge r600_context with r600_pipe_context.

Ported from r600g commit e4340c1.

======================================================================

radeonsi: Miscellaneous context cleanups.

Ported from r600g commits
e4340c1..621e0db.

======================================================================

radeonsi: add a new simple API for state emission.

Ported from r600g commits
621e0db..f661405.

======================================================================

radeonsi: Also remove sbu_flags member of struct r600_reg.

Requires using sid.h instead of r600d.h for the new CP_COHER_CNTL definitions,
so some code needs to be disabled for now.

======================================================================

radeonsi: Miscellaneous simplifications.

Ported from r600g commits 38bf276 and
b0337b6.

======================================================================

radeonsi: Handle PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION.

Ported from commit 8b4f7b0.

======================================================================

radeonsi: Use a fake reloc to sleep for fences.

Ported from r600g commit 8cd03b9.

======================================================================

radeonsi: adapt to get_query_result interface change.

Ported from r600g commit 4445e17.
  • Loading branch information...
1 parent e55cf48 commit a75c6163e605f35b14f26930dd9227e4f337ec9e @tstellarAMD tstellarAMD committed Jan 6, 2012
Showing with 66,076 additions and 10 deletions.
  1. +2 −2 Android.mk
  2. +6 −0 configs/autoconf.in
  3. +17 −0 configure.ac
  4. +7 −0 include/pci_ids/pci_id_driver_map.h
  5. +40 −0 include/pci_ids/radeonsi_pci_ids.h
  6. +5 −2 src/egl/main/Android.mk
  7. +5 −2 src/gallium/Android.mk
  8. +2 −0 src/gallium/SConscript
  9. +12 −1 src/gallium/drivers/Makefile.am
  10. +47 −0 src/gallium/drivers/radeon/AMDGPU.h
  11. +44 −0 src/gallium/drivers/radeon/AMDGPUConstants.pm
  12. +65 −0 src/gallium/drivers/radeon/AMDGPUConvertToISA.cpp
  13. +126 −0 src/gallium/drivers/radeon/AMDGPUGenInstrEnums.pl
  14. +30 −0 src/gallium/drivers/radeon/AMDGPUGenShaderPatterns.pl
  15. +31 −0 src/gallium/drivers/radeon/AMDGPUISelLowering.cpp
  16. +35 −0 src/gallium/drivers/radeon/AMDGPUISelLowering.h
  17. +116 −0 src/gallium/drivers/radeon/AMDGPUInstrInfo.cpp
  18. +59 −0 src/gallium/drivers/radeon/AMDGPUInstrInfo.h
  19. +90 −0 src/gallium/drivers/radeon/AMDGPUInstructions.td
  20. +56 −0 src/gallium/drivers/radeon/AMDGPUIntrinsics.td
  21. +38 −0 src/gallium/drivers/radeon/AMDGPULowerShaderInstructions.cpp
  22. +40 −0 src/gallium/drivers/radeon/AMDGPULowerShaderInstructions.h
  23. +24 −0 src/gallium/drivers/radeon/AMDGPURegisterInfo.cpp
  24. +38 −0 src/gallium/drivers/radeon/AMDGPURegisterInfo.h
  25. +22 −0 src/gallium/drivers/radeon/AMDGPURegisterInfo.td
  26. +66 −0 src/gallium/drivers/radeon/AMDGPUReorderPreloadInstructions.cpp
  27. +180 −0 src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp
  28. +62 −0 src/gallium/drivers/radeon/AMDGPUTargetMachine.h
  29. +127 −0 src/gallium/drivers/radeon/AMDGPUUtil.cpp
  30. +49 −0 src/gallium/drivers/radeon/AMDGPUUtil.h
  31. +292 −0 src/gallium/drivers/radeon/AMDIL.h
  32. +19 −0 src/gallium/drivers/radeon/AMDIL.td
  33. +723 −0 src/gallium/drivers/radeon/AMDIL789IOExpansion.cpp
  34. +157 −0 src/gallium/drivers/radeon/AMDIL7XXDevice.cpp
  35. +77 −0 src/gallium/drivers/radeon/AMDIL7XXDevice.h
  36. +548 −0 src/gallium/drivers/radeon/AMDIL7XXIOExpansion.cpp
  37. +93 −0 src/gallium/drivers/radeon/AMDILAlgorithms.tpp
  38. +82 −0 src/gallium/drivers/radeon/AMDILAsmBackend.cpp
  39. +49 −0 src/gallium/drivers/radeon/AMDILAsmBackend.h
  40. +149 −0 src/gallium/drivers/radeon/AMDILAsmPrinter7XX.cpp
  41. +162 −0 src/gallium/drivers/radeon/AMDILAsmPrinterEG.cpp
  42. +254 −0 src/gallium/drivers/radeon/AMDILBarrierDetect.cpp
  43. +104 −0 src/gallium/drivers/radeon/AMDILBase.td
  44. +3,257 −0 src/gallium/drivers/radeon/AMDILCFGStructurizer.cpp
  45. +75 −0 src/gallium/drivers/radeon/AMDILCallingConv.td
  46. +46 −0 src/gallium/drivers/radeon/AMDILCodeEmitter.h
  47. +75 −0 src/gallium/drivers/radeon/AMDILCompilerErrors.h
  48. +31 −0 src/gallium/drivers/radeon/AMDILCompilerWarnings.h
  49. +1,022 −0 src/gallium/drivers/radeon/AMDILConversions.td
  50. +137 −0 src/gallium/drivers/radeon/AMDILDevice.cpp
  51. +132 −0 src/gallium/drivers/radeon/AMDILDevice.h
  52. +87 −0 src/gallium/drivers/radeon/AMDILDeviceInfo.cpp
  53. +89 −0 src/gallium/drivers/radeon/AMDILDeviceInfo.h
  54. +19 −0 src/gallium/drivers/radeon/AMDILDevices.h
  55. +1,093 −0 src/gallium/drivers/radeon/AMDILEGIOExpansion.cpp
  56. +71 −0 src/gallium/drivers/radeon/AMDILELFWriterInfo.cpp
  57. +54 −0 src/gallium/drivers/radeon/AMDILELFWriterInfo.h
  58. +522 −0 src/gallium/drivers/radeon/AMDILEnumeratedTypes.td
  59. +211 −0 src/gallium/drivers/radeon/AMDILEvergreenDevice.cpp
  60. +93 −0 src/gallium/drivers/radeon/AMDILEvergreenDevice.h
  61. +450 −0 src/gallium/drivers/radeon/AMDILFormats.td
  62. +53 −0 src/gallium/drivers/radeon/AMDILFrameLowering.cpp
  63. +46 −0 src/gallium/drivers/radeon/AMDILFrameLowering.h
  64. +1,353 −0 src/gallium/drivers/radeon/AMDILGlobalManager.cpp
  65. +256 −0 src/gallium/drivers/radeon/AMDILGlobalManager.h
  66. +1,160 −0 src/gallium/drivers/radeon/AMDILIOExpansion.cpp
  67. +320 −0 src/gallium/drivers/radeon/AMDILIOExpansion.h
  68. +457 −0 src/gallium/drivers/radeon/AMDILISelDAGToDAG.cpp
  69. +5,612 −0 src/gallium/drivers/radeon/AMDILISelLowering.cpp
  70. +527 −0 src/gallium/drivers/radeon/AMDILISelLowering.h
  71. +171 −0 src/gallium/drivers/radeon/AMDILImageExpansion.cpp
  72. +271 −0 src/gallium/drivers/radeon/AMDILInliner.cpp
  73. +709 −0 src/gallium/drivers/radeon/AMDILInstrInfo.cpp
  74. +175 −0 src/gallium/drivers/radeon/AMDILInstrInfo.h
  75. +115 −0 src/gallium/drivers/radeon/AMDILInstrInfo.td
  76. +66 −0 src/gallium/drivers/radeon/AMDILInstrPatterns.td
  77. +2,436 −0 src/gallium/drivers/radeon/AMDILInstructions.td
  78. +190 −0 src/gallium/drivers/radeon/AMDILIntrinsicInfo.cpp
  79. +49 −0 src/gallium/drivers/radeon/AMDILIntrinsicInfo.h
  80. +705 −0 src/gallium/drivers/radeon/AMDILIntrinsics.td
  81. +84 −0 src/gallium/drivers/radeon/AMDILKernel.h
  82. +1,356 −0 src/gallium/drivers/radeon/AMDILKernelManager.cpp
  83. +177 −0 src/gallium/drivers/radeon/AMDILKernelManager.h
  84. +128 −0 src/gallium/drivers/radeon/AMDILLiteralManager.cpp
  85. +158 −0 src/gallium/drivers/radeon/AMDILMCCodeEmitter.cpp
  86. +597 −0 src/gallium/drivers/radeon/AMDILMachineFunctionInfo.cpp
  87. +422 −0 src/gallium/drivers/radeon/AMDILMachineFunctionInfo.h
  88. +173 −0 src/gallium/drivers/radeon/AMDILMachinePeephole.cpp
  89. +1,266 −0 src/gallium/drivers/radeon/AMDILModuleInfo.cpp
  90. +159 −0 src/gallium/drivers/radeon/AMDILModuleInfo.h
  91. +1,440 −0 src/gallium/drivers/radeon/AMDILMultiClass.td
  92. +71 −0 src/gallium/drivers/radeon/AMDILNIDevice.cpp
  93. +59 −0 src/gallium/drivers/radeon/AMDILNIDevice.h
  94. +325 −0 src/gallium/drivers/radeon/AMDILNodes.td
  95. +37 −0 src/gallium/drivers/radeon/AMDILOperands.td
  96. +504 −0 src/gallium/drivers/radeon/AMDILPatterns.td
  97. +1,211 −0 src/gallium/drivers/radeon/AMDILPeepholeOptimizer.cpp
  98. +2,551 −0 src/gallium/drivers/radeon/AMDILPointerManager.cpp
  99. +209 −0 src/gallium/drivers/radeon/AMDILPointerManager.h
  100. +293 −0 src/gallium/drivers/radeon/AMDILPrintfConvert.cpp
  101. +174 −0 src/gallium/drivers/radeon/AMDILProfiles.td
  102. +200 −0 src/gallium/drivers/radeon/AMDILRegisterInfo.cpp
  103. +91 −0 src/gallium/drivers/radeon/AMDILRegisterInfo.h
  104. +964 −0 src/gallium/drivers/radeon/AMDILRegisterInfo.td
  105. +49 −0 src/gallium/drivers/radeon/AMDILSIDevice.cpp
  106. +45 −0 src/gallium/drivers/radeon/AMDILSIDevice.h
  107. +179 −0 src/gallium/drivers/radeon/AMDILSubtarget.cpp
  108. +75 −0 src/gallium/drivers/radeon/AMDILSubtarget.h
  109. +195 −0 src/gallium/drivers/radeon/AMDILTargetMachine.cpp
  110. +75 −0 src/gallium/drivers/radeon/AMDILTargetMachine.h
  111. +120 −0 src/gallium/drivers/radeon/AMDILTokenDesc.td
  112. +683 −0 src/gallium/drivers/radeon/AMDILUtilityFunctions.cpp
  113. +362 −0 src/gallium/drivers/radeon/AMDILUtilityFunctions.h
  114. +75 −0 src/gallium/drivers/radeon/AMDILVersion.td
  115. +43 −0 src/gallium/drivers/radeon/LICENSE.TXT
  116. +107 −0 src/gallium/drivers/radeon/MCTargetDesc/AMDILMCAsmInfo.cpp
  117. +30 −0 src/gallium/drivers/radeon/MCTargetDesc/AMDILMCAsmInfo.h
  118. +66 −0 src/gallium/drivers/radeon/MCTargetDesc/AMDILMCTargetDesc.cpp
  119. +36 −0 src/gallium/drivers/radeon/MCTargetDesc/AMDILMCTargetDesc.h
  120. +77 −0 src/gallium/drivers/radeon/Makefile
  121. +86 −0 src/gallium/drivers/radeon/Makefile.sources
  122. +28 −0 src/gallium/drivers/radeon/Processors.td
  123. +776 −0 src/gallium/drivers/radeon/R600CodeEmitter.cpp
  124. +171 −0 src/gallium/drivers/radeon/R600GenRegisterInfo.pl
  125. +102 −0 src/gallium/drivers/radeon/R600ISelLowering.cpp
  126. +40 −0 src/gallium/drivers/radeon/R600ISelLowering.h
  127. +16 −0 src/gallium/drivers/radeon/R600InstrFormats.td
  128. +109 −0 src/gallium/drivers/radeon/R600InstrInfo.cpp
  129. +74 −0 src/gallium/drivers/radeon/R600InstrInfo.h
  130. +931 −0 src/gallium/drivers/radeon/R600Instructions.td
  131. +40 −0 src/gallium/drivers/radeon/R600Intrinsics.td
  132. +503 −0 src/gallium/drivers/radeon/R600KernelParameters.cpp
  133. +28 −0 src/gallium/drivers/radeon/R600KernelParameters.h
  134. +546 −0 src/gallium/drivers/radeon/R600LowerInstructions.cpp
  135. +143 −0 src/gallium/drivers/radeon/R600LowerShaderInstructions.cpp
  136. +49 −0 src/gallium/drivers/radeon/R600OpenCLUtils.h
  137. +102 −0 src/gallium/drivers/radeon/R600RegisterInfo.cpp
  138. +44 −0 src/gallium/drivers/radeon/R600RegisterInfo.h
  139. +34 −0 src/gallium/drivers/radeon/R600Schedule.td
  140. +110 −0 src/gallium/drivers/radeon/SIAssignInterpRegs.cpp
  141. +274 −0 src/gallium/drivers/radeon/SICodeEmitter.cpp
  142. +89 −0 src/gallium/drivers/radeon/SIConvertToISA.cpp
  143. +278 −0 src/gallium/drivers/radeon/SIGenRegisterInfo.pl
  144. +151 −0 src/gallium/drivers/radeon/SIISelLowering.cpp
  145. +44 −0 src/gallium/drivers/radeon/SIISelLowering.h
  146. +128 −0 src/gallium/drivers/radeon/SIInstrFormats.td
  147. +173 −0 src/gallium/drivers/radeon/SIInstrInfo.cpp
  148. +95 −0 src/gallium/drivers/radeon/SIInstrInfo.h
  149. +472 −0 src/gallium/drivers/radeon/SIInstrInfo.td
  150. +962 −0 src/gallium/drivers/radeon/SIInstructions.td
  151. +34 −0 src/gallium/drivers/radeon/SIIntrinsics.td
  152. +90 −0 src/gallium/drivers/radeon/SILowerShaderInstructions.cpp
  153. +62 −0 src/gallium/drivers/radeon/SIMachineFunctionInfo.cpp
  154. +36 −0 src/gallium/drivers/radeon/SIMachineFunctionInfo.h
  155. +71 −0 src/gallium/drivers/radeon/SIPropagateImmReads.cpp
  156. +66 −0 src/gallium/drivers/radeon/SIRegisterInfo.cpp
  157. +46 −0 src/gallium/drivers/radeon/SIRegisterInfo.h
  158. +15 −0 src/gallium/drivers/radeon/SISchedule.td
  159. +32 −0 src/gallium/drivers/radeon/TargetInfo/AMDILTargetInfo.cpp
  160. +34 −0 src/gallium/drivers/radeon/loader.cpp
  161. +136 −0 src/gallium/drivers/radeon/radeon_llvm.h
  162. +145 −0 src/gallium/drivers/radeon/radeon_llvm_emit.cpp
  163. +660 −0 src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
  164. +38 −0 src/gallium/drivers/radeonsi/Android.mk
  165. +24 −0 src/gallium/drivers/radeonsi/Makefile
  166. +13 −0 src/gallium/drivers/radeonsi/Makefile.sources
  167. +17 −0 src/gallium/drivers/radeonsi/SConscript
  168. +561 −0 src/gallium/drivers/radeonsi/evergreen_hw_context.c
  169. +2,169 −0 src/gallium/drivers/radeonsi/evergreen_state.c
  170. +245 −0 src/gallium/drivers/radeonsi/r600.h
  171. +379 −0 src/gallium/drivers/radeonsi/r600_blit.c
  172. +282 −0 src/gallium/drivers/radeonsi/r600_buffer.c
  173. +1,151 −0 src/gallium/drivers/radeonsi/r600_hw_context.c
  174. +76 −0 src/gallium/drivers/radeonsi/r600_hw_context_priv.h
  175. +130 −0 src/gallium/drivers/radeonsi/r600_query.c
  176. +64 −0 src/gallium/drivers/radeonsi/r600_resource.c
  177. +105 −0 src/gallium/drivers/radeonsi/r600_resource.h
  178. +899 −0 src/gallium/drivers/radeonsi/r600_state_common.c
  179. +825 −0 src/gallium/drivers/radeonsi/r600_texture.c
  180. +54 −0 src/gallium/drivers/radeonsi/r600_translate.c
  181. +731 −0 src/gallium/drivers/radeonsi/radeonsi_pipe.c
  182. +490 −0 src/gallium/drivers/radeonsi/radeonsi_pipe.h
  183. +30 −0 src/gallium/drivers/radeonsi/radeonsi_public.h
  184. +565 −0 src/gallium/drivers/radeonsi/radeonsi_shader.c
  185. +4 −0 src/gallium/drivers/radeonsi/radeonsi_shader.h
  186. +7,668 −0 src/gallium/drivers/radeonsi/sid.h
  187. +26 −0 src/gallium/targets/dri-radeonsi/Makefile
  188. +25 −0 src/gallium/targets/dri-radeonsi/SConscript
  189. +40 −0 src/gallium/targets/dri-radeonsi/target.c
  190. +3 −0 src/gallium/targets/egl-static/Android.mk
  191. +11 −0 src/gallium/targets/egl-static/Makefile
  192. +2 −1 src/gallium/targets/egl-static/SConscript
  193. +27 −0 src/gallium/targets/egl-static/egl_pipe.c
  194. +13 −0 src/gallium/targets/gbm/Makefile
  195. +26 −0 src/gallium/targets/gbm/pipe_radeonsi.c
  196. +24 −0 src/gallium/targets/xorg-radeonsi/Makefile
  197. +26 −0 src/gallium/targets/xorg-radeonsi/target.c
  198. +148 −0 src/gallium/targets/xorg-radeonsi/xorg.c
  199. +7 −1 src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
  200. +2 −1 src/gallium/winsys/radeon/drm/radeon_drm_winsys.h
View
@@ -24,7 +24,7 @@
# BOARD_GPU_DRIVERS should be defined. The valid values are
#
# classic drivers: i915 i965
-# gallium drivers: swrast i915g nouveau r300g r600g vmwgfx
+# gallium drivers: swrast i915g nouveau r300g r600g radeonsi vmwgfx
#
# The main target is libGLES_mesa. For each classic driver enabled, a DRI
# module will also be built. DRI modules will be loaded by libGLES_mesa.
@@ -37,7 +37,7 @@ DRM_TOP := external/drm
DRM_GRALLOC_TOP := hardware/drm_gralloc
classic_drivers := i915 i965
-gallium_drivers := swrast i915g nouveau r300g r600g vmwgfx
+gallium_drivers := swrast i915g nouveau r300g r600g radeonsi vmwgfx
MESA_GPU_DRIVERS := $(strip $(BOARD_GPU_DRIVERS))
View
@@ -32,9 +32,12 @@ INTEL_LIBS = @INTEL_LIBS@
INTEL_CFLAGS = @INTEL_CFLAGS@
X11_LIBS = @X11_LIBS@
X11_CFLAGS = @X11_CFLAGS@
+LLVM_BINDIR = @LLVM_BINDIR@
LLVM_CFLAGS = @LLVM_CFLAGS@
+LLVM_CXXFLAGS = @LLVM_CXXFLAGS@
LLVM_LDFLAGS = @LLVM_LDFLAGS@
LLVM_LIBS = @LLVM_LIBS@
+LLVM_INCLUDEDIR = @LLVM_INCLUDEDIR@
GLW_CFLAGS = @GLW_CFLAGS@
GLX_TLS = @GLX_TLS@
DRI_CFLAGS = @DRI_CFLAGS@
@@ -58,6 +61,9 @@ AWK = @AWK@
GREP = @GREP@
NM = @NM@
+# Perl
+PERL = @PERL@
+
# Python and flags (generally only needed by the developers)
PYTHON2 = @PYTHON2@
PYTHON_FLAGS = -t -O -O
View
@@ -67,6 +67,8 @@ if test ! -f "$srcdir/src/glsl/glcpp/glcpp-parse.y"; then
fi
AC_PROG_LEX
+AC_PATH_PROG([PERL], [perl])
+
dnl Our fallback install-sh is a symlink to minstall. Use the existing
dnl configuration in that case.
AC_PROG_INSTALL
@@ -1647,9 +1649,12 @@ if test "x$with_gallium_drivers" != x; then
SRC_DIRS="$SRC_DIRS gallium gallium/winsys gallium/targets"
fi
+AC_SUBST([LLVM_BINDIR])
AC_SUBST([LLVM_CFLAGS])
+AC_SUBST([LLVM_CXXFLAGS])
AC_SUBST([LLVM_LIBS])
AC_SUBST([LLVM_LDFLAGS])
+AC_SUBST([LLVM_INCLUDEDIR])
AC_SUBST([LLVM_VERSION])
case "x$enable_opengl$enable_gles1$enable_gles2" in
@@ -1795,6 +1800,9 @@ if test "x$enable_gallium_llvm" = xyes; then
LLVM_LIBS="`$LLVM_CONFIG --libs engine bitwriter`"
fi
LLVM_LDFLAGS=`$LLVM_CONFIG --ldflags`
+ LLVM_BINDIR=`$LLVM_CONFIG --bindir`
+ LLVM_CXXFLAGS=`$LLVM_CONFIG --cxxflags`
+ LLVM_INCLUDEDIR=`$LLVM_CONFIG --includedir`
DEFINES="$DEFINES -D__STDC_CONSTANT_MACROS"
MESA_LLVM=1
else
@@ -1898,6 +1906,14 @@ if test "x$with_gallium_drivers" != x; then
GALLIUM_DRIVERS_DIRS="$GALLIUM_DRIVERS_DIRS r600"
gallium_check_st "radeon/drm" "dri-r600" "xorg-r600" "" "xvmc-r600" "vdpau-r600" "va-r600"
;;
+ xradeonsi)
+ GALLIUM_DRIVERS_DIRS="$GALLIUM_DRIVERS_DIRS radeonsi"
+ if test "x$LLVM_VERSION" != "x3.1"; then
+ AC_MSG_ERROR([LLVM 3.1 is required to build the radeonsi driver.])
+ fi
+ NEED_RADEON_GALLIUM=yes;
+ gallium_check_st "radeon/drm" "dri-radeonsi" "xorg-radeonsi"
+ ;;
xnouveau)
PKG_CHECK_MODULES([NOUVEAU], [libdrm_nouveau >= $LIBDRM_NOUVEAU_REQUIRED])
GALLIUM_DRIVERS_DIRS="$GALLIUM_DRIVERS_DIRS nouveau nvfx nv50 nvc0"
@@ -1957,6 +1973,7 @@ done
AM_CONDITIONAL(HAVE_GALAHAD_GALLIUM, test x$HAVE_GALAHAD_GALLIUM = xyes)
AM_CONDITIONAL(HAVE_IDENTITY_GALLIUM, test x$HAVE_IDENTITY_GALLIUM = xyes)
AM_CONDITIONAL(HAVE_NOOP_GALLIUM, test x$HAVE_NOOP_GALLIUM = xyes)
+AM_CONDITIONAL(NEED_RADEON_GALLIUM, test x$NEED_RADEON_GALLIUM = xyes)
AC_SUBST([GALLIUM_MAKE_DIRS])
dnl prepend CORE_DIRS to SRC_DIRS
@@ -45,6 +45,12 @@ static const int r600_chip_ids[] = {
#undef CHIPSET
};
+static const int radeonsi_chip_ids[] = {
+#define CHIPSET(chip, name, family) chip,
+#include "pci_ids/radeonsi_pci_ids.h"
+#undef CHIPSET
+};
+
static const int vmwgfx_chip_ids[] = {
#define CHIPSET(chip, name, family) chip,
#include "pci_ids/vmwgfx_pci_ids.h"
@@ -65,6 +71,7 @@ static const struct {
#endif
{ 0x1002, "r300", r300_chip_ids, ARRAY_SIZE(r300_chip_ids) },
{ 0x1002, "r600", r600_chip_ids, ARRAY_SIZE(r600_chip_ids) },
+ { 0x1002, "radeonsi", radeonsi_chip_ids, ARRAY_SIZE(radeonsi_chip_ids) },
{ 0x10de, "nouveau", NULL, -1 },
{ 0x15ad, "vmwgfx", vmwgfx_chip_ids, ARRAY_SIZE(vmwgfx_chip_ids) },
{ 0x0000, NULL, NULL, 0 },
@@ -0,0 +1,40 @@
+CHIPSET(0x6780, TAHITI_6780, TAHITI)
+CHIPSET(0x6784, TAHITI_6784, TAHITI)
+CHIPSET(0x6788, TAHITI_678A, TAHITI)
+CHIPSET(0x678A, TAHITI_678A, TAHITI)
+CHIPSET(0x6790, TAHITI_6790, TAHITI)
+CHIPSET(0x6798, TAHITI_6798, TAHITI)
+CHIPSET(0x6799, TAHITI_6799, TAHITI)
+CHIPSET(0x679A, TAHITI_679E, TAHITI)
+CHIPSET(0x679E, TAHITI_679E, TAHITI)
+CHIPSET(0x679F, TAHITI_679F, TAHITI)
+
+CHIPSET(0x6800, PITCAIRN_6800, PITCAIRN)
+CHIPSET(0x6801, PITCAIRN_6801, PITCAIRN)
+CHIPSET(0x6802, PITCAIRN_6802, PITCAIRN)
+CHIPSET(0x6808, PITCAIRN_6808, PITCAIRN)
+CHIPSET(0x6809, PITCAIRN_6809, PITCAIRN)
+CHIPSET(0x6810, PITCAIRN_6810, PITCAIRN)
+CHIPSET(0x6818, PITCAIRN_6818, PITCAIRN)
+CHIPSET(0x6819, PITCAIRN_6819, PITCAIRN)
+CHIPSET(0x684C, PITCAIRN_684C, PITCAIRN)
+
+CHIPSET(0x6820, VERDE_6820, VERDE)
+CHIPSET(0x6821, VERDE_6821, VERDE)
+CHIPSET(0x6823, VERDE_6824, VERDE)
+CHIPSET(0x6824, VERDE_6824, VERDE)
+CHIPSET(0x6825, VERDE_6825, VERDE)
+CHIPSET(0x6826, VERDE_6825, VERDE)
+CHIPSET(0x6827, VERDE_6827, VERDE)
+CHIPSET(0x6828, VERDE_6828, VERDE)
+CHIPSET(0x6829, VERDE_6829, VERDE)
+CHIPSET(0x682D, VERDE_682D, VERDE)
+CHIPSET(0x682F, VERDE_682F, VERDE)
+CHIPSET(0x6830, VERDE_6830, VERDE)
+CHIPSET(0x6831, VERDE_6831, VERDE)
+CHIPSET(0x6837, VERDE_6831, VERDE)
+CHIPSET(0x6838, VERDE_6838, VERDE)
+CHIPSET(0x6839, VERDE_6839, VERDE)
+CHIPSET(0x683B, VERDE_683B, VERDE)
+CHIPSET(0x683D, VERDE_683D, VERDE)
+CHIPSET(0x683F, VERDE_683F, VERDE)
View
@@ -107,15 +107,18 @@ gallium_DRIVERS += \
LOCAL_SHARED_LIBRARIES += libdrm_nouveau
endif
-# r300g/r600g
-ifneq ($(filter r300g r600g, $(MESA_GPU_DRIVERS)),)
+# r300g/r600g/radeonsi
+ifneq ($(filter r300g r600g radeonsi, $(MESA_GPU_DRIVERS)),)
gallium_DRIVERS += libmesa_winsys_radeon
ifneq ($(filter r300g, $(MESA_GPU_DRIVERS)),)
gallium_DRIVERS += libmesa_pipe_r300
endif
ifneq ($(filter r600g, $(MESA_GPU_DRIVERS)),)
gallium_DRIVERS += libmesa_pipe_r600
endif
+ifneq ($(filter radeonsi, $(MESA_GPU_DRIVERS)),)
+gallium_DRIVERS += libmesa_pipe_radeonsi
+endif
endif
# vmwgfx
View
@@ -49,15 +49,18 @@ SUBDIRS += \
drivers/nvc0
endif
-# r300g/r600g
-ifneq ($(filter r300g r600g, $(MESA_GPU_DRIVERS)),)
+# r300g/r600g/radeonsi
+ifneq ($(filter r300g r600g radeonsi, $(MESA_GPU_DRIVERS)),)
SUBDIRS += winsys/radeon/drm
ifneq ($(filter r300g, $(MESA_GPU_DRIVERS)),)
SUBDIRS += drivers/r300
endif
ifneq ($(filter r600g, $(MESA_GPU_DRIVERS)),)
SUBDIRS += drivers/r600
endif
+ifneq ($(filter radeonsi, $(MESA_GPU_DRIVERS)),)
+SUBDIRS += drivers/radeonsi
+endif
endif
# vmwgfx
View
@@ -33,6 +33,7 @@ if env['drm']:
SConscript([
'drivers/r300/SConscript',
'drivers/r600/SConscript',
+ 'drivers/radeonsi/SConscript',
])
# XXX: nouveau drivers have a tight dependency on libdrm, so to enable
# we need some version logic before we enable them. Also, ATM there is
@@ -152,6 +153,7 @@ if not env['embedded']:
SConscript([
'targets/dri-r300/SConscript',
'targets/dri-r600/SConscript',
+ 'targets/dri-radeonsi/SConscript',
])
if env['xorg'] and env['drm']:
@@ -10,6 +10,8 @@ AM_CPPFLAGS = \
noinst_LIBRARIES =
+SUBDIRS =
+
################################################################################
if HAVE_GALAHAD_GALLIUM
@@ -52,7 +54,16 @@ noop_libnoop_a_SOURCES = \
endif
################################################################################
-SUBDIRS = $(GALLIUM_MAKE_DIRS)
+
+if NEED_RADEON_GALLIUM
+
+SUBDIRS+= radeon
+
+endif
+
+################################################################################
+
+SUBDIRS+= $(GALLIUM_MAKE_DIRS)
# FIXME: Remove when the rest of Gallium is converted to automake.
default: all
@@ -0,0 +1,47 @@
+//===-- AMDGPU.h - TODO: Add brief description -------===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// TODO: Add full description
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef AMDGPU_H
+#define AMDGPU_H
+
+#include "AMDGPUTargetMachine.h"
+#include "llvm/Support/TargetRegistry.h"
+#include "llvm/Target/TargetMachine.h"
+
+namespace llvm {
+ class FunctionPass;
+ class AMDGPUTargetMachine;
+
+ FunctionPass *createR600CodeEmitterPass(formatted_raw_ostream &OS);
+ FunctionPass *createR600LowerShaderInstructionsPass(TargetMachine &tm);
+ FunctionPass *createR600LowerInstructionsPass(TargetMachine &tm);
+
+ FunctionPass *createSIAssignInterpRegsPass(TargetMachine &tm);
+ FunctionPass *createSIConvertToISAPass(TargetMachine &tm);
+ FunctionPass *createSIInitMachineFunctionInfoPass(TargetMachine &tm);
+ FunctionPass *createSILowerShaderInstructionsPass(TargetMachine &tm);
+ FunctionPass *createSIPropagateImmReadsPass(TargetMachine &tm);
+ FunctionPass *createSICodeEmitterPass(formatted_raw_ostream &OS);
+
+ FunctionPass *createAMDGPUReorderPreloadInstructionsPass(TargetMachine &tm);
+
+ FunctionPass *createAMDGPULowerShaderInstructionsPass(TargetMachine &tm);
+
+ FunctionPass *createAMDGPUDelimitInstGroupsPass(TargetMachine &tm);
+
+ FunctionPass *createAMDGPUConvertToISAPass(TargetMachine &tm);
+
+ FunctionPass *createAMDGPUFixRegClassesPass(TargetMachine &tm);
+
+} /* End namespace llvm */
+#endif /* AMDGPU_H */
@@ -0,0 +1,44 @@
+#===-- AMDGPUConstants.pm - TODO: Add brief description -------===#
+#
+# The LLVM Compiler Infrastructure
+#
+# This file is distributed under the University of Illinois Open Source
+# License. See LICENSE.TXT for details.
+#
+#===----------------------------------------------------------------------===#
+#
+# TODO: Add full description
+#
+#===----------------------------------------------------------------------===#
+
+package AMDGPUConstants;
+
+use base 'Exporter';
+
+use constant CONST_REG_COUNT => 256;
+use constant TEMP_REG_COUNT => 128;
+
+our @EXPORT = ('TEMP_REG_COUNT', 'CONST_REG_COUNT', 'get_hw_index', 'get_chan_str');
+
+sub get_hw_index {
+ my ($index) = @_;
+ return int($index / 4);
+}
+
+sub get_chan_str {
+ my ($index) = @_;
+ my $chan = $index % 4;
+ if ($chan == 0 ) {
+ return 'X';
+ } elsif ($chan == 1) {
+ return 'Y';
+ } elsif ($chan == 2) {
+ return 'Z';
+ } elsif ($chan == 3) {
+ return 'W';
+ } else {
+ die("Unknown chan value: $chan");
+ }
+}
+
+1;
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