From 97c95d88ad7e63bbad57c8531f6d600e1510c017 Mon Sep 17 00:00:00 2001 From: noxuz Date: Tue, 31 Mar 2020 18:01:06 -0600 Subject: [PATCH] Variable length array fix inside ISR, used S32K driver's frametype for ISR FIFO dequeue declaration and ordered includes in accordance to google c++ style --- S32K/libuavcan/media/S32K/canfd.hpp | 2 +- S32K/src/canfd.cpp | 32 ++++++++++++++++------------- 2 files changed, 19 insertions(+), 15 deletions(-) diff --git a/S32K/libuavcan/media/S32K/canfd.hpp b/S32K/libuavcan/media/S32K/canfd.hpp index 005c168..d7406fc 100644 --- a/S32K/libuavcan/media/S32K/canfd.hpp +++ b/S32K/libuavcan/media/S32K/canfd.hpp @@ -14,8 +14,8 @@ #ifndef CANFD_HPP_INCLUDED #define CANFD_HPP_INCLUDED -#include "libuavcan/media/interfaces.hpp" #include "libuavcan/media/can.hpp" +#include "libuavcan/media/interfaces.hpp" namespace libuavcan { diff --git a/S32K/src/canfd.cpp b/S32K/src/canfd.cpp index 39cf09a..b3b6118 100644 --- a/S32K/src/canfd.cpp +++ b/S32K/src/canfd.cpp @@ -18,26 +18,26 @@ # define UAVCAN_NODE_BOARD_USED 1 #endif -/* - * Include desired target S32K14x memory map header file dependency, - * defaults to S32K146 from NXP's UCANS32K146 board - */ -#include "S32K146.h" - /* S32K driver header file */ #include "libuavcan/media/S32K/canfd.hpp" +/* STL queue for the intermediate ISR buffer */ +#include + /* libuavcan core header files */ #include "libuavcan/media/can.hpp" #include "libuavcan/media/interfaces.hpp" #include "libuavcan/platform/memory.hpp" -/* STL queue for the intermediate ISR buffer */ -#include - /* CMSIS Core for __REV macro use */ #include "s32_core_cm4.h" +/* + * Include desired target S32K14x memory map header file dependency, + * defaults to S32K146 from NXP's UCANS32K146 board + */ +#include "S32K146.h" + /* * Preprocessor conditionals for deducing the number of CANFD FlexCAN instances in target MCU, * this macro is defined inside the desired memory map "S32K14x.h" included header file @@ -92,10 +92,13 @@ constexpr static std::uint8_t MB_Data_Offset = 2u; constexpr static std::uint32_t cycles_timeout = 0xFFFFFF; /* Frame's reception FIFO as a dequeue with libuavcan's static memory pool, one for each available interface */ -static std::deque, - platform::memory::PoolAllocator)>> +static std::deque> g_frame_ISRbuffer[CANFD_Count]; +/* Intermediate array for harvesting the received frame's payload in the ISR */ +volatile static std::uint32_t data_ISR_word[InterfaceGroup::FrameType::MTUBytes >> 2u]; + /* Counter for the number of discarded messages due to the RX FIFO being full */ volatile static std::uint32_t g_discarded_frames_count[CANFD_Count] = {DISCARD_COUNT_ARRAY}; @@ -313,7 +316,8 @@ class FlexCAN_interrupt : private InterfaceGroup /* Create Frame object with constructor */ CAN::Frame FrameISR(id_ISR, - reinterpret_cast(data_ISR_word), + reinterpret_cast( + const_cast(data_ISR_word)), dlc_ISR, timestamp_ISR); @@ -837,10 +841,10 @@ Result InterfaceManager::stopInterfaceGroup(InterfaceGroupPtrType& inout_group) /* Reset LPIT timer peripheral, (resets all except the MCR register) */ LPIT0->MCR |= LPIT_MCR_SW_RST(1); - /* Verify that the timer did reset (locked at 0xFFFFFFFF) */ + /* Verify that the timer did reset (locked at 0xFFFFFFFF) */ if (LPIT0->TMR[0].CVAL != LPIT_TMR_CVAL_TMR_CUR_VAL_MASK) { - Status = Result::Failure; + Status = Result::Failure; } else {