diff --git a/.github/ISSUE_TEMPLATE/bug_report.md b/.github/ISSUE_TEMPLATE/bug_report.md index 91df0ea849d5..57f8652b65ba 100644 --- a/.github/ISSUE_TEMPLATE/bug_report.md +++ b/.github/ISSUE_TEMPLATE/bug_report.md @@ -7,10 +7,18 @@ assignees: '' --- +**Notes (delete this)** +Github Discussions (https://github.com/zephyrproject-rtos/zephyr/discussions) +are available to first verify that the issue is a genuine Zephyr bug and not a +consequence of Zephyr services misuse. + +This issue list is only for bugs in the main Zephyr code base +(https://github.com/zephyrproject-rtos/zephyr/). If the bug is for a project +fork (such as NCS) specific feature, please open an issue in the fork project +instead. + **Describe the bug** A clear and concise description of what the bug is. -(Note that [Github Discussions](https://github.com/zephyrproject-rtos/zephyr/discussions) are available to first verify that the issue -is a genuine Zephyr bug and not a consequence of Zephyr services misuse.) Please also mention any information which could help others to understand the problem you're facing: diff --git a/.github/workflows/backport.yml b/.github/workflows/backport.yml index 81a0d2051ca3..5e28332c2a2d 100644 --- a/.github/workflows/backport.yml +++ b/.github/workflows/backport.yml @@ -9,11 +9,23 @@ on: jobs: backport: - runs-on: ubuntu-20.04 name: Backport + runs-on: ubuntu-22.04 + # Only react to merged PRs for security reasons. + # See https://docs.github.com/en/actions/using-workflows/events-that-trigger-workflows#pull_request_target. + if: > + github.event.pull_request.merged && + ( + github.event.action == 'closed' || + ( + github.event.action == 'labeled' && + contains(github.event.label.name, 'backport') + ) + ) steps: - name: Backport - uses: zephyrproject-rtos/action-backport@v1.1.1-3 + uses: zephyrproject-rtos/action-backport@v2.0.3-3 with: github_token: ${{ secrets.ZB_GITHUB_TOKEN }} - issue_labels: backport + issue_labels: Backport + labels_template: '["Backport"]' diff --git a/.github/workflows/backport_issue_check.yml b/.github/workflows/backport_issue_check.yml index 98f964d6d966..a66edd318f7d 100644 --- a/.github/workflows/backport_issue_check.yml +++ b/.github/workflows/backport_issue_check.yml @@ -8,7 +8,7 @@ on: jobs: backport: name: Backport Issue Check - runs-on: ubuntu-20.04 + runs-on: ubuntu-22.04 if: github.repository == 'zephyrproject-rtos/zephyr' steps: diff --git a/.github/workflows/bluetooth-tests-publish.yaml b/.github/workflows/bluetooth-tests-publish.yaml deleted file mode 100644 index 3cf6572c4a02..000000000000 --- a/.github/workflows/bluetooth-tests-publish.yaml +++ /dev/null @@ -1,29 +0,0 @@ -name: Publish Bluetooth Tests Results - -on: - workflow_run: - workflows: ["Bluetooth Tests"] - types: - - completed -jobs: - bluetooth-test-results: - name: "Publish Bluetooth Test Results" - runs-on: ubuntu-20.04 - if: github.event.workflow_run.conclusion != 'skipped' - - steps: - - name: Download artifacts - uses: dawidd6/action-download-artifact@v2 - with: - workflow: bluetooth-tests.yaml - run_id: ${{ github.event.workflow_run.id }} - - - name: Publish Bluetooth Test Results - uses: EnricoMi/publish-unit-test-result-action@v1 - with: - check_name: Bluetooth Test Results - comment_mode: off - commit: ${{ github.event.workflow_run.head_sha }} - event_file: event/event.json - event_name: ${{ github.event.workflow_run.event }} - files: "bluetooth-test-results/**/bsim_results.xml" diff --git a/.github/workflows/bluetooth-tests.yaml b/.github/workflows/bluetooth-tests.yaml deleted file mode 100644 index 3aff62698ba8..000000000000 --- a/.github/workflows/bluetooth-tests.yaml +++ /dev/null @@ -1,98 +0,0 @@ -name: Bluetooth Tests - -on: - pull_request: - paths: - - ".github/workflows/bluetooth-test*.yaml" - - "west.yml" - - "subsys/bluetooth/**" - - "tests/bluetooth/bsim/**" - - "samples/bluetooth/**" - - "boards/posix/**" - - "soc/posix/**" - - "arch/posix/**" - -concurrency: - group: ${{ github.workflow }}-${{ github.event_name }}-${{ github.head_ref || github.ref }} - cancel-in-progress: true - -jobs: - bluetooth-test: - if: github.repository_owner == 'zephyrproject-rtos' - runs-on: zephyr-runner-linux-x64-4xlarge - container: - image: ghcr.io/zephyrproject-rtos/ci:v0.24.11 - options: '--entrypoint /bin/bash' - volumes: - - /repo-cache/zephyrproject:/github/cache/zephyrproject - env: - ZEPHYR_TOOLCHAIN_VARIANT: zephyr - ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.15.2 - BSIM_OUT_PATH: /opt/bsim/ - BSIM_COMPONENTS_PATH: /opt/bsim/components - EDTT_PATH: ../tools/edtt - bsim_bt_test_results_file: ./bsim_bt_out/bsim_results.xml - steps: - - name: Apply container owner mismatch workaround - run: | - # FIXME: The owner UID of the GITHUB_WORKSPACE directory may not - # match the container user UID because of the way GitHub - # Actions runner is implemented. Remove this workaround when - # GitHub comes up with a fundamental fix for this problem. - git config --global --add safe.directory ${GITHUB_WORKSPACE} - - - name: Clone cached Zephyr repository - continue-on-error: true - run: | - git clone --shared /github/cache/zephyrproject/zephyr . - git remote set-url origin ${GITHUB_SERVER_URL}/${GITHUB_REPOSITORY} - - - name: Checkout - uses: actions/checkout@v3 - with: - fetch-depth: 0 - - - name: Environment Setup - env: - BASE_REF: ${{ github.base_ref }} - run: | - git config --global user.email "bot@zephyrproject.org" - git config --global user.name "Zephyr Bot" - rm -fr ".git/rebase-apply" - git rebase origin/${BASE_REF} - git log --pretty=oneline | head -n 10 - west init -l . || true - west config manifest.group-filter -- +ci - west config --global update.narrow true - west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || ( rm -rf ../modules ../bootloader ../tools && west update --path-cache /github/cache/zephyrproject) - west forall -c 'git reset --hard HEAD' - - - name: Install parallel - run: | - sudo apt-get update - sudo apt-get install -y parallel - parallel --version - - - name: Run Bluetooth Tests with BSIM - run: | - export ZEPHYR_BASE=${PWD} - WORK_DIR=${ZEPHYR_BASE}/bsim_bt_out tests/bluetooth/bsim/compile.sh - RESULTS_FILE=${ZEPHYR_BASE}/${bsim_bt_test_results_file} \ - SEARCH_PATH=tests/bluetooth/bsim/ tests/bluetooth/bsim/run_parallel.sh - - - name: Upload Test Results - if: always() - uses: actions/upload-artifact@v3 - with: - name: bluetooth-test-results - path: | - ./bsim_bt_out/bsim_results.xml - ${{ github.event_path }} - - - name: Upload Event Details - if: always() - uses: actions/upload-artifact@v3 - with: - name: event - path: | - ${{ github.event_path }} diff --git a/.github/workflows/bsim-tests-bluetooth.yaml b/.github/workflows/bsim-tests-bluetooth.yaml new file mode 100644 index 000000000000..2eb47ed27ec6 --- /dev/null +++ b/.github/workflows/bsim-tests-bluetooth.yaml @@ -0,0 +1,93 @@ +name: BabbleSim BT Tests + +on: + pull_request: + paths: + - ".github/workflows/bsim-tests-bluetooth.yaml" + - ".github/workflows/bsim-tests-publish.yaml" + - "west.yml" + - "subsys/bluetooth/**" + - "tests/bsim/bluetooth/**" + - "samples/bluetooth/**" + - "boards/posix/**" + - "soc/posix/**" + - "arch/posix/**" + +concurrency: + group: ${{ github.workflow }}-${{ github.event_name }}-${{ github.head_ref || github.ref }} + cancel-in-progress: true + +jobs: + bsim-test-bluetooth: + if: github.repository_owner == 'zephyrproject-rtos' + runs-on: zephyr-runner-linux-x64-4xlarge + container: + image: ghcr.io/zephyrproject-rtos/ci:v0.26.1 + options: '--entrypoint /bin/bash' + volumes: + - /repo-cache/zephyrproject:/github/cache/zephyrproject + env: + ZEPHYR_TOOLCHAIN_VARIANT: zephyr + ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.0 + BSIM_OUT_PATH: /opt/bsim/ + BSIM_COMPONENTS_PATH: /opt/bsim/components + EDTT_PATH: ../tools/edtt + bsim_test_results_file: ./bsim_out/bsim_results.xml + steps: + - name: Apply container owner mismatch workaround + run: | + # FIXME: The owner UID of the GITHUB_WORKSPACE directory may not + # match the container user UID because of the way GitHub + # Actions runner is implemented. Remove this workaround when + # GitHub comes up with a fundamental fix for this problem. + git config --global --add safe.directory ${GITHUB_WORKSPACE} + + - name: Clone cached Zephyr repository + continue-on-error: true + run: | + git clone --shared /github/cache/zephyrproject/zephyr . + git remote set-url origin ${GITHUB_SERVER_URL}/${GITHUB_REPOSITORY} + + - name: Checkout + uses: actions/checkout@v3 + with: + fetch-depth: 0 + + - name: Environment Setup + env: + BASE_REF: ${{ github.base_ref }} + run: | + git config --global user.email "bot@zephyrproject.org" + git config --global user.name "Zephyr Bot" + rm -fr ".git/rebase-apply" + git rebase origin/${BASE_REF} + git log --pretty=oneline | head -n 10 + west init -l . || true + west config manifest.group-filter -- +ci + west config --global update.narrow true + west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || ( rm -rf ../modules ../bootloader ../tools && west update --path-cache /github/cache/zephyrproject) + west forall -c 'git reset --hard HEAD' + + - name: Run Bluetooth Tests with BSIM + run: | + export ZEPHYR_BASE=${PWD} + WORK_DIR=${ZEPHYR_BASE}/bsim_out tests/bsim/bluetooth/compile.sh + RESULTS_FILE=${ZEPHYR_BASE}/${bsim_test_results_file} \ + SEARCH_PATH=tests/bsim/bluetooth/ tests/bsim/run_parallel.sh + + - name: Upload Test Results + if: always() + uses: actions/upload-artifact@v3 + with: + name: bsim-test-results + path: | + ./bsim_out/bsim_results.xml + ${{ github.event_path }} + + - name: Upload Event Details + if: always() + uses: actions/upload-artifact@v3 + with: + name: event + path: | + ${{ github.event_path }} diff --git a/.github/workflows/bsim-tests-networking.yaml b/.github/workflows/bsim-tests-networking.yaml new file mode 100644 index 000000000000..c41e251fdd3a --- /dev/null +++ b/.github/workflows/bsim-tests-networking.yaml @@ -0,0 +1,97 @@ +name: BabbleSim Networking Tests + +on: + pull_request: + paths: + - ".github/workflows/bsim-tests-networking.yaml" + - ".github/workflows/bsim-tests-publish.yaml" + - "west.yml" + - "tests/bsim/net/**" + - "samples/net/sockets/echo_*/**" + - "modules/openthread/**" + - "subsys/net/l2/openthread/**" + - "include/zephyr/net/openthread.h" + - "boards/posix/**" + - "soc/posix/**" + - "arch/posix/**" + - "drivers/ieee802154/**" + - "include/zephyr/net/ieee802154*" + +concurrency: + group: ${{ github.workflow }}-${{ github.event_name }}-${{ github.head_ref || github.ref }} + cancel-in-progress: true + +jobs: + bsim-test-networking: + if: github.repository_owner == 'zephyrproject-rtos' + runs-on: zephyr-runner-linux-x64-4xlarge + container: + image: ghcr.io/zephyrproject-rtos/ci:v0.26.1 + options: '--entrypoint /bin/bash' + volumes: + - /repo-cache/zephyrproject:/github/cache/zephyrproject + env: + ZEPHYR_TOOLCHAIN_VARIANT: zephyr + ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.0 + BSIM_OUT_PATH: /opt/bsim/ + BSIM_COMPONENTS_PATH: /opt/bsim/components + EDTT_PATH: ../tools/edtt + bsim_test_results_file: ./bsim_out/bsim_results.xml + steps: + - name: Apply container owner mismatch workaround + run: | + # FIXME: The owner UID of the GITHUB_WORKSPACE directory may not + # match the container user UID because of the way GitHub + # Actions runner is implemented. Remove this workaround when + # GitHub comes up with a fundamental fix for this problem. + git config --global --add safe.directory ${GITHUB_WORKSPACE} + + - name: Clone cached Zephyr repository + continue-on-error: true + run: | + git clone --shared /github/cache/zephyrproject/zephyr . + git remote set-url origin ${GITHUB_SERVER_URL}/${GITHUB_REPOSITORY} + + - name: Checkout + uses: actions/checkout@v3 + with: + fetch-depth: 0 + + - name: Environment Setup + env: + BASE_REF: ${{ github.base_ref }} + run: | + git config --global user.email "bot@zephyrproject.org" + git config --global user.name "Zephyr Bot" + rm -fr ".git/rebase-apply" + git rebase origin/${BASE_REF} + git log --pretty=oneline | head -n 10 + west init -l . || true + west config manifest.group-filter -- +ci + west config --global update.narrow true + west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || ( rm -rf ../modules ../bootloader ../tools && west update --path-cache /github/cache/zephyrproject) + west forall -c 'git reset --hard HEAD' + + - name: Run Networking Tests with BSIM + run: | + export ZEPHYR_BASE=${PWD} + WORK_DIR=${ZEPHYR_BASE}/bsim_out tests/bsim/net/compile.sh + RESULTS_FILE=${ZEPHYR_BASE}/${bsim_test_results_file} \ + SEARCH_PATH=tests/bsim/net/ tests/bsim/run_parallel.sh + + - name: Upload Test Results + if: always() + uses: actions/upload-artifact@v3 + with: + name: bsim-test-results + path: | + ./bsim_out/bsim_results.xml + ${{ github.event_path }} + + - name: Upload Event Details + if: always() + uses: actions/upload-artifact@v3 + with: + name: event + path: | + ${{ github.event_path }} diff --git a/.github/workflows/bsim-tests-publish.yaml b/.github/workflows/bsim-tests-publish.yaml new file mode 100644 index 000000000000..9706c368fc67 --- /dev/null +++ b/.github/workflows/bsim-tests-publish.yaml @@ -0,0 +1,28 @@ +name: Publish BabbleSim Tests Results + +on: + workflow_run: + workflows: ["BabbleSim BT Tests", "BabbleSim Networking Tests"] + types: + - completed +jobs: + bsim-test-results: + name: "Publish BabbleSim Test Results" + runs-on: ubuntu-22.04 + if: github.event.workflow_run.conclusion != 'skipped' + + steps: + - name: Download artifacts + uses: dawidd6/action-download-artifact@v2 + with: + run_id: ${{ github.event.workflow_run.id }} + + - name: Publish BabbleSim Test Results + uses: EnricoMi/publish-unit-test-result-action@v2 + with: + check_name: BabbleSim Test Results + comment_mode: off + commit: ${{ github.event.workflow_run.head_sha }} + event_file: event/event.json + event_name: ${{ github.event.workflow_run.event }} + files: "bsim-test-results/**/bsim_results.xml" diff --git a/.github/workflows/bug_snapshot.yaml b/.github/workflows/bug_snapshot.yaml index d1eda2065898..cdc2036caeee 100644 --- a/.github/workflows/bug_snapshot.yaml +++ b/.github/workflows/bug_snapshot.yaml @@ -16,7 +16,7 @@ on: jobs: make_bugs_pickle: name: Make bugs pickle - runs-on: ubuntu-20.04 + runs-on: ubuntu-22.04 if: github.repository_owner == 'zephyrproject-rtos' steps: @@ -42,7 +42,7 @@ jobs: echo "BUGS_PICKLE_PATH=${BUGS_PICKLE_PATH}" >> ${GITHUB_ENV} - name: Configure AWS Credentials - uses: aws-actions/configure-aws-credentials@v1 + uses: aws-actions/configure-aws-credentials@v2 with: aws-access-key-id: ${{ secrets.AWS_BUILDS_ZEPHYR_BUG_SNAPSHOT_ACCESS_KEY_ID }} aws-secret-access-key: ${{ secrets.AWS_BUILDS_ZEPHYR_BUG_SNAPSHOT_SECRET_ACCESS_KEY }} diff --git a/.github/workflows/clang.yaml b/.github/workflows/clang.yaml index c9d865a5c79d..f2f67c4923a2 100644 --- a/.github/workflows/clang.yaml +++ b/.github/workflows/clang.yaml @@ -10,7 +10,7 @@ jobs: clang-build: runs-on: ubuntu-latest container: - image: ghcr.io/zephyrproject-rtos/ci:v0.24.11 + image: ghcr.io/zephyrproject-rtos/ci:v0.26.1 options: '--entrypoint /bin/bash' volumes: - /repo-cache/zephyrproject:/github/cache/zephyrproject @@ -20,8 +20,8 @@ jobs: platform: ["native_posix"] subset: [1, 2, 3, 4, 5] env: - ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.15.2 - LLVM_TOOLCHAIN_PATH: /usr/lib/llvm-15 + ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.0 + LLVM_TOOLCHAIN_PATH: /usr/lib/llvm-16 COMMIT_RANGE: ${{ github.event.pull_request.base.sha }}..${{ github.event.pull_request.head.sha }} BASE_REF: ${{ github.base_ref }} MATRIX_SIZE: 5 @@ -81,9 +81,10 @@ jobs: string(REPLACE "/" "_" repo ${{github.repository}}) string(REPLACE "-" "_" repo2 ${repo}) file(APPEND $ENV{GITHUB_OUTPUT} "repo=${repo2}\n") + - name: use cache id: cache-ccache - uses: zephyrproject-rtos/action-s3-cache@v1 + uses: zephyrproject-rtos/action-s3-cache@v1.2.0 with: key: ${{ steps.ccache_cache_timestamp.outputs.repo }}-${{ github.ref_name }}-clang-${{ matrix.subset }}-ccache path: /github/home/.ccache @@ -140,11 +141,11 @@ jobs: clang-build-results: name: "Publish Unit Tests Results" needs: clang-build - runs-on: ubuntu-20.04 + runs-on: ubuntu-22.04 if: (success() || failure() ) && needs.clang-build.outputs.report_needed != 0 steps: - name: Download Artifacts - uses: actions/download-artifact@v2 + uses: actions/download-artifact@v3 with: path: artifacts - name: Merge Test Results @@ -163,10 +164,9 @@ jobs: junit-clang.html - name: Publish Unit Test Results - uses: EnricoMi/publish-unit-test-result-action@v1 + uses: EnricoMi/publish-unit-test-result-action@v2 if: always() with: check_name: Unit Test Results - github_token: ${{ secrets.GITHUB_TOKEN }} files: "**/twister.xml" comment_mode: off diff --git a/.github/workflows/codecov.yaml b/.github/workflows/codecov.yaml index 07c0fd902263..ba89be085747 100644 --- a/.github/workflows/codecov.yaml +++ b/.github/workflows/codecov.yaml @@ -13,7 +13,7 @@ jobs: if: github.repository == 'zephyrproject-rtos/zephyr' runs-on: zephyr-runner-linux-x64-4xlarge container: - image: ghcr.io/zephyrproject-rtos/ci:v0.24.11 + image: ghcr.io/zephyrproject-rtos/ci:v0.26.1 options: '--entrypoint /bin/bash' volumes: - /repo-cache/zephyrproject:/github/cache/zephyrproject @@ -22,7 +22,7 @@ jobs: matrix: platform: ["native_posix", "qemu_x86", "unit_testing"] env: - ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.15.2 + ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.0 steps: - name: Apply container owner mismatch workaround run: | @@ -67,7 +67,7 @@ jobs: - name: use cache id: cache-ccache - uses: zephyrproject-rtos/action-s3-cache@v1 + uses: zephyrproject-rtos/action-s3-cache@v1.2.0 with: key: ${{ steps.ccache_cache_prop.outputs.repo }}-${{github.event_name}}-${{matrix.platform}}-codecov-ccache path: /github/home/.ccache @@ -111,7 +111,7 @@ jobs: codecov-results: name: "Publish Coverage Results" needs: codecov - runs-on: ubuntu-20.04 + runs-on: ubuntu-22.04 # the codecov job might be skipped, we don't need to run this job then if: success() || failure() @@ -121,7 +121,7 @@ jobs: with: fetch-depth: 0 - name: Download Artifacts - uses: actions/download-artifact@v2 + uses: actions/download-artifact@v3 with: path: coverage/reports @@ -165,7 +165,7 @@ jobs: - name: Upload coverage to Codecov if: always() - uses: codecov/codecov-action@v2 + uses: codecov/codecov-action@v3 with: directory: ./coverage/reports env_vars: OS,PYTHON diff --git a/.github/workflows/coding_guidelines.yml b/.github/workflows/coding_guidelines.yml index 2b12d6a7bb32..ea632b7f0b2b 100644 --- a/.github/workflows/coding_guidelines.yml +++ b/.github/workflows/coding_guidelines.yml @@ -4,7 +4,7 @@ on: pull_request jobs: compliance_job: - runs-on: ubuntu-20.04 + runs-on: ubuntu-22.04 name: Run coding guidelines checks on patch series (PR) steps: - name: Checkout the code @@ -28,9 +28,7 @@ jobs: - name: Install Packages run: | sudo apt-get update - sudo apt-get install ocaml-base-nox - wget https://launchpad.net/~npalix/+archive/ubuntu/coccinelle/+files/coccinelle_1.0.8~20.04npalix1_amd64.deb - sudo dpkg -i coccinelle_1.0.8~20.04npalix1_amd64.deb + sudo apt-get install coccinelle - name: Run Coding Guildeines Checks continue-on-error: true diff --git a/.github/workflows/compliance.yml b/.github/workflows/compliance.yml index c3d81327f61a..a41ab9a47199 100644 --- a/.github/workflows/compliance.yml +++ b/.github/workflows/compliance.yml @@ -4,7 +4,7 @@ on: pull_request jobs: check_compliance: - runs-on: ubuntu-20.04 + runs-on: ubuntu-22.04 name: Run compliance checks on patch series (PR) steps: - name: Update PATH for west diff --git a/.github/workflows/daily_test_version.yml b/.github/workflows/daily_test_version.yml index 633b9978592d..2a1d5ef103dd 100644 --- a/.github/workflows/daily_test_version.yml +++ b/.github/workflows/daily_test_version.yml @@ -12,12 +12,12 @@ on: jobs: get_version: - runs-on: ubuntu-20.04 + runs-on: ubuntu-22.04 if: github.repository == 'zephyrproject-rtos/zephyr' steps: - name: Configure AWS Credentials - uses: aws-actions/configure-aws-credentials@v1 + uses: aws-actions/configure-aws-credentials@v2 with: aws-access-key-id: ${{ secrets.AWS_ACCESS_KEY_ID_TESTING }} aws-secret-access-key: ${{ secrets.AWS_SECRET_ACCESS_KEY_TESTING }} diff --git a/.github/workflows/devicetree_checks.yml b/.github/workflows/devicetree_checks.yml index 70d390ba788f..465a86731494 100644 --- a/.github/workflows/devicetree_checks.yml +++ b/.github/workflows/devicetree_checks.yml @@ -27,7 +27,7 @@ jobs: strategy: matrix: python-version: [3.8, 3.9, '3.10'] - os: [ubuntu-20.04, macos-11, windows-2022] + os: [ubuntu-22.04, macos-11, windows-2022] exclude: - os: macos-11 python-version: 3.6 diff --git a/.github/workflows/do_not_merge.yml b/.github/workflows/do_not_merge.yml index c1241d1dcfa5..424c21243fa6 100644 --- a/.github/workflows/do_not_merge.yml +++ b/.github/workflows/do_not_merge.yml @@ -8,7 +8,7 @@ jobs: do-not-merge: if: ${{ contains(github.event.*.labels.*.name, 'DNM') }} name: Prevent Merging - runs-on: ubuntu-20.04 + runs-on: ubuntu-22.04 steps: - name: Check for label run: | diff --git a/.github/workflows/doc-build.yml b/.github/workflows/doc-build.yml index 5934ea67783c..466f9c8afbda 100644 --- a/.github/workflows/doc-build.yml +++ b/.github/workflows/doc-build.yml @@ -116,7 +116,7 @@ jobs: doc-build-pdf: name: "Documentation Build (PDF)" if: github.event_name != 'pull_request' - runs-on: ubuntu-20.04 + runs-on: ubuntu-22.04 container: texlive/texlive:latest timeout-minutes: 60 concurrency: diff --git a/.github/workflows/doc-publish-pr.yml b/.github/workflows/doc-publish-pr.yml index 15dbd5fb8ad7..35b80e61a1c4 100644 --- a/.github/workflows/doc-publish-pr.yml +++ b/.github/workflows/doc-publish-pr.yml @@ -32,7 +32,7 @@ jobs: - name: Check PR number id: check-pr - uses: carpentries/actions/check-valid-pr@v0.8 + uses: carpentries/actions/check-valid-pr@v0.14.0 with: pr: ${{ env.PR_NUM }} sha: ${{ github.event.workflow_run.head_sha }} @@ -48,7 +48,7 @@ jobs: tar xf html-output/html-output.tar.xz -C html-output - name: Configure AWS Credentials - uses: aws-actions/configure-aws-credentials@v1 + uses: aws-actions/configure-aws-credentials@v2 with: aws-access-key-id: ${{ secrets.AWS_BUILDS_ZEPHYR_PR_ACCESS_KEY_ID }} aws-secret-access-key: ${{ secrets.AWS_BUILDS_ZEPHYR_PR_SECRET_ACCESS_KEY }} diff --git a/.github/workflows/doc-publish.yml b/.github/workflows/doc-publish.yml index f08bdf2f28d4..065dcaecc48e 100644 --- a/.github/workflows/doc-publish.yml +++ b/.github/workflows/doc-publish.yml @@ -34,7 +34,7 @@ jobs: tar xf html-output/html-output.tar.xz -C html-output - name: Configure AWS Credentials - uses: aws-actions/configure-aws-credentials@v1 + uses: aws-actions/configure-aws-credentials@v2 with: aws-access-key-id: ${{ secrets.AWS_ACCESS_KEY_ID }} aws-secret-access-key: ${{ secrets.AWS_SECRET_ACCESS_KEY }} diff --git a/.github/workflows/errno.yml b/.github/workflows/errno.yml index 1e07f43066df..e363ce054eee 100644 --- a/.github/workflows/errno.yml +++ b/.github/workflows/errno.yml @@ -8,11 +8,11 @@ on: jobs: check-errno: - runs-on: ubuntu-20.04 + runs-on: ubuntu-22.04 container: - image: ghcr.io/zephyrproject-rtos/ci:v0.24.11 + image: ghcr.io/zephyrproject-rtos/ci:v0.26.1 env: - ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.15.2 + ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.0 steps: - name: Apply container owner mismatch workaround diff --git a/.github/workflows/footprint-tracking.yml b/.github/workflows/footprint-tracking.yml index 0d8ab4ce7525..706149cf4426 100644 --- a/.github/workflows/footprint-tracking.yml +++ b/.github/workflows/footprint-tracking.yml @@ -19,15 +19,15 @@ concurrency: jobs: footprint-tracking: - runs-on: ubuntu-20.04 + runs-on: ubuntu-22.04 if: github.repository == 'zephyrproject-rtos/zephyr' container: - image: ghcr.io/zephyrproject-rtos/ci:v0.24.11 + image: ghcr.io/zephyrproject-rtos/ci:v0.26.1 options: '--entrypoint /bin/bash' strategy: fail-fast: false env: - ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.15.2 + ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.0 ZEPHYR_TOOLCHAIN_VARIANT: zephyr steps: - name: Apply container owner mismatch workaround @@ -58,7 +58,7 @@ jobs: west update 2>&1 1> west.update.log || west update 2>&1 1> west.update2.log - name: Configure AWS Credentials - uses: aws-actions/configure-aws-credentials@v1 + uses: aws-actions/configure-aws-credentials@v2 with: aws-access-key-id: ${{ secrets.FOOTPRINT_AWS_KEY_ID }} aws-secret-access-key: ${{ secrets.FOOTPRINT_AWS_ACCESS_KEY }} diff --git a/.github/workflows/footprint.yml b/.github/workflows/footprint.yml index be6883f365c8..d2b6125548e1 100644 --- a/.github/workflows/footprint.yml +++ b/.github/workflows/footprint.yml @@ -8,15 +8,15 @@ concurrency: jobs: footprint-delta: - runs-on: ubuntu-20.04 + runs-on: ubuntu-22.04 if: github.repository == 'zephyrproject-rtos/zephyr' container: - image: ghcr.io/zephyrproject-rtos/ci:v0.24.11 + image: ghcr.io/zephyrproject-rtos/ci:v0.26.1 options: '--entrypoint /bin/bash' strategy: fail-fast: false env: - ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.15.2 + ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.0 ZEPHYR_TOOLCHAIN_VARIANT: zephyr steps: - name: Apply container owner mismatch workaround diff --git a/.github/workflows/issue_count.yml b/.github/workflows/issue_count.yml index 771461d6ebf9..4b1f1ae86dce 100644 --- a/.github/workflows/issue_count.yml +++ b/.github/workflows/issue_count.yml @@ -14,7 +14,7 @@ env: jobs: track-issues: name: "Collect Issue Stats" - runs-on: ubuntu-20.04 + runs-on: ubuntu-22.04 if: github.repository == 'zephyrproject-rtos/zephyr' steps: @@ -42,7 +42,7 @@ jobs: path: ${{ env.OUTPUT_FILE_NAME }} - name: Configure AWS Credentials - uses: aws-actions/configure-aws-credentials@v1 + uses: aws-actions/configure-aws-credentials@v2 with: aws-access-key-id: ${{ secrets.AWS_ACCESS_KEY_ID_TESTING }} aws-secret-access-key: ${{ secrets.AWS_SECRET_ACCESS_KEY_TESTING }} diff --git a/.github/workflows/license_check.yml b/.github/workflows/license_check.yml index 3d14abed96aa..e869df1fb632 100644 --- a/.github/workflows/license_check.yml +++ b/.github/workflows/license_check.yml @@ -4,7 +4,7 @@ on: [pull_request] jobs: scancode_job: - runs-on: ubuntu-20.04 + runs-on: ubuntu-22.04 name: Scan code for licenses steps: - name: Checkout the code diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml index 6e266b76a3a2..ab0e9384ae7c 100644 --- a/.github/workflows/release.yml +++ b/.github/workflows/release.yml @@ -8,7 +8,7 @@ on: jobs: release: - runs-on: ubuntu-20.04 + runs-on: ubuntu-22.04 steps: - uses: actions/checkout@v3 with: diff --git a/.github/workflows/stale-workflow-queue-cleanup.yml b/.github/workflows/stale-workflow-queue-cleanup.yml index d601536d055f..ec1a4cc716fb 100644 --- a/.github/workflows/stale-workflow-queue-cleanup.yml +++ b/.github/workflows/stale-workflow-queue-cleanup.yml @@ -14,7 +14,7 @@ concurrency: jobs: cleanup: name: Cleanup - runs-on: ubuntu-20.04 + runs-on: ubuntu-22.04 steps: - name: Delete stale queued workflow runs diff --git a/.github/workflows/stale_issue.yml b/.github/workflows/stale_issue.yml index b4f09b413539..d93aa1f381d1 100644 --- a/.github/workflows/stale_issue.yml +++ b/.github/workflows/stale_issue.yml @@ -6,12 +6,11 @@ on: jobs: stale: name: Find Stale issues and PRs - runs-on: ubuntu-20.04 + runs-on: ubuntu-22.04 if: github.repository == 'zephyrproject-rtos/zephyr' steps: - - uses: actions/stale@v3 + - uses: actions/stale@v8 with: - repo-token: ${{ secrets.GITHUB_TOKEN }} stale-pr-message: 'This pull request has been marked as stale because it has been open (more than) 60 days with no activity. Remove the stale label or add a comment saying that you would like to have the label removed otherwise this pull request will automatically be diff --git a/.github/workflows/twister.yaml b/.github/workflows/twister.yaml index d52bb6e2bd57..17b0dc5f68b1 100644 --- a/.github/workflows/twister.yaml +++ b/.github/workflows/twister.yaml @@ -22,7 +22,7 @@ jobs: if: github.repository_owner == 'zephyrproject-rtos' runs-on: zephyr-runner-linux-x64-4xlarge container: - image: ghcr.io/zephyrproject-rtos/ci:v0.24.11 + image: ghcr.io/zephyrproject-rtos/ci:v0.26.1 options: '--entrypoint /bin/bash' volumes: - /repo-cache/zephyrproject:/github/cache/zephyrproject @@ -34,7 +34,9 @@ jobs: MATRIX_SIZE: 10 PUSH_MATRIX_SIZE: 15 DAILY_MATRIX_SIZE: 80 - ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.15.2 + ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.0 + BSIM_OUT_PATH: /opt/bsim/ + BSIM_COMPONENTS_PATH: /opt/bsim/components TESTS_PER_BUILDER: 700 COMMIT_RANGE: ${{ github.event.pull_request.base.sha }}..${{ github.event.pull_request.head.sha }} BASE_REF: ${{ github.base_ref }} @@ -118,7 +120,7 @@ jobs: needs: twister-build-prep if: needs.twister-build-prep.outputs.size != 0 container: - image: ghcr.io/zephyrproject-rtos/ci:v0.24.11 + image: ghcr.io/zephyrproject-rtos/ci:v0.26.1 options: '--entrypoint /bin/bash' volumes: - /repo-cache/zephyrproject:/github/cache/zephyrproject @@ -127,7 +129,9 @@ jobs: matrix: subset: ${{fromJSON(needs.twister-build-prep.outputs.subset)}} env: - ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.15.2 + ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.0 + BSIM_OUT_PATH: /opt/bsim/ + BSIM_COMPONENTS_PATH: /opt/bsim/components TWISTER_COMMON: ' --force-color --inline-logs -v -N -M --retry-failed 3 ' DAILY_OPTIONS: ' -M --build-only --all --show-footprint' PR_OPTIONS: ' --clobber-output --integration' @@ -192,7 +196,7 @@ jobs: - name: use cache id: cache-ccache - uses: zephyrproject-rtos/action-s3-cache@v1 + uses: zephyrproject-rtos/action-s3-cache@v1.2.0 continue-on-error: true with: key: ${{ steps.ccache_cache_timestamp.outputs.repo }}-${{ github.ref_name }}-${{github.event_name}}-${{ matrix.subset }}-ccache @@ -270,7 +274,7 @@ jobs: ELASTICSEARCH_KEY: ${{ secrets.ELASTICSEARCH_KEY }} ELASTICSEARCH_SERVER: "https://elasticsearch.zephyrproject.io:443" needs: twister-build - runs-on: ubuntu-20.04 + runs-on: ubuntu-22.04 # the build-and-test job might be skipped, we don't need to run this job then if: success() || failure() @@ -284,7 +288,7 @@ jobs: persist-credentials: false - name: Download Artifacts - uses: actions/download-artifact@v2 + uses: actions/download-artifact@v3 with: path: artifacts @@ -318,9 +322,8 @@ jobs: junit.html - name: Publish Unit Test Results - uses: EnricoMi/publish-unit-test-result-action@v1 + uses: EnricoMi/publish-unit-test-result-action@v2 with: check_name: Unit Test Results - github_token: ${{ secrets.GITHUB_TOKEN }} files: "**/twister.xml" comment_mode: off diff --git a/.github/workflows/twister_tests.yml b/.github/workflows/twister_tests.yml index 9f37ddba1078..ed4bee2a18cf 100644 --- a/.github/workflows/twister_tests.yml +++ b/.github/workflows/twister_tests.yml @@ -30,7 +30,7 @@ jobs: strategy: matrix: python-version: [3.8, 3.9, '3.10'] - os: [ubuntu-20.04] + os: [ubuntu-22.04] steps: - name: checkout uses: actions/checkout@v3 diff --git a/.github/workflows/west_cmds.yml b/.github/workflows/west_cmds.yml index faa8c1bf24b9..f1d2c4c6c7ce 100644 --- a/.github/workflows/west_cmds.yml +++ b/.github/workflows/west_cmds.yml @@ -28,7 +28,7 @@ jobs: strategy: matrix: python-version: [3.8, 3.9, '3.10'] - os: [ubuntu-20.04, macos-11, windows-2022] + os: [ubuntu-22.04, macos-11, windows-2022] exclude: - os: macos-11 python-version: 3.6 diff --git a/.gitignore b/.gitignore index fe76418bf603..735440b4cac7 100644 --- a/.gitignore +++ b/.gitignore @@ -39,6 +39,7 @@ sanity-out* twister-out* bsim_out bsim_bt_out +tests/RunResults.xml scripts/grub doc/reference/kconfig/*.rst doc/doc.warnings diff --git a/.mailmap b/.mailmap index 7078a163b224..dddc3965f09b 100644 --- a/.mailmap +++ b/.mailmap @@ -33,3 +33,5 @@ Sean Nyekjaer Marc Herbert <46978960+marc-hb@users.noreply.github.com> Martin Jäger <17674105+martinjaeger@users.noreply.github.com> Armand Ciejak +Chunlin Han +chao an diff --git a/CMakeLists.txt b/CMakeLists.txt index a31b6172fdf8..41e104494673 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -282,7 +282,7 @@ endif() # @Intent: Set compiler specific macro inclusion of AUTOCONF_H zephyr_compile_options("SHELL: $ ${AUTOCONF_H}") -if(NOT CONFIG_PICOLIBC) +if(CONFIG_COMPILER_FREESTANDING) # @Intent: Set compiler specific flag for bare metal freestanding option zephyr_compile_options($<$:$>) zephyr_compile_options($<$:$>) @@ -299,6 +299,11 @@ zephyr_compile_options($) # @Intent: Set compiler specific flag for production of debug information zephyr_compile_options($) +if(CONFIG_COMPILER_SAVE_TEMPS) + # @Intent: Set compiler specific flag for saving temporary object files + zephyr_compile_options($) +endif() + if(CONFIG_COMPILER_COLOR_DIAGNOSTICS) # @Intent: Set compiler specific flag for diagnostic messages zephyr_compile_options($) @@ -378,6 +383,7 @@ zephyr_compile_options($<$:$:$>) +zephyr_link_libraries($) # Allow the user to inject options when calling cmake, e.g. # 'cmake -DEXTRA_CFLAGS="-Werror -Wno-deprecated-declarations" ..' @@ -408,7 +414,8 @@ zephyr_compile_options(${COMPILER_OPT_AS_LIST}) # TODO: Include arch compiler options at this point. if(NOT CMAKE_C_COMPILER_ID STREQUAL "Clang" AND - NOT CMAKE_C_COMPILER_ID STREQUAL "IntelLLVM") + NOT CMAKE_C_COMPILER_ID STREQUAL "IntelLLVM" AND + NOT CMAKE_C_COMPILER_ID STREQUAL "ARMClang") # GCC assumed zephyr_cc_option(-fno-reorder-functions) @@ -435,14 +442,15 @@ zephyr_cc_option_ifdef(CONFIG_STACK_USAGE -fstack-usage) # application code. This saves some memory, stops leaking user locations # in binaries, makes failure logs more deterministic and most # importantly makes builds more deterministic - -# If several match then the last one wins. This matters for instances -# like tests/ and samples/: they're inside all of them! Then let's -# strip as little as possible. -zephyr_cc_option(-fmacro-prefix-map=${CMAKE_SOURCE_DIR}=CMAKE_SOURCE_DIR) -zephyr_cc_option(-fmacro-prefix-map=${ZEPHYR_BASE}=ZEPHYR_BASE) -if(WEST_TOPDIR) - zephyr_cc_option(-fmacro-prefix-map=${WEST_TOPDIR}=WEST_TOPDIR) +if(CONFIG_BUILD_OUTPUT_STRIP_PATHS) + # If several match then the last one wins. This matters for instances + # like tests/ and samples/: they're inside all of them! Then let's + # strip as little as possible. + zephyr_cc_option(-fmacro-prefix-map=${CMAKE_SOURCE_DIR}=CMAKE_SOURCE_DIR) + zephyr_cc_option(-fmacro-prefix-map=${ZEPHYR_BASE}=ZEPHYR_BASE) + if(WEST_TOPDIR) + zephyr_cc_option(-fmacro-prefix-map=${WEST_TOPDIR}=WEST_TOPDIR) + endif() endif() # TODO: Archiver arguments @@ -587,6 +595,9 @@ endforeach() set(ZEPHYR_CURRENT_MODULE_DIR) set(ZEPHYR_CURRENT_CMAKE_DIR) +get_property(LIBC_LINK_LIBRARIES TARGET zephyr_interface PROPERTY LIBC_LINK_LIBRARIES) +zephyr_link_libraries(${LIBC_LINK_LIBRARIES}) + set(syscall_list_h ${CMAKE_CURRENT_BINARY_DIR}/include/generated/syscall_list.h) set(syscalls_json ${CMAKE_CURRENT_BINARY_DIR}/misc/generated/syscalls.json) set(struct_tags_json ${CMAKE_CURRENT_BINARY_DIR}/misc/generated/struct_tags.json) @@ -735,6 +746,7 @@ add_custom_command(OUTPUT include/generated/syscall_dispatch.c ${syscall_list_h} --base-output include/generated/syscalls # Write to this dir --syscall-dispatch include/generated/syscall_dispatch.c # Write this file --syscall-list ${syscall_list_h} + $<$:--gen-mrsh-files> ${SYSCALL_LONG_REGISTERS_ARG} ${SYSCALL_SPLIT_TIMEOUT_ARG} WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR} @@ -1717,7 +1729,18 @@ endif() # Generate and use MCUboot related artifacts as needed. if(CONFIG_BOOTLOADER_MCUBOOT) - include(${CMAKE_CURRENT_LIST_DIR}/cmake/mcuboot.cmake) + get_target_property(signing_script zephyr_property_target SIGNING_SCRIPT) + if(NOT signing_script) + set_target_properties(zephyr_property_target PROPERTIES SIGNING_SCRIPT ${CMAKE_CURRENT_LIST_DIR}/cmake/mcuboot.cmake) + endif() +endif() + +# Include signing script, if set +get_target_property(signing_script zephyr_property_target SIGNING_SCRIPT) +if(signing_script) + message(STATUS "Including signing script: ${signing_script}") + + include(${signing_script}) endif() # Generate USB-C VIF policies in XML format diff --git a/CODEOWNERS b/CODEOWNERS index fab462eae6dc..d0cff8e135c7 100644 --- a/CODEOWNERS +++ b/CODEOWNERS @@ -71,8 +71,9 @@ /soc/arm64/arm/ @povergoing /soc/arm64/arm/fvp_aemv8a/ @carlocaione /soc/arm64/intel_socfpga/* @siclim +/soc/Kconfig @tejlmand @galak @nashif @nordicjm /submanifests/* @mbolivar-nordic -/arch/x86/ @jhedberg @nashif @jenmwms @aasthagr +/arch/x86/ @jhedberg @nashif @aasthagr /arch/nios2/ @nashif /arch/posix/ @aescolar @daor-oti /arch/riscv/ @kgugala @pgielda @@ -84,7 +85,7 @@ /soc/riscv/riscv-privilege/neorv32/ @henrikbrixandersen /soc/riscv/riscv-privilege/gd32vf103/ @soburi /soc/riscv/riscv-privilege/niosv/ @sweeaun -/soc/x86/ @dcpleung @nashif @jenmwms @aasthagr +/soc/x86/ @dcpleung @nashif @aasthagr /arch/xtensa/ @dcpleung @andyross @nashif /soc/xtensa/ @dcpleung @andyross @nashif /arch/sparc/ @julius-barendt @@ -100,6 +101,7 @@ /boards/arm/96b_stm32_sensor_mez/ @Mani-Sadhasivam /boards/arm/96b_wistrio/ @Mani-Sadhasivam /boards/arm/arduino_due/ @ioannisg +/boards/arm/acn52832/ @sven-hm /boards/arm/bbc_microbit_v2/ @LingaoM /boards/arm/bl5340_dvk/ @lairdjm /boards/arm/bl65*/ @lairdjm @@ -127,6 +129,7 @@ /boards/arm/lpcxpresso*/doc/ @dleach02 @MeganHansen /boards/arm/mg100/ @rerickson1 /boards/arm/mimx8mm_evk/ @Mani-Sadhasivam +/boards/arm/mimx8mm_phyboard_polis @pefech /boards/arm/mimxrt*/ @mmahadevan108 @dleach02 /boards/arm/mimxrt*/doc/ @dleach02 @MeganHansen /boards/arm/mps2_an385/ @fvincenzo @@ -174,7 +177,6 @@ /boards/posix/nrf52_bsim/ @aescolar @wopu-ot /boards/riscv/ @kgugala @pgielda /boards/riscv/rv32m1_vega/ @dleach02 -/boards/riscv/beaglev_starlight_jh7100/ @rajnesh-kanwal /boards/riscv/adp_xc7k_ae350/ @cwshu @kevinwang821020 @jimmyzhe /boards/riscv/longan_nano/ @soburi /boards/riscv/neorv32/ @henrikbrixandersen @@ -183,7 +185,7 @@ /boards/shields/atmel_rf2xx/ @nandojve /boards/shields/esp_8266/ @nandojve /boards/shields/inventek_eswifi/ @nandojve -/boards/x86/ @dcpleung @nashif @jenmwms @aasthagr +/boards/x86/ @dcpleung @nashif @aasthagr /boards/x86/acrn/ @enjiamai /boards/xtensa/ @nashif @dcpleung /boards/xtensa/odroid_go/ @ydamigos @@ -200,6 +202,7 @@ /boards/arm64/fvp_baser_aemv8r/ @povergoing /boards/arm64/fvp_base_revc_2xaemv8a/ @carlocaione /boards/arm64/intel_socfpga_agilex_socdk/ @siclim @ngboonkhai +/boards/Kconfig @tejlmand @galak @nashif @nordicjm # All cmake related files /cmake/ @tejlmand @nashif /cmake/*/arcmwdt/ @abrodkin @evgeniy-paltsev @tejlmand @@ -212,6 +215,7 @@ /doc/_scripts/ @carlescufi /doc/connectivity/bluetooth/ @alwa-nordic @jhedberg @Vudentz /doc/build/dts/ @galak @mbolivar-nordic +/doc/build/sysbuild/ @tejlmand @nordicjm /doc/hardware/peripherals/canbus/ @alexanderwachter @henrikbrixandersen /doc/security/ @ceolin @d3zd3z /drivers/debug/ @nashif @@ -280,6 +284,7 @@ /drivers/ethernet/*stm32* @Nukersson @lochej /drivers/ethernet/*w5500* @parthitce /drivers/ethernet/*xlnx_gem* @ibirnbaum +/drivers/ethernet/*smsc91x* @sgrrzhf /drivers/ethernet/phy/ @rlubos @tbursztyka @arvinf /drivers/mdio/ @rlubos @tbursztyka @arvinf /drivers/flash/ @nashif @de-nordic @@ -393,7 +398,7 @@ /drivers/serial/*b91* @andy-liu-telink /drivers/serial/uart_altera_jtag.c @nashif @gohshunjing /drivers/serial/uart_altera.c @gohshunjing -/drivers/serial/*ns16550* @dcpleung @nashif @jenmwms @aasthagr +/drivers/serial/*ns16550* @dcpleung @nashif @aasthagr /drivers/serial/*nrfx* @Mierunski @anangl /drivers/serial/uart_liteuart.c @mateusz-holenko @kgugala @pgielda /drivers/serial/Kconfig.mcux_iuart @Mani-Sadhasivam @@ -415,6 +420,7 @@ /drivers/serial/uart_hvc_xen_consoleio.c @lorc @firscity /drivers/serial/Kconfig.it8xxx2 @GTLin08 /drivers/serial/uart_ite_it8xxx2.c @GTLin08 +/drivers/smbus/ @finikorg /drivers/disk/ @jfischer-no /drivers/disk/sdmmc_sdhc.h @JunYangNXP /drivers/disk/sdmmc_stm32.c @anthonybrandon @@ -554,6 +560,7 @@ /dts/bindings/*/vexriscv* @mateusz-holenko @kgugala @pgielda /dts/bindings/*/andes* @cwshu @kevinwang821020 @jimmyzhe /dts/bindings/*/neorv32* @henrikbrixandersen +/dts/bindings/*/*lan91c111* @sgrrzhf /dts/bindings/i3c/ @dcpleung /dts/bindings/pm_cpu_ops/* @carlocaione /dts/bindings/ethernet/*gem.yaml @ibirnbaum @@ -561,6 +568,7 @@ /dts/bindings/sensor/*bme680* @BoschSensortec /dts/bindings/sensor/*ina23* @bbilas /dts/bindings/sensor/st* @avisconti +/dts/bindings/smbus/ @finikorg /dts/bindings/cpu/intel,niosv.yaml @sweeaun /dts/common/ @galak /include/ @nashif @carlescufi @galak @MaureenHelm @@ -585,6 +593,7 @@ /include/zephyr/drivers/led.h @Mani-Sadhasivam /include/zephyr/drivers/led_strip.h @mbolivar-nordic /include/zephyr/drivers/sensor.h @MaureenHelm +/include/zephyr/drivers/smbus.h @finikorg /include/zephyr/drivers/spi.h @tbursztyka /include/zephyr/drivers/lora.h @Mani-Sadhasivam /include/zephyr/drivers/peci.h @albertofloyd @franciscomunoz @sjvasanth1 @@ -686,6 +695,7 @@ /kernel/device.c @andyross @nashif /kernel/idle.c @andyross @nashif /samples/ @nashif +/samples/application_development/sysbuild/ @tejlmand @nordicjm /samples/basic/minimal/ @carlescufi /samples/basic/servo_motor/boards/*microbit* @jhe /samples/bluetooth/ @jhedberg @Vudentz @alwa-nordic @sjanc @@ -695,6 +705,7 @@ /samples/drivers/eeprom/ @henrikbrixandersen /samples/drivers/ht16k33/ @henrikbrixandersen /samples/drivers/lora/ @Mani-Sadhasivam +/samples/drivers/smbus/ @finikorg /samples/subsys/lorawan/ @Mani-Sadhasivam /samples/modules/canopennode/ @henrikbrixandersen /samples/net/ @rlubos @tbursztyka @@ -707,6 +718,7 @@ /samples/net/sockets/ @rlubos @tbursztyka /samples/sensor/ @MaureenHelm /samples/shields/ @avisconti +/samples/subsys/ipc/ipc_service/icmsg @emob-nordic /samples/subsys/logging/ @nordic-krch @jakub-uC /samples/subsys/logging/syst/ @dcpleung /samples/subsys/shell/ @jakub-uC @nordic-krch @@ -762,7 +774,7 @@ scripts/build/gen_image_info.py @tejlmand /scripts/build/uf2conv.py @petejohanson /scripts/build/user_wordsize.py @cfriedt /scripts/valgrind.supp @aescolar @daor-oti -/share/sysbuild/ @tejlmand +/share/sysbuild/ @tejlmand @nordicjm /share/zephyr-package/ @tejlmand /share/zephyrunittest-package/ @tejlmand /subsys/bluetooth/ @alwa-nordic @jhedberg @Vudentz @@ -786,6 +798,7 @@ scripts/build/gen_image_info.py @tejlmand /subsys/fs/ @nashif /subsys/fs/nvs/ @Laczen /subsys/ipc/ @carlocaione +/subsys/ipc/ipc_service/*/*icmsg* @emob-nordic /subsys/logging/ @nordic-krch /subsys/logging/backends/log_backend_net.c @nordic-krch @rlubos /subsys/lorawan/ @Mani-Sadhasivam @@ -829,9 +842,9 @@ scripts/build/gen_image_info.py @tejlmand /tests/boards/native_posix/ @aescolar @daor-oti /tests/bluetooth/ @alwa-nordic @jhedberg @Vudentz @sjanc /tests/bluetooth/controller/ @cvinayak @thoh-ot @kruithofa @erbr-ot @sjanc @ppryga -/tests/bluetooth/bsim/ @alwa-nordic @jhedberg @Vudentz @wopu-ot -/tests/bluetooth/bsim/audio/ @jhedberg @Vudentz @wopu-ot @Thalley -/tests/bluetooth/bsim/mesh/ @jhedberg @Vudentz @wopu-ot @PavelVPV +/tests/bsim/bluetooth/ @alwa-nordic @jhedberg @Vudentz @wopu-ot +/tests/bsim/bluetooth/audio/ @jhedberg @Vudentz @wopu-ot @Thalley +/tests/bsim/bluetooth/mesh/ @jhedberg @Vudentz @wopu-ot @PavelVPV /tests/bluetooth/mesh_shell/ @jhedberg @Vudentz @sjanc @PavelVPV /tests/bluetooth/tester/ @alwa-nordic @jhedberg @Vudentz @sjanc /tests/posix/ @cfriedt @@ -843,6 +856,7 @@ scripts/build/gen_image_info.py @tejlmand /tests/drivers/flash_simulator/ @de-nordic /tests/drivers/gpio/ @mnkp /tests/drivers/hwinfo/ @alexanderwachter +/tests/drivers/smbus/ @finikorg /tests/drivers/spi/ @tbursztyka /tests/drivers/uart/uart_async_api/ @Mierunski /tests/drivers/w1/ @str4t0m diff --git a/Kconfig.zephyr b/Kconfig.zephyr index 5164fdf2d1f0..827b19a6ce4d 100644 --- a/Kconfig.zephyr +++ b/Kconfig.zephyr @@ -167,13 +167,6 @@ config CMAKE_LINKER_GENERATOR endchoice -config LLVM_USE_LD - bool "LLVM use ld linker" - depends on "${ZEPHYR_TOOLCHAIN_VARIANT}" = "llvm" - default y - help - Use binutils ld linker instead of LLVM built-in lld linker. - config HAVE_CUSTOM_LINKER_SCRIPT bool "Custom linker script provided" help @@ -327,6 +320,15 @@ config NATIVE_APPLICATION Build as a native application that can run on the host and using resources and libraries provided by the host. +config COMPILER_FREESTANDING + bool "Build in a freestanding compiler mode" + help + Configure the compiler to operate in freestanding mode according to + the C and C++ language specifications. Freestanding mode reduces the + requirements of the compiler and language environment, which can + negatively impact the ability for the compiler to detect errors and + perform optimizations. + choice COMPILER_OPTIMIZATIONS prompt "Optimization level" default NO_OPTIMIZATIONS if COVERAGE @@ -360,6 +362,9 @@ config NO_OPTIMIZATIONS help Compiler optimizations will be set to -O0 independently of other options. + + Selecting this option will likely require manual tuning of the + default stack sizes in order to avoid stack overflows. endchoice config COMPILER_WARNINGS_AS_ERRORS @@ -367,6 +372,12 @@ config COMPILER_WARNINGS_AS_ERRORS help Turn on "warning as error" toolchain flags +config COMPILER_SAVE_TEMPS + bool "Save temporary object files" + help + Instruct the compiler to save the temporary intermediate files + permanently. These can be useful for troubleshooting build issues. + config COMPILER_COLOR_DIAGNOSTICS bool "Colored diagnostics" default y @@ -682,6 +693,20 @@ config BUILD_OUTPUT_META_STATE_PROPAGATE defined when `west update` was run the last time (`manifest-rev`). The off state is only present if a west workspace is found. +config BUILD_OUTPUT_STRIP_PATHS + bool "Strip absolute paths from binaries" + default y + help + If the compiler supports it, strip the ${ZEPHYR_BASE} prefix from the + __FILE__ macro used in __ASSERT*, in the + .noinit."/home/joe/zephyr/fu/bar.c" section names and in any + application code. + This saves some memory, stops leaking user locations in binaries, makes + failure logs more deterministic and most importantly makes builds more + deterministic. + Debuggers usually have a path mapping feature to ensure the files are + still found. + endmenu config DEPRECATED @@ -788,6 +813,18 @@ config BOOTLOADER_MCUBOOT if BOOTLOADER_MCUBOOT +config MCUBOOT_CMAKE_WEST_SIGN_PARAMS + string "Extra parameters to west sign" + default "--quiet" + help + Parameters that are passed by cmake to west sign, just after + the command, before all other parameters needed for image + signing. + By default this is set to "--quiet" to prevent extra, non-error, + diagnostic messages from west sign. This does not affect signing + tool for which extra parameters are passed with + MCUBOOT_EXTRA_IMGTOOL_ARGS. + config MCUBOOT_SIGNATURE_KEY_FILE string "Path to the mcuboot signing key file" default "" diff --git a/MAINTAINERS.yml b/MAINTAINERS.yml index a6346a2c29cf..9b9e51cd1bf0 100644 --- a/MAINTAINERS.yml +++ b/MAINTAINERS.yml @@ -184,13 +184,10 @@ Bluetooth: - jhedberg collaborators: - hermabe - - jori-nordic - - alwa-nordic - Vudentz - Thalley - asbjornsabo - sjanc - - theob-pro files: - doc/connectivity/bluetooth/ - drivers/bluetooth/ @@ -199,21 +196,26 @@ Bluetooth: - samples/bluetooth/ - subsys/bluetooth/ - subsys/bluetooth/common/ - - subsys/bluetooth/host/ - subsys/bluetooth/services/ - subsys/bluetooth/shell/ - tests/bluetooth/ + - tests/bsim/bluetooth/ files-exclude: - include/zephyr/bluetooth/mesh/ - subsys/bluetooth/controller/ + - subsys/bluetooth/host/ - subsys/bluetooth/mesh/ - samples/bluetooth/mesh/ - subsys/bluetooth/audio/ - include/zephyr/bluetooth/audio/ - - tests/bluetooth/bsim/audio/ + - tests/bsim/bluetooth/audio/ + - tests/bsim/bluetooth/host/ + - tests/bsim/bluetooth/ll/ - tests/bluetooth/controller/ + - tests/bluetooth/host*/ - tests/bluetooth/mesh_*/ - tests/bluetooth/mesh/ + - tests/bsim/bluetooth/mesh/ - tests/bluetooth/shell/audio* labels: - "area: Bluetooth" @@ -233,10 +235,33 @@ Bluetooth controller: files: - subsys/bluetooth/controller/ - tests/bluetooth/controller/ + - tests/bsim/bluetooth/ll/ labels: - "area: Bluetooth Controller" - "area: Bluetooth" +Bluetooth Host: + status: maintained + maintainers: + - jhedberg + collaborators: + - hermabe + - jori-nordic + - alwa-nordic + - Vudentz + - Thalley + - asbjornsabo + - sjanc + - theob-pro + - kruithofa + files: + - subsys/bluetooth/host/ + - tests/bluetooth/host*/ + - tests/bsim/bluetooth/host/ + labels: + - "area: Bluetooth Host" + - "area: Bluetooth" + Bluetooth Mesh: status: maintained maintainers: @@ -250,6 +275,7 @@ Bluetooth Mesh: - subsys/bluetooth/mesh/ - include/zephyr/bluetooth/mesh/ - tests/bluetooth/mesh*/ + - tests/bsim/bluetooth/mesh/ - samples/bluetooth/mesh/ labels: - "area: Bluetooth Mesh" @@ -272,7 +298,7 @@ Bluetooth Audio: files: - subsys/bluetooth/audio/ - include/zephyr/bluetooth/audio/ - - tests/bluetooth/bsim/audio/ + - tests/bsim/bluetooth/audio/ - tests/bluetooth/shell/audio* labels: - "area: Bluetooth Audio" @@ -298,6 +324,20 @@ Build system: labels: - "area: Build System" +Board/SoC configuration: + status: maintained + maintainers: + - tejlmand + collaborators: + - galak + - nashif + - nordicjm + files: + - soc/Kconfig + - boards/Kconfig + labels: + - "area: Board/SoC configuration" + "C++": status: maintained maintainers: @@ -755,7 +795,7 @@ Release Notes: - include/zephyr/drivers/edac.h - samples/subsys/edac/ - tests/subsys/edac/ - - doc/hardware/peripherals/edac/index.rst + - doc/hardware/peripherals/edac/ labels: - "area: EDAC" @@ -860,12 +900,11 @@ Release Notes: - "area: Fuel Gauge" "Drivers: GPIO": - status: maintained - maintainers: - - mnkp + status: odd fixes collaborators: - henrikbrixandersen - cfriedt + - mnkp files: - doc/hardware/peripherals/gpio.rst - drivers/gpio/ @@ -924,6 +963,8 @@ Release Notes: status: maintained maintainers: - dcpleung + collaborators: + - XenuIsWatching files: - drivers/i3c/ - dts/bindings/i3c/ @@ -1073,6 +1114,30 @@ Release Notes: labels: - "area: Regulators" +"Drivers: Retained Memory": + status: maintained + maintainers: + - nordicjm + files: + - drivers/retained_mem/ + - dts/bindings/retained_mem/ + - include/zephyr/drivers/retained_mem.h + - tests/drivers/retained_mem/ + labels: + - "area: Retained Memory" + +"Drivers: RTC": + status: maintained + maintainers: + - bjarki-trackunit + files: + - drivers/rtc/ + - tests/drivers/rtc/ + - doc/hardware/peripherals/rtc.rst + - include/zephyr/drivers/rtc.h + labels: + - "area: RTC" + "Drivers: PCI": status: maintained maintainers: @@ -1204,6 +1269,20 @@ Release Notes: labels: - "area: Sensors" +"Drivers: SMBus": + status: maintained + maintainers: + - finikorg + files: + - drivers/smbus/ + - dts/bindings/smbus/ + - include/zephyr/drivers/smbus.h + - samples/drivers/smbus/ + - tests/drivers/smbus/ + - doc/hardware/peripherals/smbus.rst + labels: + - "area: SMBus" + "Drivers: SPI": status: maintained maintainers: @@ -1371,6 +1450,16 @@ Filesystems: labels: - "area: File System" +"Filesystems: FatFs reentrant support": + status: maintained + maintainers: + - ox11 + files: + - modules/fatfs/zfs_ffsystem.c + - tests/subsys/fs/fat_fs_api/src/test_fat_file_reentrant.c + labels: + - "area: File System" + Formatted Output: status: maintained maintainers: @@ -1417,6 +1506,8 @@ Input: - gmarull files: - doc/services/input/ + - drivers/input/ + - dts/bindings/input/ - include/zephyr/dt-bindings/input/ - include/zephyr/input/ - samples/subsys/input/ @@ -1775,6 +1866,8 @@ Networking: - rlubos collaborators: - pdgendt + - canisLupus1313 + - mariuszpos files: - subsys/net/l2/openthread/ - samples/net/openthread/ @@ -1803,6 +1896,9 @@ nRF52 BSIM: files: - boards/posix/nrf52_bsim/ - tests/boards/nrf52_bsim/ + - tests/bsim/ + files-exclude: + - tests/bsim/*/ labels: - "platform: nRF52 BSIM" @@ -1869,6 +1965,7 @@ Twister: - PerMac - hakehuang - gopiotr + - golowanow files: - scripts/twister - scripts/pylib/twister/ @@ -2040,7 +2137,11 @@ Raspberry Pi Pico Platforms: - "platform: Raspberry Pi Pico" SiLabs Platforms: - status: odd fixes + status: maintained + maintainers: + - fkokosinski + collaborators: + - tgorochowik files: - soc/arm/silabs_*/ - boards/arm/ef*/ @@ -2091,7 +2192,7 @@ Intel Platforms (Xtensa): - dts/xtensa/intel/ - tests/boards/intel_adsp/ - samples/boards/intel_adsp/ - - dts/bindings/*/intel,* + - dts/bindings/*/intel,adsp* labels: - "platform: Intel ADSP" @@ -2146,6 +2247,7 @@ Microchip SAM Platforms: - nandojve collaborators: - attie-argentum + - pdgendt - mnkp - stephanosio files: @@ -2335,10 +2437,38 @@ Xilinx Platforms: labels: - "platform: Xilinx" +Infineon Platforms: + status: maintained + maintainers: + - ifyall + collaborators: + - npal-cy + - talih0 + files: + - boards/arm/cy8ckit_*/ + - boards/arm/cy8cproto_*/ + - boards/arm/xmc*_relax*/ + - drivers/*/*ifx_cat1*/ + - drivers/*/*ifx_cat1*.c + - drivers/*/*ifx_cat1* + - drivers/*/*xmc*/ + - drivers/*/*xmc*.c + - drivers/*/*/*xmc* + - dts/arm/infineon/ + - dts/bindings/*/*infineon* + - soc/arm/infineon_*/ + labels: + - "platform: Infineon" + description: >- + Infineon SOCs, dts files and related drivers. Infineon Proto, Pioneer, Eval and Relax + boards. + RTIO: status: maintained maintainers: - teburd + collaborators: + - yperess files: - samples/subsys/rtio/ - include/zephyr/rtio/ @@ -2358,6 +2488,19 @@ Storage: labels: - "area: Storage" +Sysbuild: + status: maintained + maintainers: + - tejlmand + collaborators: + - nordicjm + files: + - share/sysbuild/ + - samples/application_development/sysbuild/ + - doc/build/sysbuild/ + labels: + - "area: Sysbuild" + Task Watchdog: status: maintained maintainers: @@ -2565,6 +2708,8 @@ West: status: maintained maintainers: - nandojve + collaborators: + - pdgendt files: - modules/Kconfig.atmel labels: @@ -2914,6 +3059,8 @@ West: - rlubos collaborators: - pdgendt + - canisLupus1313 + - mariuszpos files: - modules/openthread/ labels: diff --git a/arch/arc/core/arc_smp.c b/arch/arc/core/arc_smp.c index a9523a7fc370..9fb43c411524 100644 --- a/arch/arc/core/arc_smp.c +++ b/arch/arc/core/arc_smp.c @@ -145,9 +145,8 @@ void arch_sched_ipi(void) } } -static int arc_smp_init(const struct device *dev) +static int arc_smp_init(void) { - ARG_UNUSED(dev); struct arc_connect_bcr bcr; /* necessary master core init */ diff --git a/arch/arc/core/cache.c b/arch/arc/core/cache.c index c67db4621d39..1536c5a173f2 100644 --- a/arch/arc/core/cache.c +++ b/arch/arc/core/cache.c @@ -216,9 +216,8 @@ int arch_icache_flush_and_invd_range(void *addr, size_t size) return -ENOTSUP; } -static int init_dcache(const struct device *unused) +static int init_dcache(void) { - ARG_UNUSED(unused); arch_dcache_enable(); diff --git a/arch/arc/core/irq_offload.c b/arch/arc/core/irq_offload.c index 85fa664cddae..b658b8e353d4 100644 --- a/arch/arc/core/irq_offload.c +++ b/arch/arc/core/irq_offload.c @@ -54,9 +54,8 @@ void arch_irq_offload(irq_offload_routine_t routine, const void *parameter) } /* need to be executed on every core in the system */ -int arc_irq_offload_init(const struct device *unused) +int arc_irq_offload_init(void) { - ARG_UNUSED(unused); IRQ_CONNECT(IRQ_OFFLOAD_LINE, IRQ_OFFLOAD_PRIO, arc_irq_offload_handler, NULL, 0); diff --git a/arch/arc/core/mpu/arc_mpu_common_internal.h b/arch/arc/core/mpu/arc_mpu_common_internal.h index e6e2174a5984..736a9742af96 100644 --- a/arch/arc/core/mpu/arc_mpu_common_internal.h +++ b/arch/arc/core/mpu/arc_mpu_common_internal.h @@ -238,9 +238,8 @@ int arc_core_mpu_buffer_validate(void *addr, size_t size, int write) * This function provides the default configuration mechanism for the Memory * Protection Unit (MPU). */ -static int arc_mpu_init(const struct device *arg) +static int arc_mpu_init(void) { - ARG_UNUSED(arg); uint32_t num_regions = get_num_regions(); diff --git a/arch/arc/core/mpu/arc_mpu_v4_internal.h b/arch/arc/core/mpu/arc_mpu_v4_internal.h index b8348130db68..e7e91fed93fd 100644 --- a/arch/arc/core/mpu/arc_mpu_v4_internal.h +++ b/arch/arc/core/mpu/arc_mpu_v4_internal.h @@ -814,9 +814,8 @@ int arc_core_mpu_buffer_validate(void *addr, size_t size, int write) * This function provides the default configuration mechanism for the Memory * Protection Unit (MPU). */ -static int arc_mpu_init(const struct device *arg) +static int arc_mpu_init(void) { - ARG_UNUSED(arg); uint32_t num_regions; uint32_t i; diff --git a/arch/arc/core/secureshield/arc_sjli.c b/arch/arc/core/secureshield/arc_sjli.c index ec85421bb112..22deebc27185 100644 --- a/arch/arc/core/secureshield/arc_sjli.c +++ b/arch/arc/core/secureshield/arc_sjli.c @@ -48,7 +48,7 @@ static void sjli_table_init(void) /* * @brief initialization of secureshield related functions. */ -static int arc_secureshield_init(const struct device *arg) +static int arc_secureshield_init(void) { sjli_table_init(); diff --git a/arch/arm/core/aarch32/CMakeLists.txt b/arch/arm/core/aarch32/CMakeLists.txt index 2a24639c9230..00bc7693cda0 100644 --- a/arch/arm/core/aarch32/CMakeLists.txt +++ b/arch/arm/core/aarch32/CMakeLists.txt @@ -22,8 +22,6 @@ zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE ../common/tls.c) zephyr_library_sources_ifdef(CONFIG_USERSPACE userspace.S) zephyr_library_sources_ifdef(CONFIG_ARM_ZIMAGE_HEADER header.S) -zephyr_library_sources_ifdef(CONFIG_ARCH_CACHE cache.c) - add_subdirectory_ifdef(CONFIG_CPU_CORTEX_M cortex_m) add_subdirectory_ifdef(CONFIG_CPU_CORTEX_M_HAS_CMSE cortex_m/cmse) add_subdirectory_ifdef(CONFIG_ARM_SECURE_FIRMWARE cortex_m/tz) diff --git a/arch/arm/core/aarch32/Kconfig b/arch/arm/core/aarch32/Kconfig index 63f6d7121e20..d435fdf9ccd1 100644 --- a/arch/arm/core/aarch32/Kconfig +++ b/arch/arm/core/aarch32/Kconfig @@ -150,7 +150,7 @@ config RUNTIME_NMI The kernel provides a simple NMI handler that simply hangs in a tight loop if triggered. This fills the requirement that there must be an NMI handler installed when the CPU boots. If a custom handler is - needed, enable this option and attach it via _NmiHandlerSet(). + needed, enable this option and attach it via z_arm_nmi_set_handler(). config PLATFORM_SPECIFIC_INIT bool "Platform (SOC) specific startup hook" @@ -285,7 +285,7 @@ endchoice config FP16 bool "Half-precision floating point support" - depends on CPU_AARCH32_CORTEX_A || CPU_AARCH32_CORTEX_R + depends on CPU_AARCH32_CORTEX_A || CPU_AARCH32_CORTEX_R || CPU_CORTEX_M55 default y help This option enables the half-precision (16-bit) floating point support diff --git a/arch/arm/core/aarch32/cortex_a_r/CMakeLists.txt b/arch/arm/core/aarch32/cortex_a_r/CMakeLists.txt index d3337a6753a9..c1cdc7e9c67b 100644 --- a/arch/arm/core/aarch32/cortex_a_r/CMakeLists.txt +++ b/arch/arm/core/aarch32/cortex_a_r/CMakeLists.txt @@ -17,3 +17,4 @@ zephyr_library_sources( zephyr_library_sources_ifdef(CONFIG_USERSPACE thread.c) zephyr_library_sources_ifdef(CONFIG_SEMIHOST semihost.c) zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE __aeabi_read_tp.S) +zephyr_library_sources_ifdef(CONFIG_ARCH_CACHE cache.c) diff --git a/arch/arm/core/aarch32/cortex_a_r/cache.c b/arch/arm/core/aarch32/cortex_a_r/cache.c new file mode 100644 index 000000000000..b9748ef26489 --- /dev/null +++ b/arch/arm/core/aarch32/cortex_a_r/cache.c @@ -0,0 +1,210 @@ +/* + * Copyright 2023 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** + * @file + * @brief Cortex-A/R AArch32 L1-cache maintenance operations. + * + * This module implement the cache API for Cortex-A/R AArch32 cores using CMSIS. + * Only L1-cache maintenance operations is supported. + */ + +#include +#include +#include + +/* Cache Type Register */ +#define CTR_DMINLINE_SHIFT 16 +#define CTR_DMINLINE_MASK BIT_MASK(4) + +static size_t dcache_line_size; + +/** + * @brief Get the smallest D-cache line size. + * + * Get the smallest D-cache line size of all the data and unified caches that + * the processor controls. + */ +size_t arch_dcache_line_size_get(void) +{ + uint32_t val; + uint32_t dminline; + + if (!dcache_line_size) { + val = read_sysreg(ctr); + dminline = (val >> CTR_DMINLINE_SHIFT) & CTR_DMINLINE_MASK; + /* Log2 of the number of words */ + dcache_line_size = 2 << dminline; + } + + return dcache_line_size; +} + +void arch_dcache_enable(void) +{ + uint32_t val; + + arch_dcache_invd_all(); + + val = __get_SCTLR(); + val |= SCTLR_C_Msk; + __DSB(); + __set_SCTLR(val); + __ISB(); +} + +void arch_dcache_disable(void) +{ + uint32_t val; + + val = __get_SCTLR(); + val &= ~SCTLR_C_Msk; + __DSB(); + __set_SCTLR(val); + __ISB(); + + arch_dcache_flush_and_invd_all(); +} + +int arch_dcache_flush_all(void) +{ + L1C_CleanDCacheAll(); + + return 0; +} + +int arch_dcache_invd_all(void) +{ + L1C_InvalidateDCacheAll(); + + return 0; +} + +int arch_dcache_flush_and_invd_all(void) +{ + L1C_CleanInvalidateDCacheAll(); + + return 0; +} + +int arch_dcache_flush_range(void *start_addr, size_t size) +{ + size_t line_size; + uintptr_t addr = (uintptr_t)start_addr; + uintptr_t end_addr = addr + size; + + /* Align address to line size */ + line_size = arch_dcache_line_size_get(); + addr &= ~(line_size - 1); + + while (addr < end_addr) { + L1C_CleanDCacheMVA((void *)addr); + addr += line_size; + } + + return 0; +} + +int arch_dcache_invd_range(void *start_addr, size_t size) +{ + size_t line_size; + uintptr_t addr = (uintptr_t)start_addr; + uintptr_t end_addr = addr + size; + + line_size = arch_dcache_line_size_get(); + + /* + * Clean and invalidate the partial cache lines at both ends of the + * given range to prevent data corruption + */ + if (end_addr & (line_size - 1)) { + end_addr &= ~(line_size - 1); + L1C_CleanInvalidateDCacheMVA((void *)end_addr); + } + + if (addr & (line_size - 1)) { + addr &= ~(line_size - 1); + if (addr == end_addr) { + goto done; + } + L1C_CleanInvalidateDCacheMVA((void *)addr); + addr += line_size; + } + + /* Align address to line size */ + addr &= ~(line_size - 1); + + while (addr < end_addr) { + L1C_InvalidateDCacheMVA((void *)addr); + addr += line_size; + } + +done: + return 0; +} + +int arch_dcache_flush_and_invd_range(void *start_addr, size_t size) +{ + size_t line_size; + uintptr_t addr = (uintptr_t)start_addr; + uintptr_t end_addr = addr + size; + + /* Align address to line size */ + line_size = arch_dcache_line_size_get(); + addr &= ~(line_size - 1); + + while (addr < end_addr) { + L1C_CleanInvalidateDCacheMVA((void *)addr); + addr += line_size; + } + + return 0; +} + +void arch_icache_enable(void) +{ + arch_icache_invd_all(); + __set_SCTLR(__get_SCTLR() | SCTLR_I_Msk); + __ISB(); +} + +void arch_icache_disable(void) +{ + __set_SCTLR(__get_SCTLR() & ~SCTLR_I_Msk); + __ISB(); +} + +int arch_icache_flush_all(void) +{ + return -ENOTSUP; +} + +int arch_icache_invd_all(void) +{ + L1C_InvalidateICacheAll(); + + return 0; +} + +int arch_icache_flush_and_invd_all(void) +{ + return -ENOTSUP; +} + +int arch_icache_flush_range(void *start_addr, size_t size) +{ + return -ENOTSUP; +} + +int arch_icache_invd_range(void *start_addr, size_t size) +{ + return -ENOTSUP; +} + +int arch_icache_flush_and_invd_range(void *start_addr, size_t size) +{ + return -ENOTSUP; +} diff --git a/arch/arm/core/aarch32/cortex_m/CMakeLists.txt b/arch/arm/core/aarch32/cortex_m/CMakeLists.txt index 64ac2305f4dd..8d12299e9653 100644 --- a/arch/arm/core/aarch32/cortex_m/CMakeLists.txt +++ b/arch/arm/core/aarch32/cortex_m/CMakeLists.txt @@ -19,6 +19,7 @@ zephyr_library_sources_ifdef(CONFIG_DEBUG_COREDUMP coredump.c) zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE __aeabi_read_tp.S) zephyr_library_sources_ifdef(CONFIG_SEMIHOST semihost.c) zephyr_library_sources_ifdef(CONFIG_PM_S2RAM pm_s2ram.c pm_s2ram.S) +zephyr_library_sources_ifdef(CONFIG_ARCH_CACHE cache.c) if(CONFIG_NULL_POINTER_EXCEPTION_DETECTION_DWT) zephyr_library_sources(debug.c) diff --git a/arch/arm/core/aarch32/cache.c b/arch/arm/core/aarch32/cortex_m/cache.c similarity index 100% rename from arch/arm/core/aarch32/cache.c rename to arch/arm/core/aarch32/cortex_m/cache.c diff --git a/arch/arm/core/aarch32/cortex_m/debug.c b/arch/arm/core/aarch32/cortex_m/debug.c index b0cf8d6fb251..70394b2d361c 100644 --- a/arch/arm/core/aarch32/cortex_m/debug.c +++ b/arch/arm/core/aarch32/cortex_m/debug.c @@ -58,9 +58,8 @@ BUILD_ASSERT(!(CONFIG_CORTEX_M_NULL_POINTER_EXCEPTION_PAGE_SIZE & (CONFIG_CORTEX_M_NULL_POINTER_EXCEPTION_PAGE_SIZE - 1)), "the size of the partition must be power of 2"); -static int z_arm_debug_enable_null_pointer_detection(const struct device *arg) +static int z_arm_debug_enable_null_pointer_detection(void) { - ARG_UNUSED(arg); z_arm_dwt_init(); z_arm_dwt_enable_debug_monitor(); diff --git a/arch/arm/core/aarch32/nmi.c b/arch/arm/core/aarch32/nmi.c index aefa4450b030..a84827d1e38a 100644 --- a/arch/arm/core/aarch32/nmi.c +++ b/arch/arm/core/aarch32/nmi.c @@ -70,7 +70,7 @@ void z_arm_nmi_init(void) * */ -void z_NmiHandlerSet(void (*pHandler)(void)) +void z_arm_nmi_set_handler(void (*pHandler)(void)) { handler = pHandler; } diff --git a/arch/arm/include/aarch32/cortex_m/tz_ns.h b/arch/arm/include/aarch32/cortex_m/tz_ns.h index ecf928821d08..51ed5eb1ca9f 100644 --- a/arch/arm/include/aarch32/cortex_m/tz_ns.h +++ b/arch/arm/include/aarch32/cortex_m/tz_ns.h @@ -47,7 +47,6 @@ * r0-r3 unmodified. */ #define __TZ_WRAP_FUNC_RAW(preface, name, postface, store_lr, load_lr) \ - do { \ __asm__ volatile( \ ".global "#preface"; .type "#preface", %function"); \ __asm__ volatile( \ @@ -64,8 +63,7 @@ "bl " #postface "\n\t" \ "pop {r0-r3}\n\t" \ load_lr "\n\t" \ - ::); \ - } while (false) + ::); /** * @brief Macro for "sandwiching" a function call (@p name) in two other calls diff --git a/arch/arm64/core/Kconfig b/arch/arm64/core/Kconfig index 968454634f78..8853f4dbf008 100644 --- a/arch/arm64/core/Kconfig +++ b/arch/arm64/core/Kconfig @@ -110,6 +110,22 @@ config WAIT_AT_RESET_VECTOR Spin at reset vector waiting for debugger to attach and resume execution +config ARM64_SAFE_EXCEPTION_STACK + bool "To enable the safe exception stack" + help + The safe exception stack is used for checking whether the kernel stack + overflows during the exception happens from EL1. This stack is not + used for user stack overflow checking, because kernel stack support + the checking work. + +config ARM64_SAFE_EXCEPTION_STACK_SIZE + int "The stack size of the safe exception stack" + default 4096 + depends on ARM64_SAFE_EXCEPTION_STACK + help + The stack size of the safe exception stack. The safe exception stack + requires to be enough to do the stack overflow check. + if CPU_CORTEX_A config ARMV8_A_NS diff --git a/arch/arm64/core/fatal.c b/arch/arm64/core/fatal.c index 7c1c16544be3..96211f14c67f 100644 --- a/arch/arm64/core/fatal.c +++ b/arch/arm64/core/fatal.c @@ -20,6 +20,27 @@ LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL); +#ifdef CONFIG_ARM64_SAFE_EXCEPTION_STACK +K_KERNEL_PINNED_STACK_ARRAY_DEFINE(z_arm64_safe_exception_stacks, + CONFIG_MP_MAX_NUM_CPUS, + CONFIG_ARM64_SAFE_EXCEPTION_STACK_SIZE); + +void z_arm64_safe_exception_stack_init(void) +{ + int cpu_id; + char *safe_exc_sp; + + cpu_id = arch_curr_cpu()->id; + safe_exc_sp = Z_KERNEL_STACK_BUFFER(z_arm64_safe_exception_stacks[cpu_id]) + + CONFIG_ARM64_SAFE_EXCEPTION_STACK_SIZE; + arch_curr_cpu()->arch.safe_exception_stack = (uint64_t)safe_exc_sp; + write_sp_el0((uint64_t)safe_exc_sp); + + arch_curr_cpu()->arch.current_stack_limit = 0UL; + arch_curr_cpu()->arch.corrupted_sp = 0UL; +} +#endif + #ifdef CONFIG_USERSPACE Z_EXC_DECLARE(z_arm64_user_string_nlen); diff --git a/arch/arm64/core/isr_wrapper.S b/arch/arm64/core/isr_wrapper.S index c12bf176f3e4..809762f27f96 100644 --- a/arch/arm64/core/isr_wrapper.S +++ b/arch/arm64/core/isr_wrapper.S @@ -44,6 +44,10 @@ SECTION_FUNC(TEXT, _isr_wrapper) mov x2, sp mov sp, x1 str x2, [sp, #-16]! +#if defined(CONFIG_ARM64_SAFE_EXCEPTION_STACK) + sub x1, x1, #CONFIG_ISR_STACK_SIZE + str x1, [x0, #_cpu_offset_to_current_stack_limit] +#endif 1: #ifdef CONFIG_SCHED_THREAD_USAGE bl z_sched_usage_stop @@ -123,6 +127,12 @@ z_arm64_irq_done: /* retrieve pointer to the current thread */ ldr x1, [x0, #___cpu_t_current_OFFSET] +#if defined(CONFIG_ARM64_SAFE_EXCEPTION_STACK) + /* arch_curr_cpu()->arch.current_stack_limit = thread->arch.stack_limit */ + ldr x2, [x1, #_thread_offset_to_stack_limit] + str x2, [x0, #_cpu_offset_to_current_stack_limit] +#endif + /* * Get next thread to schedule with z_get_next_switch_handle(). * We pass it a NULL as we didn't save the whole thread context yet. diff --git a/arch/arm64/core/mmu.c b/arch/arm64/core/mmu.c index 14962be3fd9b..c431fee8af55 100644 --- a/arch/arm64/core/mmu.c +++ b/arch/arm64/core/mmu.c @@ -34,13 +34,16 @@ static struct k_spinlock xlat_lock; /* Returns a reference to a free table */ static uint64_t *new_table(void) { + uint64_t *table; unsigned int i; /* Look for a free table. */ for (i = 0U; i < CONFIG_MAX_XLAT_TABLES; i++) { if (xlat_use_count[i] == 0U) { + table = &xlat_tables[i * Ln_XLAT_NUM_ENTRIES]; xlat_use_count[i] = 1U; - return &xlat_tables[i * Ln_XLAT_NUM_ENTRIES]; + MMU_DEBUG("allocating table [%d]%p\n", i, table); + return table; } } @@ -616,8 +619,9 @@ static int __add_map(struct arm_mmu_ptables *ptables, const char *name, uint64_t desc = get_region_desc(attrs); bool may_overwrite = !(attrs & MT_NO_OVERWRITE); - MMU_DEBUG("mmap [%s]: virt %lx phys %lx size %lx attr %llx\n", - name, virt, phys, size, desc); + MMU_DEBUG("mmap [%s]: virt %lx phys %lx size %lx attr %llx %s overwrite\n", + name, virt, phys, size, desc, + may_overwrite ? "may" : "no"); __ASSERT(((virt | phys | size) & (CONFIG_MMU_PAGE_SIZE - 1)) == 0, "address/size are not page aligned\n"); desc |= phys; @@ -888,7 +892,7 @@ static void sync_domains(uintptr_t virt, size_t size) static int __arch_mem_map(void *virt, uintptr_t phys, size_t size, uint32_t flags) { struct arm_mmu_ptables *ptables; - uint32_t entry_flags = MT_DEFAULT_SECURE_STATE | MT_P_RX_U_NA; + uint32_t entry_flags = MT_DEFAULT_SECURE_STATE | MT_P_RX_U_NA | MT_NO_OVERWRITE; /* Always map in the kernel page tables */ ptables = &kernel_ptables; diff --git a/arch/arm64/core/offsets/offsets.c b/arch/arm64/core/offsets/offsets.c index aa49d6848660..7ff6eee31d95 100644 --- a/arch/arm64/core/offsets/offsets.c +++ b/arch/arm64/core/offsets/offsets.c @@ -56,6 +56,14 @@ GEN_NAMED_OFFSET_SYM(_esf_t, x0, x0_x1); GEN_ABSOLUTE_SYM(___esf_t_SIZEOF, sizeof(_esf_t)); +#ifdef CONFIG_ARM64_SAFE_EXCEPTION_STACK +GEN_OFFSET_SYM(_cpu_arch_t, safe_exception_stack); +GEN_OFFSET_SYM(_cpu_arch_t, current_stack_limit); +GEN_OFFSET_SYM(_cpu_arch_t, corrupted_sp); +GEN_OFFSET_SYM(_thread_arch_t, stack_limit); +GEN_NAMED_OFFSET_SYM(_esf_t, sp, sp_el0); +#endif + #ifdef CONFIG_HAS_ARM_SMCCC #include diff --git a/arch/arm64/core/prep_c.c b/arch/arm64/core/prep_c.c index 395e0058dcc7..2f40aff0ef58 100644 --- a/arch/arm64/core/prep_c.c +++ b/arch/arm64/core/prep_c.c @@ -58,6 +58,10 @@ void z_arm64_prep_c(void) z_bss_zero(); z_data_copy(); +#ifdef CONFIG_ARM64_SAFE_EXCEPTION_STACK + /* After bss clean, _kernel.cpus is in bss section */ + z_arm64_safe_exception_stack_init(); +#endif z_arm64_mm_init(true); z_arm64_interrupt_init(); z_cstart(); diff --git a/arch/arm64/core/smp.c b/arch/arm64/core/smp.c index a8686114feeb..4e97497bdfb1 100644 --- a/arch/arm64/core/smp.c +++ b/arch/arm64/core/smp.c @@ -119,6 +119,9 @@ void z_arm64_secondary_start(void) /* Initialize tpidrro_el0 with our struct _cpu instance address */ write_tpidrro_el0((uintptr_t)&_kernel.cpus[cpu_num]); +#ifdef CONFIG_ARM64_SAFE_EXCEPTION_STACK + z_arm64_safe_exception_stack_init(); +#endif z_arm64_mm_init(false); @@ -223,9 +226,8 @@ void z_arm64_flush_fpu_ipi(unsigned int cpu) } #endif -static int arm64_smp_init(const struct device *dev) +static int arm64_smp_init(void) { - ARG_UNUSED(dev); /* * SGI0 is use for sched ipi, this might be changed to use Kconfig diff --git a/arch/arm64/core/switch.S b/arch/arm64/core/switch.S index aaf7f506ab8a..cb721cec9e9c 100644 --- a/arch/arm64/core/switch.S +++ b/arch/arm64/core/switch.S @@ -32,15 +32,21 @@ _ASM_FILE_PROLOGUE GTEXT(z_arm64_context_switch) SECTION_FUNC(TEXT, z_arm64_context_switch) +#ifndef CONFIG_ARM64_SAFE_EXCEPTION_STACK /* Save the current SP_EL0 */ mrs x4, sp_el0 +#endif stp x19, x20, [x1, #_thread_offset_to_callee_saved_x19_x20] stp x21, x22, [x1, #_thread_offset_to_callee_saved_x21_x22] stp x23, x24, [x1, #_thread_offset_to_callee_saved_x23_x24] stp x25, x26, [x1, #_thread_offset_to_callee_saved_x25_x26] stp x27, x28, [x1, #_thread_offset_to_callee_saved_x27_x28] +#ifndef CONFIG_ARM64_SAFE_EXCEPTION_STACK stp x29, x4, [x1, #_thread_offset_to_callee_saved_x29_sp_el0] +#else + str x29, [x1, #_thread_offset_to_callee_saved_x29_sp_el0] +#endif /* Save the current SP_ELx and return address */ mov x4, sp @@ -89,15 +95,26 @@ SECTION_FUNC(TEXT, z_arm64_context_switch) ldp x23, x24, [x0, #_thread_offset_to_callee_saved_x23_x24] ldp x25, x26, [x0, #_thread_offset_to_callee_saved_x25_x26] ldp x27, x28, [x0, #_thread_offset_to_callee_saved_x27_x28] +#ifndef CONFIG_ARM64_SAFE_EXCEPTION_STACK ldp x29, x4, [x0, #_thread_offset_to_callee_saved_x29_sp_el0] /* Restore SP_EL0 */ msr sp_el0, x4 +#else + ldr x29, [x0, #_thread_offset_to_callee_saved_x29_sp_el0] +#endif /* Restore SP_EL1 and return address */ ldp x4, lr, [x0, #_thread_offset_to_callee_saved_sp_elx_lr] mov sp, x4 +#if defined(CONFIG_ARM64_SAFE_EXCEPTION_STACK) + /* arch_curr_cpu()->arch.current_stack_limit = thread->arch.stack_limit */ + get_cpu x4 + ldr x2, [x0, #_thread_offset_to_stack_limit] + str x2, [x4, #_cpu_offset_to_current_stack_limit] +#endif + #ifdef CONFIG_USERSPACE str lr, [sp, #-16]! bl z_arm64_swap_mem_domains @@ -174,6 +191,11 @@ offload: mov x4, sp mov sp, x3 str x4, [sp, #-16]! +#if defined(CONFIG_ARM64_SAFE_EXCEPTION_STACK) + /* update the stack limit with IRQ stack limit */ + sub x3, x3, #CONFIG_ISR_STACK_SIZE + str x3, [x2, #_cpu_offset_to_current_stack_limit] +#endif 1: /* Execute provided routine (argument is in x0 already). */ blr x1 diff --git a/arch/arm64/core/vector_table.S b/arch/arm64/core/vector_table.S index ffb5a452cdb6..b32e07fd6726 100644 --- a/arch/arm64/core/vector_table.S +++ b/arch/arm64/core/vector_table.S @@ -13,6 +13,9 @@ #include #include #include +#include +#include "macro_priv.inc" + _ASM_FILE_PROLOGUE @@ -24,7 +27,7 @@ _ASM_FILE_PROLOGUE * ISR and/or context switch. */ -.macro z_arm64_enter_exc xreg0, xreg1 +.macro z_arm64_enter_exc xreg0, xreg1, el /* * Two things can happen to the remaining registers: * @@ -36,6 +39,21 @@ _ASM_FILE_PROLOGUE sub sp, sp, ___esf_t_SIZEOF +#ifdef CONFIG_ARM64_SAFE_EXCEPTION_STACK + .if \el == el1 + /* + * EL1t mode cannot access sp_el1, so set x0 to sp_el1 without corrupt + * other registers + */ + add sp, sp, x0 // sp' = sp + x0 + sub x0, sp, x0 // x0' = sp' - x0 = sp + msr SPSel, #0 + stp x16, x17, [sp, -(___esf_t_SIZEOF - ___esf_t_x16_x17_OFFSET)] + stp x18, lr, [sp, -(___esf_t_SIZEOF - ___esf_t_x18_lr_OFFSET)] + bl z_arm64_quick_stack_check + .endif +#endif + stp x0, x1, [sp, ___esf_t_x0_x1_OFFSET] stp x2, x3, [sp, ___esf_t_x2_x3_OFFSET] stp x4, x5, [sp, ___esf_t_x4_x5_OFFSET] @@ -44,13 +62,32 @@ _ASM_FILE_PROLOGUE stp x10, x11, [sp, ___esf_t_x10_x11_OFFSET] stp x12, x13, [sp, ___esf_t_x12_x13_OFFSET] stp x14, x15, [sp, ___esf_t_x14_x15_OFFSET] +#ifdef CONFIG_ARM64_SAFE_EXCEPTION_STACK + /* The expection from el1 does not need to save x16, x17, x18 and lr */ + .if \el == el0 +#endif stp x16, x17, [sp, ___esf_t_x16_x17_OFFSET] stp x18, lr, [sp, ___esf_t_x18_lr_OFFSET] +#ifdef CONFIG_ARM64_SAFE_EXCEPTION_STACK + .endif +#endif mrs \xreg0, spsr_el1 mrs \xreg1, elr_el1 stp \xreg0, \xreg1, [sp, ___esf_t_spsr_elr_OFFSET] +#ifdef CONFIG_ARM64_SAFE_EXCEPTION_STACK + .if \el == el0 + mrs x0, sp_el0 + str x0, [sp, ___esf_t_sp_el0_OFFSET] + + /* Retrieving safe exception stack */ + get_cpu x0 + ldr x1, [x0, #_cpu_offset_to_safe_exception_stack] + msr sp_el0, x1 + .endif +#endif + /* Clear usermode flag and increment exception depth */ mrs \xreg0, tpidrro_el0 mov \xreg1, #TPIDRROEL0_EXC_UNIT @@ -111,12 +148,12 @@ SECTION_SUBSEC_FUNC(exc_vector_table,_vector_table_section,_vector_table) /* Current EL with SP0 / Synchronous */ .align 7 - z_arm64_enter_exc x0, x1 + z_arm64_enter_exc x0, x1, el1 b z_arm64_sync_exc /* Current EL with SP0 / IRQ */ .align 7 - z_arm64_enter_exc x0, x1 + z_arm64_enter_exc x0, x1, el1 #ifdef CONFIG_GEN_SW_ISR_TABLE b _isr_wrapper #else @@ -129,17 +166,17 @@ SECTION_SUBSEC_FUNC(exc_vector_table,_vector_table_section,_vector_table) /* Current EL with SP0 / SError */ .align 7 - z_arm64_enter_exc x0, x1 + z_arm64_enter_exc x0, x1, el1 b z_arm64_serror /* Current EL with SPx / Synchronous */ .align 7 - z_arm64_enter_exc x0, x1 + z_arm64_enter_exc x0, x1, el1 b z_arm64_sync_exc /* Current EL with SPx / IRQ */ .align 7 - z_arm64_enter_exc x0, x1 + z_arm64_enter_exc x0, x1, el1 #ifdef CONFIG_GEN_SW_ISR_TABLE b _isr_wrapper #else @@ -152,17 +189,17 @@ SECTION_SUBSEC_FUNC(exc_vector_table,_vector_table_section,_vector_table) /* Current EL with SPx / SError */ .align 7 - z_arm64_enter_exc x0, x1 + z_arm64_enter_exc x0, x1, el1 b z_arm64_serror /* Lower EL using AArch64 / Synchronous */ .align 7 - z_arm64_enter_exc x0, x1 + z_arm64_enter_exc x0, x1, el0 b z_arm64_sync_exc /* Lower EL using AArch64 / IRQ */ .align 7 - z_arm64_enter_exc x0, x1 + z_arm64_enter_exc x0, x1, el0 #ifdef CONFIG_GEN_SW_ISR_TABLE b _isr_wrapper #else @@ -175,7 +212,7 @@ SECTION_SUBSEC_FUNC(exc_vector_table,_vector_table_section,_vector_table) /* Lower EL using AArch64 / SError */ .align 7 - z_arm64_enter_exc x0, x1 + z_arm64_enter_exc x0, x1, el0 b z_arm64_serror /* Lower EL using AArch32 / Synchronous */ @@ -204,6 +241,53 @@ SECTION_FUNC(TEXT, z_arm64_serror) /* Return here only in case of recoverable error */ b z_arm64_exit_exc +#ifdef CONFIG_ARM64_SAFE_EXCEPTION_STACK +GTEXT(z_arm64_quick_stack_check) +SECTION_FUNC(TEXT, z_arm64_quick_stack_check) + /* + * x0 is SP_EL1 + * Retrieve the current stack limit + */ + get_cpu x16 + ldr x17, [x16, #_cpu_offset_to_current_stack_limit] + /* + * If priv sp <= the stack limit, then keep the safe exception stack + * go to the stack overflow process. + */ + cmp x0, x17 + /* Restore the sp_el1 */ + msr SPSel, #1 // switch sp to sp_el1 + sub x0, sp, x0 // x0'' = sp' - x0' = x0 + sub sp, sp, x0 // sp'' = sp' - x0 = sp + ble 1f + /* + * If the stack does not overflow, keep using sp_el1, copy the original + * x16, x17, x18, lr from sp_el0 (safe_exception_stack) to sp_el1. So + * the four registers can be restroed directly from sp_el1 without a + * stack mode switch. + */ + mrs x18, sp_el0 + ldp x16, x17, [x18, -(___esf_t_SIZEOF - ___esf_t_x16_x17_OFFSET)] + stp x16, x17, [sp, ___esf_t_x16_x17_OFFSET] + ldp x16, x17, [x18, -(___esf_t_SIZEOF - ___esf_t_x18_lr_OFFSET)] + stp x16, x17, [sp, ___esf_t_x18_lr_OFFSET] + ret +1: /* + * If stack overflow, save the current sp and then switch sp to safe + * exception stack + * x16 is still the current _cpu + */ + mrs x18, sp_el0 + mov x17, sp + str x17, [x16, #_cpu_offset_to_corrupted_sp] + /* + * switch sp to safe exception stack, which means we handle the fatal + * error with safe exception stack. + */ + sub sp, x18, ___esf_t_SIZEOF + ret +#endif + /* * Restore volatile registers, LR, SPSR_EL1 and ELR_EL1 * @@ -233,6 +317,13 @@ SECTION_FUNC(TEXT, z_arm64_exit_exc) sub x0, x0, x1 msr tpidrro_el0, x0 +#ifdef CONFIG_ARM64_SAFE_EXCEPTION_STACK + bne 1f + ldr x0, [sp, ___esf_t_sp_el0_OFFSET] + msr sp_el0, x0 +1: +#endif + ldp x0, x1, [sp, ___esf_t_x0_x1_OFFSET] ldp x2, x3, [sp, ___esf_t_x2_x3_OFFSET] ldp x4, x5, [sp, ___esf_t_x4_x5_OFFSET] diff --git a/arch/arm64/core/xen/enlighten.c b/arch/arm64/core/xen/enlighten.c index 5077d6e9afe4..164947a09ffd 100644 --- a/arch/arm64/core/xen/enlighten.c +++ b/arch/arm64/core/xen/enlighten.c @@ -42,9 +42,8 @@ static int xen_map_shared_info(const shared_info_t *shared_page) return HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp); } -static int xen_enlighten_init(const struct device *dev) +static int xen_enlighten_init(void) { - ARG_UNUSED(dev); int ret = 0; shared_info_t *info = (shared_info_t *) shared_info_buf; diff --git a/arch/arm64/include/kernel_arch_func.h b/arch/arm64/include/kernel_arch_func.h index d90860415384..014c166db005 100644 --- a/arch/arm64/include/kernel_arch_func.h +++ b/arch/arm64/include/kernel_arch_func.h @@ -52,6 +52,10 @@ void z_arm64_flush_local_fpu(void); void z_arm64_flush_fpu_ipi(unsigned int cpu); #endif +#ifdef CONFIG_ARM64_SAFE_EXCEPTION_STACK +void z_arm64_safe_exception_stack_init(void); +#endif + #endif /* _ASMLANGUAGE */ #ifdef __cplusplus diff --git a/arch/arm64/include/offsets_short_arch.h b/arch/arm64/include/offsets_short_arch.h index aeae8430a8e6..abd93bba7bac 100644 --- a/arch/arm64/include/offsets_short_arch.h +++ b/arch/arm64/include/offsets_short_arch.h @@ -27,4 +27,15 @@ #define _thread_offset_to_callee_saved_sp_elx_lr \ (___thread_t_callee_saved_OFFSET + ___callee_saved_t_sp_elx_lr_OFFSET) +#ifdef CONFIG_ARM64_SAFE_EXCEPTION_STACK +#define _cpu_offset_to_safe_exception_stack \ + (___cpu_t_arch_OFFSET + ___cpu_arch_t_safe_exception_stack_OFFSET) +#define _cpu_offset_to_current_stack_limit \ + (___cpu_t_arch_OFFSET + ___cpu_arch_t_current_stack_limit_OFFSET) +#define _cpu_offset_to_corrupted_sp \ + (___cpu_t_arch_OFFSET + ___cpu_arch_t_corrupted_sp_OFFSET) +#define _thread_offset_to_stack_limit \ + (___thread_t_arch_OFFSET + ___thread_arch_t_stack_limit_OFFSET) +#endif + #endif /* ZEPHYR_ARCH_ARM64_INCLUDE_OFFSETS_SHORT_ARCH_H_ */ diff --git a/arch/common/rom_start_offset.ld b/arch/common/rom_start_offset.ld index 8546391614cc..2e82f30d7188 100644 --- a/arch/common/rom_start_offset.ld +++ b/arch/common/rom_start_offset.ld @@ -4,5 +4,5 @@ * SPDX-License-Identifier: Apache-2.0 */ -. += CONFIG_ROM_START_OFFSET; +. = CONFIG_ROM_START_OFFSET; . = ALIGN(4); diff --git a/arch/posix/include/posix_cheats.h b/arch/posix/include/posix_cheats.h index 778eb16023bb..d94be3f7d59d 100644 --- a/arch/posix/include/posix_cheats.h +++ b/arch/posix/include/posix_cheats.h @@ -47,7 +47,7 @@ #if defined(__cplusplus) && defined(CONFIG_CPP_MAIN) /* To be able to define main() in C++ code we need to have its prototype * defined somewhere visibly. Otherwise name mangling will prevent the linker - * from finding it. Zephyr assumes a void main(void) prototype and therefore + * from finding it. Zephyr assumes an int main(void) prototype and therefore * this will be the prototype after renaming: */ extern "C" int _posix_zephyr_main(void); diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index af551f030507..150ff240d259 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -229,6 +229,15 @@ config PMP_POWER_OF_TWO_ALIGNMENT memory consumption. Useful when enabling userspace mode with many memory domains and/or few PMP slots available. +config PMP_GRANULARITY + int "The granularity of PMP address matching" + default 8 if (PMP_NO_TOR && PMP_NO_NA4) + default 4 + help + The granularity must be a power of 2 greater than or equal to 4 + (ie 4, 8, 16, ...), but if neither TOR mode nor NA4 mode is + supported, the minimum granularity is 8. + endif #RISCV_PMP config PMP_STACK_GUARD diff --git a/arch/riscv/core/smp.c b/arch/riscv/core/smp.c index 636370e4b687..0be8b0ae39ac 100644 --- a/arch/riscv/core/smp.c +++ b/arch/riscv/core/smp.c @@ -118,9 +118,8 @@ static void ipi_handler(const void *unused) #endif } -static int riscv_smp_init(const struct device *dev) +static int riscv_smp_init(void) { - ARG_UNUSED(dev); IRQ_CONNECT(RISCV_MACHINE_SOFT_IRQ, 0, ipi_handler, NULL, 0); irq_enable(RISCV_MACHINE_SOFT_IRQ); diff --git a/arch/x86/core/Kconfig.ia32 b/arch/x86/core/Kconfig.ia32 index 03e2af8cdfbc..4d3dffe78cf7 100644 --- a/arch/x86/core/Kconfig.ia32 +++ b/arch/x86/core/Kconfig.ia32 @@ -39,6 +39,14 @@ config GDT_DYNAMIC This option stores the GDT in RAM instead of ROM, so that it may be modified at runtime at the expense of some memory. +config GDT_RESERVED_NUM_ENTRIES + int "Number of reserved GDT entry place holders" + depends on GDT_DYNAMIC + default 0 + help + This option defines the number of GDT entry place holders revserved + that can be filled at runtime. + endmenu menu "Processor Capabilities" diff --git a/arch/x86/core/spec_ctrl.c b/arch/x86/core/spec_ctrl.c index d1889a3b92ec..feb6616250ec 100644 --- a/arch/x86/core/spec_ctrl.c +++ b/arch/x86/core/spec_ctrl.c @@ -17,9 +17,8 @@ */ #if defined(CONFIG_DISABLE_SSBD) || defined(CONFIG_ENABLE_EXTENDED_IBRS) -static int spec_ctrl_init(const struct device *dev) +static int spec_ctrl_init(void) { - ARG_UNUSED(dev); uint32_t enable_bits = 0U; uint32_t cpuid7 = z_x86_cpuid_extended_features(); diff --git a/arch/x86/core/x86_mmu.c b/arch/x86/core/x86_mmu.c index 3ef53299251e..119179b72ae8 100644 --- a/arch/x86/core/x86_mmu.c +++ b/arch/x86/core/x86_mmu.c @@ -702,7 +702,7 @@ void z_x86_dump_page_tables(pentry_t *ptables) #if DUMP_PAGE_TABLES __pinned_func -static int dump_kernel_tables(const struct device *unused) +static int dump_kernel_tables(void) { z_x86_dump_page_tables(z_x86_kernel_ptables); diff --git a/arch/x86/zefi/efi.h b/arch/x86/zefi/efi.h index 3e280517877d..9be17c53e140 100644 --- a/arch/x86/zefi/efi.h +++ b/arch/x86/zefi/efi.h @@ -10,7 +10,6 @@ #ifndef _ASMLANGUAGE #include -#include #define __abi __attribute__((ms_abi)) diff --git a/arch/xtensa/core/xtensa-asm2.c b/arch/xtensa/core/xtensa-asm2.c index 3e31dcaa939f..6f05f073a047 100644 --- a/arch/xtensa/core/xtensa-asm2.c +++ b/arch/xtensa/core/xtensa-asm2.c @@ -215,6 +215,7 @@ static inline DEF_INT_C_HANDLER(1) void *xtensa_excint1_c(int *interrupted_stack) { int cause, vaddr, *bsa = *(int **)interrupted_stack; + bool is_fatal_error = false; __asm__ volatile("rsr.exccause %0" : "=r"(cause)); @@ -239,6 +240,7 @@ void *xtensa_excint1_c(int *interrupted_stack) /* Default for exception */ int reason = K_ERR_CPU_EXCEPTION; + is_fatal_error = true; /* We need to distinguish between an ill in xtensa_arch_except, * e.g for k_panic, and any other ill. For exceptions caused by @@ -253,9 +255,6 @@ void *xtensa_excint1_c(int *interrupted_stack) cause = 63; __asm__ volatile("wsr.exccause %0" : : "r"(cause)); reason = bsa[BSA_A2_OFF/4]; - /* Skip ILL to RETW */ - bsa[BSA_PC_OFF/4] += 3; - pc = (void *)bsa[BSA_PC_OFF/4]; } LOG_ERR(" ** FATAL EXCEPTION"); @@ -280,6 +279,35 @@ void *xtensa_excint1_c(int *interrupted_stack) (void *)interrupted_stack); } + if (is_fatal_error) { + uint32_t ignore; + + /* We are going to manipulate _current_cpu->nested manually. + * Since the error is fatal, for recoverable errors, code + * execution must not return back to the current thread as + * it is being terminated (via above z_xtensa_fatal_error()). + * So we need to prevent more interrupts coming in which + * will affect the nested value as we are going outside of + * normal interrupt handling procedure. + * + * Setting nested to 1 has two effects: + * 1. Force return_to() to choose a new thread. + * Since the current thread is being terminated, it will + * not be chosen again. + * 2. When context switches to the newly chosen thread, + * nested must be zero for normal code execution, + * as that is not in interrupt context at all. + * After returning from this function, the rest of + * interrupt handling code will decrement nested, + * resulting it being zero before switching to another + * thread. + */ + __asm__ volatile("rsil %0, " STRINGIFY(XCHAL_NMILEVEL) + : "=r" (ignore) : : ); + + _current_cpu->nested = 1; + } + return return_to(interrupted_stack); } diff --git a/boards/arc/em_starterkit/pmodmux.c b/boards/arc/em_starterkit/pmodmux.c index 2666cacd1da9..da2fb4ee8699 100644 --- a/boards/arc/em_starterkit/pmodmux.c +++ b/boards/arc/em_starterkit/pmodmux.c @@ -123,7 +123,7 @@ #define PM6_LR_CSS_STAT ((1 << BIT2) << PM6_OFFSET) -static int pmod_mux_init(const struct device *dev) +static int pmod_mux_init(void) { volatile uint32_t *mux_regs = (uint32_t *)(PMODMUX_BASE_ADDR); diff --git a/boards/arc/emsdp/Kconfig.defconfig b/boards/arc/emsdp/Kconfig.defconfig index 95a3a4493469..c0ee191aa959 100644 --- a/boards/arc/emsdp/Kconfig.defconfig +++ b/boards/arc/emsdp/Kconfig.defconfig @@ -16,4 +16,21 @@ config GPIO_INIT_PRIORITY endif # GPIO +if SPI + +config SPI_DW + default y + +if SPI_DW + +config SPI_DW_FIFO_DEPTH + default 32 + +config SPI_DW_ARC_AUX_REGS + default n + +endif # SPI_DW + +endif # SPI + endif # BOARD_EMSDP diff --git a/boards/arc/emsdp/arc_mpu_regions.c b/boards/arc/emsdp/arc_mpu_regions.c index 9ff278fb7a33..6fb2e57d4c66 100644 --- a/boards/arc/emsdp/arc_mpu_regions.c +++ b/boards/arc/emsdp/arc_mpu_regions.c @@ -43,7 +43,7 @@ static struct arc_mpu_region mpu_regions[] = { /* Region Peripheral */ MPU_REGION_ENTRY("PERIPHERAL", 0xF0000000, - 64 * 1024, + 32 * 1024 * 1024, REGION_KERNEL_RAM_ATTR), }; diff --git a/boards/arc/emsdp/doc/index.rst b/boards/arc/emsdp/doc/index.rst index 4bc32e6d6a79..4747cbd1944e 100644 --- a/boards/arc/emsdp/doc/index.rst +++ b/boards/arc/emsdp/doc/index.rst @@ -44,9 +44,59 @@ The following table shows the hardware features supported for different core con | Secure | N | N | N | N | Y | N | N | +-----------+-----+-----+------+------+----------+------+-------+ +The table below shows which drivers are currently available in Zephyr. + ++-----------+------------+-------+-----------------------+ +| Interface | Controller | EMSDP | Driver/Component | ++===========+============+=======+=======================+ +| SDIO | on-chip | N | SD-card controller | ++-----------+------------+-------+-----------------------+ +| UART | Arduino + | Y | serial port-polling; | +| | 3 Pmods | | serial port-interrupt | ++-----------+------------+-------+-----------------------+ +| SPI | Arduino + | Y | spi | +| | Pmod + adc | | | ++-----------+------------+-------+-----------------------+ +| ADC | 1 Pmod | N | adc (via spi) | ++-----------+------------+-------+-----------------------+ +| I2C | Arduino + | N | i2c | +| | Pmod | | | ++-----------+------------+-------+-----------------------+ +| GPIO | Arduino + | Y | gpio | +| | Pmod + Pin | | | ++-----------+------------+-------+-----------------------+ +| PWM | Arduino + | N | pwm | +| | Pmod | | | ++-----------+------------+-------+-----------------------+ +| I2S | on-chip | N | Audio interface | ++-----------+------------+-------+-----------------------+ + +Support two 32 MByte Quad-SPI Flash memory, one only contains FPGA image, the other +one is user SPI-FLASH, which is connected via SPI bus and its sample can be found in +``samples/drivers/spi_flash``. + +To configure the FPGA, The ARC EM SDP offers a single USB 2.0 host port, which is +both used to access the FPGAs configuration memory and as a DEBUG/ UART port. + +When connected using the USB cable to a PC, the ARC EM SDP presents itself as a mass +storage device. This allows an FPGA configuration bitstream to be dragged and dropped into +the configuration memory. The FPGA bitstream is automatically loaded into the FPGA device +upon power-on reset, or when the configuration button is pressed. + For hardware feature details, refer to : `ARC EM Software Development Platform `__ +Peripheral driver test and sample +================================= + +``tests/drivers/spi/spi_loopback``: verify DesignWare SPI driver. No need to connect +MISO with MOSI, DW SPI register is configured to internally connect them. This test +use two different speed to verify data transfer with asynchronous functionality. +Note: DW SPI only available on SPI0 and SPI1. + +``samples/drivers/spi_flash``: Verfiy DW SPI and SPI-FLASH on SPI1. First erase the +whole flash then write 4 byte data to the flash. Read from the flash and compare the +result with buffer to check functionality. Programming and Debugging ************************* diff --git a/boards/arc/emsdp/emsdp.dts b/boards/arc/emsdp/emsdp.dts index f09c918e2bbe..4cb95a398576 100644 --- a/boards/arc/emsdp/emsdp.dts +++ b/boards/arc/emsdp/emsdp.dts @@ -16,6 +16,7 @@ aliases { uart-0 = &uart0; + spi-flash0 = &s25fl256s; }; chosen { @@ -41,5 +42,12 @@ interrupts = <85 1>; }; + spi@f0008000 { + interrupts = <83 1>; + }; + + spi@f1000000 { + interrupts = <84 1>; + }; }; }; diff --git a/boards/arc/emsdp/emsdp.yaml b/boards/arc/emsdp/emsdp.yaml index ce6f08679bd2..44de46e8a7a0 100644 --- a/boards/arc/emsdp/emsdp.yaml +++ b/boards/arc/emsdp/emsdp.yaml @@ -7,6 +7,8 @@ toolchain: - cross-compile - xtools ram: 128 +supported: + - spi testing: ignore_tags: - net diff --git a/boards/arc/emsdp/emsdp_defconfig b/boards/arc/emsdp/emsdp_defconfig index 448533332736..031a0ebe6ad9 100644 --- a/boards/arc/emsdp/emsdp_defconfig +++ b/boards/arc/emsdp/emsdp_defconfig @@ -15,3 +15,4 @@ CONFIG_SERIAL=y CONFIG_UART_INTERRUPT_DRIVEN=y CONFIG_ARC_MPU_ENABLE=y CONFIG_GPIO=y +CONFIG_SPI=y diff --git a/boards/arc/emsdp/emsdp_em4.dts b/boards/arc/emsdp/emsdp_em4.dts index 83b87b4e62a1..0d0306065c09 100644 --- a/boards/arc/emsdp/emsdp_em4.dts +++ b/boards/arc/emsdp/emsdp_em4.dts @@ -15,6 +15,7 @@ aliases { uart-0 = &uart0; + spi-flash0 = &s25fl256s; }; chosen { @@ -40,5 +41,12 @@ interrupts = <86 1>; }; + spi@f0008000 { + interrupts = <83 1>; + }; + + spi@f1000000 { + interrupts = <84 1>; + }; }; }; diff --git a/boards/arc/emsdp/emsdp_em5d.dts b/boards/arc/emsdp/emsdp_em5d.dts index d7268eba8e91..66a544e95ef7 100644 --- a/boards/arc/emsdp/emsdp_em5d.dts +++ b/boards/arc/emsdp/emsdp_em5d.dts @@ -15,6 +15,7 @@ aliases { uart-0 = &uart0; + spi-flash0 = &s25fl256s; }; chosen { @@ -40,5 +41,12 @@ interrupts = <85 1>; }; + spi@f0008000 { + interrupts = <83 1>; + }; + + spi@f1000000 { + interrupts = <84 1>; + }; }; }; diff --git a/boards/arc/emsdp/emsdp_em5d_defconfig b/boards/arc/emsdp/emsdp_em5d_defconfig index 1739ed4befe1..2d117c7f42de 100644 --- a/boards/arc/emsdp/emsdp_em5d_defconfig +++ b/boards/arc/emsdp/emsdp_em5d_defconfig @@ -15,3 +15,4 @@ CONFIG_SERIAL=y CONFIG_UART_INTERRUPT_DRIVEN=y CONFIG_ARC_MPU_ENABLE=y CONFIG_GPIO=y +CONFIG_SPI=y diff --git a/boards/arc/emsdp/emsdp_em6.dts b/boards/arc/emsdp/emsdp_em6.dts index 83b87b4e62a1..0d0306065c09 100644 --- a/boards/arc/emsdp/emsdp_em6.dts +++ b/boards/arc/emsdp/emsdp_em6.dts @@ -15,6 +15,7 @@ aliases { uart-0 = &uart0; + spi-flash0 = &s25fl256s; }; chosen { @@ -40,5 +41,12 @@ interrupts = <86 1>; }; + spi@f0008000 { + interrupts = <83 1>; + }; + + spi@f1000000 { + interrupts = <84 1>; + }; }; }; diff --git a/boards/arc/emsdp/emsdp_em6.yaml b/boards/arc/emsdp/emsdp_em6.yaml index 2f97cc77a6e7..804cdb911862 100644 --- a/boards/arc/emsdp/emsdp_em6.yaml +++ b/boards/arc/emsdp/emsdp_em6.yaml @@ -7,6 +7,8 @@ toolchain: - cross-compile - xtools ram: 128 +supported: + - spi testing: ignore_tags: - net diff --git a/boards/arc/emsdp/emsdp_em6_defconfig b/boards/arc/emsdp/emsdp_em6_defconfig index 1dae91b7382d..7bcaa11ecb0d 100644 --- a/boards/arc/emsdp/emsdp_em6_defconfig +++ b/boards/arc/emsdp/emsdp_em6_defconfig @@ -15,3 +15,4 @@ CONFIG_SERIAL=y CONFIG_UART_INTERRUPT_DRIVEN=y CONFIG_ARC_MPU_ENABLE=y CONFIG_GPIO=y +CONFIG_SPI=y diff --git a/boards/arc/emsdp/emsdp_em7d.dts b/boards/arc/emsdp/emsdp_em7d.dts index d7268eba8e91..66a544e95ef7 100644 --- a/boards/arc/emsdp/emsdp_em7d.dts +++ b/boards/arc/emsdp/emsdp_em7d.dts @@ -15,6 +15,7 @@ aliases { uart-0 = &uart0; + spi-flash0 = &s25fl256s; }; chosen { @@ -40,5 +41,12 @@ interrupts = <85 1>; }; + spi@f0008000 { + interrupts = <83 1>; + }; + + spi@f1000000 { + interrupts = <84 1>; + }; }; }; diff --git a/boards/arc/emsdp/emsdp_em7d_esp.dts b/boards/arc/emsdp/emsdp_em7d_esp.dts index cbd9743550c4..89fc30499b7f 100644 --- a/boards/arc/emsdp/emsdp_em7d_esp.dts +++ b/boards/arc/emsdp/emsdp_em7d_esp.dts @@ -15,6 +15,7 @@ aliases { uart-0 = &uart0; + spi-flash0 = &s25fl256s; }; chosen { @@ -40,5 +41,13 @@ interrupts = <86 1>; }; + /* IRQ line in em7d_esp is different to others */ + spi@f0008000 { + interrupts = <84 1>; + }; + + spi@f1000000 { + interrupts = <85 1>; + }; }; }; diff --git a/boards/arc/emsdp/emsdp_em7d_esp.yaml b/boards/arc/emsdp/emsdp_em7d_esp.yaml index 52cffdc5061b..cdf45ea786fa 100644 --- a/boards/arc/emsdp/emsdp_em7d_esp.yaml +++ b/boards/arc/emsdp/emsdp_em7d_esp.yaml @@ -7,6 +7,8 @@ toolchain: - cross-compile - xtools ram: 128 +supported: + - spi testing: ignore_tags: - net diff --git a/boards/arc/emsdp/emsdp_em7d_esp_defconfig b/boards/arc/emsdp/emsdp_em7d_esp_defconfig index 5ebd6a5da124..b67dca68179a 100644 --- a/boards/arc/emsdp/emsdp_em7d_esp_defconfig +++ b/boards/arc/emsdp/emsdp_em7d_esp_defconfig @@ -17,3 +17,4 @@ CONFIG_ARC_MPU_ENABLE=y CONFIG_GPIO=y CONFIG_ARC_HAS_SECURE=y CONFIG_TRUSTED_EXECUTION_SECURE=y +CONFIG_SPI=y diff --git a/boards/arc/emsdp/emsdp_em9d.dts b/boards/arc/emsdp/emsdp_em9d.dts index 5e90bda4bcfd..c28956b9f600 100644 --- a/boards/arc/emsdp/emsdp_em9d.dts +++ b/boards/arc/emsdp/emsdp_em9d.dts @@ -16,6 +16,7 @@ aliases { uart-0 = &uart0; + spi-flash0 = &s25fl256s; }; chosen { @@ -51,5 +52,12 @@ interrupts = <85 1>; }; + spi@f0008000 { + interrupts = <83 1>; + }; + + spi@f1000000 { + interrupts = <84 1>; + }; }; }; diff --git a/boards/arc/emsdp/emsdp_em9d.yaml b/boards/arc/emsdp/emsdp_em9d.yaml index 2c571dee846d..d495ec11eb31 100644 --- a/boards/arc/emsdp/emsdp_em9d.yaml +++ b/boards/arc/emsdp/emsdp_em9d.yaml @@ -7,6 +7,8 @@ toolchain: - cross-compile - xtools ram: 128 +supported: + - spi testing: ignore_tags: - net diff --git a/boards/arc/emsdp/emsdp_em9d_defconfig b/boards/arc/emsdp/emsdp_em9d_defconfig index afbdae66c3d3..5a7342f67b26 100644 --- a/boards/arc/emsdp/emsdp_em9d_defconfig +++ b/boards/arc/emsdp/emsdp_em9d_defconfig @@ -15,3 +15,4 @@ CONFIG_SERIAL=y CONFIG_UART_INTERRUPT_DRIVEN=y CONFIG_ARC_MPU_ENABLE=y CONFIG_GPIO=y +CONFIG_SPI=y diff --git a/boards/arc/hsdk/platform.c b/boards/arc/hsdk/platform.c index 7f8e5f030d74..0d8840e3c1cf 100644 --- a/boards/arc/hsdk/platform.c +++ b/boards/arc/hsdk/platform.c @@ -10,9 +10,8 @@ #define HSDK_CREG_GPIO_MUX_REG 0xf0001484 #define HSDK_CREG_GPIO_MUX_VAL 0x00000400 -static int hsdk_creg_gpio_mux_init(const struct device *dev) +static int hsdk_creg_gpio_mux_init(void) { - ARG_UNUSED(dev); sys_write32(HSDK_CREG_GPIO_MUX_REG, HSDK_CREG_GPIO_MUX_VAL); diff --git a/boards/arc/nsim/haps_arcv3_init.c b/boards/arc/nsim/haps_arcv3_init.c index c8b75f3fd521..78dfc37f6c7d 100644 --- a/boards/arc/nsim/haps_arcv3_init.c +++ b/boards/arc/nsim/haps_arcv3_init.c @@ -30,9 +30,8 @@ #define AUX_CLN_DATA 0x641 -static int haps_arcv3_init(const struct device *dev) +static int haps_arcv3_init(void) { - ARG_UNUSED(dev); z_arc_v2_aux_reg_write(AUX_CLN_ADDR, ARC_CLN_PER0_BASE); z_arc_v2_aux_reg_write(AUX_CLN_DATA, 0xF00); diff --git a/boards/arc/nsim/nsim-smp.dtsi b/boards/arc/nsim/nsim-smp.dtsi index 5a2eb307bad6..facdf989401f 100644 --- a/boards/arc/nsim/nsim-smp.dtsi +++ b/boards/arc/nsim/nsim-smp.dtsi @@ -4,6 +4,7 @@ */ #include "nsim.dtsi" +#include "nsim-uart-ns16550.dtsi" / { ici: intercore-interrupt-unit { diff --git a/boards/arc/nsim/nsim-uart-hostlink.dtsi b/boards/arc/nsim/nsim-uart-hostlink.dtsi new file mode 100644 index 000000000000..5ac165f840da --- /dev/null +++ b/boards/arc/nsim/nsim-uart-hostlink.dtsi @@ -0,0 +1,19 @@ +/* + * Copyright (c) 2023, Synopsys Inc. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "skeleton.dtsi" + +/ { + hostlink: hostlink { + compatible = "snps,hostlink-uart"; + status = "okay"; + }; + + chosen { + zephyr,console = &hostlink; + zephyr,shell-uart = &hostlink; + }; +}; diff --git a/boards/arc/nsim/nsim-uart-ns16550.dtsi b/boards/arc/nsim/nsim-uart-ns16550.dtsi new file mode 100644 index 000000000000..a14e360d237b --- /dev/null +++ b/boards/arc/nsim/nsim-uart-ns16550.dtsi @@ -0,0 +1,24 @@ +/* + * Copyright (c) 2023, Synopsys Inc. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "skeleton.dtsi" + +/ { + uart0: uart@f0000000 { + compatible = "ns16550"; + clock-frequency = <50000000>; + reg = <0xf0000000 0x400>; + current-speed = <115200>; + interrupt-parent = <&intc>; + interrupts = <24 1>; + reg-shift = <2>; + }; + + chosen { + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + }; +}; diff --git a/boards/arc/nsim/nsim.dtsi b/boards/arc/nsim/nsim.dtsi index fc27f7fbbf99..6469bffb180c 100644 --- a/boards/arc/nsim/nsim.dtsi +++ b/boards/arc/nsim/nsim.dtsi @@ -32,19 +32,4 @@ interrupts = <17 1>; interrupt-parent = <&intc>; }; - - uart0: uart@f0000000 { - compatible = "ns16550"; - clock-frequency = <50000000>; - reg = <0xf0000000 0x400>; - current-speed = <115200>; - interrupt-parent = <&intc>; - interrupts = <24 1>; - reg-shift = <2>; - }; - - chosen { - zephyr,console = &uart0; - zephyr,shell-uart = &uart0; - }; }; diff --git a/boards/arc/nsim/nsim_em.dtsi b/boards/arc/nsim/nsim_em.dtsi index 2910e6a27a3c..45f90abf925f 100644 --- a/boards/arc/nsim/nsim_em.dtsi +++ b/boards/arc/nsim/nsim_em.dtsi @@ -8,6 +8,7 @@ #include "nsim.dtsi" #include "nsim-ccm-mem.dtsi" +#include "nsim-uart-ns16550.dtsi" / { cpus { diff --git a/boards/arc/nsim/nsim_hs.dts b/boards/arc/nsim/nsim_hs.dts index 4fdcf80d906f..e066c8d92d0a 100644 --- a/boards/arc/nsim/nsim_hs.dts +++ b/boards/arc/nsim/nsim_hs.dts @@ -8,6 +8,7 @@ #include "nsim.dtsi" #include "nsim-ccm-mem.dtsi" +#include "nsim-uart-ns16550.dtsi" / { model = "snps,nsim_hs"; diff --git a/boards/arc/nsim/nsim_hs3x_hostlink.dts b/boards/arc/nsim/nsim_hs3x_hostlink.dts new file mode 100644 index 000000000000..057adc016e5c --- /dev/null +++ b/boards/arc/nsim/nsim_hs3x_hostlink.dts @@ -0,0 +1,27 @@ +/* + * Copyright (c) 2023, Synopsys Inc. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include "nsim.dtsi" +#include "nsim-ccm-mem.dtsi" +#include "nsim-uart-hostlink.dtsi" + +/ { + model = "snps,nsim_hs"; + compatible = "snps,nsim_hs"; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "snps,archs"; + reg = <0>; + }; + }; +}; diff --git a/boards/arc/nsim/nsim_hs3x_hostlink.yaml b/boards/arc/nsim/nsim_hs3x_hostlink.yaml new file mode 100644 index 000000000000..4c7d60f42f5d --- /dev/null +++ b/boards/arc/nsim/nsim_hs3x_hostlink.yaml @@ -0,0 +1,14 @@ +identifier: nsim_hs3x_hostlink +name: HS3x nSIM simulator +type: sim +simulation: nsim +simulation_exec: nsimdrv +arch: arc +toolchain: + - zephyr + - cross-compile + - arcmwdt +testing: + ignore_tags: + - net + - bluetooth diff --git a/boards/arc/nsim/nsim_hs3x_hostlink_defconfig b/boards/arc/nsim/nsim_hs3x_hostlink_defconfig new file mode 100644 index 000000000000..92ca6763a598 --- /dev/null +++ b/boards/arc/nsim/nsim_hs3x_hostlink_defconfig @@ -0,0 +1,15 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_SOC_NSIM=y +CONFIG_SOC_NSIM_HS=y +CONFIG_BOARD_NSIM=y +CONFIG_SYS_CLOCK_TICKS_PER_SEC=100 +CONFIG_XIP=n +CONFIG_BUILD_OUTPUT_BIN=n +CONFIG_ARCV2_INTERRUPT_UNIT=y +CONFIG_ARCV2_TIMER=y +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_ARC_EXCEPTION_DEBUG=y +CONFIG_ARC_MPU_ENABLE=y diff --git a/boards/arc/nsim/nsim_hs5x.dts b/boards/arc/nsim/nsim_hs5x.dts index ec4baf12ba39..4ea66398a3d5 100644 --- a/boards/arc/nsim/nsim_hs5x.dts +++ b/boards/arc/nsim/nsim_hs5x.dts @@ -8,6 +8,7 @@ #include "nsim.dtsi" #include "nsim-flat-mem.dtsi" +#include "nsim-uart-ns16550.dtsi" / { model = "snps,nsim_hs"; diff --git a/boards/arc/nsim/nsim_hs6x.dts b/boards/arc/nsim/nsim_hs6x.dts index eb574e019490..136fc8c7a19d 100644 --- a/boards/arc/nsim/nsim_hs6x.dts +++ b/boards/arc/nsim/nsim_hs6x.dts @@ -8,6 +8,7 @@ #include "nsim.dtsi" #include "nsim-flat-mem.dtsi" +#include "nsim-uart-ns16550.dtsi" / { model = "snps,nsim_hs"; diff --git a/boards/arc/nsim/nsim_hs_flash_xip.dts b/boards/arc/nsim/nsim_hs_flash_xip.dts index 4a82ec64ffb5..b53aebd03ea2 100644 --- a/boards/arc/nsim/nsim_hs_flash_xip.dts +++ b/boards/arc/nsim/nsim_hs_flash_xip.dts @@ -8,6 +8,7 @@ #include "nsim.dtsi" #include "nsim-flash-sram-mem.dtsi" +#include "nsim-uart-ns16550.dtsi" / { model = "snps,nsim_hs"; diff --git a/boards/arc/nsim/nsim_hs_mpuv6.dts b/boards/arc/nsim/nsim_hs_mpuv6.dts index b58f92f046a4..86a1994d0f76 100644 --- a/boards/arc/nsim/nsim_hs_mpuv6.dts +++ b/boards/arc/nsim/nsim_hs_mpuv6.dts @@ -8,6 +8,7 @@ #include "nsim.dtsi" #include "nsim-ccm-mem.dtsi" +#include "nsim-uart-ns16550.dtsi" / { model = "snps,nsim_hs"; diff --git a/boards/arc/nsim/nsim_hs_sram.dts b/boards/arc/nsim/nsim_hs_sram.dts index a8a8115667fe..0f836a78e686 100644 --- a/boards/arc/nsim/nsim_hs_sram.dts +++ b/boards/arc/nsim/nsim_hs_sram.dts @@ -8,6 +8,7 @@ #include "nsim.dtsi" #include "nsim-flat-mem.dtsi" +#include "nsim-uart-ns16550.dtsi" / { model = "snps,nsim_hs"; diff --git a/boards/arc/nsim/support/mdb_hs3x_hostlink.args b/boards/arc/nsim/support/mdb_hs3x_hostlink.args new file mode 100644 index 000000000000..322ab33998aa --- /dev/null +++ b/boards/arc/nsim/support/mdb_hs3x_hostlink.args @@ -0,0 +1,44 @@ + -arcv2hs + -core2 + -arcnum=3 + -rgf_num_banks=2 + -rgf_banked_regs=32 + -rgf_num_wr_ports=2 + -Xatomic + -Xll64 + -Xunaligned + -Xcode_density + -Xdiv_rem=radix4 + -Xswap + -Xbitscan + -Xmpy_option=qmpyh + -Xshift_assist + -Xbarrel_shifter + -Xfpud_div + -Xfpu_mac + -Xtimer0 + -Xtimer0_level=1 + -Xtimer1 + -Xtimer1_level=0 + -Xrtc + -action_points=8 + -Xstack_check + -interrupts=72 + -interrupt_priorities=2 + -ext_interrupts=70 + -firq + -interrupt_base=0x0 + -dcache=65536,64,2,a + -dcache_feature=2 + -dcache_uncached_region + -dcache_mem_cycles=2 + -icache=65536,64,4,a + -icache_feature=2 + -dccm_size=0x40000 + -dccm_base=0x80000000 + -dccm_mem_cycles=2 + -iccm0_size=0x40000 + -iccm0_base=0x70000000 + -mpuv3 + -mpu_regions=16 + -noprofile diff --git a/boards/arc/nsim/support/nsim_hs3x_hostlink.props b/boards/arc/nsim/support/nsim_hs3x_hostlink.props new file mode 100644 index 000000000000..f3cc662c9909 --- /dev/null +++ b/boards/arc/nsim/support/nsim_hs3x_hostlink.props @@ -0,0 +1,47 @@ + nsim_isa_family=av2hs + nsim_isa_core=2 + arcver=0x52 + nsim_isa_rgf_num_banks=2 + nsim_isa_rgf_banked_regs=32 + nsim_isa_rgf_num_regs=32 + nsim_isa_rgf_num_wr_ports=2 + nsim_isa_big_endian=0 + nsim_isa_lpc_size=32 + nsim_isa_pc_size=32 + nsim_isa_addr_size=32 + nsim_isa_atomic_option=1 + nsim_isa_ll64_option=1 + nsim_isa_unaligned_option=1 + nsim_isa_code_density_option=2 + nsim_isa_div_rem_option=2 + nsim_isa_swap_option=1 + nsim_isa_bitscan_option=1 + nsim_isa_mpy_option=9 + nsim_isa_shift_option=3 + nsim_isa_fpud_div_option=1 + nsim_isa_fpu_mac_option=1 + nsim_isa_enable_timer_0=1 + nsim_isa_timer_0_int_level=1 + nsim_isa_enable_timer_1=1 + nsim_isa_timer_1_int_level=0 + nsim_isa_rtc_option=1 + nsim_isa_num_actionpoints=8 + nsim_isa_stack_checking=1 + nsim_isa_number_of_interrupts=72 + nsim_isa_number_of_levels=2 + nsim_isa_number_of_external_interrupts=70 + nsim_isa_fast_irq=1 + nsim_isa_intvbase_preset=0x0 + dcache=65536,64,2,a + nsim_isa_dc_feature_level=2 + nsim_isa_dc_uncached_region=1 + nsim_isa_dc_mem_cycles=2 + icache=65536,64,4,a + nsim_isa_ic_feature_level=2 + dccm_size=0x40000 + dccm_base=0x80000000 + nsim_isa_dccm_mem_cycles=2 + iccm0_size=0x40000 + iccm0_base=0x70000000 + mpu_regions=16 + mpu_version=3 diff --git a/boards/arc/qemu_arc/qemu_arc_hs.yaml b/boards/arc/qemu_arc/qemu_arc_hs.yaml index 2ead7ebff938..05b4428710f1 100644 --- a/boards/arc/qemu_arc/qemu_arc_hs.yaml +++ b/boards/arc/qemu_arc/qemu_arc_hs.yaml @@ -6,6 +6,7 @@ arch: arc toolchain: - zephyr - cross-compile + - arcmwdt testing: default: true ignore_tags: diff --git a/boards/arm/96b_argonkey/96b_argonkey.dts b/boards/arm/96b_argonkey/96b_argonkey.dts index 1828e12def25..05920213cf84 100644 --- a/boards/arm/96b_argonkey/96b_argonkey.dts +++ b/boards/arm/96b_argonkey/96b_argonkey.dts @@ -65,6 +65,13 @@ status = "okay"; }; +&plli2s { + div-m = <8>; + mul-n = <192>; + div-r = <3>; + status = "okay"; +}; + &rcc { clocks = <&pll>; clock-frequency = ; diff --git a/boards/arm/96b_argonkey/Kconfig.defconfig b/boards/arm/96b_argonkey/Kconfig.defconfig index e9c35748996a..7ee85442eaee 100644 --- a/boards/arm/96b_argonkey/Kconfig.defconfig +++ b/boards/arm/96b_argonkey/Kconfig.defconfig @@ -8,23 +8,6 @@ if BOARD_96B_ARGONKEY config BOARD default "96b_argonkey" -if I2S - -# configure PLLI2S to generate a I2SxCLK=128MHz -config I2S_STM32_USE_PLLI2S_ENABLE - default y - -config I2S_STM32_PLLI2S_PLLM - default 8 - -config I2S_STM32_PLLI2S_PLLN - default 192 - -config I2S_STM32_PLLI2S_PLLR - default 3 - -endif # I2S - if LSM6DSL choice LSM6DSL_TRIGGER_MODE diff --git a/boards/arm/96b_stm32_sensor_mez/96b_stm32_sensor_mez.dts b/boards/arm/96b_stm32_sensor_mez/96b_stm32_sensor_mez.dts index dd629a294767..10627da0b75b 100644 --- a/boards/arm/96b_stm32_sensor_mez/96b_stm32_sensor_mez.dts +++ b/boards/arm/96b_stm32_sensor_mez/96b_stm32_sensor_mez.dts @@ -69,6 +69,13 @@ status = "okay"; }; +&plli2s { + div-m = <8>; + mul-n = <192>; + div-r = <3>; + status = "okay"; +}; + &rcc { clocks = <&pll>; clock-frequency = ; diff --git a/boards/arm/96b_stm32_sensor_mez/Kconfig.defconfig b/boards/arm/96b_stm32_sensor_mez/Kconfig.defconfig index cb3d196df066..bfe0f730222e 100644 --- a/boards/arm/96b_stm32_sensor_mez/Kconfig.defconfig +++ b/boards/arm/96b_stm32_sensor_mez/Kconfig.defconfig @@ -8,23 +8,6 @@ if BOARD_96B_STM32_SENSOR_MEZ config BOARD default "96b_stm32_sensor_mez" -if I2S - -# configure PLLI2S to generate a I2SxCLK=128MHz -config I2S_STM32_USE_PLLI2S_ENABLE - default y - -config I2S_STM32_PLLI2S_PLLM - default 8 - -config I2S_STM32_PLLI2S_PLLN - default 192 - -config I2S_STM32_PLLI2S_PLLR - default 3 - -endif # I2S - config SPI_STM32_INTERRUPT default y depends on SPI diff --git a/boards/arm/96b_wistrio/rf.c b/boards/arm/96b_wistrio/rf.c index baea79dee250..bacc48d10c64 100644 --- a/boards/arm/96b_wistrio/rf.c +++ b/boards/arm/96b_wistrio/rf.c @@ -7,7 +7,7 @@ #include #include -static int rf_init(const struct device *dev) +static int rf_init(void) { const struct gpio_dt_spec rf1 = GPIO_DT_SPEC_GET(DT_NODELABEL(rf_switch), rf1_gpios); @@ -16,7 +16,6 @@ static int rf_init(const struct device *dev) const struct gpio_dt_spec rf3 = GPIO_DT_SPEC_GET(DT_NODELABEL(rf_switch), rf3_gpios); - ARG_UNUSED(dev); /* configure RFSW8001 GPIOs (110: RF1/RF2 coexistence mode) */ if (!device_is_ready(rf1.port) || diff --git a/boards/arm/acn52832/Kconfig.board b/boards/arm/acn52832/Kconfig.board new file mode 100644 index 000000000000..6e19e79560ab --- /dev/null +++ b/boards/arm/acn52832/Kconfig.board @@ -0,0 +1,8 @@ +# aconno acn52832 board configuration + +# Copyright (c) 2023 Sven Herrmann +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_ACN52832 + bool "aconno ACN52832" + depends on SOC_NRF52832_QFAA diff --git a/boards/arm/acn52832/Kconfig.defconfig b/boards/arm/acn52832/Kconfig.defconfig new file mode 100644 index 000000000000..e389aadf6e79 --- /dev/null +++ b/boards/arm/acn52832/Kconfig.defconfig @@ -0,0 +1,14 @@ +# aconno acn52832 board configuration + +# Copyright (c) 2023 Sven Herrmann +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_ACN52832 + +config BOARD + default "acn52832" + +config BT_CTLR + default BT + +endif # BOARD_ACN52832 diff --git a/boards/arm/acn52832/acn52832-pinctrl.dtsi b/boards/arm/acn52832/acn52832-pinctrl.dtsi new file mode 100644 index 000000000000..05590a893fd2 --- /dev/null +++ b/boards/arm/acn52832/acn52832-pinctrl.dtsi @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2023 Sven Herrmann + * SPDX-License-Identifier: Apache-2.0 + */ + +&pinctrl { + uart0_default: uart0_default { + group1 { + psels = , + ; + }; + }; + + uart0_sleep: uart0_sleep { + group1 { + psels = , + ; + low-power-enable; + }; + }; +}; diff --git a/boards/arm/acn52832/acn52832.dts b/boards/arm/acn52832/acn52832.dts new file mode 100644 index 000000000000..1e01221f6521 --- /dev/null +++ b/boards/arm/acn52832/acn52832.dts @@ -0,0 +1,88 @@ +/* + * Copyright (c) 2023 Sven Herrmann + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include "acn52832-pinctrl.dtsi" + +/ { + model = "Aconno ACN52832 Module"; + compatible = "aconno,acn52832"; + + chosen { + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,bt-mon-uart = &uart0; + zephyr,bt-c2h-uart = &uart0; + zephyr,sram = &sram0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + }; + + /* These aliases are provided for compatibility with samples */ + aliases { + led0 = &led0; + watchdog0 = &wdt0; + }; + + leds { + compatible = "gpio-leds"; + led0: led_0 { + gpios = <&gpio0 22 GPIO_ACTIVE_LOW>; + label = "LD1A red"; + }; + led1: led_1 { + gpios = <&gpio0 24 GPIO_ACTIVE_LOW>; + label = "LD1B green"; + }; + led2: led_2 { + gpios = <&gpio0 23 GPIO_ACTIVE_LOW>; + label = "LD1C blue"; + }; + }; +}; + +&gpiote { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&uart0 { + compatible = "nordic,nrf-uarte"; + current-speed = <115200>; + status = "okay"; + pinctrl-0 = <&uart0_default>; + pinctrl-1 = <&uart0_sleep>; + pinctrl-names = "default", "sleep"; +}; + +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x00000000 0xc000>; + }; + slot0_partition: partition@c000 { + label = "image-0"; + reg = <0x0000c000 0x37000>; + }; + slot1_partition: partition@43000 { + label = "image-1"; + reg = <0x00043000 0x37000>; + }; + storage_partition: partition@7a000 { + label = "storage"; + reg = <0x0007a000 0x00006000>; + }; + }; +}; diff --git a/boards/arm/acn52832/acn52832.yaml b/boards/arm/acn52832/acn52832.yaml new file mode 100644 index 000000000000..72e04b829f90 --- /dev/null +++ b/boards/arm/acn52832/acn52832.yaml @@ -0,0 +1,10 @@ +identifier: acn52832 +name: aconno acn52832 +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb + - xtools +ram: 64 +flash: 512 diff --git a/boards/arm/acn52832/acn52832_defconfig b/boards/arm/acn52832/acn52832_defconfig new file mode 100644 index 000000000000..6b1ae1a7ba78 --- /dev/null +++ b/boards/arm/acn52832/acn52832_defconfig @@ -0,0 +1,23 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_SOC_SERIES_NRF52X=y +CONFIG_SOC_NRF52832_QFAA=y +CONFIG_BOARD_ACN52832=y + +# Enable MPU +CONFIG_ARM_MPU=y + +# enable GPIO +CONFIG_GPIO=y + +# enable uart driver +CONFIG_SERIAL=y + +# enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# Enable P0_21 as RST +CONFIG_GPIO_AS_PINRESET=y + +CONFIG_PINCTRL=y diff --git a/boards/arm/acn52832/board.cmake b/boards/arm/acn52832/board.cmake new file mode 100644 index 000000000000..ddd57ab8839a --- /dev/null +++ b/boards/arm/acn52832/board.cmake @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(nrfjprog "--nrf-family=NRF52") +board_runner_args(jlink "--device=nrf52" "--speed=4000") +include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/arm/acn52832/doc/index.rst b/boards/arm/acn52832/doc/index.rst new file mode 100644 index 000000000000..d40bc402f163 --- /dev/null +++ b/boards/arm/acn52832/doc/index.rst @@ -0,0 +1,134 @@ +.. _acn52832: + +acn52832 +######## + +Overview +******** + +The acn52832 is a module in a small form factor which features the Nordic Semiconductor +nRF52832 ARM Cortex-M4F CPU and the following devices: + +* :abbr:`ADC (Analog to Digital Converter)` +* CLOCK +* FLASH +* :abbr:`GPIO (General Purpose Input Output)` +* :abbr:`I2C (Inter-Integrated Circuit)` +* :abbr:`MPU (Memory Protection Unit)` +* :abbr:`NVIC (Nested Vectored Interrupt Controller)` +* :abbr:`PWM (Pulse Width Modulation)` +* RADIO (Bluetooth Low Energy) +* :abbr:`RTC (nRF RTC System Clock)` +* :abbr:`SPI (Serial Peripheral Interface)` +* :abbr:`UART (Universal asynchronous receiver-transmitter)` +* :abbr:`WDT (Watchdog Timer)` + +See `acn52832 website`_ for more information about the board and `Nordic infocenter`_ for more +information about the SoC. + +Hardware +******** + +Additionally to the SoC the board provides an on-board antenna with a RF matching circuit, +two external oscillators with 32 MHz and 32.768 kHz, load capacitors, a tag-connector +and a RGB-LED. + +Connections +=========== + +Pinout +------ + ++-------+-------------+--------------------+---------------+ +| PIN # | Tag-Connect | NRF52832 Functions | Configuration | ++=======+=============+====================+===============+ +| 1 | 5 | GND | | ++-------+-------------+--------------------+---------------+ +| 2 | | P0.25 | | ++-------+-------------+--------------------+---------------+ +| 3 | | P0.26 | | ++-------+-------------+--------------------+---------------+ +| 4 | | P0.27 | | ++-------+-------------+--------------------+---------------+ +| 5 | | P0.28/AIN4 | | ++-------+-------------+--------------------+---------------+ +| 6 | | P0.29/AIN5 | | ++-------+-------------+--------------------+---------------+ +| 7 | | P0.30/AIN6 | | ++-------+-------------+--------------------+---------------+ +| 8 | | P0.31 | | ++-------+-------------+--------------------+---------------+ +| 9 | | P0.02/AIN0 | | ++-------+-------------+--------------------+---------------+ +| 10 | | P0.03/AIN1 | | ++-------+-------------+--------------------+---------------+ +| 11 | | P0.04/AIN2 | | ++-------+-------------+--------------------+---------------+ +| 12 | 5 | GND | | ++-------+-------------+--------------------+---------------+ +| 13 | 5 | GND | | ++-------+-------------+--------------------+---------------+ +| 14 | | P0.05/AIN3 | | ++-------+-------------+--------------------+---------------+ +| 15 | | P0.06 | UART_RX | ++-------+-------------+--------------------+---------------+ +| 16 | | P0.07 | UART_TX | ++-------+-------------+--------------------+---------------+ +| 17 | | P0.08 | | ++-------+-------------+--------------------+---------------+ +| 18 | | NFC1/P0.09 | | ++-------+-------------+--------------------+---------------+ +| 19 | | NFC2/P0.10 | | ++-------+-------------+--------------------+---------------+ +| 20 | | P0.11 | | ++-------+-------------+--------------------+---------------+ +| 21 | | P0.12 | | ++-------+-------------+--------------------+---------------+ +| 22 | | P0.14/TRACEDATA[3] | | ++-------+-------------+--------------------+---------------+ +| 23 | 1 | VCC | | ++-------+-------------+--------------------+---------------+ +| 24 | 1 | VCC | | ++-------+-------------+--------------------+---------------+ +| 25 | | P0.15/TRACEDATA[2] | | ++-------+-------------+--------------------+---------------+ +| 26 | | P0.16/TRACEDATA[1] | | ++-------+-------------+--------------------+---------------+ +| 27 | | P0.17 | | ++-------+-------------+--------------------+---------------+ +| 28 | 6 | P0.18/TRACEDATA[0] | | ++-------+-------------+--------------------+---------------+ +| 29 | | P0.19 | | ++-------+-------------+--------------------+---------------+ +| 30 | | P0.20/TRACECLK | | ++-------+-------------+--------------------+---------------+ +| 31 | 3 | P0.21/RESET | | ++-------+-------------+--------------------+---------------+ +| 32 | 1 | VCC | | ++-------+-------------+--------------------+---------------+ +| 33 | 2 | SWDIO | | ++-------+-------------+--------------------+---------------+ +| 34 | 4 | SWDCLK | | ++-------+-------------+--------------------+---------------+ +| 35 | 5 | GND | | ++-------+-------------+--------------------+---------------+ + +RGB-LED +------- + ++------+-------+--------------+ +| LED | Color | NRF52832 Pin | ++======+=======+==============+ +| led0 | red | P0.22 | ++------+-------+--------------+ +| led1 | green | P0.24 | ++------+-------+--------------+ +| led2 | blue | P0.23 | ++------+-------+--------------+ + +References +********** +.. target-notes:: + +.. _acn52832 website: https://aconno.de/products/acn52832/ +.. _Nordic infocenter: https://infocenter.nordicsemi.com/ diff --git a/boards/arm/acn52832/pre_dt_board.cmake b/boards/arm/acn52832/pre_dt_board.cmake new file mode 100644 index 000000000000..3369c21d3af5 --- /dev/null +++ b/boards/arm/acn52832/pre_dt_board.cmake @@ -0,0 +1,7 @@ +# Copyright (c) 2022 Nordic Semiconductor +# SPDX-License-Identifier: Apache-2.0 + +# Suppress "unique_unit_address_if_enabled" to handle the following overlaps: +# - power@40000000 & clock@40000000 & bprot@40000000 +# - acl@4001e000 & flash-controller@4001e000 +list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled") diff --git a/boards/arm/actinius_icarus/actinius_icarus_common.dts b/boards/arm/actinius_icarus/actinius_icarus_common.dts index a98231ace4d3..65bb762097e3 100644 --- a/boards/arm/actinius_icarus/actinius_icarus_common.dts +++ b/boards/arm/actinius_icarus/actinius_icarus_common.dts @@ -164,18 +164,6 @@ pinctrl-names = "default", "sleep"; }; -&timer0 { - status = "okay"; -}; - -&timer1 { - status = "okay"; -}; - -&timer2 { - status = "okay"; -}; - &flash0 { partitions { compatible = "fixed-partitions"; diff --git a/boards/arm/actinius_icarus_bee/actinius_icarus_bee_common.dts b/boards/arm/actinius_icarus_bee/actinius_icarus_bee_common.dts index 6934b1bb8da1..a12c85197c19 100644 --- a/boards/arm/actinius_icarus_bee/actinius_icarus_bee_common.dts +++ b/boards/arm/actinius_icarus_bee/actinius_icarus_bee_common.dts @@ -155,18 +155,6 @@ pinctrl-names = "default", "sleep"; }; -&timer0 { - status = "okay"; -}; - -&timer1 { - status = "okay"; -}; - -&timer2 { - status = "okay"; -}; - &flash0 { partitions { compatible = "fixed-partitions"; diff --git a/boards/arm/actinius_icarus_som/actinius_icarus_som_common.dts b/boards/arm/actinius_icarus_som/actinius_icarus_som_common.dts index 14240fca8fad..23303c9497ed 100644 --- a/boards/arm/actinius_icarus_som/actinius_icarus_som_common.dts +++ b/boards/arm/actinius_icarus_som/actinius_icarus_som_common.dts @@ -65,18 +65,6 @@ }; }; -&timer0 { - status = "okay"; -}; - -&timer1 { - status = "okay"; -}; - -&timer2 { - status = "okay"; -}; - &flash0 { partitions { compatible = "fixed-partitions"; diff --git a/boards/arm/actinius_icarus_som_dk/actinius_icarus_som_dk_common.dts b/boards/arm/actinius_icarus_som_dk/actinius_icarus_som_dk_common.dts index 458c68de9d0d..6a97ac14eb36 100644 --- a/boards/arm/actinius_icarus_som_dk/actinius_icarus_som_dk_common.dts +++ b/boards/arm/actinius_icarus_som_dk/actinius_icarus_som_dk_common.dts @@ -154,18 +154,6 @@ neopixel_spi: &spi1 { pinctrl-names = "default", "sleep"; }; -&timer0 { - status = "okay"; -}; - -&timer1 { - status = "okay"; -}; - -&timer2 { - status = "okay"; -}; - &flash0 { partitions { compatible = "fixed-partitions"; diff --git a/boards/arm/adafruit_itsybitsy_nrf52840/Kconfig.defconfig b/boards/arm/adafruit_itsybitsy_nrf52840/Kconfig.defconfig index 97fe0da8fbd0..e8e316f3a177 100644 --- a/boards/arm/adafruit_itsybitsy_nrf52840/Kconfig.defconfig +++ b/boards/arm/adafruit_itsybitsy_nrf52840/Kconfig.defconfig @@ -27,6 +27,10 @@ config USB_DEVICE_INITIALIZE_AT_BOOT config SHELL_BACKEND_SERIAL_CHECK_DTR default SHELL + depends on UART_LINE_CTRL + +config UART_LINE_CTRL + default SHELL config USB_DEVICE_REMOTE_WAKEUP default n diff --git a/boards/arm/adafruit_trinket_m0/adafruit_trinket_m0_defconfig b/boards/arm/adafruit_trinket_m0/adafruit_trinket_m0_defconfig index a587f7007fef..86fa3a35e007 100644 --- a/boards/arm/adafruit_trinket_m0/adafruit_trinket_m0_defconfig +++ b/boards/arm/adafruit_trinket_m0/adafruit_trinket_m0_defconfig @@ -3,6 +3,7 @@ CONFIG_SOC_SERIES_SAMD21=y CONFIG_SOC_PART_NUMBER_SAMD21E18A=y CONFIG_BOARD_ADAFRUIT_TRINKET_M0=y +CONFIG_SOC_ATMEL_SAMD_OSC8M=y CONFIG_SOC_ATMEL_SAMD_OSC8M_AS_MAIN=y CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y diff --git a/boards/arm/arduino_due/arduino_due-pinctrl.dtsi b/boards/arm/arduino_due/arduino_due-pinctrl.dtsi index 23156e23cac8..08f369eed7dc 100644 --- a/boards/arm/arduino_due/arduino_due-pinctrl.dtsi +++ b/boards/arm/arduino_due/arduino_due-pinctrl.dtsi @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, Gerson Fernando Budke + * Copyright (c) 2022-2023, Gerson Fernando Budke * SPDX-License-Identifier: Apache-2.0 */ @@ -52,4 +52,11 @@ ; }; }; + + pwm0_default: pwm0_default { + group1 { + pinmux = , + ; + }; + }; }; diff --git a/boards/arm/arduino_due/arduino_due.dts b/boards/arm/arduino_due/arduino_due.dts index f8e361bd393b..bbfc92b110c7 100644 --- a/boards/arm/arduino_due/arduino_due.dts +++ b/boards/arm/arduino_due/arduino_due.dts @@ -13,6 +13,7 @@ uart-0 = &uart; i2c-0 = &twi0; i2c-1 = &twi1; + pwm-0 = &pwm0; led0 = &yellow_led; watchdog0 = &wdt; }; @@ -64,4 +65,11 @@ pinctrl-names = "default"; }; +&pwm0 { + status = "okay"; + + pinctrl-0 = <&pwm0_default>; + pinctrl-names = "default"; +}; + arduino_i2c: &twi1 { }; diff --git a/boards/arm/arduino_giga_r1/Kconfig.defconfig b/boards/arm/arduino_giga_r1/Kconfig.defconfig index 554c9545b354..e5150bffec8b 100644 --- a/boards/arm/arduino_giga_r1/Kconfig.defconfig +++ b/boards/arm/arduino_giga_r1/Kconfig.defconfig @@ -10,4 +10,16 @@ config BOARD config STM32H7_DUAL_CORE default y +if BT + +choice CYW43XXX_PART + default CYW4343W +endchoice + +choice CYW4343W_MODULE + default CYW4343W_MURATA_1DX +endchoice + +endif # BT + endif # BOARD_ARDUINO_GIGA_R1_M7 || BOARD_ARDUINO_GIGA_R1_M4 diff --git a/boards/arm/arduino_giga_r1/arduino_giga_r1_m7.dts b/boards/arm/arduino_giga_r1/arduino_giga_r1_m7.dts index 6a670d08a3f3..ed693b6e337d 100644 --- a/boards/arm/arduino_giga_r1/arduino_giga_r1_m7.dts +++ b/boards/arm/arduino_giga_r1/arduino_giga_r1_m7.dts @@ -17,6 +17,7 @@ zephyr,console = &usart1; zephyr,shell-uart = &usart1; zephyr,uart-mcumgr = &usart1; + zephyr,bt-uart = &uart7; zephyr,sram = &sram0; zephyr,flash = &flash0; zephyr,canbus = &can2; @@ -89,13 +90,20 @@ }; &uart7 { - status = "disabled"; pinctrl-0 = <&uart7_tx_pf7 &uart7_rx_pa8 &uart7_cts_pf9 &uart7_rts_pf8>; pinctrl-names = "default"; current-speed = <115200>; status = "okay"; hw-flow-control; + + murata-1dx { + compatible = "infineon,cyw43xxx-bt-hci"; + bt-reg-on-gpios = <&gpioa 10 GPIO_ACTIVE_HIGH>; + bt-host-wake-gpios = <&gpiog 3 GPIO_ACTIVE_HIGH>; + bt-dev-wake-gpios = <&gpioh 7 GPIO_ACTIVE_HIGH>; + fw-download-speed = <115200>; + }; }; &i2c4 { diff --git a/boards/arm/arduino_giga_r1/doc/index.rst b/boards/arm/arduino_giga_r1/doc/index.rst index c9cd1bde2186..f12df182a863 100644 --- a/boards/arm/arduino_giga_r1/doc/index.rst +++ b/boards/arm/arduino_giga_r1/doc/index.rst @@ -67,9 +67,23 @@ following hardware features: +-----------+------------+-------------------------------------+ | QSPI | on-chip | QSPI flash | +-----------+------------+-------------------------------------+ +| RADIO | Murata 1DX | WiFi and Bluetooth module | ++-----------+------------+-------------------------------------+ Other hardware features are not yet supported on Zephyr port. +Fetch Binary Blobs +****************** + +The board Bluetooth/WiFi module requires fetching some binary blob files, to do +that run the command: + +.. code-block:: console + + west blobs fetch hal_infineon + +.. note: Only Bluetooth functionality is currently supported. + Resources sharing ================= diff --git a/boards/arm/arduino_nano_33_ble/board.c b/boards/arm/arduino_nano_33_ble/board.c index 24383ad852fd..ee600605871c 100644 --- a/boards/arm/arduino_nano_33_ble/board.c +++ b/boards/arm/arduino_nano_33_ble/board.c @@ -7,9 +7,8 @@ #include #include -static int board_init(const struct device *dev) +static int board_init(void) { - ARG_UNUSED(dev); int res; static const struct gpio_dt_spec pull_up = diff --git a/boards/arm/arduino_nano_33_iot/arduino_nano_33_iot_defconfig b/boards/arm/arduino_nano_33_iot/arduino_nano_33_iot_defconfig index b649e7418398..3bc5a6370aa4 100644 --- a/boards/arm/arduino_nano_33_iot/arduino_nano_33_iot_defconfig +++ b/boards/arm/arduino_nano_33_iot/arduino_nano_33_iot_defconfig @@ -3,6 +3,7 @@ CONFIG_SOC_SERIES_SAMD21=y CONFIG_SOC_PART_NUMBER_SAMD21G18A=y CONFIG_BOARD_ARDUINO_NANO_33_IOT=y +CONFIG_SOC_ATMEL_SAMD_OSC8M=y CONFIG_SOC_ATMEL_SAMD_OSC8M_AS_MAIN=y CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y diff --git a/boards/arm/arduino_portenta_h7/board.c b/boards/arm/arduino_portenta_h7/board.c index 3cef340c1650..47eb4900221c 100644 --- a/boards/arm/arduino_portenta_h7/board.c +++ b/boards/arm/arduino_portenta_h7/board.c @@ -7,9 +7,8 @@ #include #include -static int board_init(const struct device *dev) +static int board_init(void) { - ARG_UNUSED(dev); /* Set led1 inactive since the Arduino bootloader leaves it active */ const struct gpio_dt_spec led1 = GPIO_DT_SPEC_GET(DT_ALIAS(led1), gpios); diff --git a/boards/arm/arty/board.c b/boards/arm/arty/board.c index bccbacd49e49..b2539d7aedd4 100644 --- a/boards/arm/arty/board.c +++ b/boards/arm/arty/board.c @@ -60,9 +60,8 @@ bool board_daplink_is_fitted(void) return !NVIC_GetPendingIRQ(DT_IRQN(DAPLINK_QSPI_MUX_NODE)); } -static int board_init(const struct device *dev) +static int board_init(void) { - ARG_UNUSED(dev); /* * Automatically select normal mode unless the DAPLink shield is fitted diff --git a/boards/arm/atsamc21n_xpro/atsamc21n_xpro.yaml b/boards/arm/atsamc21n_xpro/atsamc21n_xpro.yaml index f9102d4c560c..0d8fbeb75e11 100644 --- a/boards/arm/atsamc21n_xpro/atsamc21n_xpro.yaml +++ b/boards/arm/atsamc21n_xpro/atsamc21n_xpro.yaml @@ -12,6 +12,7 @@ toolchain: - xtools supported: - adc + - dma - gpio - i2c - pwm diff --git a/boards/arm/b_g474e_dpow1/b_g474e_dpow1.dts b/boards/arm/b_g474e_dpow1/b_g474e_dpow1.dts index a12eb527bc22..81bd492989b9 100644 --- a/boards/arm/b_g474e_dpow1/b_g474e_dpow1.dts +++ b/boards/arm/b_g474e_dpow1/b_g474e_dpow1.dts @@ -63,21 +63,6 @@ }; }; - power-states { - stop0: state0 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <1>; - min-residency-us = <20>; - }; - stop1: state1 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <2>; - min-residency-us = <100>; - }; - }; - cpus { cpu@0 { cpu-power-states = <&stop0 &stop1>; diff --git a/boards/arm/b_u585i_iot02a/b_u585i_iot02a-common.dtsi b/boards/arm/b_u585i_iot02a/b_u585i_iot02a-common.dtsi index 7cb9c1b717c7..465dbac780c0 100644 --- a/boards/arm/b_u585i_iot02a/b_u585i_iot02a-common.dtsi +++ b/boards/arm/b_u585i_iot02a/b_u585i_iot02a-common.dtsi @@ -29,30 +29,11 @@ }; }; - power-states { - stop0: state0 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <1>; - min-residency-us = <100>; - }; - stop1: state1 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <2>; - min-residency-us = <500>; - }; - stop2: state2 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <3>; - min-residency-us = <900>; - }; - }; aliases { watchdog0 = &iwdg; spi-flash0 = &mx25lm51245; + die-temp0 = &die_temp; }; }; diff --git a/boards/arm/beagle_bcf/CMakeLists.txt b/boards/arm/beagle_bcf/CMakeLists.txt new file mode 100644 index 000000000000..165ab5220a8d --- /dev/null +++ b/boards/arm/beagle_bcf/CMakeLists.txt @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: Apache-2.0 + +zephyr_library() +zephyr_library_sources( + board_antenna.c + ) + +zephyr_library_compile_definitions("DeviceFamily_CC13X2X7") diff --git a/boards/arm/beagle_bcf/Kconfig.board b/boards/arm/beagle_bcf/Kconfig.board new file mode 100644 index 000000000000..f56ad623fa41 --- /dev/null +++ b/boards/arm/beagle_bcf/Kconfig.board @@ -0,0 +1,21 @@ +# BeagleConnect Freedom board configuration + +# Copyright (c) 2020 Erik Larson +# Copyright (c) 2021 Jason Kridner, BeagleBoard.org Foundation +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_BEAGLECONNECT_FREEDOM + bool "BeagleConnect Freedom" + depends on SOC_CC1352P7 + +if BOARD_BEAGLECONNECT_FREEDOM + +config BOARD_ANTENNA_INIT_PRIO + int "Board antenna switch initialization priority" + default 70 + help + Set the priority for board init, must be greater than + KERNEL_INIT_PRIORITY_DEVICE but smaller than + IEEE802154_CC13XX_CC26XX_SUB_GHZ_INIT_PRIO. + +endif # BOARD_BEAGLECONNECT_FREEDOM diff --git a/boards/arm/beagle_bcf/Kconfig.defconfig b/boards/arm/beagle_bcf/Kconfig.defconfig new file mode 100644 index 000000000000..6dcf6a6824d1 --- /dev/null +++ b/boards/arm/beagle_bcf/Kconfig.defconfig @@ -0,0 +1,12 @@ +# BeagleConnect Freedom board configuration + +# Copyright (c) 2020 Erik Larson +# Copyright (c) 2020 Jason Kridner, BeagleBoard.org Foundation +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_BEAGLECONNECT_FREEDOM + +config BOARD + default "beagleconnect_freedom" + +endif # BOARD_BEAGLECONNECT_FREEDOM diff --git a/boards/arm/beagle_bcf/beagleconnect_freedom-pinctrl.dtsi b/boards/arm/beagle_bcf/beagleconnect_freedom-pinctrl.dtsi new file mode 100644 index 000000000000..201de3fc4b02 --- /dev/null +++ b/boards/arm/beagle_bcf/beagleconnect_freedom-pinctrl.dtsi @@ -0,0 +1,94 @@ +/* SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2022 Vaishnav Achath + * + */ + +#include + +&pinctrl { + /* UART0 */ + uart0_tx_default: uart0_tx_default { + pinmux = <13 IOC_PORT_MCU_UART0_TX>; + bias-disable; + }; + uart0_rx_default: uart0_rx_default { + pinmux = <12 IOC_PORT_MCU_UART0_RX>; + bias-disable; + input-enable; + }; + + /* UART1 */ + uart1_tx_default: uart1_tx_default { + pinmux = <22 IOC_PORT_MCU_UART1_TX>; + bias-disable; + }; + uart1_rx_default: uart1_rx_default { + pinmux = <21 IOC_PORT_MCU_UART1_RX>; + bias-disable; + input-enable; + }; + + /* I2C0 */ + i2c0_scl_default: i2c0_scl_default { + pinmux = <25 IOC_PORT_MCU_I2C_MSSCL>; + bias-pull-up; + drive-open-drain; + input-enable; + }; + i2c0_sda_default: i2c0_sda_default { + pinmux = <26 IOC_PORT_MCU_I2C_MSSDA>; + bias-pull-up; + drive-open-drain; + input-enable; + }; + i2c0_scl_sleep: i2c0_scl_sleep { + pinmux = <25 IOC_PORT_GPIO>; + bias-disable; + }; + i2c0_sda_sleep: i2c0_sda_sleep { + pinmux = <26 IOC_PORT_GPIO>; + bias-disable; + }; + + /* SPI0 */ + spi0_sck_default: spi0_sck_default { + pinmux = <10 IOC_PORT_MCU_SSI0_CLK>; + bias-disable; + }; + spi0_mosi_default: spi0_mosi_default { + pinmux = <9 IOC_PORT_MCU_SSI0_TX>; + bias-disable; + }; + spi0_miso_default: spi0_miso_default { + pinmux = <11 IOC_PORT_MCU_SSI0_RX>; + bias-disable; + input-enable; + }; + spi0_cs0_default: spi0_cs0_default { + pinmux = <8 IOC_PORT_GPIO>; + bias-disable; + }; + spi0_cs1_default: spi0_cs1_default { + pinmux = <28 IOC_PORT_GPIO>; + bias-disable; + }; + spi0_cs2_default: spi0_cs2_default { + pinmux = <27 IOC_PORT_GPIO>; + bias-disable; + }; + + /* On-board antenna pinmux states */ + board_ant_tx_pa_off: board_ant_tx_pa_off { + pinmux = <29 IOC_PORT_GPIO>; + }; + board_ant_tx_pa_on: board_ant_tx_pa_on { + pinmux = <29 IOC_PORT_RFC_GPO3>; + }; + board_ant_subg_off: board_ant_subg_off { + pinmux = <30 IOC_PORT_GPIO>; + }; + board_ant_subg_on: board_ant_subg_on { + pinmux = <30 IOC_PORT_RFC_GPO0>; + }; +}; diff --git a/boards/arm/beagle_bcf/beagleconnect_freedom.dts b/boards/arm/beagle_bcf/beagleconnect_freedom.dts new file mode 100644 index 000000000000..154928bc8c79 --- /dev/null +++ b/boards/arm/beagle_bcf/beagleconnect_freedom.dts @@ -0,0 +1,214 @@ +/* + * Copyright (c) 2020 Erik Larson + * Copyright (c) 2020-2022 Jason Kridner, BeagleBoard.org Foundation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "beagleconnect_freedom-pinctrl.dtsi" + +#define BTN_GPIO_FLAGS (GPIO_ACTIVE_LOW | GPIO_PULL_UP) + +/ { + model = "BeagleConnect Freedom"; + compatible = "beagle,beagleconnect-freedom"; + + aliases { + led0 = &led0; + sw0 = &button0; + mcuboot-button0 = &button0; + sensor0 = &light; + sensor1 = &humidity; + spi-flash0 = &spi_flash0; + }; + + chosen { + zephyr,sram = &sram0; + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,flash = &flash0; + zephyr,ieee802154 = &ieee802154g; + zephyr,code-partition = &slot0_partition; + }; + + gpio_keys { + compatible = "gpio-keys"; + button0: button_0 { + gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; + }; + }; + + leds: leds { + compatible = "gpio-leds"; + led0: led_0 { + gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>; // 2.4GHz TX/RX + }; + + /* U.FL connector switch */ + rf_sw: rf_sw { + gpios = + <&gpio0 29 GPIO_ACTIVE_HIGH>, // SubG TX +20dB + <&gpio0 30 GPIO_ACTIVE_HIGH>; // SubG TX/RX 0dB + }; + }; + + sens_i2c: sensor-switch { + status = "okay"; + compatible = "ti,ts5a2066"; + #address-cells = <1>; + #size-cells = <0>; + controller = <&i2c0>; + gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; + + light: opt3001-light@44 { + status = "okay"; + compatible = "ti,opt3001"; + reg = <0x44>; + }; + + humidity: hdc2010-humidity@41 { + status = "okay"; + compatible = "ti,hdc2010"; + reg = <0x41>; + }; + }; + + power-states { + idle: idle { + compatible = "zephyr,power-state"; + power-state-name = "suspend-to-idle"; + min-residency-us = <1000>; + }; + + standby: standby { + compatible = "zephyr,power-state"; + power-state-name = "standby"; + min-residency-us = <5000>; + exit-latency-us = <240>; + }; + }; +}; + +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + /* Allocate 128 KiB for mcuboot */ + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x00000000 0x00020000>; + }; + + /* Allocate 568 KiB for application (avoid touching CCFG) */ + slot0_partition: partition@20000 { + label = "image-0"; + reg = <0x00020000 0x0008e000>; + }; + }; +}; + +&cpu0 { + clock-frequency = <48000000>; + cpu-power-states = <&idle &standby>; +}; + +&trng { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +/* Side away from battery connector (with MSP430) */ +&uart0 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart0_rx_default &uart0_tx_default>; + pinctrl-names = "default"; +}; + +/* Side with battery connector (with CC1352 and not MSP430) */ +&uart1 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart1_rx_default &uart1_tx_default>; + pinctrl-names = "default"; +}; + +&i2c0 { + status = "okay"; + clock-frequency = ; + pinctrl-0 = <&i2c0_scl_default &i2c0_sda_default>; + pinctrl-1 = <&i2c0_scl_sleep &i2c0_sda_sleep>; + pinctrl-names = "default", "sleep"; + + mcu: msp430-usbbridge@4 { + compatible = "beagle,usbbridge"; + reg = <0x4>; + }; +}; + +&spi0 { + status = "okay"; + pinctrl-0 = <&spi0_sck_default &spi0_mosi_default + &spi0_miso_default &spi0_cs0_default + &spi0_cs1_default &spi0_cs2_default>; + pinctrl-names = "default"; + cs-gpios = <&gpio0 8 GPIO_ACTIVE_LOW>, // SPI flash + <&gpio0 28 GPIO_ACTIVE_LOW>, // mikroBUS port 1 + <&gpio0 27 GPIO_ACTIVE_LOW>; // mikroBUS port 2 + + spi_flash0: gd25q16c@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <2000000>; + size = <0x200000>; + //has-be32k; + has-dpd; + t-enter-dpd = <20000>; + t-exit-dpd = <100000>; + jedec-id = [c8 40 15]; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + /* Allocate 568 KiB for application */ + slot1_partition: partition@0 { + label = "image-1"; + reg = <0x00000000 0x0008e000>; + }; + + /* Allocate 128 KiB scratch for image swap */ + scratch_partition: partition@8e000 { + label = "image-scratch"; + reg = <0x0008e000 0x00020000>; + }; + + /* Allocate 1 MiB storage partition */ + storage_partition: partition@ae000 { + label = "storage"; + reg = <0x000ae000 DT_SIZE_K(1024)>; + }; + }; + }; +}; + +&rtc { + status = "okay"; +}; + +&ieee802154 { + status = "okay"; +}; + +&ieee802154g { + status = "okay"; +}; diff --git a/boards/arm/beagle_bcf/beagleconnect_freedom.yaml b/boards/arm/beagle_bcf/beagleconnect_freedom.yaml new file mode 100644 index 000000000000..d85ea8bd355f --- /dev/null +++ b/boards/arm/beagle_bcf/beagleconnect_freedom.yaml @@ -0,0 +1,15 @@ +identifier: beagleconnect_freedom +name: BeagleConnect Freedom +type: mcu +arch: arm +ram: 144 +flash: 704 +toolchain: + - zephyr + - gnuarmemb + - xtools +supported: + - gpio + - i2c + - spi + - uart diff --git a/boards/arm/beagle_bcf/beagleconnect_freedom_defconfig b/boards/arm/beagle_bcf/beagleconnect_freedom_defconfig new file mode 100644 index 000000000000..af58105267c9 --- /dev/null +++ b/boards/arm/beagle_bcf/beagleconnect_freedom_defconfig @@ -0,0 +1,22 @@ +# +# Copyright (c) 2020 Erik Larson +# Copyright (c) 2020 Jason Kridner, BeagleBoard.org Foundation +# +# SPDX-License-Identifier: Apache-2.0 +# + +CONFIG_GPIO=y +CONFIG_PINCTRL=y + +CONFIG_SOC_SERIES_CC13X2X7_CC26X2X7=y +CONFIG_SOC_CC1352P7=y +CONFIG_BOARD_BEAGLECONNECT_FREEDOM=y +CONFIG_BUILD_OUTPUT_HEX=y +# custom callback for the antenna switch +CONFIG_CC13X2_CC26X2_HAS_CUSTOM_RF_HWATTRS=y +CONFIG_CC13X2_CC26X2_BOOTLOADER_ENABLE=y +CONFIG_CC13X2_CC26X2_BOOTLOADER_BACKDOOR_ENABLE=y +CONFIG_CC13X2_CC26X2_BOOTLOADER_BACKDOOR_PIN=15 +# Enable MPU and hardware stack protection +CONFIG_ARM_MPU=y +CONFIG_HW_STACK_PROTECTION=y diff --git a/boards/arm/beagle_bcf/board.cmake b/boards/arm/beagle_bcf/board.cmake new file mode 100644 index 000000000000..84d7457e7b1b --- /dev/null +++ b/boards/arm/beagle_bcf/board.cmake @@ -0,0 +1,9 @@ +# Copyright (c) 2020 Erik Larson +# Copyright (c) 2022 Jason Kridner, BeagleBoard.org Foundation +# +# SPDX-License-Identifier: Apache-2.0 + +# Download cc2538-bsl.py from https://git.beagleboard.org/beagleconnect/zephyr/cc2538-bsl/-/tags/2.1-bcf + +board_set_flasher_ifnset(misc-flasher) +board_finalize_runner_args(misc-flasher $ENV{ZEPHYR_BASE}/boards/arm/beagle_bcf/cc2538-bsl.py -w) diff --git a/boards/arm/beagle_bcf/board_antenna.c b/boards/arm/beagle_bcf/board_antenna.c new file mode 100644 index 000000000000..131d75448bb2 --- /dev/null +++ b/boards/arm/beagle_bcf/board_antenna.c @@ -0,0 +1,116 @@ +/* SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2021 Florin Stancu + * Copyright (c) 2021 Jason Kridner, BeagleBoard.org Foundation + * + */ + +/* + * Implements the RF driver callback to configure the on-board antenna + * switch. + */ + +#include +#include +#include + +#include +#include +#include +#include + +/* DIOs for RF antenna paths */ +#define BOARD_RF_HIGH_PA 29 /* TODO: pull from DT */ +#define BOARD_RF_SUB1GHZ 30 /* TODO: pull from DT */ + +static void board_cc13xx_rf_callback(RF_Handle client, RF_GlobalEvent events, + void *arg); + + +const RFCC26XX_HWAttrsV2 RFCC26XX_hwAttrs = { + .hwiPriority = INT_PRI_LEVEL7, + .swiPriority = 0, + .xoscHfAlwaysNeeded = true, + /* RF driver callback for custom antenna switching */ + .globalCallback = board_cc13xx_rf_callback, + /* Subscribe to events */ + .globalEventMask = (RF_GlobalEventRadioSetup | + RF_GlobalEventRadioPowerDown), +}; + +/** + * Antenna switch GPIO init routine. + */ +static int board_antenna_init(void) +{ + + /* set all paths to low */ + IOCPinTypeGpioOutput(BOARD_RF_HIGH_PA); + GPIO_setOutputEnableDio(BOARD_RF_HIGH_PA, GPIO_OUTPUT_DISABLE); + IOCPinTypeGpioOutput(BOARD_RF_SUB1GHZ); + GPIO_setOutputEnableDio(BOARD_RF_SUB1GHZ, GPIO_OUTPUT_DISABLE); + return 0; +} + +SYS_INIT(board_antenna_init, POST_KERNEL, CONFIG_BOARD_ANTENNA_INIT_PRIO); + +void board_cc13xx_rf_callback(RF_Handle client, RF_GlobalEvent events, void *arg) +{ + bool sub1GHz = false; + uint8_t loDivider = 0; + + /* Switch off all paths first. Needs to be done anyway in every sub-case below. */ + GPIO_setOutputEnableDio(BOARD_RF_HIGH_PA, GPIO_OUTPUT_DISABLE); + GPIO_setOutputEnableDio(BOARD_RF_SUB1GHZ, GPIO_OUTPUT_DISABLE); + + if (events & RF_GlobalEventRadioSetup) { + /* Decode the current PA configuration. */ + RF_TxPowerTable_PAType paType = (RF_TxPowerTable_PAType) + RF_getTxPower(client).paType; + /* Decode the generic argument as a setup command. */ + RF_RadioSetup *setupCommand = (RF_RadioSetup *)arg; + + switch (setupCommand->common.commandNo) { + case (CMD_RADIO_SETUP): + case (CMD_BLE5_RADIO_SETUP): + loDivider = RF_LODIVIDER_MASK & setupCommand->common.loDivider; + /* Sub-1GHz front-end. */ + if (loDivider != 0) + sub1GHz = true; + break; + case (CMD_PROP_RADIO_DIV_SETUP): + loDivider = RF_LODIVIDER_MASK & setupCommand->prop_div.loDivider; + /* Sub-1GHz front-end. */ + if (loDivider != 0) + sub1GHz = true; + break; + default: + break; + } + + /* Sub-1 GHz */ + if (paType == RF_TxPowerTable_HighPA) { + /* PA enable --> HIGH PA */ + /* LNA enable --> Sub-1 GHz */ + /* Note: RFC_GPO3 is a work-around because the RFC_GPO1 */ + /* is sometimes not de-asserted on CC1352 Rev A. */ + IOCPortConfigureSet(BOARD_RF_HIGH_PA, + IOC_PORT_RFC_GPO3, IOC_IOMODE_NORMAL); + IOCPortConfigureSet(BOARD_RF_SUB1GHZ, + IOC_PORT_RFC_GPO0, IOC_IOMODE_NORMAL); + } else { + /* RF core active --> Sub-1 GHz */ + IOCPortConfigureSet(BOARD_RF_HIGH_PA, + IOC_PORT_GPIO, IOC_IOMODE_NORMAL); + IOCPortConfigureSet(BOARD_RF_SUB1GHZ, + IOC_PORT_GPIO, IOC_IOMODE_NORMAL); + GPIO_setOutputEnableDio(BOARD_RF_SUB1GHZ, GPIO_OUTPUT_ENABLE); + } + } else { + /* Reset the IO multiplexer to GPIO functionality */ + IOCPortConfigureSet(BOARD_RF_HIGH_PA, + IOC_PORT_GPIO, IOC_IOMODE_NORMAL); + IOCPortConfigureSet(BOARD_RF_SUB1GHZ, + IOC_PORT_GPIO, IOC_IOMODE_NORMAL); + } +} diff --git a/boards/arm/beagle_bcf/doc/img/beagleconnect_freedom.webp b/boards/arm/beagle_bcf/doc/img/beagleconnect_freedom.webp new file mode 100644 index 000000000000..cd3e3f667737 Binary files /dev/null and b/boards/arm/beagle_bcf/doc/img/beagleconnect_freedom.webp differ diff --git a/boards/arm/beagle_bcf/doc/img/beagleconnect_freedom_back_annotated.webp b/boards/arm/beagle_bcf/doc/img/beagleconnect_freedom_back_annotated.webp new file mode 100644 index 000000000000..92e409e8adf9 Binary files /dev/null and b/boards/arm/beagle_bcf/doc/img/beagleconnect_freedom_back_annotated.webp differ diff --git a/boards/arm/beagle_bcf/doc/img/beagleconnect_freedom_front_annotated.webp b/boards/arm/beagle_bcf/doc/img/beagleconnect_freedom_front_annotated.webp new file mode 100644 index 000000000000..89aa3dcdcf2b Binary files /dev/null and b/boards/arm/beagle_bcf/doc/img/beagleconnect_freedom_front_annotated.webp differ diff --git a/boards/arm/beagle_bcf/doc/index.rst b/boards/arm/beagle_bcf/doc/index.rst new file mode 100644 index 000000000000..311e99449c21 --- /dev/null +++ b/boards/arm/beagle_bcf/doc/index.rst @@ -0,0 +1,142 @@ +.. _beagleconnect_freedom: + +BeagleConnect Freedom +##################### + +Overview +******** + +BeagleBoard.org BeagleConnect Freedom is a wireless +Internet of Things board based on the SimpleLink multi-Standard CC1352P7 wireless MCU. + + +.. figure:: img/beagleconnect_freedom.webp + :align: center + :width: 500px + :alt: BeagleBoard.org BeagleConnect Freedom + + BeagleBoard.org BeagleConnect Freedom + +Hardware +******** +BeagleBoard.org BeagleConnect Freedom board features the TI CC1352P7 wireless microcontroller. +The BeagleConnect Freedom is the first available BeagleConnect solution consisting +of a board and a case which ships programmed and ready to be used. + +BeagleConnect Freedom board runs the Zephyr RTOS and has mikroBUS ports along +with BLE and Sub-GHz radios on it. + +The CC1352P7 wireless MCU has a 48 MHz Arm Cortex-M4F SoC and a Bluetooth Low Energy and IEEE 802.15.4. + +The board also features a TI MSP430F5503 microcontroller used as a USB-to-serial bridge and +GPIO expander. + + +Supported Features +================== + +The board configuration supports the following hardware features: + ++-----------+------------+----------------------+ +| Interface | Controller | Driver/Component | ++===========+============+======================+ +| GPIO | on-chip | gpio | ++-----------+------------+----------------------+ +| MPU | on-chip | arch/arm | ++-----------+------------+----------------------+ +| NVIC | on-chip | arch/arm | ++-----------+------------+----------------------+ +| PINMUX | on-chip | pinmux | ++-----------+------------+----------------------+ +| UART | on-chip | serial | ++-----------+------------+----------------------+ +| I2C | on-chip | i2c | ++-----------+------------+----------------------+ +| SPI | on-chip | spi | ++-----------+------------+----------------------+ +| I2C | off-chip | OPT3001 | ++-----------+------------+----------------------+ +| I2C | off-chip | HDC2010 | ++-----------+------------+----------------------+ +| I2C | off-chip | BCF_BRIDGE_MCU | ++-----------+------------+----------------------+ + +Connections and IOs +=================== + +.. figure:: img/beagleconnect_freedom_front_annotated.webp + :align: center + :width: 500px + :alt: Front connections + + BeagleConnect Freedom front connections + +.. figure:: img/beagleconnect_freedom_back_annotated.webp + :align: center + :width: 500px + :alt: Back connections + + BeagleConnect Freedom back connections + + ++-------+--------------+-------------------------------------+ +| Pin | Function | Usage | ++=======+==============+=====================================+ +| DIO5 | RST_MB2 | Reset mikroBUS port 2 | ++-------+--------------+-------------------------------------+ +| DIO6 | RST_MB1 | Reset mikroBUS port 1 | ++-------+--------------+-------------------------------------+ +| DIO7 | INT_SENSOR | On-board sensor interrupts | ++-------+--------------+-------------------------------------+ +| DIO8 | FLASH_CS | SPI flash chip-select | ++-------+--------------+-------------------------------------+ +| DIO9 | SDO / PICO | SPI serial data output | ++-------+--------------+-------------------------------------+ +| DIO10 | SCK | SPI serial clock | ++-------+--------------+-------------------------------------+ +| DIO11 | SDI / POCI | SPI serial data input | ++-------+--------------+-------------------------------------+ +| DIO12 | CC1352_RX | UART RXD mikroBUS port 1 or MSP430 | ++-------+--------------+-------------------------------------+ +| DIO13 | CC1352_TX | UART TXD mikroBUS port 1 or MSP430 | ++-------+--------------+-------------------------------------+ +| DIO14 | I2C_CTRL | Enable on-board sensor I2C bus | ++-------+--------------+-------------------------------------+ +| DIO15 | USER_BOOT | BOOT button status | ++-------+--------------+-------------------------------------+ +| DIO16 | INT_MB1 | INTERRUPT PIN on mikroBUS port 1 | ++-------+--------------+-------------------------------------+ +| DIO17 | PWM_MB1 | PWM PIN on mikroBUS port 1 | ++-------+--------------+-------------------------------------+ +| DIO18 | LED_LINK | Radio link indicator LED | ++-------+--------------+-------------------------------------+ +| DIO19 | PWM_MB2 | PWM PIN on mikroBUS port 2 | ++-------+--------------+-------------------------------------+ +| DIO20 | INT_MB2 | INTERRUPT PIN on mikroBUS port 2 | ++-------+--------------+-------------------------------------+ +| DIO21 | MB2_RX | UART RXD on mikroBUS port 2 | ++-------+--------------+-------------------------------------+ +| DIO22 | MB2_TX | UART TXD on mikroBUS port 2 | ++-------+--------------+-------------------------------------+ +| DIO23 | AN_MB1 | ANALOG PIN on mikroBUS port 1 | ++-------+--------------+-------------------------------------+ +| DIO24 | AN_MB2 | ANALOG PIN on mikroBUS port 2 | ++-------+--------------+-------------------------------------+ +| DIO25 | SCL | I2C SCL | ++-------+--------------+-------------------------------------+ +| DIO26 | SDA | I2C SDA | ++-------+--------------+-------------------------------------+ +| DIO27 | CS_MB2 | SPI CS on microBUS port 2 | ++-------+--------------+-------------------------------------+ +| DIO28 | CS_MB1 | SPI CS on microBUS port 1 | ++-------+--------------+-------------------------------------+ +| DIO29 | REF_SW_CTRL1 | Antenna mux PA enable | ++-------+--------------+-------------------------------------+ +| DIO30 | REF_SW_CTRL2 | Antenna mux SubG enable | ++-------+--------------+-------------------------------------+ + +References +********** + +BeagleBoard.org BeagleConnect Freedom reference: + https://beagleconnect.org diff --git a/boards/arm/bl5340_dvk/CMakeLists.txt b/boards/arm/bl5340_dvk/CMakeLists.txt index fc248035b3e9..541334195dd1 100644 --- a/boards/arm/bl5340_dvk/CMakeLists.txt +++ b/boards/arm/bl5340_dvk/CMakeLists.txt @@ -1,9 +1,16 @@ # Copyright (c) 2019 Nordic Semiconductor ASA. -# Copyright (c) 2021 Laird Connectivity. +# Copyright (c) 2021-2023 Laird Connectivity. # SPDX-License-Identifier: Apache-2.0 if ((CONFIG_BOARD_BL5340_DVK_CPUAPP OR CONFIG_BOARD_BL5340_DVK_CPUAPP_NS) AND CONFIG_BOARD_ENABLE_CPUNET) zephyr_library() zephyr_library_sources(bl5340_dvk_cpunet_reset.c) + +if (CONFIG_BUILD_WITH_TFM) + zephyr_library_include_directories( + $/install/interface/include + ) +endif() + endif() diff --git a/boards/arm/bl5340_dvk/Kconfig b/boards/arm/bl5340_dvk/Kconfig index 5096576d9703..4be3f3971b0f 100644 --- a/boards/arm/bl5340_dvk/Kconfig +++ b/boards/arm/bl5340_dvk/Kconfig @@ -1,12 +1,9 @@ # BL5340-DVK board configuration -# Copyright (c) 2019 - 2021 Nordic Semiconductor ASA -# Copyright (c) 2021 Laird Connectivity +# Copyright (c) 2019-2021 Nordic Semiconductor ASA +# Copyright (c) 2021-2023 Laird Connectivity # SPDX-License-Identifier: Apache-2.0 -config MBOX_NRFX_IPC - default MBOX - if BOARD_BL5340_DVK_CPUAPP || BOARD_BL5340_DVK_CPUAPP_NS config BOARD_ENABLE_DCDC_APP @@ -24,16 +21,6 @@ config BOARD_ENABLE_DCDC_HV select SOC_DCDC_NRF53X_HV default y -choice BT_HCI_BUS_TYPE - default BT_RPMSG if BT -endchoice - -config HEAP_MEM_POOL_SIZE - default 4096 if BT_RPMSG - -config BT_HCI_VS - default y if BT - config BOARD_ENABLE_CPUNET bool "NRF53 Network MCU" select SOC_NRF_GPIO_FORWARDER_FOR_NRF5340 if \ @@ -64,14 +51,6 @@ endif # BOARD_BL5340_DVK_CPUAPP || BOARD_BL5340_DVK_CPUAPP_NS if BOARD_BL5340_DVK_CPUNET -# BT_CTLR depends on BT. When BT is enabled we should default to also -# enabling the controller. -config BT_CTLR - default y if BT - -config BT_ECC - default y if BT - config DOMAIN_CPUAPP_BOARD string default "bl5340_dvk_cpuapp" if BOARD_BL5340_DVK_CPUNET diff --git a/boards/arm/bl5340_dvk/Kconfig.defconfig b/boards/arm/bl5340_dvk/Kconfig.defconfig index ab52e66358cc..04e0b1db078b 100644 --- a/boards/arm/bl5340_dvk/Kconfig.defconfig +++ b/boards/arm/bl5340_dvk/Kconfig.defconfig @@ -1,7 +1,7 @@ # BL5340-DVK board configuration # Copyright (c) 2019-2020 Nordic Semiconductor ASA -# Copyright (c) 2021 Laird Connectivity +# Copyright (c) 2021-2023 Laird Connectivity # SPDX-License-Identifier: Apache-2.0 if BOARD_BL5340_DVK_CPUAPP || BOARD_BL5340_DVK_CPUAPP_NS @@ -10,9 +10,6 @@ config BOARD default "bl5340_dvk_cpuapp" if BOARD_BL5340_DVK_CPUAPP || BOARD_BL5340_DVK_CPUAPP_NS -config FLASH - default y - config I2C default GPIO || DAC @@ -83,3 +80,87 @@ endif # BOARD_BL5340_DVK_CPUAPP || BOARD_BL5340_DVK_CPUAPP_NS config BOARD default "bl5340_dvk_cpunet" if BOARD_BL5340_DVK_CPUNET + +config IPM_NRFX + default IPM + +config MBOX_NRFX_IPC + default MBOX + +if BOARD_BL5340_DVK_CPUAPP || BOARD_BL5340_DVK_CPUAPP_NS + +choice BT_HCI_BUS_TYPE + default BT_RPMSG if BT +endchoice + +config HEAP_MEM_POOL_SIZE + default 4096 if BT_RPMSG + +config BT_HCI_VS + default y if BT + +# 2.8" TFT Touch Shield for Arduino w/Capacitive Touch Screen Module +# is mounted to the DVK using standoffs. +# https://www.buydisplay.com/2-8-inch-tft-touch-shield-for-arduino-w-capacitive-touch-screen-module +if DISPLAY + +if KSCAN + +config INPUT_FT5336 + default y + +config INPUT_FT5336_INTERRUPT + default y + +endif # KSCAN + +if LVGL + +config LV_Z_VDB_SIZE + default 64 + +config LV_Z_BITS_PER_PIXEL + default 16 + +choice LV_COLOR_DEPTH + default LV_COLOR_DEPTH_16 +endchoice + +config LV_COLOR_16_SWAP + default y + +config KSCAN + default y + +config INPUT + default y + +config LV_Z_POINTER_KSCAN + default y + +config LV_Z_POINTER_KSCAN_SWAP_XY + default y + +config LV_Z_POINTER_KSCAN_INVERT_X + default y + +config LV_Z_POINTER_KSCAN_INVERT_Y + default y + +endif # LVGL + +endif # DISPLAY + +endif # BOARD_BL5340_DVK_CPUAPP || BOARD_BL5340_DVK_CPUAPP_NS + +if BOARD_BL5340_DVK_CPUNET + +# BT_CTLR depends on BT. When BT is enabled we should default to also +# enabling the controller. +config BT_CTLR + default y if BT + +config BT_ECC + default y if BT + +endif # BOARD_BL5340_DVK_CPUNET diff --git a/boards/arm/bl5340_dvk/bl5340_dvk_cpuapp.yaml b/boards/arm/bl5340_dvk/bl5340_dvk_cpuapp.yaml index e4df79b91793..b5ed71653452 100644 --- a/boards/arm/bl5340_dvk/bl5340_dvk_cpuapp.yaml +++ b/boards/arm/bl5340_dvk/bl5340_dvk_cpuapp.yaml @@ -9,12 +9,13 @@ toolchain: ram: 448 flash: 1024 supported: + - counter - gpio - i2c - pwm - qspi - spi - - watchdog - uart - usb_cdc - usb_device + - watchdog diff --git a/boards/arm/bl5340_dvk/bl5340_dvk_cpuapp_common.dts b/boards/arm/bl5340_dvk/bl5340_dvk_cpuapp_common.dts index 6101acdbe255..9eb5d456fcb6 100644 --- a/boards/arm/bl5340_dvk/bl5340_dvk_cpuapp_common.dts +++ b/boards/arm/bl5340_dvk/bl5340_dvk_cpuapp_common.dts @@ -1,6 +1,6 @@ /* * Copyright (c) 2019-2023 Nordic Semiconductor ASA - * Copyright (c) 2021 Laird Connectivity + * Copyright (c) 2021-2023 Laird Connectivity * * SPDX-License-Identifier: Apache-2.0 */ @@ -14,6 +14,8 @@ zephyr,bt-mon-uart = &uart0; zephyr,bt-c2h-uart = &uart0; zephyr,display = &ili9340; + zephyr,bt-hci-rpmsg-ipc = &ipc0; + zephyr,keyboard-scan = &touch_controller; }; /* Main LEDs and buttons are on an I2C TCA9538 GPIO port expander */ @@ -90,6 +92,8 @@ watchdog0 = &wdt0; accel0 = &lis3dh; bbram0 = &extrtc0; + spi-flash0 = &mx25r64; + kscan0 = &touch_controller; }; }; @@ -135,6 +139,10 @@ compatible = "focaltech,ft5336"; reg = <0x38>; int-gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; + + touch_controller: kscan-input { + compatible = "zephyr,kscan-input"; + }; }; bme680@76 { @@ -215,8 +223,8 @@ reset-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; cmd-data-gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; rotation = <270>; - width = <240>; - height = <320>; + width = <320>; + height = <240>; }; }; @@ -235,18 +243,6 @@ pinctrl-names = "default", "sleep"; }; -&timer0 { - status = "okay"; -}; - -&timer1 { - status = "okay"; -}; - -&timer2 { - status = "okay"; -}; - &qspi { status = "okay"; pinctrl-0 = <&qspi_default>; diff --git a/boards/arm/bl5340_dvk/bl5340_dvk_cpuapp_defconfig b/boards/arm/bl5340_dvk/bl5340_dvk_cpuapp_defconfig index 4a616deb776f..23bb9d57b109 100644 --- a/boards/arm/bl5340_dvk/bl5340_dvk_cpuapp_defconfig +++ b/boards/arm/bl5340_dvk/bl5340_dvk_cpuapp_defconfig @@ -16,7 +16,7 @@ CONFIG_ARM_TRUSTZONE_M=y # Enable GPIO CONFIG_GPIO=y -# Enable uart driver +# Enable UART driver CONFIG_SERIAL=y # Enable console diff --git a/boards/arm/bl5340_dvk/bl5340_dvk_cpuapp_ns.dts b/boards/arm/bl5340_dvk/bl5340_dvk_cpuapp_ns.dts index d4ade772e1f6..f05e23624fa3 100644 --- a/boards/arm/bl5340_dvk/bl5340_dvk_cpuapp_ns.dts +++ b/boards/arm/bl5340_dvk/bl5340_dvk_cpuapp_ns.dts @@ -17,6 +17,11 @@ zephyr,flash = &flash0; zephyr,code-partition = &slot0_ns_partition; }; + + /* Aliases for deleted nodes must be removed */ + aliases { + /delete-property/ spi-flash0; + }; }; zephyr_udc0: &usbd { diff --git a/boards/arm/bl5340_dvk/bl5340_dvk_cpuapp_ns.yaml b/boards/arm/bl5340_dvk/bl5340_dvk_cpuapp_ns.yaml index 16c5bc783824..c754614833ff 100644 --- a/boards/arm/bl5340_dvk/bl5340_dvk_cpuapp_ns.yaml +++ b/boards/arm/bl5340_dvk/bl5340_dvk_cpuapp_ns.yaml @@ -9,11 +9,12 @@ toolchain: ram: 192 flash: 192 supported: + - counter - gpio - i2c - pwm - spi - - watchdog - uart - usb_cdc - usb_device + - watchdog diff --git a/boards/arm/bl5340_dvk/bl5340_dvk_cpuapp_ns_defconfig b/boards/arm/bl5340_dvk/bl5340_dvk_cpuapp_ns_defconfig index 5e42dce833a4..47fcea1c3a46 100644 --- a/boards/arm/bl5340_dvk/bl5340_dvk_cpuapp_ns_defconfig +++ b/boards/arm/bl5340_dvk/bl5340_dvk_cpuapp_ns_defconfig @@ -16,13 +16,13 @@ CONFIG_ARM_TRUSTZONE_M=y # This Board implies building Non-Secure firmware CONFIG_TRUSTED_EXECUTION_NONSECURE=y -# enable GPIO +# Enable GPIO CONFIG_GPIO=y -# Enable uart driver +# Enable UART driver CONFIG_SERIAL=y -# enable console +# Enable console CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y diff --git a/boards/arm/bl5340_dvk/bl5340_dvk_cpuapp_partition_conf.dts b/boards/arm/bl5340_dvk/bl5340_dvk_cpuapp_partition_conf.dts index 803e099fb697..3b3e348402dd 100644 --- a/boards/arm/bl5340_dvk/bl5340_dvk_cpuapp_partition_conf.dts +++ b/boards/arm/bl5340_dvk/bl5340_dvk_cpuapp_partition_conf.dts @@ -8,7 +8,7 @@ /* * Default Flash planning for bl5340_dvk CPUAPP (Application MCU). * - * Zephyr build for BL5340 with ARM TrustZone-M support, + * Zephyr build for BL5340 with ARM TrustZone-M support * implies building Secure and Non-Secure Zephyr images. * * Secure image will be placed, by default, in flash0 diff --git a/boards/arm/bl5340_dvk/bl5340_dvk_cpunet.dts b/boards/arm/bl5340_dvk/bl5340_dvk_cpunet.dts index 4a75d608af91..67b80ed5d25e 100644 --- a/boards/arm/bl5340_dvk/bl5340_dvk_cpunet.dts +++ b/boards/arm/bl5340_dvk/bl5340_dvk_cpunet.dts @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021 Laird Connectivity + * Copyright (c) 2021-2023 Laird Connectivity * * SPDX-License-Identifier: Apache-2.0 */ @@ -7,6 +7,7 @@ /dts-v1/; #include #include "bl5340_dvk_cpunet-pinctrl.dtsi" +#include "bl5340_dvk_cpunet_common.dts" / { model = "Laird Connectivity BL5340 (nRF5340) Network"; @@ -21,6 +22,7 @@ zephyr,sram = &sram1; zephyr,flash = &flash1; zephyr,code-partition = &slot0_partition; + zephyr,bt-hci-rpmsg-ipc = &ipc0; }; aliases { @@ -28,18 +30,6 @@ }; }; -&gpiote { - status = "okay"; -}; - -&gpio0 { - status = "okay"; -}; - -&gpio1 { - status = "okay"; -}; - &uart0 { status = "okay"; current-speed = <115200>; @@ -47,52 +37,3 @@ pinctrl-1 = <&uart0_sleep>; pinctrl-names = "default", "sleep"; }; - -&timer0 { - status = "okay"; -}; - -&timer1 { - status = "okay"; -}; - -&timer2 { - status = "okay"; -}; - -&flash1 { - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* 48K */ - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x00000000 0xc000>; - }; - /* 88K */ - slot0_partition: partition@c000 { - label = "image-0"; - reg = <0x0000C000 0x16000>; - }; - /* 88K */ - slot1_partition: partition@22000 { - label = "image-1"; - reg = <0x00022000 0x16000>; - }; - /* 12K */ - scratch_partition: partition@38000 { - label = "image-scratch"; - reg = <0x00038000 0x3000>; - }; - /* 20K */ - storage_partition: partition@3B000 { - label = "storage"; - reg = <0x0003B000 0x5000>; - }; - }; -}; - -/* Include shared RAM configuration file */ -#include "bl5340_dvk_shared_sram_planning_conf.dts" diff --git a/boards/arm/bl5340_dvk/bl5340_dvk_cpunet.yaml b/boards/arm/bl5340_dvk/bl5340_dvk_cpunet.yaml index 91329162c63d..af81eeac4fcd 100644 --- a/boards/arm/bl5340_dvk/bl5340_dvk_cpunet.yaml +++ b/boards/arm/bl5340_dvk/bl5340_dvk_cpunet.yaml @@ -9,7 +9,9 @@ toolchain: ram: 64 flash: 256 supported: + - counter - gpio - i2c - spi + - uart - watchdog diff --git a/boards/arm/bl5340_dvk/bl5340_dvk_cpunet_common.dts b/boards/arm/bl5340_dvk/bl5340_dvk_cpunet_common.dts new file mode 100644 index 000000000000..d3853f3cf5b2 --- /dev/null +++ b/boards/arm/bl5340_dvk/bl5340_dvk_cpunet_common.dts @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2021-2023 Laird Connectivity + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +&gpiote { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&timer0 { + status = "okay"; +}; + +&timer1 { + status = "okay"; +}; + +&timer2 { + status = "okay"; +}; + +&flash1 { + /* + * For more information, see: + * http://docs.zephyrproject.org/latest/guides/dts/index.html#flash-partitions + */ + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + /* 48K */ + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x00000000 0xc000>; + }; + /* 88K */ + slot0_partition: partition@c000 { + label = "image-0"; + reg = <0x0000C000 0x16000>; + }; + /* 88K */ + slot1_partition: partition@22000 { + label = "image-1"; + reg = <0x00022000 0x16000>; + }; + /* 32K */ + storage_partition: partition@38000 { + label = "storage"; + reg = <0x00038000 0x8000>; + }; + }; +}; + +/* Include shared RAM configuration file */ +#include "bl5340_dvk_shared_sram_planning_conf.dts" diff --git a/boards/arm/bl5340_dvk/bl5340_dvk_cpunet_defconfig b/boards/arm/bl5340_dvk/bl5340_dvk_cpunet_defconfig index 4f5929b9790f..83098b18827a 100644 --- a/boards/arm/bl5340_dvk/bl5340_dvk_cpunet_defconfig +++ b/boards/arm/bl5340_dvk/bl5340_dvk_cpunet_defconfig @@ -10,13 +10,13 @@ CONFIG_ARM_MPU=y # Enable hardware stack protection CONFIG_HW_STACK_PROTECTION=y -# enable GPIO +# Enable GPIO CONFIG_GPIO=y -# Enable uart driver +# Enable UART driver CONFIG_SERIAL=y -# enable console +# Enable console CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y diff --git a/boards/arm/bl5340_dvk/bl5340_dvk_cpunet_reset.c b/boards/arm/bl5340_dvk/bl5340_dvk_cpunet_reset.c index 64da5e914200..7cf2b399985f 100644 --- a/boards/arm/bl5340_dvk/bl5340_dvk_cpunet_reset.c +++ b/boards/arm/bl5340_dvk/bl5340_dvk_cpunet_reset.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2019-2021 Nordic Semiconductor ASA. - * Copyright (c) 2021 Laird Connectivity + * Copyright (c) 2021-2023 Laird Connectivity * * SPDX-License-Identifier: Apache-2.0 */ @@ -13,19 +13,29 @@ LOG_MODULE_REGISTER(bl5340_dvk_cpuapp, CONFIG_LOG_DEFAULT_LEVEL); +#if defined(CONFIG_BT_CTLR_DEBUG_PINS_CPUAPP) +#include <../subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/debug.h> +#else +#define DEBUG_SETUP() +#endif + static void remoteproc_mgr_config(void) { +#if !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) || defined(CONFIG_BUILD_WITH_TFM) + /* Route Bluetooth Controller Debug Pins */ + DEBUG_SETUP(); +#endif /* !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) || defined(CONFIG_BUILD_WITH_TFM) */ + #if !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) /* Retain nRF5340 Network MCU in Secure domain (bus * accesses by Network MCU will have Secure attribute set). */ NRF_SPU->EXTDOMAIN[0].PERM = 1 << 4; -#endif /* !CONFIG_TRUSTED_EXECUTION_NONSECURE */ +#endif /* !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) */ } -static int remoteproc_mgr_boot(const struct device *dev) +static int remoteproc_mgr_boot(void) { - ARG_UNUSED(dev); /* Secure domain may configure permissions for the Network MCU. */ remoteproc_mgr_config(); diff --git a/boards/arm/bl654_usb/Kconfig.defconfig b/boards/arm/bl654_usb/Kconfig.defconfig index 55a05cd2176b..573746037f8a 100644 --- a/boards/arm/bl654_usb/Kconfig.defconfig +++ b/boards/arm/bl654_usb/Kconfig.defconfig @@ -41,6 +41,10 @@ config USB_DEVICE_INITIALIZE_AT_BOOT config SHELL_BACKEND_SERIAL_CHECK_DTR default SHELL + depends on UART_LINE_CTRL + +config UART_LINE_CTRL + default SHELL # Logger cannot use itself to log config USB_CDC_ACM_LOG_LEVEL diff --git a/boards/arm/cc3220sf_launchxl/pinmux.c b/boards/arm/cc3220sf_launchxl/pinmux.c index 0b5322c5f73e..69947a875d18 100644 --- a/boards/arm/cc3220sf_launchxl/pinmux.c +++ b/boards/arm/cc3220sf_launchxl/pinmux.c @@ -89,9 +89,8 @@ #define I2C_CC32XX_PIN_16_I2C_SCL 0x90F /*!< PIN 16 is used for I2C_SCL */ #define I2C_CC32XX_PIN_17_I2C_SDA 0x910 /*!< PIN 17 is used for I2C_SDA */ -int pinmux_initialize(const struct device *port) +int pinmux_initialize(void) { - ARG_UNUSED(port); #ifdef CONFIG_UART_CC32XX /* Configure PIN_55 for UART0 UART0_TX */ diff --git a/boards/arm/cc3235sf_launchxl/pinmux.c b/boards/arm/cc3235sf_launchxl/pinmux.c index 1a6d982b5740..f4ebff48d650 100644 --- a/boards/arm/cc3235sf_launchxl/pinmux.c +++ b/boards/arm/cc3235sf_launchxl/pinmux.c @@ -64,9 +64,8 @@ #define I2C_CC32XX_PIN_16_I2C_SCL 0x90F /*!< PIN 16 is used for I2C_SCL */ #define I2C_CC32XX_PIN_17_I2C_SDA 0x910 /*!< PIN 17 is used for I2C_SDA */ -int pinmux_initialize(const struct device *port) +int pinmux_initialize(void) { - ARG_UNUSED(port); #ifdef CONFIG_UART_CC32XX /* Configure PIN_55 for UART0 UART0_TX */ diff --git a/boards/arm/circuitdojo_feather_nrf9160/circuitdojo_feather_nrf9160_common.dts b/boards/arm/circuitdojo_feather_nrf9160/circuitdojo_feather_nrf9160_common.dts index d80922491071..44c483f84f67 100644 --- a/boards/arm/circuitdojo_feather_nrf9160/circuitdojo_feather_nrf9160_common.dts +++ b/boards/arm/circuitdojo_feather_nrf9160/circuitdojo_feather_nrf9160_common.dts @@ -171,18 +171,6 @@ }; }; -&timer0 { - status = "okay"; -}; - -&timer1 { - status = "okay"; -}; - -&timer2 { - status = "okay"; -}; - &flash0 { partitions { diff --git a/boards/arm/cy8ckit_062_ble/doc/index.rst b/boards/arm/cy8ckit_062_ble/doc/index.rst index d6b77f6da42b..21d03be997a3 100644 --- a/boards/arm/cy8ckit_062_ble/doc/index.rst +++ b/boards/arm/cy8ckit_062_ble/doc/index.rst @@ -1,7 +1,7 @@ .. _cy8ckit_062_ble: -PSoC63 BLE Pioneer Kit -###################### +INFINEON PSoC63 BLE Pioneer Kit +############################### Overview ******** diff --git a/boards/arm/cy8ckit_062_wifi_bt/doc/index.rst b/boards/arm/cy8ckit_062_wifi_bt/doc/index.rst index ec313afb1204..35d89c3bd6da 100644 --- a/boards/arm/cy8ckit_062_wifi_bt/doc/index.rst +++ b/boards/arm/cy8ckit_062_wifi_bt/doc/index.rst @@ -1,7 +1,7 @@ .. _cy8ckit_062_wifi_bt: -PSoC6 WiFi-BT Pioneer Kit -######################### +INFINEON PSoC6 WiFi-BT Pioneer Kit +################################## Overview ******** diff --git a/boards/arm/cy8cproto_062_4343w/Kconfig.defconfig b/boards/arm/cy8cproto_062_4343w/Kconfig.defconfig index 198537aa929b..14c47a06e584 100644 --- a/boards/arm/cy8cproto_062_4343w/Kconfig.defconfig +++ b/boards/arm/cy8cproto_062_4343w/Kconfig.defconfig @@ -8,4 +8,34 @@ if BOARD_CY8CPROTO_062_4343W config BOARD default "cy8cproto_062_4343w" +if WIFI || BT + +# Select CYW43XXX part and module +choice CYW43XXX_PART + default CYW4343W +endchoice + +choice CYW4343W_MODULE + default CYW4343W_MURATA_1DX +endchoice + +endif # WIFI || BT + + +if BT + +# Select HCI components +config UART + bool + default y + +config BT_UART + default y + +choice BT_HCI_BUS_TYPE + default BT_H4 +endchoice + +endif # BT + endif # BOARD_CY8CPROTO_062_4343W diff --git a/boards/arm/cy8cproto_062_4343w/cy8cproto_062_4343w-pinctrl.dtsi b/boards/arm/cy8cproto_062_4343w/cy8cproto_062_4343w-pinctrl.dtsi index 073a5517d7ba..d86f9b67bfa7 100644 --- a/boards/arm/cy8cproto_062_4343w/cy8cproto_062_4343w-pinctrl.dtsi +++ b/boards/arm/cy8cproto_062_4343w/cy8cproto_062_4343w-pinctrl.dtsi @@ -3,6 +3,23 @@ * SPDX-License-Identifier: Apache-2.0 */ +/* Configure pin control bias mode for uart2 pins */ +&p3_1_scb2_uart_tx { + drive-push-pull; +}; + +&p3_0_scb2_uart_rx { + input-enable; +}; + +&p3_2_scb2_uart_rts { + drive-push-pull; +}; + +&p3_3_scb2_uart_cts { + input-enable; +}; + /* Configure pin control bias mode for uart5 pins */ &p5_1_scb5_uart_tx { drive-push-pull; diff --git a/boards/arm/cy8cproto_062_4343w/cy8cproto_062_4343w.dts b/boards/arm/cy8cproto_062_4343w/cy8cproto_062_4343w.dts index c09b64e91f26..48544362c242 100644 --- a/boards/arm/cy8cproto_062_4343w/cy8cproto_062_4343w.dts +++ b/boards/arm/cy8cproto_062_4343w/cy8cproto_062_4343w.dts @@ -22,6 +22,7 @@ zephyr,flash = &flash0; zephyr,console = &uart5; zephyr,shell-uart = &uart5; + zephyr,bt_uart = &uart2; }; }; @@ -33,6 +34,32 @@ pinctrl-names = "default"; }; +&uart2 { + status = "okay"; + /* The UART bus speed (current_speed) for zephyr_bt_uart should be the same + * as the default baudrate defined in CYW43xx firmware (default 115200). + */ + + current-speed = <115200>; + + /* HCI-UART pins*/ + pinctrl-0 = <&p3_1_scb2_uart_tx &p3_0_scb2_uart_rx &p3_2_scb2_uart_rts &p3_3_scb2_uart_cts>; + pinctrl-names = "default"; + + bt-hci { + status = "okay"; + compatible = "infineon,cyw43xxx-bt-hci"; + bt-reg-on-gpios = <&gpio_prt3 4 (GPIO_ACTIVE_HIGH)>; + + /* Configuration UART speeds for firmware download (fw-download-speed) and + * HCI operation (hci-operation-speed). + * If hci-operation-speed or fw-download-speed are not defined in bt-hci{...} + * node, cyw43xx driver will use bus/current-speed as default speed. + */ + fw-download-speed = <3000000>; + }; +}; + /* System clock configuration */ &fll0 { status = "okay"; diff --git a/boards/arm/cy8cproto_062_4343w/cy8cproto_062_4343w_defconfig b/boards/arm/cy8cproto_062_4343w/cy8cproto_062_4343w_defconfig index 937b4b587bdd..c36ce13e1a87 100644 --- a/boards/arm/cy8cproto_062_4343w/cy8cproto_062_4343w_defconfig +++ b/boards/arm/cy8cproto_062_4343w/cy8cproto_062_4343w_defconfig @@ -24,5 +24,8 @@ CONFIG_SERIAL=y # Enable pin controller CONFIG_PINCTRL=y +# Enable GPIO driver +CONFIG_GPIO=y + # Enable clock controller CONFIG_CLOCK_CONTROL=y diff --git a/boards/arm/cy8cproto_062_4343w/doc/index.rst b/boards/arm/cy8cproto_062_4343w/doc/index.rst index b5eece7b8b04..de982a142d62 100644 --- a/boards/arm/cy8cproto_062_4343w/doc/index.rst +++ b/boards/arm/cy8cproto_062_4343w/doc/index.rst @@ -1,7 +1,7 @@ .. _cy8cproto_062_4343w: -CY8CPROTO-062-4343W -################### +INFINEON CY8CPROTO-062-4343W +############################ Overview ******** diff --git a/boards/arm/da1469x_dk_pro/da1469x_dk_pro-pinctrl.dtsi b/boards/arm/da1469x_dk_pro/da1469x_dk_pro-pinctrl.dtsi index 45f08511ad88..f3cb57d7395b 100644 --- a/boards/arm/da1469x_dk_pro/da1469x_dk_pro-pinctrl.dtsi +++ b/boards/arm/da1469x_dk_pro/da1469x_dk_pro-pinctrl.dtsi @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022 Renesas Electronics Corporation + * Copyright (c) 2022 Renesas Electronics Corporation and/or its affiliates * SPDX-License-Identifier: Apache-2.0 */ @@ -15,4 +15,20 @@ bias-pull-up; }; }; + + i2c_default: i2c_default { + group1 { + pinmux = , + ; + bias-pull-up; + }; + }; + + i2c2_default: i2c2_default { + group1 { + pinmux = , + ; + bias-pull-up; + }; + }; }; diff --git a/boards/arm/da1469x_dk_pro/da1469x_dk_pro.dts b/boards/arm/da1469x_dk_pro/da1469x_dk_pro.dts index 9334b5f5a2a7..18a561624c78 100644 --- a/boards/arm/da1469x_dk_pro/da1469x_dk_pro.dts +++ b/boards/arm/da1469x_dk_pro/da1469x_dk_pro.dts @@ -114,3 +114,38 @@ pinctrl-0 = <&uart_default>; pinctrl-names = "default"; }; + +&rc32m { + status = "disabled"; +}; + +&xtal32m { + status = "okay"; +}; + +&xtal32k { + status = "okay"; +}; + +&lp_clk { + clock-src = <&xtal32k>; +}; + +&sys_clk { + clock-src = <&xtal32m>; +}; + +&pll { + status = "okay"; +}; +&i2c { + status = "okay"; + pinctrl-0 = <&i2c_default>; + pinctrl-names = "default"; +}; + +&i2c2 { + status = "okay"; + pinctrl-0 = <&i2c2_default>; + pinctrl-names = "default"; +}; diff --git a/boards/arm/da1469x_dk_pro/da1469x_dk_pro.yaml b/boards/arm/da1469x_dk_pro/da1469x_dk_pro.yaml index eebf1a76767c..2c02084deb79 100644 --- a/boards/arm/da1469x_dk_pro/da1469x_dk_pro.yaml +++ b/boards/arm/da1469x_dk_pro/da1469x_dk_pro.yaml @@ -11,3 +11,4 @@ supported: - arduino_gpio - gpio - watchdog + - i2c diff --git a/boards/arm/da1469x_dk_pro/da1469x_dk_pro_defconfig b/boards/arm/da1469x_dk_pro/da1469x_dk_pro_defconfig index 4ed232743635..c0f0e461d2b3 100644 --- a/boards/arm/da1469x_dk_pro/da1469x_dk_pro_defconfig +++ b/boards/arm/da1469x_dk_pro/da1469x_dk_pro_defconfig @@ -13,3 +13,6 @@ CONFIG_UART_CONSOLE=y CONFIG_SERIAL=y CONFIG_BUILD_OUTPUT_HEX=n + +CONFIG_I2C=y +CONFIG_I2C_CALLBACK=y diff --git a/boards/arm/disco_l475_iot1/disco_l475_iot1.dts b/boards/arm/disco_l475_iot1/disco_l475_iot1.dts index 753cfe6ee985..7f707ed20679 100644 --- a/boards/arm/disco_l475_iot1/disco_l475_iot1.dts +++ b/boards/arm/disco_l475_iot1/disco_l475_iot1.dts @@ -42,27 +42,6 @@ }; }; - power-states { - stop0: state0 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <1>; - min-residency-us = <500>; - }; - stop1: state1 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <2>; - min-residency-us = <700>; - }; - stop2: state2 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <3>; - min-residency-us = <1000>; - }; - }; - pwmleds: pwmleds { compatible = "pwm-leds"; status = "disabled"; diff --git a/boards/arm/efm32gg_slwstk6121a/board.c b/boards/arm/efm32gg_slwstk6121a/board.c index 999f08e5b026..618073d1246d 100644 --- a/boards/arm/efm32gg_slwstk6121a/board.c +++ b/boards/arm/efm32gg_slwstk6121a/board.c @@ -12,9 +12,8 @@ #include "em_cmu.h" #include "board.h" -static int efm32gg_slwstk6121a_init(const struct device *dev) +static int efm32gg_slwstk6121a_init(void) { - ARG_UNUSED(dev); const struct device *cur_dev; diff --git a/boards/arm/efm32gg_stk3701a/board.c b/boards/arm/efm32gg_stk3701a/board.c index b855984ab2f3..0096cf11bc92 100644 --- a/boards/arm/efm32gg_stk3701a/board.c +++ b/boards/arm/efm32gg_stk3701a/board.c @@ -11,11 +11,10 @@ #include #include "em_cmu.h" -static int efm32gg_stk3701a_init(const struct device *dev) +static int efm32gg_stk3701a_init(void) { const struct device *cur_dev; - ARG_UNUSED(dev); /* Enable the board controller to be able to use the serial port */ cur_dev = DEVICE_DT_GET(BC_ENABLE_GPIO_NODE); diff --git a/boards/arm/efm32hg_slstk3400a/board.c b/boards/arm/efm32hg_slstk3400a/board.c index 6b925246b1a3..ae69f6ee5d28 100644 --- a/boards/arm/efm32hg_slstk3400a/board.c +++ b/boards/arm/efm32hg_slstk3400a/board.c @@ -9,11 +9,10 @@ #include #include -static int efm32hg_slstk3400a_init(const struct device *dev) +static int efm32hg_slstk3400a_init(void) { const struct device *bce_dev; /* Board Controller Enable Gpio Device */ - ARG_UNUSED(dev); /* Enable the board controller to be able to use the serial port */ bce_dev = DEVICE_DT_GET(BC_ENABLE_GPIO_NODE); diff --git a/boards/arm/efm32pg_stk3401a/board.c b/boards/arm/efm32pg_stk3401a/board.c index eaaab7656065..a2677965a4ae 100644 --- a/boards/arm/efm32pg_stk3401a/board.c +++ b/boards/arm/efm32pg_stk3401a/board.c @@ -9,11 +9,10 @@ #include #include -static int efm32pg_stk3401a_init(const struct device *dev) +static int efm32pg_stk3401a_init(void) { const struct device *bce_dev; /* Board Controller Enable Gpio Device */ - ARG_UNUSED(dev); /* Enable the board controller to be able to use the serial port */ bce_dev = DEVICE_DT_GET(BC_ENABLE_GPIO_NODE); diff --git a/boards/arm/efm32pg_stk3402a/board.c b/boards/arm/efm32pg_stk3402a/board.c index d47883eeea2d..8809b013920c 100644 --- a/boards/arm/efm32pg_stk3402a/board.c +++ b/boards/arm/efm32pg_stk3402a/board.c @@ -9,11 +9,10 @@ #include #include -static int efm32pg_stk3402a_init(const struct device *dev) +static int efm32pg_stk3402a_init(void) { const struct device *bce_dev; /* Board Controller Enable Gpio Device */ - ARG_UNUSED(dev); /* Enable the board controller to be able to use the serial port */ bce_dev = DEVICE_DT_GET(BC_ENABLE_GPIO_NODE); diff --git a/boards/arm/efm32wg_stk3800/board.c b/boards/arm/efm32wg_stk3800/board.c index 653371a95d74..acf9406da610 100644 --- a/boards/arm/efm32wg_stk3800/board.c +++ b/boards/arm/efm32wg_stk3800/board.c @@ -9,11 +9,10 @@ #include #include -static int efm32wg_stk3800_init(const struct device *dev) +static int efm32wg_stk3800_init(void) { const struct device *bce_dev; /* Board Controller Enable Gpio Device */ - ARG_UNUSED(dev); /* Enable the board controller to be able to use the serial port */ bce_dev = DEVICE_DT_GET(BC_ENABLE_GPIO_NODE); diff --git a/boards/arm/efr32_radio/board.c b/boards/arm/efr32_radio/board.c index c2f8c0a3396a..b1c80128b339 100644 --- a/boards/arm/efr32_radio/board.c +++ b/boards/arm/efr32_radio/board.c @@ -17,11 +17,10 @@ #define VCOM_ENABLE_GPIO_PIN 5 #endif /* CONFIG_BOARD_EFR32_RADIO_BRD4180A */ -static int efr32_radio_init(const struct device *dev) +static int efr32_radio_init(void) { const struct device *vce_dev; /* Virtual COM Port Enable GPIO Device */ - ARG_UNUSED(dev); /* Enable the board controller to be able to use the serial port */ vce_dev = DEVICE_DT_GET(VCOM_ENABLE_GPIO_NODE); diff --git a/boards/arm/efr32bg_sltb010a/board.c b/boards/arm/efr32bg_sltb010a/board.c index 9317acbdac3a..dad825e52dfb 100644 --- a/boards/arm/efr32bg_sltb010a/board.c +++ b/boards/arm/efr32bg_sltb010a/board.c @@ -16,7 +16,7 @@ LOG_MODULE_REGISTER(efr32bg_sltb010a, CONFIG_BOARD_EFR32BG22_LOG_LEVEL); static int efr32bg_sltb010a_init_clocks(void); -static int efr32bg_sltb010a_init(const struct device *dev) +static int efr32bg_sltb010a_init(void) { int ret; @@ -26,7 +26,6 @@ static int efr32bg_sltb010a_init(const struct device *dev) static struct gpio_dt_spec wake_up_gpio_dev = GPIO_DT_SPEC_GET(DT_NODELABEL(wake_up_trigger), gpios); - ARG_UNUSED(dev); if (!device_is_ready(wake_up_gpio_dev.port)) { LOG_ERR("Wake-up GPIO device was not found!\n"); diff --git a/boards/arm/efr32mg_sltb004a/board.c b/boards/arm/efr32mg_sltb004a/board.c index c78ea6495388..43dd2a6b3b24 100644 --- a/boards/arm/efr32mg_sltb004a/board.c +++ b/boards/arm/efr32mg_sltb004a/board.c @@ -28,12 +28,11 @@ static int enable_supply(const struct supply_cfg *cfg) return rv; } -static int efr32mg_sltb004a_init(const struct device *dev) +static int efr32mg_sltb004a_init(void) { struct supply_cfg cfg; int rc = 0; - ARG_UNUSED(dev); (void)cfg; #define CCS811 DT_NODELABEL(ccs811) diff --git a/boards/arm/efr32xg24_dk2601b/CMakeLists.txt b/boards/arm/efr32xg24_dk2601b/CMakeLists.txt new file mode 100644 index 000000000000..7997d6923796 --- /dev/null +++ b/boards/arm/efr32xg24_dk2601b/CMakeLists.txt @@ -0,0 +1,5 @@ +# Copyright (c) 2021 Sateesh Kotapati +# SPDX-License-Identifier: Apache-2.0 + +zephyr_library() +zephyr_library_sources(board.c) diff --git a/boards/arm/efr32xg24_dk2601b/Kconfig b/boards/arm/efr32xg24_dk2601b/Kconfig new file mode 100644 index 000000000000..c695033c2ff5 --- /dev/null +++ b/boards/arm/efr32xg24_dk2601b/Kconfig @@ -0,0 +1,12 @@ +# EFR32XG24 DK2601B board + +# Copyright (c) 2022, Silicon Labs +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_EFR32XG24_DK2601B + +module = BOARD_EFR32MG24 +module-str = Board Control +source "subsys/logging/Kconfig.template.log_config" + +endif # BOARD_EFR32XG24_DK2601B diff --git a/boards/arm/efr32xg24_dk2601b/Kconfig.board b/boards/arm/efr32xg24_dk2601b/Kconfig.board new file mode 100644 index 000000000000..9b205615852b --- /dev/null +++ b/boards/arm/efr32xg24_dk2601b/Kconfig.board @@ -0,0 +1,9 @@ +# EFR32XG24 DK2601B board + +# Copyright (c) 2021, Sateesh Kotapati +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_EFR32XG24_DK2601B + bool "Silicon Labs BRD2601B (Mighty Gecko Radio Board)" + depends on SOC_SERIES_EFR32MG24 + select SOC_PART_NUMBER_EFR32MG24B310F1536IM48 diff --git a/boards/arm/efr32xg24_dk2601b/Kconfig.defconfig b/boards/arm/efr32xg24_dk2601b/Kconfig.defconfig new file mode 100644 index 000000000000..c9ea55367655 --- /dev/null +++ b/boards/arm/efr32xg24_dk2601b/Kconfig.defconfig @@ -0,0 +1,21 @@ +# EFR32XG24 DK2601B board + +# Copyright (c) 2021, Sateesh Kotapati +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_EFR32XG24_DK2601B + +config BOARD + default "efr32xg24_dk2601b" + +config CMU_HFXO_FREQ + default 40000000 + +config CMU_LFXO_FREQ + default 32768 + +config FLASH_BASE_ADDRESS + hex + default 0x08000000 + +endif # BOARD_EFR32XG24_DK2601B diff --git a/boards/arm/efr32xg24_dk2601b/board.c b/boards/arm/efr32xg24_dk2601b/board.c new file mode 100644 index 000000000000..7a3fcd316c38 --- /dev/null +++ b/boards/arm/efr32xg24_dk2601b/board.c @@ -0,0 +1,70 @@ +/* + * Copyright (c) 2021 Sateesh Kotapati + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include + +#ifdef CONFIG_SOC_GECKO_DEV_INIT +#include "em_cmu.h" +#endif + +LOG_MODULE_REGISTER(efr32xg24_dk2601b, CONFIG_BOARD_EFR32MG24_LOG_LEVEL); + +static int efr32xg24_dk2601b_init_clocks(void); + +static int efr32xg24_dk2601b_init(void) +{ + int ret; + +#ifdef CONFIG_SOC_GECKO_DEV_INIT + efr32xg24_dk2601b_init_clocks(); +#endif + static struct gpio_dt_spec wake_up_gpio_dev = + GPIO_DT_SPEC_GET(DT_NODELABEL(wake_up_trigger), gpios); + + + if (!device_is_ready(wake_up_gpio_dev.port)) { + LOG_ERR("Wake-up GPIO device was not found!\n"); + return -ENODEV; + } + ret = gpio_pin_configure_dt(&wake_up_gpio_dev, GPIO_OUTPUT_ACTIVE); + if (ret < 0) + return ret; + + return 0; +} + +#ifdef CONFIG_SOC_GECKO_DEV_INIT +static int efr32xg24_dk2601b_init_clocks(void) +{ + CMU_ClockSelectSet(cmuClock_SYSCLK, cmuSelect_HFRCODPLL); +#if defined(_CMU_EM01GRPACLKCTRL_MASK) + CMU_ClockSelectSet(cmuClock_EM01GRPACLK, cmuSelect_HFRCODPLL); +#endif +#if defined(_CMU_EM01GRPBCLKCTRL_MASK) + CMU_ClockSelectSet(cmuClock_EM01GRPBCLK, cmuSelect_HFRCODPLL); +#endif + CMU_ClockSelectSet(cmuClock_EM23GRPACLK, cmuSelect_LFRCO); + CMU_ClockSelectSet(cmuClock_EM4GRPACLK, cmuSelect_LFRCO); +#if defined(RTCC_PRESENT) + CMU_ClockSelectSet(cmuClock_RTCC, cmuSelect_LFRCO); +#endif +#if defined(SYSRTC_PRESENT) + CMU_ClockSelectSet(cmuClock_SYSRTC, cmuSelect_LFRCO); +#endif + CMU_ClockSelectSet(cmuClock_WDOG0, cmuSelect_LFRCO); +#if WDOG_COUNT > 1 + CMU_ClockSelectSet(cmuClock_WDOG1, cmuSelect_LFRCO); +#endif + + return 0; +} +#endif + +/* needs to be done after GPIO driver init */ +SYS_INIT(efr32xg24_dk2601b_init, POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE); diff --git a/boards/arm/efr32xg24_dk2601b/board.cmake b/boards/arm/efr32xg24_dk2601b/board.cmake new file mode 100644 index 000000000000..a3f0cd9faea7 --- /dev/null +++ b/boards/arm/efr32xg24_dk2601b/board.cmake @@ -0,0 +1,7 @@ +# Copyright (c) 2021, Sateesh Kotapati +# +# SPDX-License-Identifier: Apache-2.0 +# + +board_runner_args(jlink "--device=EFR32MG24BxxxF1536" "--reset-after-load") +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/arm/efr32xg24_dk2601b/doc/img/efr32xg24_dk2601b.jpg b/boards/arm/efr32xg24_dk2601b/doc/img/efr32xg24_dk2601b.jpg new file mode 100644 index 000000000000..03475e7b8fab Binary files /dev/null and b/boards/arm/efr32xg24_dk2601b/doc/img/efr32xg24_dk2601b.jpg differ diff --git a/boards/arm/efr32xg24_dk2601b/doc/index.rst b/boards/arm/efr32xg24_dk2601b/doc/index.rst new file mode 100644 index 000000000000..2e6a758d49cb --- /dev/null +++ b/boards/arm/efr32xg24_dk2601b/doc/index.rst @@ -0,0 +1,154 @@ +.. _efr32mg24_dk2601b: + +xG24-DK2601B +########################### + +Overview +******** + +The EFR32MG24 Mighty Gecko Board dev kit contains +a Wireless System-On-Chip from the EFR32MG24 family built on an +ARM Cortex®-M33F processor with excellent low power capabilities. + +.. figure:: ./img/efr32xg24_dk2601b.jpg + :height: 260px + :align: center + :alt: SLWRB4180A Mighty Gecko Radio Board + + xG24-DK2601B (image courtesy of Silicon Labs) + +Hardware +******** + +- EFR32MG24B310F1536IM48-B Mighty Gecko SoC +- CPU core: ARM Cortex®-M33 with FPU +- Flash memory: 1536 kB +- RAM: 256 kB +- Transmit power: up to +20 dBm +- Operation frequency: 2.4 GHz +- Crystals for LFXO (32.768 kHz) and HFXO (38.4 MHz). + +For more information about the EFR32MG24 SoC and BRD2601B board, refer to these +documents: + +- `EFR32MG24 Website`_ +- `EFR32MG24 Datasheet`_ +- `EFR32xG24 Reference Manual`_ +- `BRD2601B User Guide`_ + +Supported Features +================== + +The board configuration supports the following hardware features: + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| MPU | on-chip | memory protection unit | ++-----------+------------+-------------------------------------+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+-------------------------------------+ +| SYSTICK | on-chip | systick | ++-----------+------------+-------------------------------------+ +| COUNTER | on-chip | stimer | ++-----------+------------+-------------------------------------+ +| FLASH | on-chip | flash memory | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+-------------------------------------+ +| UART | on-chip | serial | ++-----------+------------+-------------------------------------+ +| TRNG | on-chip | semailbox | ++-----------+------------+-------------------------------------+ +| WATCHDOG | on-chip | watchdog | ++-----------+------------+-------------------------------------+ + +Other hardware features are currently not supported by the port. + +Connections and IOs +=================== + +In the following table, the column **Name** contains Pin names. For example, PA2 +means Pin number 2 on PORTA, as used in the board's datasheets and manuals. + ++-------+-------------+-------------------------------------+ +| Name | Function | Usage | ++=======+=============+=====================================+ +| PA4 | GPIO | LED0 | ++-------+-------------+-------------------------------------+ +| PB0 | GPIO | LED1 | ++-------+-------------+-------------------------------------+ +| PB2 | GPIO | Push Button 0 | ++-------+-------------+-------------------------------------+ +| PB3 | GPIO | Push Button 1 | ++-------+-------------+-------------------------------------+ +| PA5 | USART0_TX | UART Console EFM_BC_TX US0_TX | ++-------+-------------+-------------------------------------+ +| PA6 | USART0_RX | UART Console EFM_BC_RX US0_RX | ++-------+-------------+-------------------------------------+ + +The default configuration can be found in the defconfig file: + + ``boards/arm/efr32_radio/efr32_radio_brd4186a_defconfig`` + +System Clock +============ + +The EFR32MG24 SoC is configured to use the 39 MHz external oscillator on the +board. + +Serial Port +=========== + +The EFR32MG24 SoC has one USART and two EUSARTs. +USART0 is connected to the board controller and is used for the console. + +Programming and Debugging +************************* + +.. note:: + Before using the kit the first time, you should update the J-Link firmware + from `J-Link-Downloads`_ + +Flashing +======== + +The sample application :ref:`hello_world` is used for this example. +Build the Zephyr kernel and application: + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: efr32xg24_dk2601b + :goals: build + +Connect the efr32xg24_dk2601b to your host computer using the USB port and you +should see a USB connection. + +Open a serial terminal (minicom, putty, etc.) with the following settings: + +- Speed: 115200 +- Data: 8 bits +- Parity: None +- Stop bits: 1 + +Reset the board and you'll see the following message on the corresponding serial port +terminal session: + +.. code-block:: console + + Hello World! efr32xg24_dk2601b + +.. _EFR32MG24 Website: + https://www.silabs.com/wireless/zigbee/efr32mg24-series-2-socs# + +.. _EFR32MG24 Datasheet: + https://www.silabs.com/documents/public/data-sheets/efr32mg24-datasheet.pdf + +.. _EFR32xG24 Reference Manual: + https://www.silabs.com/documents/public/reference-manuals/efr32xg24-rm.pdf + +.. _BRD2601B User Guide: + https://www.silabs.com/documents/public/user-guides/ug524-brd2601b-user-guide.pdf + +.. _J-Link-Downloads: + https://www.segger.com/downloads/jlink diff --git a/boards/arm/efr32xg24_dk2601b/dts/bindings/silabs,gecko-wake-up-trigger.yaml b/boards/arm/efr32xg24_dk2601b/dts/bindings/silabs,gecko-wake-up-trigger.yaml new file mode 100644 index 000000000000..ba8892f2ce0b --- /dev/null +++ b/boards/arm/efr32xg24_dk2601b/dts/bindings/silabs,gecko-wake-up-trigger.yaml @@ -0,0 +1,15 @@ +# Copyright (c) 2022, Antmicro +# SPDX-License-Identifier: Apache-2.0 + +description: GPIO Wake Up Trigger for EFR32MG24 + +compatible: "silabs,gecko-wake-up-trigger" + +include: base.yaml + +properties: + gpios: + type: phandle-array + required: true + description: | + GPIO used as wake up trigger from EM4 sleep diff --git a/boards/arm/efr32xg24_dk2601b/efr32xg24_dk2601b.dts b/boards/arm/efr32xg24_dk2601b/efr32xg24_dk2601b.dts new file mode 100644 index 000000000000..d0a63d2f1ee6 --- /dev/null +++ b/boards/arm/efr32xg24_dk2601b/efr32xg24_dk2601b.dts @@ -0,0 +1,133 @@ +/* + * Copyright (c) 2020 TriaGnoSys GmbH + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include + +/ { + model = "Silicon Labs BRD2601B (Mighty Gecko Radio Board)"; + compatible = "silabs,efr32mg24_brd2601b", "silabs,efr32mg24"; + + chosen { + zephyr,console = &usart0; + zephyr,shell-uart = &usart0; + zephyr,sram = &sram0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + }; + + aliases { + led0 = &red_led; + led1 = &green_led; + led2 = &blue_led; + sw0 = &button0; + sw1 = &button1; + }; + + leds { + compatible = "gpio-leds"; + red_led: led_2 { + gpios = <&gpiod GECKO_PIN(2) GPIO_ACTIVE_LOW>; + }; + green_led: led_0 { + gpios = <&gpioa GECKO_PIN(4) GPIO_ACTIVE_LOW>; + }; + blue_led: led_1 { + gpios = <&gpiob GECKO_PIN(0) GPIO_ACTIVE_LOW>; + }; + }; + + buttons { + compatible = "gpio-keys"; + button0: button_0 { + gpios = <&gpiob GECKO_PIN(2) GPIO_ACTIVE_LOW>; + }; + button1: button_1 { + gpios = <&gpiob GECKO_PIN(3) GPIO_ACTIVE_LOW>; + }; + }; + + wake_up_trigger: gpio-wake-up { + compatible = "silabs,gecko-wake-up-trigger"; + gpios = <&gpioa GECKO_PIN(5) GPIO_ACTIVE_LOW>; + }; + +}; + +&cpu0 { + clock-frequency = <78000000>; +}; + +&usart0 { + current-speed = <115200>; + pinctrl-0 = <&usart0_default>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio { + status = "okay"; +}; + +&gpioa { + status = "okay"; +}; + +&gpiob { + status = "okay"; +}; + +&gpioc { + status = "okay"; +}; + +&gpiod { + status = "okay"; +}; + +&wdog0 { + status = "okay"; +}; + +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + /* Reserve 48 kB for the bootloader */ + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x0 0x0000c000>; + read-only; + }; + + /* Reserve 464 kB for the application in slot 0 */ + slot0_partition: partition@c000 { + label = "storage"; + reg = <0x0000c000 0x00074000>; + }; + + /* Reserve 464 kB for the application in slot 1 */ + slot1_partition: partition@80000 { + label = "image-0"; + reg = <0x00080000 0x00074000>; + }; + + /* Reserve 32 kB for the scratch partition */ + scratch_partition: partition@f4000 { + label = "image-1"; + reg = <0x000f4000 0x00008000>; + }; + + /* Set 528Kb of storage at the end of the 1024Kb of flash */ + storage_partition: partition@fc000 { + label = "image-scratch"; + reg = <0x000fc000 0x00084000>; + }; + }; +}; diff --git a/boards/arm/efr32xg24_dk2601b/efr32xg24_dk2601b.yaml b/boards/arm/efr32xg24_dk2601b/efr32xg24_dk2601b.yaml new file mode 100644 index 000000000000..48743de3b97d --- /dev/null +++ b/boards/arm/efr32xg24_dk2601b/efr32xg24_dk2601b.yaml @@ -0,0 +1,18 @@ +identifier: efr32xg24_dk2601b +name: BRD4601B +type: mcu +arch: arm +ram: 256 +flash: 1536 +toolchain: + - zephyr + - gnuarmemb +supported: + - gpio + - uart +testing: + ignore_tags: + - net + - bluetooth + - pm + - hwinfo diff --git a/boards/arm/efr32xg24_dk2601b/efr32xg24_dk2601b_defconfig b/boards/arm/efr32xg24_dk2601b/efr32xg24_dk2601b_defconfig new file mode 100644 index 000000000000..08b16d347a20 --- /dev/null +++ b/boards/arm/efr32xg24_dk2601b/efr32xg24_dk2601b_defconfig @@ -0,0 +1,18 @@ +# Copyright (c) 2022 Silicon Labs +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_SOC_SERIES_EFR32MG24=y +CONFIG_BOARD_EFR32XG24_DK2601B=y +CONFIG_ARM_MPU=y +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_CORTEX_M_SYSTICK=y +CONFIG_GPIO=y +CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=76800000 +CONFIG_CMU_HFCLK_HFXO=y +CONFIG_SOC_GECKO_EMU_DCDC=y +CONFIG_SOC_GECKO_EMU_DCDC_MODE_ON=y +CONFIG_CMU_HFCLK_LFXO=y +CONFIG_HW_STACK_PROTECTION=y +CONFIG_PINCTRL=y diff --git a/boards/arm/efr32xg24_dk2601b/pre_dt_board.cmake b/boards/arm/efr32xg24_dk2601b/pre_dt_board.cmake new file mode 100644 index 000000000000..beb76b85552d --- /dev/null +++ b/boards/arm/efr32xg24_dk2601b/pre_dt_board.cmake @@ -0,0 +1,5 @@ +# Copyright (c) 2021 Linaro Limited +# SPDX-License-Identifier: Apache-2.0 + +# SPI is implemented via usart so node name isn't spi@... +list(APPEND EXTRA_DTC_FLAGS "-Wno-spi_bus_bridge") diff --git a/boards/arm/efr32xg24_dk2601b/sl_device_init_hfxo_config.h b/boards/arm/efr32xg24_dk2601b/sl_device_init_hfxo_config.h new file mode 100644 index 000000000000..7f9e211748ee --- /dev/null +++ b/boards/arm/efr32xg24_dk2601b/sl_device_init_hfxo_config.h @@ -0,0 +1,14 @@ +/* + * Copyright (c) 2023 Antmicro + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef SL_DEVICE_INIT_HFXO_CONFIG_H +#define SL_DEVICE_INIT_HFXO_CONFIG_H + +#define SL_DEVICE_INIT_HFXO_MODE cmuHfxoOscMode_Crystal +#define SL_DEVICE_INIT_HFXO_FREQ 39000000 +#define SL_DEVICE_INIT_HFXO_CTUNE 140 + +#endif /* SL_DEVICE_INIT_HFXO_CONFIG_H */ diff --git a/boards/arm/fvp_baser_aemv8r_aarch32/fvp_baser_aemv8r_aarch32_defconfig b/boards/arm/fvp_baser_aemv8r_aarch32/fvp_baser_aemv8r_aarch32_defconfig index d98d707096b6..688e341f9eef 100644 --- a/boards/arm/fvp_baser_aemv8r_aarch32/fvp_baser_aemv8r_aarch32_defconfig +++ b/boards/arm/fvp_baser_aemv8r_aarch32/fvp_baser_aemv8r_aarch32_defconfig @@ -23,3 +23,5 @@ CONFIG_UART_INTERRUPT_DRIVEN=y # Enable console CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y + +CONFIG_CACHE_MANAGEMENT=y diff --git a/boards/arm/gd32e103v_eval/gd32e103v_eval.yaml b/boards/arm/gd32e103v_eval/gd32e103v_eval.yaml index e52c8c18d39c..3e3a89759b8f 100644 --- a/boards/arm/gd32e103v_eval/gd32e103v_eval.yaml +++ b/boards/arm/gd32e103v_eval/gd32e103v_eval.yaml @@ -12,6 +12,7 @@ toolchain: - gnuarmemb - xtools supported: + - dac - counter - watchdog - dma diff --git a/boards/arm/gd32f450i_eval/gd32f450i_eval.yaml b/boards/arm/gd32f450i_eval/gd32f450i_eval.yaml index cc57e516be88..a54cc4d59d8f 100644 --- a/boards/arm/gd32f450i_eval/gd32f450i_eval.yaml +++ b/boards/arm/gd32f450i_eval/gd32f450i_eval.yaml @@ -12,6 +12,7 @@ toolchain: - gnuarmemb - xtools supported: + - dac - pwm - watchdog - counter diff --git a/boards/arm/gd32f470i_eval/gd32f470i_eval.dts b/boards/arm/gd32f470i_eval/gd32f470i_eval.dts index 90d2162695bb..690de4e8765d 100644 --- a/boards/arm/gd32f470i_eval/gd32f470i_eval.dts +++ b/boards/arm/gd32f470i_eval/gd32f470i_eval.dts @@ -96,6 +96,10 @@ status = "okay"; }; +&gpioi { + status = "okay"; +}; + &usart0 { status = "okay"; current-speed = <115200>; @@ -139,7 +143,7 @@ status = "okay"; pinctrl-0 = <&spi5_default>; pinctrl-names = "default"; - cs-gpios = <&gpiog 9 GPIO_ACTIVE_LOW>; + cs-gpios = <&gpioi 8 GPIO_ACTIVE_LOW>; nor_flash: gd25q16@0 { compatible ="jedec,spi-nor"; diff --git a/boards/arm/lpcxpresso55s16/lpcxpresso55s16.dts b/boards/arm/lpcxpresso55s16/lpcxpresso55s16.dts index 06811165241d..f8646b24f59f 100644 --- a/boards/arm/lpcxpresso55s16/lpcxpresso55s16.dts +++ b/boards/arm/lpcxpresso55s16/lpcxpresso55s16.dts @@ -13,3 +13,7 @@ model = "NXP LPCXpresso55S16 board"; compatible = "nxp,lpc55xxx", "nxp,lpc"; }; + +zephyr_udc0: &usbhs { + status = "okay"; +}; diff --git a/boards/arm/lpcxpresso55s16/lpcxpresso55s16.yaml b/boards/arm/lpcxpresso55s16/lpcxpresso55s16.yaml index 660911e650ef..8f3d0e47acc5 100644 --- a/boards/arm/lpcxpresso55s16/lpcxpresso55s16.yaml +++ b/boards/arm/lpcxpresso55s16/lpcxpresso55s16.yaml @@ -22,3 +22,4 @@ supported: - gpio - i2c - spi + - usb_device diff --git a/boards/arm/lpcxpresso55s36/doc/index.rst b/boards/arm/lpcxpresso55s36/doc/index.rst index 01bade69d253..8e9e358fb07c 100644 --- a/boards/arm/lpcxpresso55s36/doc/index.rst +++ b/boards/arm/lpcxpresso55s36/doc/index.rst @@ -133,7 +133,10 @@ the functionality of a pin. +---------+-----------------+----------------------------+ | PIO0_31 | FLEXPPWM1_PWM2_B| pwm | +---------+-----------------+----------------------------+ - +| PIO1_2 | CAN0_TXD | CAN TX | ++---------+-----------------+----------------------------+ +| PIO1_3 | CAN0_RXD | CAN RX | ++---------+-----------------+----------------------------+ System Clock ============ diff --git a/boards/arm/lpcxpresso55s36/lpcxpresso55s36-pinctrl.dtsi b/boards/arm/lpcxpresso55s36/lpcxpresso55s36-pinctrl.dtsi index 70fda8db17e2..56787b9bfaf2 100644 --- a/boards/arm/lpcxpresso55s36/lpcxpresso55s36-pinctrl.dtsi +++ b/boards/arm/lpcxpresso55s36/lpcxpresso55s36-pinctrl.dtsi @@ -39,6 +39,14 @@ }; }; + pinmux_lpadc0: pinmux_lpadc0 { + group0 { + pinmux = ; + slew-rate = "standard"; + nxp,analog-mode; + }; + }; + /* Configures pin routing and optionally pin electrical features. */ pinmux_sctimer_default: pinmux_sctimer_default { group0 { diff --git a/boards/arm/lpcxpresso55s36/lpcxpresso55s36.dts b/boards/arm/lpcxpresso55s36/lpcxpresso55s36.dts index 1e1b90583652..e64f89bf6905 100644 --- a/boards/arm/lpcxpresso55s36/lpcxpresso55s36.dts +++ b/boards/arm/lpcxpresso55s36/lpcxpresso55s36.dts @@ -127,7 +127,17 @@ bus-speed-data = <1000000>; pinctrl-0 = <&pinmux_mcan_can0>; pinctrl-names = "default"; - status = "ok"; + status = "okay"; + + can-transceiver { + max-bitrate = <5000000>; + }; +}; + +&adc0 { + status = "okay"; + pinctrl-0 = <&pinmux_lpadc0>; + pinctrl-names = "default"; }; &flash0 { diff --git a/boards/arm/lpcxpresso55s36/lpcxpresso55s36.yaml b/boards/arm/lpcxpresso55s36/lpcxpresso55s36.yaml index f66d0fdb4695..823e4d3aeab0 100644 --- a/boards/arm/lpcxpresso55s36/lpcxpresso55s36.yaml +++ b/boards/arm/lpcxpresso55s36/lpcxpresso55s36.yaml @@ -15,5 +15,6 @@ toolchain: - gnuarmemb - xtools supported: + - can - gpio - pwm diff --git a/boards/arm/lpcxpresso55s69/lpcxpresso55s69-pinctrl.dtsi b/boards/arm/lpcxpresso55s69/lpcxpresso55s69-pinctrl.dtsi index 1eea01b5e248..bb8c82053c8e 100644 --- a/boards/arm/lpcxpresso55s69/lpcxpresso55s69-pinctrl.dtsi +++ b/boards/arm/lpcxpresso55s69/lpcxpresso55s69-pinctrl.dtsi @@ -67,8 +67,9 @@ pinmux_lpadc0: pinmux_lpadc0 { group0 { pinmux = , - , - ; + , + , + ; slew-rate = "standard"; nxp,analog-mode; }; diff --git a/boards/arm/lpcxpresso55s69/pinmux.c b/boards/arm/lpcxpresso55s69/pinmux.c index ff22460a8325..36095b2a923a 100644 --- a/boards/arm/lpcxpresso55s69/pinmux.c +++ b/boards/arm/lpcxpresso55s69/pinmux.c @@ -9,9 +9,8 @@ #include #include -static int lpcxpresso_55s69_pinmux_init(const struct device *dev) +static int lpcxpresso_55s69_pinmux_init(void) { - ARG_UNUSED(dev); #if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm6), nxp_lpc_i2s, okay)) && \ (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm7), nxp_lpc_i2s, okay)) && \ diff --git a/boards/arm/mec1501modular_assy6885/mec1501modular_assy6885.dts b/boards/arm/mec1501modular_assy6885/mec1501modular_assy6885.dts index c368141c5a9c..5b66d1a2bd2d 100644 --- a/boards/arm/mec1501modular_assy6885/mec1501modular_assy6885.dts +++ b/boards/arm/mec1501modular_assy6885/mec1501modular_assy6885.dts @@ -149,7 +149,8 @@ &peci0 { status = "okay"; pinctrl-0 = <&peci_dat_gpio042 &vref_vtt_gpio044>; - pinctrl-names = "default"; + pinctrl-1 = <&peci_dat_gpio042_sleep &vref_vtt_gpio044_sleep>; + pinctrl-names = "default", "sleep"; }; &tach0 { diff --git a/boards/arm/mec15xxevb_assy6853/mec15xxevb_assy6853.dts b/boards/arm/mec15xxevb_assy6853/mec15xxevb_assy6853.dts index ebbd47e69007..fbbb1ac5a327 100644 --- a/boards/arm/mec15xxevb_assy6853/mec15xxevb_assy6853.dts +++ b/boards/arm/mec15xxevb_assy6853/mec15xxevb_assy6853.dts @@ -206,7 +206,8 @@ &peci0 { status = "okay"; pinctrl-0 = <&peci_dat_gpio042 &vref_vtt_gpio044>; - pinctrl-names = "default"; + pinctrl-1 = <&peci_dat_gpio042_sleep &vref_vtt_gpio044_sleep>; + pinctrl-names = "default", "sleep"; }; &spi0 { diff --git a/boards/arm/mec172xevb_assy6906/board.cmake b/boards/arm/mec172xevb_assy6906/board.cmake index 037885253147..840168650d46 100644 --- a/boards/arm/mec172xevb_assy6906/board.cmake +++ b/boards/arm/mec172xevb_assy6906/board.cmake @@ -9,3 +9,6 @@ board_finalize_runner_args(dediprog "--spi-image=${PROJECT_BINARY_DIR}/${SPI_IMAGE_NAME}" "--vcc=0" ) + +# This allows a custom script to be used for flashing the SPI chip. +include(${ZEPHYR_BASE}/boards/common/misc.board.cmake) diff --git a/boards/arm/mec172xevb_assy6906/mec172xevb_assy6906.dts b/boards/arm/mec172xevb_assy6906/mec172xevb_assy6906.dts index b8f4d2648126..104c01707406 100644 --- a/boards/arm/mec172xevb_assy6906/mec172xevb_assy6906.dts +++ b/boards/arm/mec172xevb_assy6906/mec172xevb_assy6906.dts @@ -212,7 +212,6 @@ clock-frequency = <4000000>; lines = <4>; chip-select = <0>; - port-sel = <0>; /* Shared SPI */ pinctrl-0 = < &shd_cs0_n_gpio055 &shd_clk_gpio056 diff --git a/boards/arm/mec172xevb_assy6906/support/mec172x_remote_flasher.py b/boards/arm/mec172xevb_assy6906/support/mec172x_remote_flasher.py new file mode 100755 index 000000000000..14482fd093f1 --- /dev/null +++ b/boards/arm/mec172xevb_assy6906/support/mec172x_remote_flasher.py @@ -0,0 +1,180 @@ +#!/usr/bin/env python3 +# +# Copyright (c) 2023 Intel Corporation +# +# SPDX-License-Identifier: Apache-2.0 + +''' +This script allows flashing a mec172xevb_assy6906 board +attached to a remote system. + +Usage: + west flash -r misc-flasher -- mec172x_remote_flasher.py + +Note: +1. SSH access to remote host with write access to remote /tmp. + Since the script does multiple SSH connections, it is a good idea + to setup public key authentication and ssh-agent. +2. Dediprog "dpcmd" available in path on remote host. + (Can be compiled from https://github.com/DediProgSW/SF100Linux) +3. SSH user must have permission to access USB devices, + since dpcmd needs USB access to communicate with + the Dediprog programmer attached to remote host. + +To use with twister, a hardware map file is needed. +Here is a sample map file: + + - connected: true + available: true + id: mec172xevb_assy6906 + platform: mec172xevb_assy6906 + product: mec172xevb_assy6906 + runner: misc-flasher + runner_params: + - /boards/arm/mec172xevb_assy6906/support/mec172x_remote_flasher.py + - + serial_pty: "nc,," + +The sample map file assumes the serial console is exposed via ser2net, +and that it can be accessed using nc (netcat). + +To use twister: + ./scripts/twister --hardware-map --device-testing + +Required: +* Fabric (https://www.fabfile.org/) +''' + +import argparse +import hashlib +import pathlib +import sys + +from datetime import datetime + +import fabric +from invoke.exceptions import UnexpectedExit + +def calc_sha256(spi_file): + ''' + Calculate a SHA256 of the SPI binary content plus current + date string. + + This is used for remote file name to avoid file name + collision. + ''' + sha256 = hashlib.sha256() + + # Use SPI file content to calculate SHA. + with open(spi_file, "rb") as fbin: + spi_data = fbin.read() + sha256.update(spi_data) + + # Add a date/time to SHA to hopefully + # further avoid file name collision. + now = datetime.now().isoformat() + sha256.update(now.encode("utf-8")) + + return sha256.hexdigest() + +def parse_args(): + ''' + Parse command line arguments. + ''' + parser = argparse.ArgumentParser(allow_abbrev=False) + + # Fixed arguments + parser.add_argument("build_dir", + help="Build directory") + parser.add_argument("remote_host", + help="Remote host name or IP address") + + # Arguments about remote machine + remote = parser.add_argument_group("Remote Machine") + remote.add_argument("--remote-tmp", required=False, + help="Remote temporary directory to store SPI binary " + "[default=/tmp for Linux remote]") + remote.add_argument("--dpcmd", required=False, default="dpcmd", + help="Full path to dpcmd on remote machine") + + # Remote machine type. + # This affects how remote path is constructed. + remote_type = remote.add_mutually_exclusive_group() + remote_type.add_argument("--remote-is-linux", required=False, + default=True, action="store_true", + help="Set if remote machine is a Linux-like machine [default]") + remote_type.add_argument("--remote-is-win", required=False, + action="store_true", + help="Set if remote machine is a Windows machine") + + return parser.parse_args() + +def main(): + ''' + Main + ''' + args = parse_args() + + # Check for valid arguments and setup variables. + if not args.remote_tmp: + if args.remote_is_win: + # Do not assume a default temporary on Windows, + # as it is usually under user's directory and + # we do not know enough to construct a valid path + # at this time. + print("[ERROR] --remote-tmp is required for --remote-is-win") + sys.exit(1) + + if args.remote_is_linux: + remote_tmp = pathlib.PurePosixPath("/tmp") + else: + if args.remote_is_win: + remote_tmp = pathlib.PureWindowsPath(args.remote_tmp) + elif args.remote_is_linux: + remote_tmp = pathlib.PurePosixPath(args.remote_tmp) + + # Construct full path to SPI binary. + spi_file_path = pathlib.Path(args.build_dir) + spi_file_path = spi_file_path.joinpath("zephyr", "spi_image.bin") + + # Calculate a sha256 digest for SPI file. + # This is used for remote file to avoid file name collision + # if there are multiple MEC17x attached to remote machine + # and all are trying to flash at same time. + sha256 = calc_sha256(spi_file_path) + + # Construct full path on remote to store + # the transferred SPI binary. + remote_file_name = remote_tmp.joinpath(f"mec172x_{sha256}.bin") + + print(f"[INFO] Build directory: {args.build_dir}") + print(f"[INFO] Remote host: {args.remote_host}") + + # Connect to remote host via SSH. + ssh = fabric.Connection(args.remote_host, forward_agent=True) + + print("[INFO] Sending file...") + print(f"[INFO] Local SPI file: {spi_file_path}") + print(f"[INFO] Remote SPI file: {remote_file_name}") + + # Open SFTP channel, and send the SPI binary over. + sftp = ssh.sftp() + sftp.put(str(spi_file_path), str(remote_file_name)) + + # Run dpcmd to flash the device. + try: + dpcmd_cmd = f"{args.dpcmd} --auto {str(remote_file_name)} --verify" + print(f"[INFO] Invoking: {dpcmd_cmd}...") + ssh.run(dpcmd_cmd) + except UnexpectedExit: + print("[ERR ] Cannot flashing SPI binary!") + + # Remove temporary file. + print(f"[INFO] Removing remote file {remote_file_name}") + sftp.remove(str(remote_file_name)) + + sftp.close() + ssh.close() + +if __name__ == "__main__": + main() diff --git a/boards/arm/mec172xmodular_assy6930/doc/mec172xmodular_assy6930.rst b/boards/arm/mec172xmodular_assy6930/doc/mec172xmodular_assy6930.rst index e8b9225c6d61..457cb85edaa0 100644 --- a/boards/arm/mec172xmodular_assy6930/doc/mec172xmodular_assy6930.rst +++ b/boards/arm/mec172xmodular_assy6930/doc/mec172xmodular_assy6930.rst @@ -1,7 +1,7 @@ .. _mec172xmodular_6930: Microchip MEC172x Modular Card ASSY6930 (Rev. B) -#########3333333333############################# +################################################ Overview ******** diff --git a/boards/arm/mec2016evb_assy6797/pinmux.c b/boards/arm/mec2016evb_assy6797/pinmux.c index d45e77b6d234..d4b1be5c9f5c 100644 --- a/boards/arm/mec2016evb_assy6797/pinmux.c +++ b/boards/arm/mec2016evb_assy6797/pinmux.c @@ -10,9 +10,8 @@ #include "soc.h" -static int board_pinmux_init(const struct device *dev) +static int board_pinmux_init(void) { - ARG_UNUSED(dev); /* See table 2-4 from the Data sheet*/ #if DT_NODE_HAS_STATUS(DT_NODELABEL(uart0), okay) diff --git a/boards/arm/mercury_xu/board.c b/boards/arm/mercury_xu/board.c index 214f731db962..8204b29ae905 100644 --- a/boards/arm/mercury_xu/board.c +++ b/boards/arm/mercury_xu/board.c @@ -14,7 +14,7 @@ #define MIO_DEFAULT 0x0 #define MIO_UART0 0xc0 -static int mercury_xu_init(const struct device *port) +static int mercury_xu_init(void) { /* pinmux settings for uart */ sys_write32(MIO_UART0, MIO_PIN_38); @@ -24,7 +24,6 @@ static int mercury_xu_init(const struct device *port) sys_write32(MIO_DEFAULT, MIO_PIN_18); sys_write32(MIO_DEFAULT, MIO_PIN_19); - ARG_UNUSED(port); return 0; } diff --git a/boards/arm/mimx8mm_phyboard_polis/Kconfig.board b/boards/arm/mimx8mm_phyboard_polis/Kconfig.board new file mode 100644 index 000000000000..c7079f5d912a --- /dev/null +++ b/boards/arm/mimx8mm_phyboard_polis/Kconfig.board @@ -0,0 +1,9 @@ +# MIMX8MM_PHYBOARD_POLIS board configuration + +# Copyright (c) 2022 PHYTEC Messtechnik GmbH +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_MIMX8MM_PHYBOARD_POLIS + bool "Phytec Phyboard Polis i.MX8M Mini" + depends on SOC_SERIES_IMX8MM_M4 + select SOC_PART_NUMBER_MIMX8MM6DVTLZ diff --git a/boards/arm/mimx8mm_phyboard_polis/Kconfig.defconfig b/boards/arm/mimx8mm_phyboard_polis/Kconfig.defconfig new file mode 100644 index 000000000000..1e0191ff7ba4 --- /dev/null +++ b/boards/arm/mimx8mm_phyboard_polis/Kconfig.defconfig @@ -0,0 +1,18 @@ +# MIMX8MM_PHYBOARD_POLIS board defconfig +# +# Copyright (c) 2022 PHYTEC Messtechnik GmbH +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_MIMX8MM_PHYBOARD_POLIS + +config BOARD + default "mimx8mm_phyboard_polis" + +if !XIP +config FLASH_SIZE + default 0 +config FLASH_BASE_ADDRESS + default 0 +endif + +endif # BOARD_MIMX8MM_PHYBOARD_POLIS diff --git a/boards/arm/mimx8mm_phyboard_polis/board.cmake b/boards/arm/mimx8mm_phyboard_polis/board.cmake new file mode 100644 index 000000000000..3b202648575d --- /dev/null +++ b/boards/arm/mimx8mm_phyboard_polis/board.cmake @@ -0,0 +1,11 @@ +# +# Copyright (c) 2020, NXP +# +# SPDX-License-Identifier: Apache-2.0 +# + +board_set_debugger_ifnset(jlink) +board_set_flasher_ifnset(jlink) + +board_runner_args(jlink "--device=MIMX8MD6_M4") +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/arm/mimx8mm_phyboard_polis/doc/img/PEB-EVAL-01.jpg b/boards/arm/mimx8mm_phyboard_polis/doc/img/PEB-EVAL-01.jpg new file mode 100644 index 000000000000..493fb89cb954 Binary files /dev/null and b/boards/arm/mimx8mm_phyboard_polis/doc/img/PEB-EVAL-01.jpg differ diff --git a/boards/arm/mimx8mm_phyboard_polis/doc/img/phyBOARD-Polis.jpg b/boards/arm/mimx8mm_phyboard_polis/doc/img/phyBOARD-Polis.jpg new file mode 100644 index 000000000000..b95bb1279747 Binary files /dev/null and b/boards/arm/mimx8mm_phyboard_polis/doc/img/phyBOARD-Polis.jpg differ diff --git a/boards/arm/mimx8mm_phyboard_polis/doc/index.rst b/boards/arm/mimx8mm_phyboard_polis/doc/index.rst new file mode 100644 index 000000000000..3d44ddcc87a8 --- /dev/null +++ b/boards/arm/mimx8mm_phyboard_polis/doc/index.rst @@ -0,0 +1,342 @@ +.. _mimx8mm_phyboard_polis: + +PhyBOARD Polis (NXP i.MX8M Mini) +################################ + +Overview +******** + +The phyBOARD-Polis, either a development platform for the +phyCORE-i.MX 8M Mini/Nano, or a powerful, industry-compatible single-board +computer for immediate implementation of your product idea. As a development +platform, the phyBOARD-Polis serves as reference design for your +customer-specific application and enables parallel development of the software +and carrier board for the phyCORE-i.MX 8M Mini/Nano. + + +As a powerful, industrial single-board computer (SBC), the phyBOARD-Polis is +equipped with a variety of standard interfaces which are available on standard +or socket/pin header connectors, while interesting extensions of the +phyCORE-i.MX 8M Mini/Nano features such as CAN FD, WLAN and an integrated +TPM chip further extend the range of applications that can be developed with +the phyCORE-i.MX 8M Mini/Nano. + +- Board features: + + - RAM: 512MB - 4GB (LPDDR4) + - Storage: + + - 4GB - 128GB eMMC + - 8MB - 128MB SPI NOR Flash + - microSD Interfacce + - 4kB EEPROM + - Wireless: + + - WiFi: 802.11 b/g/n (ac) 2,4 GHz / 5 GHz + - BLE 4.2 + - USB: + + - 1x USB2.0 OTG + - 1x USB2.0 + - Ethernet: 1x 10/100/1000BASE-T + - Interfaces: + - 1x RS232 / RS485 + - 2x UART + - 3x I²C + - 2x SPI + - Up to 4x PWM + - 4x SAI + - 1x MIPI CSI-2 + - 1x MIPI DSI-2 + - 2x MMC/SD/SDIO + - 1x PCIe (mini PCIE) + - LEDs: + + - 1x Status LED (3 Color LED) + - 1x Debug UART LED + - Debug + + - JTAG 20-pin connector + - MicroUSB for UART debug, two COM ports for A53 and M4 + +.. image:: img/phyBOARD-Polis.jpg + :align: center + :alt: PhyBOARD Polis + :width: 500 + +More information about the board can be found at the +`PHYTEC website`_. + +Supported Features +================== + +The Zephyr mimx8mm_phyboard_polis board configuration supports the following +hardware features: + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+-------------------------------------+ +| SYSTICK | on-chip | systick | ++-----------+------------+-------------------------------------+ +| CLOCK | on-chip | clock_control | ++-----------+------------+-------------------------------------+ +| PINMUX | on-chip | pinmux | ++-----------+------------+-------------------------------------+ +| UART | on-chip | serial port-polling; | +| | | serial port-interrupt | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | GPIO output | +| | | GPIO input | ++-----------+------------+-------------------------------------+ + +The default configuration can be found in the defconfig file: +:zephyr_file:`boards/arm/mimx8mm_phyboard_polis/mimx8mm_phyboard_polis_defconfig`. + +It is recommended to disable peripherals used by the M4 core on the Linux host. + +Other hardware features are not currently supported with Zephyr on the +M4-Core. + +Connections and IOs +=================== + +The following components are tested and working correctly. + +UART: +----- + +Zephyr is configured to use UART4 on the PhyBoard Polis by default to minimize +problems with the A53-Core because UART4 is only accessible from the M4-Core. + ++---------------+-----------------+-----------------------------------+ +| Board Name | SoM Name | Usage | ++===============+=================+===================================+ +| RS232/485 | UART1 | RS232 / RS485 with flow-control | ++---------------+-----------------+-----------------------------------+ +| To WiFi Module| UART2 | UART to WiFi/BLE Module | ++---------------+-----------------+-----------------------------------+ +| Debug USB(A53)| UART3 | UART Debug Console via USB | ++---------------+-----------------+-----------------------------------+ +| Debug USB(M4) | UART4 | UART Debug Console via USB | ++---------------+-----------------+-----------------------------------+ + +.. note:: + Please note, that the to UART2 connected Wifi/BLE Module isn't working with + Zephyr yet. + +.. warning:: + On Boards with the version number 1532.1 UART4 isn't connected to the Debug + USB. UART4 connects to pin 10(RX) and 12(TX) on the X8 pinheader. + + +LEDs: +----- + +Zephyr has the 3-color status LED configured. The led0 alias (the standard +Zephyr led) is configured to be the blue led. The LED can also light up in red +and green. + +GPIO: +----- + +The pinmuxing for the GPIOs is the standard pinmuxing of the mimx8mm devicetree +created by NXP. You can find it here: + +:zephyr_file:`dts/arm/nxp/nxp_imx8m_m4.dtsi`. + +The Pinout of the PhyBOARD Polis can be found here: + +`PHYTEC website`_ + +System Clock +============ + +The M4 Core is configured to run at a 400 MHz clock speed. + + +Programming and Debugging +************************* + +The i.MX8MM does not have a separate flash for the M4-Core. Because of this +the A53-Core has to load the program for the M4-Core to the right memory +address, set the PC and start the processor. +This can be done with U-Boot or Phytec's Linux BSP via remoteproc. + +Because remoteproc in Phytec's BSP only writes to the TCM memory area, +everything was tested in this memory area. + +You can read more about remoteproc in Phytec's BSP here: `Remoteproc BSP`_ + +These are the memory mapping for A53 and M4: + ++------------+-------------------------+------------------------+-----------------------+----------------------+ +| Region | Cortex-A53 | Cortex-M4 (System Bus) | Cortex-M4 (Code Bus) | Size | ++============+=========================+========================+=======================+======================+ +| OCRAM | 0x00900000-0x0093FFFF | 0x20200000-0x2023FFFF | 0x00900000-0x0093FFFF | 256KB | ++------------+-------------------------+------------------------+-----------------------+----------------------+ +| TCMU | 0x00800000-0x0081FFFF | 0x20000000-0x2001FFFF | | 128KB | ++------------+-------------------------+------------------------+-----------------------+----------------------+ +| TCML | 0x007E0000-0x007FFFFF | | 0x1FFE0000-0x1FFFFFFF | 128KB | ++------------+-------------------------+------------------------+-----------------------+----------------------+ +| OCRAM_S | 0x00180000-0x00187FFF | 0x20180000-0x20187FFF | 0x00180000-0x00187FFF | 32KB | ++------------+-------------------------+------------------------+-----------------------+----------------------+ + +For more information about memory mapping see the +`i.MX 8M Applications Processor Reference Manual`_ (section 2.1.2 and 2.1.3) + +At compilation time you have to choose which RAM will be used. This +configuration is done in the file ``boards/arm/mimx8mm_evk/mimx8mm_evk.dts`` +with "zephyr,flash" (when CONFIG_XIP=y) and "zephyr,sram" properties. +The available configurations are: + +If you don't want to use the TCM memory area, you can either overwrite the +boards devicetree in your program or edit the board devicetree located here: + +:zephyr_file:`boards/arm/mimx8mm_phyboard_polis/mimx8mm_phyboard_polis.dts` + +You also have to set XIP=n or edit the boards defconfig file, if you don't want +the TCM memory area to be used. You can find the defconf file here: + +:zephyr_file:`boards/arm/mimx8mm_phyboard_polis/mimx8mm_phyboard_polis_defconfig`. + +The following configurations are possible for the flash and sram chosen nodes +to change the used memory area: + +.. code-block:: none + + "zephyr,flash" + - &tcml_code + - &ocram_code + - &ocram_s_code + + "zephyr,sram" + - &tcmu_sys + - &ocram_sys + - &ocram_s_sys + + +Starting the M4-Core via U-Boot +=============================== + +Load the compiled zephyr.bin to memory address 0x4800000. +This should output something like this: + +.. code-block:: console + + u-boot=> tftp 0x48000000 192.168.3.10:zyphr.bin + Using ethernet@30be0000 device + TFTP from server 192.168.3.10; our IP address is 192.168.3.11 + Filename 'zepyhr.bin'. + Load address: 0x48000000 + Loading: ## + 2 KiB/s + done + Bytes transferred = 27240 (6a68 hex) + +Because it's not possible to load directly to the TCM memory area you have to +copy the binaries. The last argument given is the size of the file in bytes, +you can copy it from the output of the last command. + +.. code-block:: console + + u-boot=> cp.b 0x48000000 0x7e0000 27240 + +And finaly starting the M4-Core at the right memory address: + +.. code-block:: console + + u-boot=> bootaux 0x7e0000 + ## Starting auxiliary core stack = 0x20003A58, pc = 0x1FFE1905... + + +Starting the M4-Core via remoteproc +=================================== + +Copy the zepyhr.elf to ``/lib/firmware`` on the target. Maybe a Zephyr sample +will be included in a future BSP release. + +.. note:: + In order to use remoteproc you have to add ``imx8mm-phycore-rpmsg.dtbo`` at + the end of the line in the ``/boot/bootenv.txt``, then reboot the target. + +.. warning:: + Remoteproc only reads firmware files from the ``/lib/firmware`` directory! + If you try to load a binary from another location unexpected errors will + occur! + +To load and start a firmware use this commands: + +.. code-block:: console + + target$ echo /lib/firmware/zepyhr.elf > /sys/class/remoteproc/remoteproc0/firmware + target$ echo start > /sys/class/remoteproc/remoteproc0/state + [ 90.700611] remoteproc remoteproc0: powering up imx-rproc + [ 90.706114] remoteproc remoteproc0: Direct firmware load for /lib/firmware/zepyhr.elf failed w2 + [ 90.716571] remoteproc remoteproc0: Falling back to sysfs fallback for: /lib/firmware/zepyhr.elf + [ 90.739280] remoteproc remoteproc0: Booting fw image /lib/firmware/zepyhr.elf, size 599356 + [ 90.804448] remoteproc remoteproc0: remote processor imx-rproc is now up + + +The M4-Core is now started up and running. You can see the output from Zephyr +on UART4. + +Debugging +========= + +The PhyBOARD Polis can be debugged using a JTAG Debugger. +The easiest way to do that is to use a SEGGER JLink Debugger and Phytec's +``PEB-EVAL-01`` Shield, which can be directly connected to the JLink. +You can find the JLink Software package here: `JLink Software`_ + +.. figure:: img/PEB-EVAL-01.jpg + :alt: PEB-EVAL-01 + :width: 350 + + PEB-EVAL-01 + +To debug efficiently you should use multiple terminals: + +(But its also possible to use ``west debug``) + +After connecting everything and building with west use this command while in +the directory of the program you build earlier to start a debug server: + +.. code-block:: console + + host$ west debugserver + +West automatically connects via the JLink to the Target. And keeps open a +debug server. + +Use another terminal, start gdb, connect to target and load Zephyr on the +target: + +.. code-block:: console + + host$ gdb-multiarch build/zephyr/zephyr.elf -tui + (gdb) targ rem :2331 + Remote debugging using :2331 + 0x1ffe0008 in _vector_table () + (gdb) mon halt + (gdb) mon reset + (gdb) c + Continuing. + +The program can be debugged using standard gdb techniques. + +.. _PHYTEC website: + https://www.phytec.de/produkte/single-board-computer/phyboard-polis-imx8m-mini/ + +.. _PhyBOARD Polis pinout: + https://download.phytec.de/Products/phyBOARD-Polis-iMX8M_Mini/TechData/phyCORE-i.MX8M_MINI_Pin_Muxing_Table.A1.xlsx?_ga=2.237582016.1177557183.1660563641-1900651135.1634193918 + +.. _Remoteproc BSP: + https://wiki.phytec.com/pages/releaseview.action?pageId=472257137#L1002e.A3i.MX8MMini/NanoBSPManual-RunningExamplesfromLinuxusingRemoteproc + +.. _i.MX 8M Applications Processor Reference Manual: + https://www.nxp.com/webapp/Download?colCode=IMX8MMRM + +.. _JLink Software: + https://www.segger.com/downloads/jlink/ diff --git a/boards/arm/mimx8mm_phyboard_polis/mimx8mm_phyboard_polis-pinctrl.dtsi b/boards/arm/mimx8mm_phyboard_polis/mimx8mm_phyboard_polis-pinctrl.dtsi new file mode 100644 index 000000000000..91efe29d219c --- /dev/null +++ b/boards/arm/mimx8mm_phyboard_polis/mimx8mm_phyboard_polis-pinctrl.dtsi @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2022 PHYTEC Messtechnik GmbH + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +&pinctrl { + uart4_default: uart4_default { + group0 { + pinmux = <&iomuxc_uart4_rxd_uart_rx_uart4_rx>, + <&iomuxc_uart4_txd_uart_tx_uart4_tx>; + slew-rate = "fast"; + drive-strength = "40-ohm"; + }; + }; + + uart3_default: uart3_default { + group0 { + pinmux = <&iomuxc_uart3_rxd_uart_rx_uart3_rx>, + <&iomuxc_uart3_txd_uart_tx_uart3_tx>; + slew-rate = "fast"; + drive-strength = "40-ohm"; + }; + }; + + uart2_default: uart2_default { + group0 { + pinmux = <&iomuxc_sai3_rxd_uart_cts_b_uart2_rts_b>, + <&iomuxc_sai3_rxd_uart_rts_b_uart2_rts_b>, + <&iomuxc_sai3_txfs_uart_tx_uart2_rx>, + <&iomuxc_sai3_txc_uart_rx_uart2_tx>; + slew-rate = "fast"; + drive-strength = "40-ohm"; + }; + }; + + uart1_default: uart1_default { + group0 { + pinmux = <&iomuxc_sai2_rxfs_uart_rx_uart1_tx>, + <&iomuxc_sai2_rxc_uart_rx_uart1_rx>, + <&iomuxc_sai2_rxd0_uart_rts_b_uart1_rts_b>, + <&iomuxc_sai2_txfs_uart_cts_b_uart1_cts_b>; + slew-rate = "fast"; + drive-strength = "40-ohm"; + }; + }; +}; diff --git a/boards/arm/mimx8mm_phyboard_polis/mimx8mm_phyboard_polis.dts b/boards/arm/mimx8mm_phyboard_polis/mimx8mm_phyboard_polis.dts new file mode 100644 index 000000000000..43879d81e252 --- /dev/null +++ b/boards/arm/mimx8mm_phyboard_polis/mimx8mm_phyboard_polis.dts @@ -0,0 +1,93 @@ +/* + * Copyright (c) 2022 PHYTEC Messtechnik GmbH + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "mimx8mm_phyboard_polis-pinctrl.dtsi" + +/ { + model = "Phyboard Polis NXP i.MX8M Mini"; + compatible = "nxp,mimx8mm_phyboard_polis"; + + aliases { + uart-4 = &uart4; + uart-3 = &uart3; + uart-2 = &uart2; + uart-1 = &uart1; + led0 = &led_blue; + }; + + chosen { + zephyr,flash = &tcml_code; + zephyr,sram = &tcmu_sys; + zephyr,console = &uart4; + zephyr,shell-uart = &uart4; + }; + + leds { + compatible = "gpio-leds"; + + led_red: led_red { + gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; + }; + + led_blue: led_blue { + gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>; + }; + + led_green: led_green { + gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; + }; + }; + +}; + +/* RS232 / RS485 pinheader on the board */ +&uart1 { + status = "disabled"; + pinctrl-0 = <&uart1_default>; + pinctrl-names = "default"; + hw-flow-control; +}; + +/* + * UART to bluetooth module / X18 header + * Currently there is no driver for the used module + */ +&uart2 { + status = "disabled"; + pinctrl-0 = <&uart2_default>; + pinctrl-names = "default"; + hw-flow-control; +}; + +/* UART usually used from A53 Core (1st tty on Debug USB connector */ +&uart3 { + status = "disabled"; + pinctrl-0 = <&uart3_default>; + pinctrl-names = "default"; +}; + +/* UART of the M4 Core (2nd tty on Debug USB connector) */ +&uart4 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart4_default>; + pinctrl-names = "default"; +}; + +/* + * needs to be configured, so the leds don't generate an error, + * but does not interfer with the A53-Core + */ +&gpio1 { + status = "okay"; +}; + +&mailbox0 { + status = "okay"; +}; diff --git a/boards/arm/mimx8mm_phyboard_polis/mimx8mm_phyboard_polis.yaml b/boards/arm/mimx8mm_phyboard_polis/mimx8mm_phyboard_polis.yaml new file mode 100644 index 000000000000..02118d9bda4d --- /dev/null +++ b/boards/arm/mimx8mm_phyboard_polis/mimx8mm_phyboard_polis.yaml @@ -0,0 +1,20 @@ +# +# Copyright (c) 2020 PHYTEC Messtechnik GmbH +# +# SPDX-License-Identifier: Apache-2.0 +# + +identifier: mimx8mm_phyboard_polis +name: Phyboard Polis i.MX8M Mini +type: mcu +arch: arm +ram: 32 +flash: 32 +toolchain: + - zephyr + - gnuarmemb + - xtools +testing: + ignore_tags: + - net + - bluetooth diff --git a/boards/arm/mimx8mm_phyboard_polis/mimx8mm_phyboard_polis_defconfig b/boards/arm/mimx8mm_phyboard_polis/mimx8mm_phyboard_polis_defconfig new file mode 100644 index 000000000000..5b307dafaece --- /dev/null +++ b/boards/arm/mimx8mm_phyboard_polis/mimx8mm_phyboard_polis_defconfig @@ -0,0 +1,17 @@ +# +# Copyright (c) 2022 PHYTEC Messtechnik GmbH +# +# SPDX-License-Identifier: Apache-2.0 +# + +CONFIG_SOC_SERIES_IMX8MM_M4=y +CONFIG_SOC_MIMX8MM6=y +CONFIG_BOARD_MIMX8MM_PHYBOARD_POLIS=y +CONFIG_CORTEX_M_SYSTICK=y +CONFIG_CLOCK_CONTROL=y +CONFIG_UART_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_UART_INTERRUPT_DRIVEN=y +CONFIG_CONSOLE=y +CONFIG_PINCTRL=y +CONFIG_GPIO=y diff --git a/boards/arm/mimx8mp_phyboard_pollux/Kconfig.board b/boards/arm/mimx8mp_phyboard_pollux/Kconfig.board new file mode 100644 index 000000000000..af7975bc3c94 --- /dev/null +++ b/boards/arm/mimx8mp_phyboard_pollux/Kconfig.board @@ -0,0 +1,9 @@ +# MIMX8MP PhyBOARD Pollux (i.MX8MP) + +# Copyright (c) 2022 PHYTEC Messtechnik GmbH +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_MIMX8MP_PHYBOARD_POLLUX + bool "PhyBOARD Pollux (i.MX8MP)" + depends on SOC_SERIES_IMX8ML_M7 + select SOC_PART_NUMBER_MIMX8ML8DVNLZ diff --git a/boards/arm/mimx8mp_phyboard_pollux/Kconfig.defconfig b/boards/arm/mimx8mp_phyboard_pollux/Kconfig.defconfig new file mode 100644 index 000000000000..889b2b24dfaf --- /dev/null +++ b/boards/arm/mimx8mp_phyboard_pollux/Kconfig.defconfig @@ -0,0 +1,18 @@ +# PhyBOARD Pollux (i.MX8MP) defconfig + +# Copyright (c) 2022 PHYTEC Messtechnik GmbH +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_MIMX8MP_PHYBOARD_POLLUX + +config BOARD + default "mimx8mp_phyboard_pollux" + +if !XIP +config FLASH_SIZE + default 0 +config FLASH_BASE_ADDRESS + default 0 +endif + +endif # BOARD_MIMX8MP_PHYBOARD_POLLUX diff --git a/boards/arm/mimx8mp_phyboard_pollux/board.cmake b/boards/arm/mimx8mp_phyboard_pollux/board.cmake new file mode 100644 index 000000000000..dd1258d5ca31 --- /dev/null +++ b/boards/arm/mimx8mp_phyboard_pollux/board.cmake @@ -0,0 +1,11 @@ +# +# Copyright (c) 2021, Laird Connectivity +# +# SPDX-License-Identifier: Apache-2.0 +# + +board_set_debugger_ifnset(jlink) +board_set_flasher_ifnset(jlink) + +board_runner_args(jlink "--device=MIMX8ML8_M7") +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/arm/mimx8mp_phyboard_pollux/doc/img/PEB-EVAL-01.jpg b/boards/arm/mimx8mp_phyboard_pollux/doc/img/PEB-EVAL-01.jpg new file mode 100644 index 000000000000..b35600599907 Binary files /dev/null and b/boards/arm/mimx8mp_phyboard_pollux/doc/img/PEB-EVAL-01.jpg differ diff --git a/boards/arm/mimx8mp_phyboard_pollux/doc/img/Phyboard_Pollux.jpg b/boards/arm/mimx8mp_phyboard_pollux/doc/img/Phyboard_Pollux.jpg new file mode 100644 index 000000000000..797ba2d5f17e Binary files /dev/null and b/boards/arm/mimx8mp_phyboard_pollux/doc/img/Phyboard_Pollux.jpg differ diff --git a/boards/arm/mimx8mp_phyboard_pollux/doc/index.rst b/boards/arm/mimx8mp_phyboard_pollux/doc/index.rst new file mode 100644 index 000000000000..23ffa600cb0c --- /dev/null +++ b/boards/arm/mimx8mp_phyboard_pollux/doc/index.rst @@ -0,0 +1,272 @@ +.. _mimx8mp_phyboard_pollux: + +PhyBOARD Pollux (NXP i.MX8M Plus) +################################# + +Overview +******** + +The PhyBOARD Pollux is based upon the PhyCore-i.MX8M Plus SOM which is based on +the NXP i.MX8M Plus SoC. The SoC includes four Coretex-A53 cores and one +Coretex-M7 core for real time applications like Zephyr. The PhyBOARD Pollux +can be used for various applications like SmartHomes, Industry 4.0, IoT etc. +It features a lots of interfaces and computing capacity. It can be used as +a reference, to develop or in the final product too. + + +Board features: + +- Memory: + + - RAM: 256MB - 8GB LPDDR4 + - EEPROM: 4kB - 32kB + - eMMC: 4GB - 64GB (eMMC 5.1) + - SPI NOR Flash: 4MB - 256MB +- Interfaces: + + - Ethernet: 2x 10/100/1000BASE-T (1x TSN Support) + - USB: 2x 3.0 Host + - Serial: 1x RS232 / RS485 Full Duplex / Half Duplex + - CAN: 2x CAN FD + - Digital I/O: via Expansion Connector + - PCIe: 1x miniPCIe + - MMX/SD/SDIO: microSD slot + - Display: LVDS(1x4 or 1x8), MIPI DSI(1x4), HDMI + - Audio: SAI + - Camera: 2x MIPI CSI-2 (PhyCAM-M) + - Expansion Bus: I2C, SPI, SDIO, UART, USB + - JTAG: via PEB-EVAL-01 +- LEDs: + + - 1x Multicolor Status LED via I2C + + +.. image:: img/Phyboard_Pollux.jpg + :width: 720px + :align: center + :height: 405px + :alt: PhyBOARD Pollux + +More information about the board can be found at the +`PHYTEC website`_. + +Supported Features +================== + +The Zephyr mimx8mp_phyboard_polis board configuration supports the following hardware +features: + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+-------------------------------------+ +| SYSTICK | on-chip | systick | ++-----------+------------+-------------------------------------+ +| CLOCK | on-chip | clock_control | ++-----------+------------+-------------------------------------+ +| PINMUX | on-chip | pinmux | ++-----------+------------+-------------------------------------+ +| UART | on-chip | serial port-polling; | +| | | serial port-interrupt | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | GPIO output | +| | | GPIO input | ++-----------+------------+-------------------------------------+ + +The default configuration can be found in the defconfig file: +:zephyr_file:`boards/arm/mimx8mp_phyboard_polis/mimx8mm_phyboard_polis_defconfig`. + +It's recommended to disable peripherals used by the M7-Core on the host running +on the Linux host. + +Other hardware features are not currently supported with Zephyr on the +M7-Core. + +Connections and IOs +=================== + +The following Compontens are tested and working correctly. + +UART +---- + ++---------------+-----------------+-----------------------------------+ +| Board Name | SoM Name | Usage | ++===============+=================+===================================+ +| Debug USB(A53)| UART1 | UART Debug Console via USB | ++---------------+-----------------+-----------------------------------+ +| Wo WiFi Module| UART3 | UART to WiFi/BLE Module | ++---------------+-----------------+-----------------------------------+ +| Debug USB(M4) | UART4 | UART Debug Console via USB | ++---------------+-----------------+-----------------------------------+ + +.. note:: + Please note, that the, to UART3 connected, Wifi/BLE Module isn't working with + Zephyr yet. UART3 can also be used through pin 31(RX) and 33(TX) of the + X6 Connector. + +GPIO +---- + +The pinmuxing for the GPIOs is the standard pinmuxing of the mimx8mp devicetree +created by NXP. You can find it here: + +:zephyr_file:`dts/arm/nxp/nxp_imx8ml_m7.dtsi`. + +The Pinout of the PhyBOARD Polis can be found here: + +`PHYTEC website`_ + +Programming and Debugging +************************* + +The i.MX8MP does not have a separate flash for the M7-Core. Because of this +the A53-Core has to load the program for the M7-Core to the right memory +address, set the PC and start the processor. +This can only by done with u-boot at the moment. We are working on our BSP to +enable remoteproc support. + +The M7 can use up to 3 different RAMs (currently, only two configurations are +supported: ITCM and DDR). These are the memory mapping for A53 and M7: + ++------------+-------------------------+------------------------+-----------------------+----------------------+ +| Region | Cortex-A53 | Cortex-M7 (System Bus) | Cortex-M7 (Code Bus) | Size | ++============+=========================+========================+=======================+======================+ +| OCRAM | 0x00900000-0x0098FFFF | 0x20200000-0x2028FFFF | 0x00900000-0x0098FFFF | 576KB | ++------------+-------------------------+------------------------+-----------------------+----------------------+ +| DTCM | 0x00800000-0x0081FFFF | 0x20000000-0x2001FFFF | | 128KB | ++------------+-------------------------+------------------------+-----------------------+----------------------+ +| ITCM | 0x007E0000-0x007FFFFF | | 0x00000000-0x0001FFFF | 128KB | ++------------+-------------------------+------------------------+-----------------------+----------------------+ +| OCRAM_S | 0x00180000-0x00188FFF | 0x20180000-0x20188FFF | 0x00180000-0x00188FFF | 36KB | ++------------+-------------------------+------------------------+-----------------------+----------------------+ +| DDR | 0x80000000-0x803FFFFF | 0x80200000-0x803FFFFF | 0x80000000-0x801FFFFF | 2MB | ++------------+-------------------------+------------------------+-----------------------+----------------------+ + +For more information about memory mapping see the +`i.MX 8M Plus Applications Processor Reference Manual`_ (section 2.1 to 2.3) + +At compilation time you have to choose which memory region will be used. This +configuration is done in the devicetree and the defconfig / the config of your +program. + +**By default Zephyr will use the TCM memory region.** You can configure it like +this for the DDR region: + +In the devicetree overwrite the following nodes like this: + +.. code-block:: DTS + + chosen { + /* TCM */ + zephyr,flash = &itcm; + zephyr,sram = &dtcm; + }; + +change it to + +.. code-block:: DTS + + chosen { + /* DDR */ + zephyr,flash = &ddr_code; + zephyr,sram = &ddr_sys; + }; + + +In your prj.conf overwrite the configuration like this for the **DDR** memory +region: + +.. code-block:: console + + CONFIG_CODE_DDR=y + CONFIG_CODE_ITCM=n + + +Starting the M7-Core via U-Boot +=============================== + +Load the compiled zephyr.bin to memory address 0x4800000. +This should output something like this: + +.. code-block:: console + + u-boot=> tftp 0x48000000 192.168.3.10:zyphr.bin + Using ethernet@30be0000 device + TFTP from server 192.168.3.10; our IP address is 192.168.3.11 + Filename 'zepyhr.bin'. + Load address: 0x48000000 + Loading: ## + 2 KiB/s + done + Bytes transferred = 27240 (6a68 hex) + +Because it's not possible to load directly to the TCM memory area you have to +copy the binaries. The last argument given is the size of the file in bytes, +you can copy it from the output of the last command. + +.. code-block:: console + + u-boot=> cp.b 0x48000000 0x7e0000 27240 + +And finaly starting the M7-Core at the right memory address: + +.. code-block:: console + + u-boot=> bootaux 0x7e0000 + ## Starting auxiliary core stack = 0x20003A58, pc = 0x1FFE1905... + +Debugging +========= + +The PhyBOARD Polis can be debugged using a JTAG Debugger. +The easiest way to do that is to use a SEGGER JLink Debugger and Phytec's +``PEB-EVAL-01`` Shield, which can be directly connected to the JLink. +You can find the JLink Software package here: `JLink Software`_ + +.. figure:: img/PEB-EVAL-01.jpg + :alt: PEB-EVAL-01 + :width: 350 + + PEB-EVAL-01 + +To debug efficiently you have to use multiple terminals: + +After connecting everything and building with west use this command while in +the directory of the program you build earlier to start a debug server: + +.. code-block:: console + + host$ west debugserver + +West automatically connects via the JLink to the Target and keeps open a +debug server. + +Use another terminal, start gdb, connect to target and load Zephyr on the +target: + +.. code-block:: console + + host$ gdb-multiarch build/zephyr/zephyr.elf -tui + (gdb) targ rem :2331 + Remote debugging using :2331 + 0x1ffe0008 in _vector_table () + (gdb) mon halt + (gdb) mon reset + (gdb) c + Continuing. + +The program can be debugged using standard gdb techniques. + +References +========== + +.. _PHYTEC website: + https://www.phytec.de/produkte/single-board-computer/phyboard-pollux/ + +.. _i.MX 8M Plus Applications Processor Reference Manual: + https://www.nxp.com/webapp/Download?colCode=IMX8MPRM + +.. _JLink Software: + https://www.segger.com/downloads/jlink/ diff --git a/boards/arm/mimx8mp_phyboard_pollux/mimx8mp_phyboard_pollux-pinctrl.dtsi b/boards/arm/mimx8mp_phyboard_pollux/mimx8mp_phyboard_pollux-pinctrl.dtsi new file mode 100644 index 000000000000..8a31136da6ec --- /dev/null +++ b/boards/arm/mimx8mp_phyboard_pollux/mimx8mp_phyboard_pollux-pinctrl.dtsi @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2022 PHYTEC Messtechnik GmbH + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +&pinctrl { + uart1_default: uart1_default { + group0 { + pinmux = <&iomuxc_uart1_rxd_uart_rx_uart1_rx>, + <&iomuxc_uart1_txd_uart_tx_uart1_tx>; + slew-rate = "slow"; + drive-strength = "x1"; + }; + }; + + uart3_default: uart3_default { + group0 { + pinmux = <&iomuxc_uart3_txd_uart_tx_uart3_tx>, + <&iomuxc_uart3_rxd_uart_rx_uart3_rx>, + <&iomuxc_sd1_strobe_uart_cts_b_uart3_cts_b>, + <&iomuxc_sd1_reset_b_uart_rts_b_uart3_rts_b>; + slew-rate = "slow"; + drive-strength = "x1"; + }; + }; + + uart4_default: uart4_default { + group0 { + pinmux = <&iomuxc_uart4_rxd_uart_rx_uart4_rx>, + <&iomuxc_uart4_txd_uart_tx_uart4_tx>; + bias-pull-up; + slew-rate = "slow"; + drive-strength = "x1"; + }; + }; +}; diff --git a/boards/arm/mimx8mp_phyboard_pollux/mimx8mp_phyboard_pollux.dts b/boards/arm/mimx8mp_phyboard_pollux/mimx8mp_phyboard_pollux.dts new file mode 100644 index 000000000000..b44577a4ee5e --- /dev/null +++ b/boards/arm/mimx8mp_phyboard_pollux/mimx8mp_phyboard_pollux.dts @@ -0,0 +1,68 @@ +/* + * Copyright (c) 2022 PHYTEC Messtechnik GmbH + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "mimx8mp_phyboard_pollux-pinctrl.dtsi" + +/ { + model = "PhyBOARD Pollux (i.MX8MP)"; + compatible = "nxp,mimx8mp_phyboard_pollux"; + + chosen { + /* TCM */ + zephyr,flash = &itcm; + zephyr,sram = &dtcm; + + zephyr,console = &uart4; + zephyr,shell-uart = &uart4; + }; + + soc { + /* + * BSP-Linux standard output. Can cause problems if used with standard bsp + */ + uart1: uart@30860000 { + compatible = "nxp,imx-iuart"; + reg = <0x30860000 0x10000>; + interrupts = <26 3>; + clocks = <&ccm IMX_CCM_UART1_CLK 0x7c 24>; + pinctrl-0 = <&uart1_default>; + pinctrl-names = "default"; + status = "disabled"; + }; + + /* + * to Bluetooth module (currently not supported by zephyr) + * Expansion header Pin 31(RX) 33(TX) + */ + uart3: uart@30880000 { + compatible = "nxp,imx-iuart"; + reg = <0x30880000 0x10000>; + interrupts = <28 3>; + clocks = <&ccm IMX_CCM_UART3_CLK 0x68 12>; + pinctrl-0 = <&uart3_default>; + pinctrl-names = "default"; + hw-flow-control; + status = "disabled"; + }; + }; +}; + +/* + * Standard uart for the M7-Core + */ +&uart4 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart4_default>; + pinctrl-names = "default"; +}; + +&mailbox0 { + status = "okay"; +}; diff --git a/boards/arm/mimx8mp_phyboard_pollux/mimx8mp_phyboard_pollux.yaml b/boards/arm/mimx8mp_phyboard_pollux/mimx8mp_phyboard_pollux.yaml new file mode 100644 index 000000000000..27dd7d5ec221 --- /dev/null +++ b/boards/arm/mimx8mp_phyboard_pollux/mimx8mp_phyboard_pollux.yaml @@ -0,0 +1,23 @@ +# +# Copyright (c) 2022 PHYTEC Messtechnik GmbH +# +# SPDX-License-Identifier: Apache-2.0 +# + +identifier: mimx8mp_phyboard_pollux +name: PhyBOARD Pollux (i.MX8MP) +type: mcu +arch: arm +ram: 128 +flash: 128 +toolchain: + - zephyr + - gnuarmemb + - xtools +testing: + ignore_tags: + - net + - bluetooth +supported: + - uart + - gpio diff --git a/boards/arm/mimx8mp_phyboard_pollux/mimx8mp_phyboard_pollux_defconfig b/boards/arm/mimx8mp_phyboard_pollux/mimx8mp_phyboard_pollux_defconfig new file mode 100644 index 000000000000..9c2fae84c13c --- /dev/null +++ b/boards/arm/mimx8mp_phyboard_pollux/mimx8mp_phyboard_pollux_defconfig @@ -0,0 +1,23 @@ +# +# Copyright (c) 2022 PHYTEC Messtechnik GmbH +# +# SPDX-License-Identifier: Apache-2.0 +# + +CONFIG_SOC_SERIES_IMX8ML_M7=y +CONFIG_SOC_MIMX8ML8=y +CONFIG_BOARD_MIMX8MP_PHYBOARD_POLLUX=y +CONFIG_CORTEX_M_SYSTICK=y +CONFIG_CLOCK_CONTROL=y +CONFIG_UART_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_UART_INTERRUPT_DRIVEN=y +CONFIG_CONSOLE=y + +# y for TCM memory space +CONFIG_CODE_ITCM=y + +# y for DDR memory space +CONFIG_CODE_DDR=n + +CONFIG_PINCTRL=y diff --git a/boards/arm/mimxrt1010_evk/mimxrt1010_evk.dts b/boards/arm/mimxrt1010_evk/mimxrt1010_evk.dts index a573ed12c7e3..9f080309ee5c 100644 --- a/boards/arm/mimxrt1010_evk/mimxrt1010_evk.dts +++ b/boards/arm/mimxrt1010_evk/mimxrt1010_evk.dts @@ -23,6 +23,7 @@ zephyr,itcm = &itcm; zephyr,console = &lpuart1; zephyr,shell-uart = &lpuart1; + zephyr,flash = &at25sf128a; }; leds { diff --git a/boards/arm/mimxrt1015_evk/mimxrt1015_evk.dts b/boards/arm/mimxrt1015_evk/mimxrt1015_evk.dts index 97992dbdb263..d535567ef68a 100644 --- a/boards/arm/mimxrt1015_evk/mimxrt1015_evk.dts +++ b/boards/arm/mimxrt1015_evk/mimxrt1015_evk.dts @@ -23,6 +23,7 @@ zephyr,itcm = &itcm; zephyr,console = &lpuart1; zephyr,shell-uart = &lpuart1; + zephyr,flash = &at25sf128a; }; leds { diff --git a/boards/arm/mimxrt1024_evk/doc/index.rst b/boards/arm/mimxrt1024_evk/doc/index.rst index b957a014113f..b1dcdf9b940e 100644 --- a/boards/arm/mimxrt1024_evk/doc/index.rst +++ b/boards/arm/mimxrt1024_evk/doc/index.rst @@ -168,6 +168,8 @@ The MIMXRT1024 SoC has five pairs of pinmux/gpio controllers. +---------------+-----------------+---------------------------+ | GPIO_AD_B1_10 | ADC1 | ADC1 Channel 10 | +---------------+-----------------+---------------------------+ +| GPIO_AD_B1_10 | FLEXPWM1 | FLEXPWM1 Channel A2 | ++---------------+-----------------+---------------------------+ System Clock ============ diff --git a/boards/arm/mimxrt1024_evk/mimxrt1024_evk-pinctrl.dtsi b/boards/arm/mimxrt1024_evk/mimxrt1024_evk-pinctrl.dtsi index 60cf68d6a3fb..3e27286cc234 100644 --- a/boards/arm/mimxrt1024_evk/mimxrt1024_evk-pinctrl.dtsi +++ b/boards/arm/mimxrt1024_evk/mimxrt1024_evk-pinctrl.dtsi @@ -305,5 +305,15 @@ }; }; + pinmux_flexpwm1: pinmux_flexpwm1 { + group0 { + pinmux = <&iomuxc_gpio_ad_b1_10_flexpwm1_pwma2>; + drive-strength = "r0-4"; + bias-pull-up; + bias-pull-up-value = "47k"; + slew-rate = "slow"; + nxp,speed = "100-mhz"; + }; + }; }; diff --git a/boards/arm/mimxrt1024_evk/mimxrt1024_evk.yaml b/boards/arm/mimxrt1024_evk/mimxrt1024_evk.yaml index 90451be71e65..0305793dd0d2 100644 --- a/boards/arm/mimxrt1024_evk/mimxrt1024_evk.yaml +++ b/boards/arm/mimxrt1024_evk/mimxrt1024_evk.yaml @@ -24,3 +24,4 @@ supported: - sdhc - adc - usb_device + - pwm diff --git a/boards/arm/mimxrt1050_evk/Kconfig.defconfig b/boards/arm/mimxrt1050_evk/Kconfig.defconfig index 5ff81f5008d2..94fc452cf877 100644 --- a/boards/arm/mimxrt1050_evk/Kconfig.defconfig +++ b/boards/arm/mimxrt1050_evk/Kconfig.defconfig @@ -28,12 +28,15 @@ endif #FLASH config KSCAN default y if LVGL -if KSCAN +config INPUT + default y if KSCAN -config KSCAN_FT5336_INTERRUPT +if INPUT + +config INPUT_FT5336_INTERRUPT default y -endif # KSCAN +endif # INPUT if NETWORKING diff --git a/boards/arm/mimxrt1050_evk/mimxrt1050_evk.dts b/boards/arm/mimxrt1050_evk/mimxrt1050_evk.dts index b8c385764528..09a851c65f5b 100644 --- a/boards/arm/mimxrt1050_evk/mimxrt1050_evk.dts +++ b/boards/arm/mimxrt1050_evk/mimxrt1050_evk.dts @@ -16,7 +16,7 @@ aliases { led0 = &green_led; sw0 = &user_button; - kscan0 = &touch_controller; + kscan0 = &kscan_input; watchdog0 = &wdog0; magn0 = &fxos8700; accel0 = &fxos8700; @@ -33,7 +33,7 @@ zephyr,flash = &s26ks512s0; zephyr,code-partition = &slot0_partition; zephyr,display = &lcdif; - zephyr,keyboard-scan = &touch_controller; + zephyr,keyboard-scan = &kscan_input; }; sdram0: memory@80000000 { @@ -209,10 +209,14 @@ arduino_serial: &lpuart3 { int2-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; }; - touch_controller: ft5336@38 { + ft5336@38 { compatible = "focaltech,ft5336"; reg = <0x38>; int-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; + + kscan_input: kscan-input { + compatible = "zephyr,kscan-input"; + }; }; }; diff --git a/boards/arm/mimxrt1060_evk/Kconfig.defconfig b/boards/arm/mimxrt1060_evk/Kconfig.defconfig index 5dd0b9d02614..a8811d4d6802 100644 --- a/boards/arm/mimxrt1060_evk/Kconfig.defconfig +++ b/boards/arm/mimxrt1060_evk/Kconfig.defconfig @@ -31,12 +31,15 @@ endif #FLASH config KSCAN default y if LVGL -if KSCAN +config INPUT + default y if KSCAN -config KSCAN_FT5336_INTERRUPT +if INPUT + +config INPUT_FT5336_INTERRUPT default y -endif # KSCAN +endif # INPUT if NETWORKING diff --git a/boards/arm/mimxrt1060_evk/mimxrt1060_evk-pinctrl.dtsi b/boards/arm/mimxrt1060_evk/mimxrt1060_evk-pinctrl.dtsi index 7f70fbe5ceaf..38eb539577b5 100644 --- a/boards/arm/mimxrt1060_evk/mimxrt1060_evk-pinctrl.dtsi +++ b/boards/arm/mimxrt1060_evk/mimxrt1060_evk-pinctrl.dtsi @@ -21,7 +21,7 @@ }; }; - /* conflicts with lpuart3 and flexcan1 */ + /* conflicts with lpuart3 */ pinmux_csi: pinmux_csi { group0 { pinmux = <&iomuxc_gpio_ad_b0_04_gpio1_io04>; @@ -87,31 +87,10 @@ }; }; - /* conflicts with SAI1 */ - pinmux_flexcan1: pinmux_flexcan1 { - group0 { - pinmux = <&iomuxc_gpio_ad_b1_08_flexcan1_tx>, - <&iomuxc_gpio_ad_b1_09_flexcan1_rx>; - drive-strength = "r0-6"; - slew-rate = "slow"; - nxp,speed = "100-mhz"; - }; - }; - - pinmux_flexcan2: pinmux_flexcan2 { - group0 { - pinmux = <&iomuxc_gpio_ad_b0_14_flexcan2_tx>, - <&iomuxc_gpio_ad_b0_15_flexcan2_rx>; - drive-strength = "r0-6"; - slew-rate = "slow"; - nxp,speed = "100-mhz"; - }; - }; - pinmux_flexcan3: pinmux_flexcan3 { group0 { - pinmux = <&iomuxc_gpio_emc_36_flexcan3_tx>, - <&iomuxc_gpio_emc_37_flexcan3_rx>; + pinmux = <&iomuxc_gpio_ad_b0_14_flexcan3_tx>, + <&iomuxc_gpio_ad_b0_15_flexcan3_rx>; drive-strength = "r0-6"; slew-rate = "slow"; nxp,speed = "100-mhz"; @@ -452,6 +431,4 @@ nxp,speed = "50-mhz"; }; }; - }; - diff --git a/boards/arm/mimxrt1060_evk/mimxrt1060_evk.dts b/boards/arm/mimxrt1060_evk/mimxrt1060_evk.dts index c55dfc4d0fda..96fcc0a8b5d2 100644 --- a/boards/arm/mimxrt1060_evk/mimxrt1060_evk.dts +++ b/boards/arm/mimxrt1060_evk/mimxrt1060_evk.dts @@ -16,7 +16,7 @@ aliases { led0 = &green_led; sw0 = &user_button; - kscan0 = &touch_controller; + kscan0 = &kscan_input; watchdog0 = &wdog0; sdhc0 = &usdhc1; }; @@ -30,9 +30,9 @@ zephyr,dtcm = &dtcm; zephyr,console = &lpuart1; zephyr,shell-uart = &lpuart1; - zephyr,canbus = &flexcan2; + zephyr,canbus = &flexcan3; zephyr,display = &lcdif; - zephyr,keyboard-scan = &touch_controller; + zephyr,keyboard-scan = &kscan_input; }; sdram0: memory@80000000 { @@ -177,10 +177,14 @@ arduino_serial: &lpuart3 { pinctrl-0 = <&pinmux_lpi2c1>; pinctrl-names = "default"; - touch_controller: ft5336@38 { + ft5336@38 { compatible = "focaltech,ft5336"; reg = <0x38>; int-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; + + kscan_input: kscan-input { + compatible = "zephyr,kscan-input"; + }; }; }; @@ -236,10 +240,11 @@ zephyr_udc0: &usb1 { status = "okay"; }; -&flexcan2 { +&flexcan3 { status = "okay"; bus-speed = <125000>; - pinctrl-0 = <&pinmux_flexcan2>; + bus-speed-data = <1000000>; + pinctrl-0 = <&pinmux_flexcan3>; pinctrl-names = "default"; can-transceiver { diff --git a/boards/arm/mimxrt1064_evk/Kconfig.defconfig b/boards/arm/mimxrt1064_evk/Kconfig.defconfig index f4e7b6666962..438cb5489098 100644 --- a/boards/arm/mimxrt1064_evk/Kconfig.defconfig +++ b/boards/arm/mimxrt1064_evk/Kconfig.defconfig @@ -15,12 +15,15 @@ endchoice config KSCAN default y if LVGL -if KSCAN +config INPUT + default y if KSCAN -config KSCAN_FT5336_INTERRUPT +if INPUT + +config INPUT_FT5336_INTERRUPT default y -endif # KSCAN +endif # INPUT if NETWORKING diff --git a/boards/arm/mimxrt1064_evk/mimxrt1064_evk.dts b/boards/arm/mimxrt1064_evk/mimxrt1064_evk.dts index 47ae83735140..910f7ff76f9c 100644 --- a/boards/arm/mimxrt1064_evk/mimxrt1064_evk.dts +++ b/boards/arm/mimxrt1064_evk/mimxrt1064_evk.dts @@ -17,7 +17,7 @@ led0 = &green_led; pwm-led0 = &green_pwm_led; sw0 = &user_button; - kscan0 = &touch_controller; + kscan0 = &kscan_input; watchdog0 = &wdog0; sdhc0 = &usdhc1; }; @@ -33,7 +33,7 @@ zephyr,shell-uart = &lpuart1; zephyr,canbus = &flexcan2; zephyr,display = &lcdif; - zephyr,keyboard-scan = &touch_controller; + zephyr,keyboard-scan = &kscan_input; }; sdram0: memory@80000000 { @@ -167,10 +167,14 @@ arduino_i2c: &lpi2c1 {}; }; }; - touch_controller: ft5336@38 { + ft5336@38 { compatible = "focaltech,ft5336"; reg = <0x38>; int-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; + + kscan_input: kscan-input { + compatible = "zephyr,kscan-input"; + }; }; }; diff --git a/boards/arm/mimxrt595_evk/board.c b/boards/arm/mimxrt595_evk/board.c index 8adf39cf313e..ff7e1e1d09fa 100644 --- a/boards/arm/mimxrt595_evk/board.c +++ b/boards/arm/mimxrt595_evk/board.c @@ -45,7 +45,7 @@ static int32_t board_calc_volt_level(void) return volt; } -static int board_config_pmic(const struct device *dev) +static int board_config_pmic(void) { uint32_t volt; int ret = 0; @@ -79,7 +79,7 @@ static int board_config_pmic(const struct device *dev) } #endif -static int mimxrt595_evk_init(const struct device *dev) +static int mimxrt595_evk_init(void) { /* Set the correct voltage range according to the board. */ power_pad_vrange_t vrange = { diff --git a/boards/arm/mimxrt595_evk/doc/index.rst b/boards/arm/mimxrt595_evk/doc/index.rst index 728e31db37a4..13a194e37eed 100644 --- a/boards/arm/mimxrt595_evk/doc/index.rst +++ b/boards/arm/mimxrt595_evk/doc/index.rst @@ -153,6 +153,10 @@ functionality of a pin. +---------+-----------------+----------------------------+ | PIO1_6 | SPI | SPI SSEL | +---------+-----------------+----------------------------+ +| PIO0_5 | SCT0 | SCT0 GPI0 | ++---------+-----------------+----------------------------+ +| PIO0_6 | SCT0 | SCT0 GPI1 | ++---------+-----------------+----------------------------+ System Clock ============ diff --git a/boards/arm/mimxrt595_evk/mimxrt595_evk_cm33-pinctrl.dtsi b/boards/arm/mimxrt595_evk/mimxrt595_evk_cm33-pinctrl.dtsi index ef046a88c761..4e742cab5d86 100644 --- a/boards/arm/mimxrt595_evk/mimxrt595_evk_cm33-pinctrl.dtsi +++ b/boards/arm/mimxrt595_evk/mimxrt595_evk_cm33-pinctrl.dtsi @@ -143,6 +143,7 @@ pinmux_lpadc0: pinmux_lpadc0 { group0 { pinmux = , + , ; slew-rate = "normal"; drive-strength = "normal"; @@ -188,4 +189,13 @@ drive-strength = "normal"; }; }; + + pinmux_sctimer_default: pinmux_sctimer_default { + group0 { + pinmux = , + ; + slew-rate = "normal"; + drive-strength = "normal"; + }; + }; }; diff --git a/boards/arm/mimxrt595_evk/mimxrt595_evk_cm33.dts b/boards/arm/mimxrt595_evk/mimxrt595_evk_cm33.dts index 67887b303672..f21a14b12afd 100644 --- a/boards/arm/mimxrt595_evk/mimxrt595_evk_cm33.dts +++ b/boards/arm/mimxrt595_evk/mimxrt595_evk_cm33.dts @@ -26,6 +26,7 @@ accel0 = &fxos8700; sdhc0 = &usdhc0; kscan0 = &touch_controller; + pwm-0 = &sc_timer; }; chosen { @@ -467,3 +468,9 @@ zephyr_udc0: &usbhs { ahb-write-wait-interval = <0>; }; }; + +&sc_timer { + pinctrl-0 = <&pinmux_sctimer_default>; + pinctrl-names = "default"; + status = "okay"; +}; diff --git a/boards/arm/mimxrt595_evk/mimxrt595_evk_cm33.yaml b/boards/arm/mimxrt595_evk/mimxrt595_evk_cm33.yaml index b25924329cbd..dbf6499c6ff0 100644 --- a/boards/arm/mimxrt595_evk/mimxrt595_evk_cm33.yaml +++ b/boards/arm/mimxrt595_evk/mimxrt595_evk_cm33.yaml @@ -26,3 +26,4 @@ supported: - usb_device - watchdog - sdhc + - pwm diff --git a/boards/arm/mimxrt685_evk/init.c b/boards/arm/mimxrt685_evk/init.c index a0c467d3974c..8c0cd0878811 100644 --- a/boards/arm/mimxrt685_evk/init.c +++ b/boards/arm/mimxrt685_evk/init.c @@ -7,9 +7,8 @@ #include #include -static int mimxrt685_evk_init(const struct device *dev) +static int mimxrt685_evk_init(void) { - ARG_UNUSED(dev); /* flexcomm1 and flexcomm3 are configured to loopback the TX signal to RX */ #if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm1), nxp_lpc_i2s, okay)) && \ diff --git a/boards/arm/mps2_an385/pinmux.c b/boards/arm/mps2_an385/pinmux.c index ce8e05dc3be8..6cf939830728 100644 --- a/boards/arm/mps2_an385/pinmux.c +++ b/boards/arm/mps2_an385/pinmux.c @@ -152,9 +152,8 @@ static void arm_mps2_pinmux_defaults(void) CMSDK_AHB_GPIO2_DEV->altfuncset = gpio_2; } -static int arm_mps2_pinmux_init(const struct device *port) +static int arm_mps2_pinmux_init(void) { - ARG_UNUSED(port); arm_mps2_pinmux_defaults(); diff --git a/boards/arm/mps2_an521/empty_cpu0/prj.conf b/boards/arm/mps2_an521/empty_cpu0/prj.conf new file mode 100644 index 000000000000..932b79829cf3 --- /dev/null +++ b/boards/arm/mps2_an521/empty_cpu0/prj.conf @@ -0,0 +1 @@ +# Empty file diff --git a/boards/arm/mps2_an521/empty_cpu0/src/main.c b/boards/arm/mps2_an521/empty_cpu0/src/main.c index 0cd262ff40ac..83dbaf4c320e 100644 --- a/boards/arm/mps2_an521/empty_cpu0/src/main.c +++ b/boards/arm/mps2_an521/empty_cpu0/src/main.c @@ -8,11 +8,12 @@ extern void wakeup_cpu1(void); -void main(void) +int main(void) { /* Simply wake-up the remote core */ wakeup_cpu1(); while (1) { } + return 0; } diff --git a/boards/arm/mps2_an521/pinmux.c b/boards/arm/mps2_an521/pinmux.c index c9c6333c2b60..bc92dc747d19 100644 --- a/boards/arm/mps2_an521/pinmux.c +++ b/boards/arm/mps2_an521/pinmux.c @@ -152,9 +152,8 @@ static void arm_mps2_pinmux_defaults(void) CMSDK_AHB_GPIO2_DEV->altfuncset = gpio_2; } -static int arm_mps2_pinmux_init(const struct device *port) +static int arm_mps2_pinmux_init(void) { - ARG_UNUSED(port); arm_mps2_pinmux_defaults(); diff --git a/boards/arm/npcx7m6fb_evb/board.cmake b/boards/arm/npcx7m6fb_evb/board.cmake index 3b45d5712a0d..51e7fd4c66fd 100644 --- a/boards/arm/npcx7m6fb_evb/board.cmake +++ b/boards/arm/npcx7m6fb_evb/board.cmake @@ -1,9 +1,6 @@ # SPDX-License-Identifier: Apache-2.0 -board_set_flasher_ifnset(openocd) -board_set_debugger_ifnset(openocd) +board_runner_args(openocd --cmd-load "npcx_write_image") +board_runner_args(openocd --cmd-verify "npcx_verify_image") -board_finalize_runner_args(openocd - --cmd-load "npcx_write_image" - --cmd-verify "npcx_verify_image" - ) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/arm/npcx9m6f_evb/board.cmake b/boards/arm/npcx9m6f_evb/board.cmake index 3b45d5712a0d..51e7fd4c66fd 100644 --- a/boards/arm/npcx9m6f_evb/board.cmake +++ b/boards/arm/npcx9m6f_evb/board.cmake @@ -1,9 +1,6 @@ # SPDX-License-Identifier: Apache-2.0 -board_set_flasher_ifnset(openocd) -board_set_debugger_ifnset(openocd) +board_runner_args(openocd --cmd-load "npcx_write_image") +board_runner_args(openocd --cmd-verify "npcx_verify_image") -board_finalize_runner_args(openocd - --cmd-load "npcx_write_image" - --cmd-verify "npcx_verify_image" - ) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/arm/nrf21540dk_nrf52840/board.cmake b/boards/arm/nrf21540dk_nrf52840/board.cmake index 35eb5d4e54b1..f95878945bed 100644 --- a/boards/arm/nrf21540dk_nrf52840/board.cmake +++ b/boards/arm/nrf21540dk_nrf52840/board.cmake @@ -3,6 +3,7 @@ board_runner_args(jlink "--device=nRF52840_xxAA" "--speed=4000") board_runner_args(pyocd "--target=nrf52840" "--frequency=4000000") include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) +include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake) include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake) include(${ZEPHYR_BASE}/boards/common/openocd-nrf5.board.cmake) diff --git a/boards/arm/nrf51dk_nrf51422/board.cmake b/boards/arm/nrf51dk_nrf51422/board.cmake index a32f30cd11a5..1b08d95310ea 100644 --- a/boards/arm/nrf51dk_nrf51422/board.cmake +++ b/boards/arm/nrf51dk_nrf51422/board.cmake @@ -2,5 +2,6 @@ board_runner_args(jlink "--device=nRF51822_xxAC" "--speed=4000") include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) +include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake) include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) include(${ZEPHYR_BASE}/boards/common/openocd-nrf5.board.cmake) diff --git a/boards/arm/nrf51dongle_nrf51422/board.cmake b/boards/arm/nrf51dongle_nrf51422/board.cmake index e62f55b6a1dc..86ac5ef3be68 100644 --- a/boards/arm/nrf51dongle_nrf51422/board.cmake +++ b/boards/arm/nrf51dongle_nrf51422/board.cmake @@ -2,4 +2,5 @@ board_runner_args(jlink "--device=nRF51822_xxAC" "--speed=4000") include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) +include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake) include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/arm/nrf52833dk_nrf52820/board.cmake b/boards/arm/nrf52833dk_nrf52820/board.cmake index fd0f0777dbef..f7046fc0a1fa 100644 --- a/boards/arm/nrf52833dk_nrf52820/board.cmake +++ b/boards/arm/nrf52833dk_nrf52820/board.cmake @@ -3,6 +3,7 @@ board_runner_args(jlink "--device=nRF52833_xxAA" "--speed=4000") board_runner_args(pyocd "--target=nrf52820" "--frequency=4000000") include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) +include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake) include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake) include(${ZEPHYR_BASE}/boards/common/openocd-nrf5.board.cmake) diff --git a/boards/arm/nrf52833dk_nrf52833/board.cmake b/boards/arm/nrf52833dk_nrf52833/board.cmake index a82037a1c62b..f8c71dc56944 100644 --- a/boards/arm/nrf52833dk_nrf52833/board.cmake +++ b/boards/arm/nrf52833dk_nrf52833/board.cmake @@ -3,6 +3,7 @@ board_runner_args(jlink "--device=nRF52833_xxAA" "--speed=4000") board_runner_args(pyocd "--target=nrf52833" "--frequency=4000000") include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) +include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake) include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake) include(${ZEPHYR_BASE}/boards/common/openocd-nrf5.board.cmake) diff --git a/boards/arm/nrf52840dk_nrf52811/board.cmake b/boards/arm/nrf52840dk_nrf52811/board.cmake index a41ef7adecd7..af01781dd29e 100644 --- a/boards/arm/nrf52840dk_nrf52811/board.cmake +++ b/boards/arm/nrf52840dk_nrf52811/board.cmake @@ -4,5 +4,6 @@ board_runner_args(jlink "--device=nRF52840_xxAA" "--speed=4000") include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) +include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake) include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) include(${ZEPHYR_BASE}/boards/common/openocd-nrf5.board.cmake) diff --git a/boards/arm/nrf52840dk_nrf52840/board.cmake b/boards/arm/nrf52840dk_nrf52840/board.cmake index 35eb5d4e54b1..f95878945bed 100644 --- a/boards/arm/nrf52840dk_nrf52840/board.cmake +++ b/boards/arm/nrf52840dk_nrf52840/board.cmake @@ -3,6 +3,7 @@ board_runner_args(jlink "--device=nRF52840_xxAA" "--speed=4000") board_runner_args(pyocd "--target=nrf52840" "--frequency=4000000") include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) +include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake) include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake) include(${ZEPHYR_BASE}/boards/common/openocd-nrf5.board.cmake) diff --git a/boards/arm/nrf52840dk_nrf52840/nrf52840dk_nrf52840-pinctrl.dtsi b/boards/arm/nrf52840dk_nrf52840/nrf52840dk_nrf52840-pinctrl.dtsi index 397eca2cd86f..779d0d518a87 100644 --- a/boards/arm/nrf52840dk_nrf52840/nrf52840dk_nrf52840-pinctrl.dtsi +++ b/boards/arm/nrf52840dk_nrf52840/nrf52840dk_nrf52840-pinctrl.dtsi @@ -147,6 +147,7 @@ , , ; + nordic,drive-mode = ; }; }; diff --git a/boards/arm/nrf52840dongle_nrf52840/Kconfig.defconfig b/boards/arm/nrf52840dongle_nrf52840/Kconfig.defconfig index 58f931a76a04..18214853d814 100644 --- a/boards/arm/nrf52840dongle_nrf52840/Kconfig.defconfig +++ b/boards/arm/nrf52840dongle_nrf52840/Kconfig.defconfig @@ -40,6 +40,10 @@ config USB_DEVICE_INITIALIZE_AT_BOOT config SHELL_BACKEND_SERIAL_CHECK_DTR default SHELL + depends on UART_LINE_CTRL + +config UART_LINE_CTRL + default SHELL config USB_DEVICE_REMOTE_WAKEUP default n diff --git a/boards/arm/nrf52840dongle_nrf52840/board.c b/boards/arm/nrf52840dongle_nrf52840/board.c index 0b433d281089..ac37eacee210 100644 --- a/boards/arm/nrf52840dongle_nrf52840/board.c +++ b/boards/arm/nrf52840dongle_nrf52840/board.c @@ -7,9 +7,8 @@ #include #include -static int board_nrf52840dongle_nrf52840_init(const struct device *dev) +static int board_nrf52840dongle_nrf52840_init(void) { - ARG_UNUSED(dev); /* if the nrf52840dongle_nrf52840 board is powered from USB * (high voltage mode), GPIO output voltage is set to 1.8 volts by diff --git a/boards/arm/nrf52dk_nrf52805/board.cmake b/boards/arm/nrf52dk_nrf52805/board.cmake index c8b613e405d6..e3f77214027d 100644 --- a/boards/arm/nrf52dk_nrf52805/board.cmake +++ b/boards/arm/nrf52dk_nrf52805/board.cmake @@ -2,5 +2,6 @@ board_runner_args(jlink "--device=nRF52832_xxAA" "--speed=4000") include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) +include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake) include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) include(${ZEPHYR_BASE}/boards/common/openocd-nrf5.board.cmake) diff --git a/boards/arm/nrf52dk_nrf52810/board.cmake b/boards/arm/nrf52dk_nrf52810/board.cmake index c8b613e405d6..e3f77214027d 100644 --- a/boards/arm/nrf52dk_nrf52810/board.cmake +++ b/boards/arm/nrf52dk_nrf52810/board.cmake @@ -2,5 +2,6 @@ board_runner_args(jlink "--device=nRF52832_xxAA" "--speed=4000") include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) +include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake) include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) include(${ZEPHYR_BASE}/boards/common/openocd-nrf5.board.cmake) diff --git a/boards/arm/nrf52dk_nrf52832/board.cmake b/boards/arm/nrf52dk_nrf52832/board.cmake index 53d92022d388..f5b4011822a4 100644 --- a/boards/arm/nrf52dk_nrf52832/board.cmake +++ b/boards/arm/nrf52dk_nrf52832/board.cmake @@ -3,6 +3,7 @@ board_runner_args(jlink "--device=nRF52832_xxAA" "--speed=4000") board_runner_args(pyocd "--target=nrf52832" "--frequency=4000000") include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) +include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake) include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake) include(${ZEPHYR_BASE}/boards/common/openocd-nrf5.board.cmake) diff --git a/boards/arm/nrf5340_audio_dk_nrf5340/Kconfig.defconfig b/boards/arm/nrf5340_audio_dk_nrf5340/Kconfig.defconfig index c433ed874689..87a9a2175a87 100644 --- a/boards/arm/nrf5340_audio_dk_nrf5340/Kconfig.defconfig +++ b/boards/arm/nrf5340_audio_dk_nrf5340/Kconfig.defconfig @@ -84,13 +84,3 @@ config BT_CTLR default y if BT endif # BOARD_NRF5340_AUDIO_DK_NRF5340_CPUNET - -config UART_NRF_DK_SERIAL_WORKAROUND - default y if ZTEST - -# When the nRF DK serial workaround is enabled, increase the stack size in -# tests built with no optimizations, as the standard size may be insufficient -# then. Use 512 to align with the FPU_SHARING case, where the default value -# is also modified. -config TEST_EXTRA_STACK_SIZE - default 512 if UART_NRF_DK_SERIAL_WORKAROUND && NO_OPTIMIZATIONS diff --git a/boards/arm/nrf5340_audio_dk_nrf5340/board.cmake b/boards/arm/nrf5340_audio_dk_nrf5340/board.cmake index 4c67981c71a7..4a0cab6c11ea 100644 --- a/boards/arm/nrf5340_audio_dk_nrf5340/board.cmake +++ b/boards/arm/nrf5340_audio_dk_nrf5340/board.cmake @@ -13,4 +13,5 @@ if(CONFIG_BOARD_NRF5340_AUDIO_DK_NRF5340_CPUNET) endif() include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) +include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake) include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/arm/nrf5340_audio_dk_nrf5340/nrf5340_audio_dk_cpunet_reset.c b/boards/arm/nrf5340_audio_dk_nrf5340/nrf5340_audio_dk_cpunet_reset.c index 2d2dce5d1625..5f30e0d9a66f 100644 --- a/boards/arm/nrf5340_audio_dk_nrf5340/nrf5340_audio_dk_cpunet_reset.c +++ b/boards/arm/nrf5340_audio_dk_nrf5340/nrf5340_audio_dk_cpunet_reset.c @@ -49,11 +49,10 @@ static void remoteproc_mgr_config(void) #endif /* !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) */ } -static int remoteproc_mgr_boot(const struct device *dev) +static int remoteproc_mgr_boot(void) { int ret; - ARG_UNUSED(dev); ret = core_config(); if (ret) { diff --git a/boards/arm/nrf5340_audio_dk_nrf5340/nrf5340_audio_dk_nrf5340_cpuapp_common.dtsi b/boards/arm/nrf5340_audio_dk_nrf5340/nrf5340_audio_dk_nrf5340_cpuapp_common.dtsi index 66c829570335..d603c019c575 100644 --- a/boards/arm/nrf5340_audio_dk_nrf5340/nrf5340_audio_dk_nrf5340_cpuapp_common.dtsi +++ b/boards/arm/nrf5340_audio_dk_nrf5340/nrf5340_audio_dk_nrf5340_cpuapp_common.dtsi @@ -229,18 +229,6 @@ pinctrl-names = "default", "sleep"; }; -&timer0 { - status = "okay"; -}; - -&timer1 { - status = "okay"; -}; - -&timer2 { - status = "okay"; -}; - &flash0 { partitions { compatible = "fixed-partitions"; diff --git a/boards/arm/nrf5340_audio_dk_nrf5340/nrf5340_audio_dk_nrf5340_cpunet.dts b/boards/arm/nrf5340_audio_dk_nrf5340/nrf5340_audio_dk_nrf5340_cpunet.dts index 100216f1a43f..11244f82c5cb 100644 --- a/boards/arm/nrf5340_audio_dk_nrf5340/nrf5340_audio_dk_nrf5340_cpunet.dts +++ b/boards/arm/nrf5340_audio_dk_nrf5340/nrf5340_audio_dk_nrf5340_cpunet.dts @@ -46,18 +46,6 @@ pinctrl-names = "default", "sleep"; }; -&timer0 { - status = "okay"; -}; - -&timer1 { - status = "okay"; -}; - -&timer2 { - status = "okay"; -}; - &flash1 { partitions { diff --git a/boards/arm/nrf5340dk_nrf5340/Kconfig.defconfig b/boards/arm/nrf5340dk_nrf5340/Kconfig.defconfig index 3092d5b55877..d337e2f1a1c2 100644 --- a/boards/arm/nrf5340dk_nrf5340/Kconfig.defconfig +++ b/boards/arm/nrf5340dk_nrf5340/Kconfig.defconfig @@ -96,13 +96,3 @@ config BT_CTLR default y if BT endif # BOARD_NRF5340DK_NRF5340_CPUNET - -config UART_NRF_DK_SERIAL_WORKAROUND - default y if ZTEST - -# When the nRF DK serial workaround is enabled, increase the stack size in -# tests built with no optimizations, as the standard size may be insufficient -# then. Use 512 to align with the FPU_SHARING case, where the default value -# is also modified. -config TEST_EXTRA_STACK_SIZE - default 512 if UART_NRF_DK_SERIAL_WORKAROUND && NO_OPTIMIZATIONS diff --git a/boards/arm/nrf5340dk_nrf5340/board.cmake b/boards/arm/nrf5340dk_nrf5340/board.cmake index 0673353b9338..2a3f3cb43e44 100644 --- a/boards/arm/nrf5340dk_nrf5340/board.cmake +++ b/boards/arm/nrf5340dk_nrf5340/board.cmake @@ -17,4 +17,5 @@ board_runner_args(jlink "--device=nrf5340_xxaa_net" "--speed=4000") endif() include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) +include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake) include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/arm/nrf5340dk_nrf5340/nrf5340_cpuapp_common-pinctrl.dtsi b/boards/arm/nrf5340dk_nrf5340/nrf5340_cpuapp_common-pinctrl.dtsi index e2dfe9d5d84f..6db9767c0dc8 100644 --- a/boards/arm/nrf5340dk_nrf5340/nrf5340_cpuapp_common-pinctrl.dtsi +++ b/boards/arm/nrf5340dk_nrf5340/nrf5340_cpuapp_common-pinctrl.dtsi @@ -62,6 +62,7 @@ , , ; + nordic,drive-mode = ; }; }; diff --git a/boards/arm/nrf5340dk_nrf5340/nrf5340_cpuapp_common.dts b/boards/arm/nrf5340dk_nrf5340/nrf5340_cpuapp_common.dts index 4ba125fc9e00..220256ec78bf 100644 --- a/boards/arm/nrf5340dk_nrf5340/nrf5340_cpuapp_common.dts +++ b/boards/arm/nrf5340dk_nrf5340/nrf5340_cpuapp_common.dts @@ -198,18 +198,6 @@ }; }; -&timer0 { - status = "okay"; -}; - -&timer1 { - status = "okay"; -}; - -&timer2 { - status = "okay"; -}; - arduino_serial: &uart1 { compatible = "nordic,nrf-uarte"; current-speed = <115200>; diff --git a/boards/arm/nrf5340dk_nrf5340/nrf5340_cpunet_reset.c b/boards/arm/nrf5340dk_nrf5340/nrf5340_cpunet_reset.c index 0094e915b159..68700225f4ed 100644 --- a/boards/arm/nrf5340dk_nrf5340/nrf5340_cpunet_reset.c +++ b/boards/arm/nrf5340dk_nrf5340/nrf5340_cpunet_reset.c @@ -33,9 +33,8 @@ static void remoteproc_mgr_config(void) #endif /* !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) */ } -static int remoteproc_mgr_boot(const struct device *dev) +static int remoteproc_mgr_boot(void) { - ARG_UNUSED(dev); /* Secure domain may configure permissions for the Network MCU. */ remoteproc_mgr_config(); diff --git a/boards/arm/nrf5340dk_nrf5340/nrf5340dk_nrf5340_cpunet.dts b/boards/arm/nrf5340dk_nrf5340/nrf5340dk_nrf5340_cpunet.dts index f45e0619b1af..61403bc1d579 100644 --- a/boards/arm/nrf5340dk_nrf5340/nrf5340dk_nrf5340_cpunet.dts +++ b/boards/arm/nrf5340dk_nrf5340/nrf5340dk_nrf5340_cpunet.dts @@ -153,18 +153,6 @@ arduino_spi: &spi0 { pinctrl-names = "default", "sleep"; }; -&timer0 { - status = "okay"; -}; - -&timer1 { - status = "okay"; -}; - -&timer2 { - status = "okay"; -}; - &flash1 { partitions { diff --git a/boards/arm/nrf9160_innblue21/nrf9160_innblue21_common.dts b/boards/arm/nrf9160_innblue21/nrf9160_innblue21_common.dts index e5180382ee47..880f0eea7e65 100644 --- a/boards/arm/nrf9160_innblue21/nrf9160_innblue21_common.dts +++ b/boards/arm/nrf9160_innblue21/nrf9160_innblue21_common.dts @@ -157,18 +157,6 @@ pinctrl-names = "default", "sleep"; }; -&timer0 { - status = "okay"; -}; - -&timer1 { - status = "okay"; -}; - -&timer2 { - status = "okay"; -}; - &flash0 { partitions { diff --git a/boards/arm/nrf9160_innblue22/nrf9160_innblue22_common.dts b/boards/arm/nrf9160_innblue22/nrf9160_innblue22_common.dts index f7f7b471cd4a..f4be692993c3 100644 --- a/boards/arm/nrf9160_innblue22/nrf9160_innblue22_common.dts +++ b/boards/arm/nrf9160_innblue22/nrf9160_innblue22_common.dts @@ -160,18 +160,6 @@ pinctrl-names = "default", "sleep"; }; -&timer0 { - status = "okay"; -}; - -&timer1 { - status = "okay"; -}; - -&timer2 { - status = "okay"; -}; - &flash0 { partitions { diff --git a/boards/arm/nrf9160dk_nrf52840/board.c b/boards/arm/nrf9160dk_nrf52840/board.c index 6a7834d620ea..e01b8eb64e79 100644 --- a/boards/arm/nrf9160dk_nrf52840/board.c +++ b/boards/arm/nrf9160dk_nrf52840/board.c @@ -159,7 +159,7 @@ static int reset_pin_configure(void) } #endif /* USE_RESET_GPIO */ -static int init(const struct device *dev) +static int init(void) { int rc; @@ -214,7 +214,7 @@ SYS_INIT(init, POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE); #define EXT_MEM_CTRL DT_NODELABEL(external_flash_pins_routing) #if DT_NODE_EXISTS(EXT_MEM_CTRL) -static int early_init(const struct device *dev) +static int early_init(void) { /* As soon as possible after the system starts up, enable the analog * switch that routes signals to the external flash. Otherwise, the diff --git a/boards/arm/nrf9160dk_nrf52840/board.cmake b/boards/arm/nrf9160dk_nrf52840/board.cmake index 81860d7d68d6..f505d2c380e7 100644 --- a/boards/arm/nrf9160dk_nrf52840/board.cmake +++ b/boards/arm/nrf9160dk_nrf52840/board.cmake @@ -2,5 +2,6 @@ board_runner_args(jlink "--device=nRF52840_xxAA" "--speed=4000") include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) +include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake) include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) include(${ZEPHYR_BASE}/boards/common/openocd-nrf5.board.cmake) diff --git a/boards/arm/nrf9160dk_nrf9160/Kconfig.defconfig b/boards/arm/nrf9160dk_nrf9160/Kconfig.defconfig index 620799f3e674..cd052dc7a205 100644 --- a/boards/arm/nrf9160dk_nrf9160/Kconfig.defconfig +++ b/boards/arm/nrf9160dk_nrf9160/Kconfig.defconfig @@ -60,13 +60,3 @@ config I2C default $(dt_compat_on_bus,$(DT_COMPAT_NXP_PCAL6408A),i2c) endif # BOARD_NRF9160DK_NRF9160 || BOARD_NRF9160DK_NRF9160_NS - -config UART_NRF_DK_SERIAL_WORKAROUND - default y if ZTEST - -# When the nRF DK serial workaround is enabled, increase the stack size in -# tests built with no optimizations, as the standard size may be insufficient -# then. Use 512 to align with the FPU_SHARING case, where the default value -# is also modified. -config TEST_EXTRA_STACK_SIZE - default 512 if UART_NRF_DK_SERIAL_WORKAROUND && NO_OPTIMIZATIONS diff --git a/boards/arm/nrf9160dk_nrf9160/board.cmake b/boards/arm/nrf9160dk_nrf9160/board.cmake index 46efdc4976eb..fb5779f29674 100644 --- a/boards/arm/nrf9160dk_nrf9160/board.cmake +++ b/boards/arm/nrf9160dk_nrf9160/board.cmake @@ -10,4 +10,5 @@ endif() board_runner_args(jlink "--device=nRF9160_xxAA" "--speed=4000") include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) +include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake) include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/arm/nrf9160dk_nrf9160/nrf9160dk_nrf9160_common.dts b/boards/arm/nrf9160dk_nrf9160/nrf9160dk_nrf9160_common.dts index f0706aa70daa..02fbac841ab4 100644 --- a/boards/arm/nrf9160dk_nrf9160/nrf9160dk_nrf9160_common.dts +++ b/boards/arm/nrf9160dk_nrf9160/nrf9160dk_nrf9160_common.dts @@ -211,18 +211,6 @@ arduino_spi: &spi3 { pinctrl-names = "default", "sleep"; }; -&timer0 { - status = "okay"; -}; - -&timer1 { - status = "okay"; -}; - -&timer2 { - status = "okay"; -}; - &flash0 { partitions { diff --git a/boards/arm/nrf9161dk_nrf9161/Kconfig.board b/boards/arm/nrf9161dk_nrf9161/Kconfig.board new file mode 100644 index 000000000000..1d791bb6886e --- /dev/null +++ b/boards/arm/nrf9161dk_nrf9161/Kconfig.board @@ -0,0 +1,14 @@ +# nRF9161 DK NRF9161 board configuration + +# Copyright (c) 2023 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +if SOC_NRF9161_SICA + +config BOARD_NRF9161DK_NRF9161 + bool "nRF9161 DK NRF9161" + +config BOARD_NRF9161DK_NRF9161_NS + bool "nRF9161 DK NRF9161 non-secure" + +endif # SOC_NRF9161_SICA diff --git a/boards/arm/nrf9161dk_nrf9161/Kconfig.defconfig b/boards/arm/nrf9161dk_nrf9161/Kconfig.defconfig new file mode 100644 index 000000000000..ea7150ede5fe --- /dev/null +++ b/boards/arm/nrf9161dk_nrf9161/Kconfig.defconfig @@ -0,0 +1,47 @@ +# nRF9161 DK NRF9161 board configuration + +# Copyright (c) 2023 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_NRF9161DK_NRF9161 || BOARD_NRF9161DK_NRF9161_NS + +config BOARD + default "nrf9161dk_nrf9161" + +# For the secure version of the board the firmware is linked at the beginning +# of the flash, or into the code-partition defined in DT if it is intended to +# be loaded by MCUboot. If the secure firmware is to be combined with a non- +# secure image (TRUSTED_EXECUTION_SECURE=y), the secure FW image shall always +# be restricted to the size of its code partition. +# For the non-secure version of the board, the firmware +# must be linked into the code-partition (non-secure) defined in DT, regardless. +# Apply this configuration below by setting the Kconfig symbols used by +# the linker according to the information extracted from DT partitions. + +# Workaround for not being able to have commas in macro arguments +DT_CHOSEN_Z_CODE_PARTITION := zephyr,code-partition + +config FLASH_LOAD_SIZE + default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION)) + depends on BOARD_NRF9161DK_NRF9161 && TRUSTED_EXECUTION_SECURE + +if BOARD_NRF9161DK_NRF9161_NS + +config FLASH_LOAD_OFFSET + default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_CODE_PARTITION)) + +config FLASH_LOAD_SIZE + default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION)) + +endif # BOARD_NRF9161DK_NRF9161_NS + +config BT_HCI_VS + default y if BT + +config BT_WAIT_NOP + default BT && $(dt_nodelabel_enabled,nrf5340_reset) + +config I2C + default $(dt_compat_on_bus,$(DT_COMPAT_NXP_PCAL6408A),i2c) + +endif # BOARD_NRF9161DK_NRF9161 || BOARD_NRF9161DK_NRF9161_NS diff --git a/boards/arm/nrf9161dk_nrf9161/board.cmake b/boards/arm/nrf9161dk_nrf9161/board.cmake new file mode 100644 index 000000000000..73fe4dee8000 --- /dev/null +++ b/boards/arm/nrf9161dk_nrf9161/board.cmake @@ -0,0 +1,14 @@ +# SPDX-License-Identifier: Apache-2.0 + +if(CONFIG_BOARD_NRF9161DK_NRF9161_NS) + set(TFM_PUBLIC_KEY_FORMAT "full") +endif() + +if(CONFIG_TFM_FLASH_MERGED_BINARY) + set_property(TARGET runners_yaml_props_target PROPERTY hex_file "${CMAKE_BINARY_DIR}/tfm_merged.hex") +endif() + +# TODO: change to nRF9161_xxAA when such device is available in JLink +board_runner_args(jlink "--device=nRF9160_xxAA" "--speed=4000") +include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/arm/nrf9161dk_nrf9161/doc/index.rst b/boards/arm/nrf9161dk_nrf9161/doc/index.rst new file mode 100644 index 000000000000..32fc047d24dd --- /dev/null +++ b/boards/arm/nrf9161dk_nrf9161/doc/index.rst @@ -0,0 +1,206 @@ +.. _nrf9161dk_nrf9161: + +nRF9161 DK +########## + +Overview +******** + +The nRF9161 DK (PCA10153) is a single-board development kit for evaluation and +development on the nRF9161 SiP for LTE-M and NB-IoT. The nrf9161dk_nrf9161 +board configuration provides support for the Nordic Semiconductor nRF9161 ARM +Cortex-M33F CPU with ARMv8-M Security Extension and the following devices: + +* :abbr:`ADC (Analog to Digital Converter)` +* CLOCK +* FLASH +* :abbr:`GPIO (General Purpose Input Output)` +* :abbr:`I2C (Inter-Integrated Circuit)` +* :abbr:`MPU (Memory Protection Unit)` +* :abbr:`NVIC (Nested Vectored Interrupt Controller)` +* :abbr:`PWM (Pulse Width Modulation)` +* :abbr:`RTC (nRF RTC System Clock)` +* Segger RTT (RTT Console) +* :abbr:`SPI (Serial Peripheral Interface)` +* :abbr:`UARTE (Universal asynchronous receiver-transmitter with EasyDMA)` +* :abbr:`WDT (Watchdog Timer)` +* :abbr:`IDAU (Implementation Defined Attribution Unit)` + +More information about the board can be found at the +`nRF9161 DK website`_. The `Nordic Semiconductor Infocenter`_ +contains the processor's information and the datasheet. + + +Hardware +******** + +nRF9161 DK has two external oscillators. The frequency of +the slow clock is 32.768 kHz. The frequency of the main clock +is 32 MHz. + +Supported Features +================== + +The nrf9161dk_nrf9161 board configuration supports the following +hardware features: + ++-----------+------------+----------------------+ +| Interface | Controller | Driver/Component | ++===========+============+======================+ +| ADC | on-chip | adc | ++-----------+------------+----------------------+ +| CLOCK | on-chip | clock_control | ++-----------+------------+----------------------+ +| FLASH | on-chip | flash | ++-----------+------------+----------------------+ +| FLASH | external | spi | ++-----------+------------+----------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+----------------------+ +| GPIO | external | i2c | ++-----------+------------+----------------------+ +| I2C(M) | on-chip | i2c | ++-----------+------------+----------------------+ +| MPU | on-chip | arch/arm | ++-----------+------------+----------------------+ +| NVIC | on-chip | arch/arm | ++-----------+------------+----------------------+ +| PWM | on-chip | pwm | ++-----------+------------+----------------------+ +| RTC | on-chip | system clock | ++-----------+------------+----------------------+ +| RTT | nRF53 | console | ++-----------+------------+----------------------+ +| SPI(M/S) | on-chip | spi | ++-----------+------------+----------------------+ +| SPU | on-chip | system protection | ++-----------+------------+----------------------+ +| UARTE | on-chip | serial | ++-----------+------------+----------------------+ +| WDT | on-chip | watchdog | ++-----------+------------+----------------------+ + + +.. _nrf9161dk_additional_hardware: + +Other hardware features have not been enabled yet for this board. +See `nRF9161 DK website`_ and `Nordic Semiconductor Infocenter`_ +for a complete list of nRF9161 DK board hardware features. + +Connections and IOs +=================== + +LED +--- + +* LED1 (green) = P0.0 +* LED2 (green) = P0.1 +* LED3 (green) = P0.4 +* LED4 (green) = P0.5 + +Push buttons and Switches +------------------------- + +* BUTTON1 = P0.8 +* BUTTON2 = P0.9 +* SWITCH1 = P0.18 +* SWITCH2 = P0.19 +* BOOT = SW5 = boot/reset + +Security components +=================== + +- Implementation Defined Attribution Unit (`IDAU`_). The IDAU is implemented + with the System Protection Unit and is used to define secure and non-secure + memory maps. By default, all of the memory space (Flash, SRAM, and + peripheral address space) is defined to be secure accessible only. +- Secure boot. + + +Programming and Debugging +************************* + +nrf9161dk_nrf9161 supports the Armv8m Security Extension, and by default boots +in the Secure state. + +Building Secure/Non-Secure Zephyr applications with Arm |reg| TrustZone |reg| +============================================================================= + +The process requires the following steps: + +1. Build the Secure Zephyr application using ``-DBOARD=nrf9161dk_nrf9161`` and + ``CONFIG_TRUSTED_EXECUTION_SECURE=y`` in the application project configuration file. +2. Build the Non-Secure Zephyr application using ``-DBOARD=nrf9161dk_nrf9161_ns``. +3. Merge the two binaries together. + +When building a Secure/Non-Secure application, the Secure application will +have to set the IDAU (SPU) configuration to allow Non-Secure access to all +CPU resources utilized by the Non-Secure application firmware. SPU +configuration shall take place before jumping to the Non-Secure application. + +.. note:: + Trusted Firmware-M (TF-M) and building the ``ns`` target is not supported for this board. + +Building a Secure only application +================================== + +Build the Zephyr app in the usual way (see :ref:`build_an_application` +and :ref:`application_run`), using ``-DBOARD=nrf9161dk_nrf9161``. + +Flashing +======== + +Follow the instructions in the :ref:`nordic_segger` page to install +and configure all the necessary software. Further information can be +found in :ref:`nordic_segger_flashing`. Then build and flash +applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +Here is an example for the :ref:`hello_world` application. + +First, run your favorite terminal program to listen for output. + +.. code-block:: console + + $ minicom -D -b 115200 + +Replace :code:`` with the port where the nRF9161 DK +can be found. For example, under Linux, :code:`/dev/ttyACM0`. + +Then build and flash the application in the usual way. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: nrf9161dk_nrf9161 + :goals: build flash + +Debugging +========= + +Refer to the :ref:`nordic_segger` page to learn about debugging Nordic boards with a +Segger IC. + + +Testing the LEDs and buttons in the nRF9161 DK +********************************************** + +There are 2 samples that allow you to test that the buttons (switches) and LEDs on +the board are working properly with Zephyr: + +* :ref:`blinky-sample` +* :ref:`button-sample` + +You can build and flash the examples to make sure Zephyr is running correctly on +your board. The button and LED definitions can be found in +:zephyr_file:`boards/arm/nrf9161dk_nrf9161/nrf9161dk_nrf9161_common.dtsi`. + +References +********** + +.. target-notes:: + +.. _IDAU: + https://developer.arm.com/docs/100690/latest/attribution-units-sau-and-idau +.. _nRF9161 DK website: https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF9161-DK +.. _Nordic Semiconductor Infocenter: https://infocenter.nordicsemi.com +.. _Trusted Firmware M: https://www.trustedfirmware.org/projects/tf-m/ diff --git a/boards/arm/nrf9161dk_nrf9161/dts/bindings/nordic,nrf9161dk-nrf5340-reset.yaml b/boards/arm/nrf9161dk_nrf9161/dts/bindings/nordic,nrf9161dk-nrf5340-reset.yaml new file mode 100644 index 000000000000..0d2e9ee75126 --- /dev/null +++ b/boards/arm/nrf9161dk_nrf9161/dts/bindings/nordic,nrf9161dk-nrf5340-reset.yaml @@ -0,0 +1,18 @@ +# Copyright (c) 2023 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +description: GPIO used to reset nRF5340 on nRF9161 DK + +compatible: "nordic,nrf9161dk-nrf5340-reset" + +include: base.yaml + +properties: + status: + required: true + + gpios: + type: phandle-array + required: true + description: | + GPIO to use as nRF5340 reset line: output in nRF9161, input in nRF5340. diff --git a/boards/arm/nrf9161dk_nrf9161/dts/nrf9161dk_buttons_on_io_expander.dtsi b/boards/arm/nrf9161dk_nrf9161/dts/nrf9161dk_buttons_on_io_expander.dtsi new file mode 100644 index 000000000000..20f7d2406a57 --- /dev/null +++ b/boards/arm/nrf9161dk_nrf9161/dts/nrf9161dk_buttons_on_io_expander.dtsi @@ -0,0 +1,25 @@ +/* + * Copyright (c) 2023 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&pcal6408a { + status = "okay"; +}; + +&button0 { + gpios = <&pcal6408a 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; +}; + +&button1 { + gpios = <&pcal6408a 1 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; +}; + +&button2 { + gpios = <&pcal6408a 2 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; +}; + +&button3 { + gpios = <&pcal6408a 3 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; +}; diff --git a/boards/arm/nrf9161dk_nrf9161/dts/nrf9161dk_leds_on_io_expander.dtsi b/boards/arm/nrf9161dk_nrf9161/dts/nrf9161dk_leds_on_io_expander.dtsi new file mode 100644 index 000000000000..d80c509d2152 --- /dev/null +++ b/boards/arm/nrf9161dk_nrf9161/dts/nrf9161dk_leds_on_io_expander.dtsi @@ -0,0 +1,25 @@ +/* + * Copyright (c) 2023 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&pcal6408a { + status = "okay"; +}; + +&led0 { + gpios = <&pcal6408a 4 GPIO_ACTIVE_HIGH>; +}; + +&led1 { + gpios = <&pcal6408a 5 GPIO_ACTIVE_HIGH>; +}; + +&led2 { + gpios = <&pcal6408a 6 GPIO_ACTIVE_HIGH>; +}; + +&led3 { + gpios = <&pcal6408a 7 GPIO_ACTIVE_HIGH>; +}; diff --git a/boards/arm/nrf9161dk_nrf9161/nrf9161dk_nrf9161.dts b/boards/arm/nrf9161dk_nrf9161/nrf9161dk_nrf9161.dts new file mode 100644 index 000000000000..6572e9e597fb --- /dev/null +++ b/boards/arm/nrf9161dk_nrf9161/nrf9161dk_nrf9161.dts @@ -0,0 +1,19 @@ +/* + * Copyright (c) 2023 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include "nrf9161dk_nrf9161_common.dtsi" + +/ { + chosen { + zephyr,sram = &sram0_s; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + zephyr,sram-secure-partition = &sram0_s; + zephyr,sram-non-secure-partition = &sram0_ns; + }; +}; diff --git a/boards/arm/nrf9161dk_nrf9161/nrf9161dk_nrf9161.yaml b/boards/arm/nrf9161dk_nrf9161/nrf9161dk_nrf9161.yaml new file mode 100644 index 000000000000..efca7888f56f --- /dev/null +++ b/boards/arm/nrf9161dk_nrf9161/nrf9161dk_nrf9161.yaml @@ -0,0 +1,21 @@ +identifier: nrf9161dk_nrf9161 +name: nRF9161-DK-NRF9161 +type: mcu +arch: arm +toolchain: + - gnuarmemb + - xtools + - zephyr +ram: 88 +flash: 1024 +supported: + - arduino_gpio + - arduino_i2c + - arduino_serial + - arduino_spi + - gpio + - i2c + - pwm + - spi + - watchdog + - counter diff --git a/boards/arm/nrf9161dk_nrf9161/nrf9161dk_nrf9161_common-pinctrl.dtsi b/boards/arm/nrf9161dk_nrf9161/nrf9161dk_nrf9161_common-pinctrl.dtsi new file mode 100644 index 000000000000..a1680e830f4e --- /dev/null +++ b/boards/arm/nrf9161dk_nrf9161/nrf9161dk_nrf9161_common-pinctrl.dtsi @@ -0,0 +1,96 @@ +/* + * Copyright (c) 2023 Nordic Semiconductor + * SPDX-License-Identifier: Apache-2.0 + */ + +&pinctrl { + uart0_default: uart0_default { + group1 { + psels = , + ; + }; + group2 { + psels = , + ; + bias-pull-up; + }; + }; + + uart0_sleep: uart0_sleep { + group1 { + psels = , + , + , + ; + low-power-enable; + }; + }; + + uart1_default: uart1_default { + group1 { + psels = , + ; + }; + group2 { + psels = , + ; + bias-pull-up; + }; + }; + + uart1_sleep: uart1_sleep { + group1 { + psels = , + , + , + ; + low-power-enable; + }; + }; + + i2c2_default: i2c2_default { + group1 { + psels = , + ; + }; + }; + + i2c2_sleep: i2c2_sleep { + group1 { + psels = , + ; + low-power-enable; + }; + }; + + pwm0_default: pwm0_default { + group1 { + psels = ; + }; + }; + + pwm0_sleep: pwm0_sleep { + group1 { + psels = ; + low-power-enable; + }; + }; + + spi3_default: spi3_default { + group1 { + psels = , + , + ; + nordic,drive-mode = ; + }; + }; + + spi3_sleep: spi3_sleep { + group1 { + psels = , + , + ; + low-power-enable; + }; + }; +}; diff --git a/boards/arm/nrf9161dk_nrf9161/nrf9161dk_nrf9161_common.dtsi b/boards/arm/nrf9161dk_nrf9161/nrf9161dk_nrf9161_common.dtsi new file mode 100644 index 000000000000..9bcd6753f6e4 --- /dev/null +++ b/boards/arm/nrf9161dk_nrf9161/nrf9161dk_nrf9161_common.dtsi @@ -0,0 +1,266 @@ +/* + * Copyright (c) 2023 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ +#include "nrf9161dk_nrf9161_common-pinctrl.dtsi" + +/ { + model = "Nordic nRF9161 DK NRF9161"; + compatible = "nordic,nrf9161-dk-nrf9161"; + + chosen { + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,uart-mcumgr = &uart0; + }; + + leds { + compatible = "gpio-leds"; + led0: led_0 { + gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; + label = "Green LED 1"; + }; + led1: led_1 { + gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>; + label = "Green LED 2"; + }; + led2: led_2 { + gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>; + label = "Green LED 3"; + }; + led3: led_3 { + gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>; + label = "Green LED 4"; + }; + }; + + pwmleds { + compatible = "pwm-leds"; + pwm_led0: pwm_led_0 { + pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>; + }; + }; + + buttons { + compatible = "gpio-keys"; + button0: button_0 { + gpios = <&gpio0 8 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Push button 1"; + }; + button1: button_1 { + gpios = <&gpio0 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Push button 2"; + }; + button2: button_2 { + gpios = <&gpio0 18 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Push button 3"; + }; + button3: button_3 { + gpios = <&gpio0 19 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Push button 4"; + }; + }; + + nrf5340_reset: gpio-reset { + compatible = "nordic,nrf9161dk-nrf5340-reset"; + status = "disabled"; + gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; + }; + + arduino_header: connector { + compatible = "arduino-header-r3"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <0 0 &gpio0 14 0>, /* A0 */ + <1 0 &gpio0 15 0>, /* A1 */ + <2 0 &gpio0 16 0>, /* A2 */ + <3 0 &gpio0 17 0>, /* A3 */ + <4 0 &gpio0 18 0>, /* A4 */ + <5 0 &gpio0 19 0>, /* A5 */ + <6 0 &gpio0 0 0>, /* D0 */ + <7 0 &gpio0 1 0>, /* D1 */ + <8 0 &gpio0 2 0>, /* D2 */ + <9 0 &gpio0 3 0>, /* D3 */ + <10 0 &gpio0 4 0>, /* D4 */ + <11 0 &gpio0 5 0>, /* D5 */ + <12 0 &gpio0 6 0>, /* D6 */ + <13 0 &gpio0 7 0>, /* D7 */ + <14 0 &gpio0 8 0>, /* D8 */ + <15 0 &gpio0 9 0>, /* D9 */ + <16 0 &gpio0 10 0>, /* D10 */ + <17 0 &gpio0 11 0>, /* D11 */ + <18 0 &gpio0 12 0>, /* D12 */ + <19 0 &gpio0 13 0>, /* D13 */ + <20 0 &gpio0 30 0>, /* D14 */ + <21 0 &gpio0 31 0>; /* D15 */ + }; + + arduino_adc: analog-connector { + compatible = "arduino,uno-adc"; + #io-channel-cells = <1>; + io-channel-map = <0 &adc 1>, /* A0 = P0.14 = AIN1 */ + <1 &adc 2>, /* A1 = P0.15 = AIN2 */ + <2 &adc 3>, /* A2 = P0.16 = AIN3 */ + <3 &adc 4>, /* A3 = P0.17 = AIN4 */ + <4 &adc 5>, /* A4 = P0.18 = AIN5 */ + <5 &adc 6>; /* A5 = P0.19 = AIN6 */ + }; + + /* These aliases are provided for compatibility with samples */ + aliases { + led0 = &led0; + led1 = &led1; + led2 = &led2; + led3 = &led3; + pwm-led0 = &pwm_led0; + sw0 = &button0; + sw1 = &button1; + sw2 = &button2; + sw3 = &button3; + bootloader-led0 = &led0; + mcuboot-button0 = &button0; + mcuboot-led0 = &led0; + watchdog0 = &wdt0; + spi-flash0 = &gd25lb256; + }; +}; + +&adc { + status = "okay"; +}; + +&gpiote { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&uart0 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart0_default>; + pinctrl-1 = <&uart0_sleep>; + pinctrl-names = "default", "sleep"; +}; + +arduino_serial: &uart1 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart1_default>; + pinctrl-1 = <&uart1_sleep>; + pinctrl-names = "default", "sleep"; +}; + +arduino_i2c: &i2c2 { + compatible = "nordic,nrf-twim"; + status = "okay"; + pinctrl-0 = <&i2c2_default>; + pinctrl-1 = <&i2c2_sleep>; + pinctrl-names = "default", "sleep"; + clock-frequency = ; + + pcal6408a: pcal6408a@21 { + compatible = "nxp,pcal6408a"; + status = "disabled"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + int-gpios = <&gpio0 19 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + }; +}; + +&pwm0 { + status = "okay"; + pinctrl-0 = <&pwm0_default>; + pinctrl-1 = <&pwm0_sleep>; + pinctrl-names = "default", "sleep"; +}; + +arduino_spi: &spi3 { + compatible = "nordic,nrf-spim"; + status = "okay"; + cs-gpios = <&arduino_header 16 GPIO_ACTIVE_LOW>, /* D10 */ + <&gpio0 20 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&spi3_default>; + pinctrl-1 = <&spi3_sleep>; + pinctrl-names = "default", "sleep"; + + gd25lb256: gd25lb256e3ir@1 { + compatible = "jedec,spi-nor"; + reg = <1>; + spi-max-frequency = <60000000>; + jedec-id = [c8 67 19]; + sfdp-bfp = [ + e5 20 ea ff ff ff ff 0f 44 eb 08 6b 00 3b 00 bb + fe ff ff ff ff ff 00 ff ff ff 44 eb 0c 20 0f 52 + 10 d8 00 ff d5 31 b1 fe 82 e4 14 4c ec 60 06 33 + 7a 75 7a 75 04 bd d5 5c 29 06 74 00 08 50 00 01 + ]; + size = <268435456>; + has-dpd; + t-enter-dpd = <3000>; + t-exit-dpd = <30000>; + }; +}; + +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x00000000 0x10000>; + }; + slot0_partition: partition@10000 { + label = "image-0"; + }; + slot0_ns_partition: partition@50000 { + label = "image-0-nonsecure"; + }; + slot1_partition: partition@80000 { + label = "image-1"; + }; + slot1_ns_partition: partition@c0000 { + label = "image-1-nonsecure"; + }; + scratch_partition: partition@f0000 { + label = "image-scratch"; + reg = <0x000f0000 0xa000>; + }; + storage_partition: partition@fa000 { + label = "storage"; + reg = <0x000fa000 0x00006000>; + }; + }; +}; + +/ { + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + sram0_s: image_s@20000000 { + /* Secure image memory */ + }; + + sram0_modem: image_modem@20016000 { + /* Modem (shared) memory */ + }; + + sram0_ns: image_ns@20020000 { + /* Non-Secure image memory */ + }; + }; +}; + +/* Include partition configuration file */ +#include "nrf9161dk_nrf9161_partition_conf.dts" diff --git a/boards/arm/nrf9161dk_nrf9161/nrf9161dk_nrf9161_defconfig b/boards/arm/nrf9161dk_nrf9161/nrf9161dk_nrf9161_defconfig new file mode 100644 index 000000000000..cf53dfa11a05 --- /dev/null +++ b/boards/arm/nrf9161dk_nrf9161/nrf9161dk_nrf9161_defconfig @@ -0,0 +1,26 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_SOC_SERIES_NRF91X=y +CONFIG_SOC_NRF9161_SICA=y +CONFIG_BOARD_NRF9161DK_NRF9161=y + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable hardware stack protection +CONFIG_HW_STACK_PROTECTION=y + +# Enable TrustZone-M +CONFIG_ARM_TRUSTZONE_M=y + +# enable GPIO +CONFIG_GPIO=y + +# Enable uart driver +CONFIG_SERIAL=y + +# enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +CONFIG_PINCTRL=y diff --git a/boards/arm/nrf9161dk_nrf9161/nrf9161dk_nrf9161_ns.dts b/boards/arm/nrf9161dk_nrf9161/nrf9161dk_nrf9161_ns.dts new file mode 100644 index 000000000000..623410dc8027 --- /dev/null +++ b/boards/arm/nrf9161dk_nrf9161/nrf9161dk_nrf9161_ns.dts @@ -0,0 +1,17 @@ +/* + * Copyright (c) 2023 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include "nrf9161dk_nrf9161_common.dtsi" + +/ { + chosen { + zephyr,flash = &flash0; + zephyr,sram = &sram0_ns; + zephyr,code-partition = &slot0_ns_partition; + }; +}; diff --git a/boards/arm/nrf9161dk_nrf9161/nrf9161dk_nrf9161_ns.yaml b/boards/arm/nrf9161dk_nrf9161/nrf9161dk_nrf9161_ns.yaml new file mode 100644 index 000000000000..b0b16fc403a3 --- /dev/null +++ b/boards/arm/nrf9161dk_nrf9161/nrf9161dk_nrf9161_ns.yaml @@ -0,0 +1,19 @@ +identifier: nrf9161dk_nrf9161_ns +name: nRF9161-DK-NRF9161-Non-Secure +type: mcu +arch: arm +toolchain: + - gnuarmemb + - xtools + - zephyr +ram: 128 +flash: 192 +supported: + - arduino_gpio + - arduino_i2c + - arduino_serial + - arduino_spi + - i2c + - pwm + - watchdog + - netif:modem diff --git a/boards/arm/nrf9161dk_nrf9161/nrf9161dk_nrf9161_ns_defconfig b/boards/arm/nrf9161dk_nrf9161/nrf9161dk_nrf9161_ns_defconfig new file mode 100644 index 000000000000..475d345e5646 --- /dev/null +++ b/boards/arm/nrf9161dk_nrf9161/nrf9161dk_nrf9161_ns_defconfig @@ -0,0 +1,29 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_SOC_SERIES_NRF91X=y +CONFIG_SOC_NRF9161_SICA=y +CONFIG_BOARD_NRF9161DK_NRF9161_NS=y + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable hardware stack protection +CONFIG_HW_STACK_PROTECTION=y + +# Enable TrustZone-M +CONFIG_ARM_TRUSTZONE_M=y + +# This Board implies building Non-Secure firmware +CONFIG_TRUSTED_EXECUTION_NONSECURE=y + +# enable GPIO +CONFIG_GPIO=y + +# Enable uart driver +CONFIG_SERIAL=y + +# enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +CONFIG_PINCTRL=y diff --git a/boards/arm/nrf9161dk_nrf9161/nrf9161dk_nrf9161_partition_conf.dts b/boards/arm/nrf9161dk_nrf9161/nrf9161dk_nrf9161_partition_conf.dts new file mode 100644 index 000000000000..80b4c5f6b3ab --- /dev/null +++ b/boards/arm/nrf9161dk_nrf9161/nrf9161dk_nrf9161_partition_conf.dts @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2023 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* + * Default Flash planning for nRF9161dk_nrf9161. + * + * Zephyr build for nRF9161 with ARM TrustZone-M support, + * implies building Secure and Non-Secure Zephyr images. + * + * Secure image will be placed, by default, in flash0 + * (or in slot0, if MCUboot is present). + * Secure image will use sram0 for system memory. + * + * Non-Secure image will be placed in slot0_ns, and use + * sram0_ns for system memory. + * + * Note that the Secure image only requires knowledge of + * the beginning of the Non-Secure image (not its size). + */ + +&slot0_partition { + reg = <0x00010000 0x40000>; +}; + +&slot0_ns_partition { + reg = <0x00050000 0x30000>; +}; + +&slot1_partition { + reg = <0x00080000 0x40000>; +}; + +&slot1_ns_partition { + reg = <0x000c0000 0x30000>; +}; + +/* Default SRAM planning when building for nRF9161 with + * ARM TrustZone-M support + * - Lowest 88 kB SRAM allocated to Secure image (sram0_s). + * - 40 kB SRAM reserved for and used by the modem library + * (sram0_modem). This memory is Non-Secure. + * - Upper 128 kB allocated to Non-Secure image (sram0_ns). + * When building with TF-M, both sram0_modem and sram0_ns + * are allocated to the Non-Secure image. + */ + +&sram0_s { + reg = <0x20000000 DT_SIZE_K(88)>; +}; + +&sram0_modem { + reg = <0x20016000 DT_SIZE_K(40)>; +}; + +&sram0_ns { + reg = <0x20020000 DT_SIZE_K(128)>; +}; diff --git a/boards/arm/nrf9161dk_nrf9161/pre_dt_board.cmake b/boards/arm/nrf9161dk_nrf9161/pre_dt_board.cmake new file mode 100644 index 000000000000..c8267afd1b47 --- /dev/null +++ b/boards/arm/nrf9161dk_nrf9161/pre_dt_board.cmake @@ -0,0 +1,7 @@ +# Copyright (c) 2021 Linaro Limited +# SPDX-License-Identifier: Apache-2.0 + +# Suppress "unique_unit_address_if_enabled" to handle the following overlaps: +# - flash-controller@39000 & kmu@39000 +# - power@5000 & clock@5000 +list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled") diff --git a/boards/arm/nucleo_c031c6/Kconfig.board b/boards/arm/nucleo_c031c6/Kconfig.board new file mode 100644 index 000000000000..7cc977547553 --- /dev/null +++ b/boards/arm/nucleo_c031c6/Kconfig.board @@ -0,0 +1,8 @@ +# STM32 Nucleo-64 development board with STM32C031C6 MCU configuration + +# Copyright (c) 2023 Benjamin Björnsson +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_NUCLEO_C031C6 + bool "NUCLEO-64 C031C6 Development Board" + depends on SOC_STM32C031XX diff --git a/boards/arm/nucleo_c031c6/Kconfig.defconfig b/boards/arm/nucleo_c031c6/Kconfig.defconfig new file mode 100644 index 000000000000..acaa8c977eb4 --- /dev/null +++ b/boards/arm/nucleo_c031c6/Kconfig.defconfig @@ -0,0 +1,11 @@ +# STM32 Nucleo-64 development board with STM32C031C6 MCU + +# Copyright (c) 2023 Benjamin Björnsson +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_NUCLEO_C031C6 + +config BOARD + default "nucleo_c031c6" + +endif # BOARD_NUCLEO_C031C6 diff --git a/boards/arm/nucleo_c031c6/arduino_r3_connector.dtsi b/boards/arm/nucleo_c031c6/arduino_r3_connector.dtsi new file mode 100644 index 000000000000..aa818d839de2 --- /dev/null +++ b/boards/arm/nucleo_c031c6/arduino_r3_connector.dtsi @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2023 Benjamin Björnsson + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + arduino_header: connector { + compatible = "arduino-header-r3"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <0 0 &gpioa 0 0>, /* A0 */ + <1 0 &gpioa 1 0>, /* A1 */ + <2 0 &gpioa 4 0>, /* A2 */ + <3 0 &gpiob 1 0>, /* A3 */ + <4 0 &gpioa 11 0>, /* A4 */ + <5 0 &gpioa 12 0>, /* A5 */ + <6 0 &gpiob 7 0>, /* D0 */ + <7 0 &gpiob 6 0>, /* D1 */ + <8 0 &gpioa 10 0>, /* D2 */ + <9 0 &gpiob 3 0>, /* D3 */ + <10 0 &gpiob 10 0>, /* D4 */ + <11 0 &gpiob 4 0>, /* D5 */ + <12 0 &gpiob 5 0>, /* D6 */ + <13 0 &gpioa 15 0>, /* D7 */ + <14 0 &gpioa 9 0>, /* D8 */ + <15 0 &gpioc 7 0>, /* D9 */ + <16 0 &gpiob 0 0>, /* D10 */ + <17 0 &gpioa 7 0>, /* D11 */ + <18 0 &gpioa 6 0>, /* D12 */ + <19 0 &gpioa 5 0>, /* D13 */ + <20 0 &gpiob 9 0>, /* D14 */ + <21 0 &gpiob 8 0>; /* D15 */ + }; +}; + +arduino_serial: &usart1 {}; diff --git a/boards/arm/nucleo_c031c6/board.cmake b/boards/arm/nucleo_c031c6/board.cmake new file mode 100644 index 000000000000..d1a6cbfe6f2f --- /dev/null +++ b/boards/arm/nucleo_c031c6/board.cmake @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw") + +include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake) diff --git a/boards/arm/nucleo_c031c6/doc/img/nucleo_c031c6.jpg b/boards/arm/nucleo_c031c6/doc/img/nucleo_c031c6.jpg new file mode 100644 index 000000000000..0f2bc49efa75 Binary files /dev/null and b/boards/arm/nucleo_c031c6/doc/img/nucleo_c031c6.jpg differ diff --git a/boards/arm/nucleo_c031c6/doc/index.rst b/boards/arm/nucleo_c031c6/doc/index.rst new file mode 100644 index 000000000000..11038e463c82 --- /dev/null +++ b/boards/arm/nucleo_c031c6/doc/index.rst @@ -0,0 +1,147 @@ +.. _nucleo_c031c6_board: + +ST Nucleo C031C6 +################ + +Overview +******** +The STM32 Nucleo-64 development board with STM32C031C6 MCU, supports Arduino and ST morpho connectivity. + +The STM32 Nucleo board provides an affordable, and flexible way for users to try out new concepts, +and build prototypes with the STM32 microcontroller, choosing from the various +combinations of performance, power consumption and features. + +The STM32 Nucleo board integrates the ST-LINK/V2-1 debugger and programmer. + +The STM32 Nucleo board comes with the STM32 comprehensive software HAL library together +with various packaged software examples. + +.. image:: img/nucleo_c031c6.jpg + :align: center + :alt: Nucleo C031C6 + +More information about the board can be found at the `Nucleo C031C6 website`_. + +Hardware +******** +Nucleo C031C6 provides the following hardware components: + +- STM32 microcontroller in 48-pin package featuring 32 Kbytes of Flash memory + and 12 Kbytes of SRAM. +- Extension resource: + + - Arduino* Uno V3 connectivity + +- On-board ST-LINK/V2-1 debugger/programmer with SWD connector: + +- Flexible board power supply: + + - USB VBUS or external source (3.3V, 5V, 7 - 12V) + - Current consumption measurement (IDD) + +- Four LEDs: + + - USB communication (LD1), USB power fault LED (LD2), power LED (LD3), + user LED (LD4) + +- Two push-button: USER and RESET + +- USB re-enumeration capability. Three different interfaces supported on USB: + + - Virtual COM port + - Mass storage + - Debug port + +More information about STM32C031C6 can be found here: +`STM32C0x1 reference manual`_ + +Supported Features +================== + +The Zephyr nucleo_c031c6 board configuration supports the following hardware features: + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+-------------------------------------+ +| UART | on-chip | serial port-polling; | +| | | serial port-interrupt | ++-----------+------------+-------------------------------------+ +| PINMUX | on-chip | pinmux | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+-------------------------------------+ +| CLOCK | on-chip | reset and clock control | ++-----------+------------+-------------------------------------+ +| RTC | on-chip | counter | ++-----------+------------+-------------------------------------+ +| IWDG | on-chip | independent watchdog | ++-----------+------------+-------------------------------------+ +| WWDG | on-chip | window watchdog | ++-----------+------------+-------------------------------------+ +| PWM | on-chip | pwm | ++-----------+------------+-------------------------------------+ +| ADC | on-chip | ADC Controller | ++-----------+------------+-------------------------------------+ +| die-temp | on-chip | die temperature sensor | ++-----------+------------+-------------------------------------+ + +Other hardware features are not yet supported in this Zephyr port. + +The default configuration can be found in the defconfig file: +``boards/arm/nucleo_c031c6/nucleo_c031c6_defconfig`` + +Connections and IOs +=================== + +Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as +input (with or without pull-up or pull-down), or as peripheral alternate function. Most of the +GPIO pins are shared with digital or analog alternate functions. All GPIOs are high current +capable except for analog inputs. + +Default Zephyr Peripheral Mapping: +---------------------------------- + +- UART_2 TX/RX : PA2/PA3 (ST-Link Virtual Port Com) +- LD4 : PA5 + +For mode details please refer to `STM32 Nucleo-64 board User Manual`_. + +Programming and Debugging +************************* + +Applications for the ``nucleo_c031c6`` board configuration can be built and +flashed in the usual way (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +Flashing +======== + +Nucleo C031C6 board includes an ST-LINK/V2-1 embedded debug tool interface. + +Flashing an application to Nucleo C031C6 +---------------------------------------- + +Here is an example for the :ref:`blinky-sample` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/basic/blinky + :board: nucleo_c031c6 + :goals: build flash + +You will see the LED blinking every second. + +References +********** + +.. target-notes:: + +.. _Nucleo C031C6 website: + http://www.st.com/en/evaluation-tools/nucleo-c031c6.html + +.. _STM32C0x1 reference manual: + https://www.st.com/resource/en/reference_manual/rm0490-stm32c0x1-advanced-armbased-64bit-mcus-stmicroelectronics.pdf + +.. _STM32 Nucleo-64 board User Manual: + https://www.st.com/resource/en/user_manual/um2953-stm32c0-nucleo64-board-mb1717-stmicroelectronics.pdf diff --git a/boards/arm/nucleo_c031c6/nucleo_c031c6.dts b/boards/arm/nucleo_c031c6/nucleo_c031c6.dts new file mode 100644 index 000000000000..63fcdf26b761 --- /dev/null +++ b/boards/arm/nucleo_c031c6/nucleo_c031c6.dts @@ -0,0 +1,115 @@ +/* + * Copyright (c) 2023 Benjamin Björnsson + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include +#include "arduino_r3_connector.dtsi" + +/ { + model = "STMicroelectronics STM32C031C6-NUCLEO board"; + compatible = "st,stm32c031c6-nucleo"; + + chosen { + zephyr,console = &usart2; + zephyr,shell-uart = &usart2; + zephyr,sram = &sram0; + zephyr,flash = &flash0; + }; + + leds { + compatible = "gpio-leds"; + green_led_4: led_4 { + gpios = <&gpioa 5 GPIO_ACTIVE_HIGH>; + label = "User LD4"; + }; + }; + + pwmleds { + compatible = "pwm-leds"; + + green_pwm_led: green_pwm_led { + pwms = <&pwm1 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + user_button: button { + label = "user button"; + gpios = <&gpioc 13 GPIO_ACTIVE_LOW>; + status = "okay"; + }; + }; + + aliases { + led0 = &green_led_4; + pwm-led0 = &green_pwm_led; + sw0 = &user_button; + watchdog0 = &iwdg; + die-temp0 = &die_temp; + }; +}; + +&clk_lse { + status = "okay"; +}; + +&clk_hse { + clock-frequency = ; + status = "okay"; +}; + +&rcc { + clocks = <&clk_hse>; + clock-frequency = ; + ahb-prescaler = <1>; + apb1-prescaler = <1>; +}; + +&usart1 { + pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>; + pinctrl-names = "default"; + current-speed = <115200>; +}; + +&usart2 { + pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>; + pinctrl-names = "default"; + current-speed = <115200>; + status = "okay"; +}; + +&rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>, + <&rcc STM32_SRC_LSE RTC_SEL(1)>; + status = "okay"; +}; + +&iwdg { + status = "okay"; +}; + +&timers1 { + st,prescaler = <10000>; + status = "okay"; + + pwm1: pwm { + pinctrl-0 = <&tim1_ch1_pa5>; + pinctrl-names = "default"; + status = "okay"; + }; +}; + +&adc1 { + pinctrl-0 = <&adc1_in0_pa0 &adc1_in1_pa1 &adc1_in4_pa4>; + pinctrl-names = "default"; + status = "okay"; +}; + +&die_temp { + status = "okay"; +}; diff --git a/boards/arm/nucleo_c031c6/nucleo_c031c6.yaml b/boards/arm/nucleo_c031c6/nucleo_c031c6.yaml new file mode 100644 index 000000000000..936544a3fb95 --- /dev/null +++ b/boards/arm/nucleo_c031c6/nucleo_c031c6.yaml @@ -0,0 +1,16 @@ +identifier: nucleo_c031c6 +name: ST Nucleo C031C6 +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb + - xtools +supported: + - gpio + - counter + - watchdog + - pwm + - adc +ram: 12 +flash: 32 diff --git a/boards/arm/nucleo_c031c6/nucleo_c031c6_defconfig b/boards/arm/nucleo_c031c6/nucleo_c031c6_defconfig new file mode 100644 index 000000000000..c955a55e0e45 --- /dev/null +++ b/boards/arm/nucleo_c031c6/nucleo_c031c6_defconfig @@ -0,0 +1,24 @@ +# SPDX-License-Identifier: Apache-2.0 + +# Zephyr Kernel Configuration +CONFIG_SOC_SERIES_STM32C0X=y + +# Platform Configuration +CONFIG_SOC_STM32C031XX=y + +# Serial Drivers +CONFIG_SERIAL=y +CONFIG_UART_INTERRUPT_DRIVEN=y + +# enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# GPIO Controller +CONFIG_GPIO=y + +# Enable Clocks +CONFIG_CLOCK_CONTROL=y + +# enable pin controller +CONFIG_PINCTRL=y diff --git a/boards/arm/nucleo_f031k6/nucleo_f031k6_defconfig b/boards/arm/nucleo_f031k6/nucleo_f031k6_defconfig index c2c8d055a904..87cb9a811488 100644 --- a/boards/arm/nucleo_f031k6/nucleo_f031k6_defconfig +++ b/boards/arm/nucleo_f031k6/nucleo_f031k6_defconfig @@ -7,7 +7,7 @@ CONFIG_SOC_STM32F031X6=y # Kernel Options due to Low Memory (4k) CONFIG_MAIN_STACK_SIZE=512 CONFIG_IDLE_STACK_SIZE=150 -CONFIG_ISR_STACK_SIZE=256 +CONFIG_ISR_STACK_SIZE=512 CONFIG_LOG_BUFFER_SIZE=256 # Prevent Interrupt Vector Table in RAM CONFIG_SRAM_VECTOR_TABLE=n diff --git a/boards/arm/nucleo_f070rb/nucleo_f070rb.dts b/boards/arm/nucleo_f070rb/nucleo_f070rb.dts index 0e3ef9227d48..cb1fed814135 100644 --- a/boards/arm/nucleo_f070rb/nucleo_f070rb.dts +++ b/boards/arm/nucleo_f070rb/nucleo_f070rb.dts @@ -40,6 +40,7 @@ led0 = &green_led_2; sw0 = &user_button; watchdog0 = &iwdg; + die-temp0 = &die_temp; }; }; @@ -107,3 +108,13 @@ &iwdg { status = "okay"; }; + +&adc1 { + pinctrl-0 = <&adc_in0_pa0>; + pinctrl-names = "default"; + status = "okay"; +}; + +&die_temp { + status = "okay"; +}; diff --git a/boards/arm/nucleo_f091rc/nucleo_f091rc.dts b/boards/arm/nucleo_f091rc/nucleo_f091rc.dts index f14b3c6acb9a..3beaee550676 100644 --- a/boards/arm/nucleo_f091rc/nucleo_f091rc.dts +++ b/boards/arm/nucleo_f091rc/nucleo_f091rc.dts @@ -51,6 +51,7 @@ sw0 = &user_button; pwm-led0 = &green_pwm_led; watchdog0 = &iwdg; + die-temp0 = &die_temp; }; }; diff --git a/boards/arm/nucleo_f103rb/nucleo_f103rb.dts b/boards/arm/nucleo_f103rb/nucleo_f103rb.dts index d10bc7983ce8..fc3ebb3152c8 100644 --- a/boards/arm/nucleo_f103rb/nucleo_f103rb.dts +++ b/boards/arm/nucleo_f103rb/nucleo_f103rb.dts @@ -40,6 +40,7 @@ led0 = &green_led_2; sw0 = &user_button; watchdog0 = &iwdg; + die-temp0 = &die_temp; }; }; diff --git a/boards/arm/nucleo_f207zg/nucleo_f207zg.dts b/boards/arm/nucleo_f207zg/nucleo_f207zg.dts index a5b4d4eb1f90..a2b9703b7a4e 100644 --- a/boards/arm/nucleo_f207zg/nucleo_f207zg.dts +++ b/boards/arm/nucleo_f207zg/nucleo_f207zg.dts @@ -73,6 +73,7 @@ red-pwm-led = &red_pwm_led; sw0 = &user_button; watchdog0 = &iwdg; + die-temp0 = &die_temp; }; }; diff --git a/boards/arm/nucleo_f303k8/nucleo_f303k8.dts b/boards/arm/nucleo_f303k8/nucleo_f303k8.dts index 0fd2c635f554..f2c8119cd32f 100644 --- a/boards/arm/nucleo_f303k8/nucleo_f303k8.dts +++ b/boards/arm/nucleo_f303k8/nucleo_f303k8.dts @@ -57,7 +57,7 @@ &rcc { clocks = <&pll>; - clock-frequency = ; + clock-frequency = ; ahb-prescaler = <1>; apb1-prescaler = <2>; apb2-prescaler = <1>; diff --git a/boards/arm/nucleo_f401re/nucleo_f401re.dts b/boards/arm/nucleo_f401re/nucleo_f401re.dts index 5e7089d053f0..5fb38e832faa 100644 --- a/boards/arm/nucleo_f401re/nucleo_f401re.dts +++ b/boards/arm/nucleo_f401re/nucleo_f401re.dts @@ -50,6 +50,7 @@ sw0 = &user_button; pwm-led0 = &green_pwm_led; watchdog0 = &wwdg; + die-temp0 = &die_temp; }; }; diff --git a/boards/arm/nucleo_f429zi/nucleo_f429zi.dts b/boards/arm/nucleo_f429zi/nucleo_f429zi.dts index b3d1df05a3b3..0d69396f026b 100644 --- a/boards/arm/nucleo_f429zi/nucleo_f429zi.dts +++ b/boards/arm/nucleo_f429zi/nucleo_f429zi.dts @@ -52,6 +52,7 @@ led2 = &red_led_1; sw0 = &user_button; watchdog0 = &iwdg; + die-temp0 = &die_temp; }; }; diff --git a/boards/arm/nucleo_f746zg/nucleo_f746zg.dts b/boards/arm/nucleo_f746zg/nucleo_f746zg.dts index f4b113ea8874..921a1796f052 100644 --- a/boards/arm/nucleo_f746zg/nucleo_f746zg.dts +++ b/boards/arm/nucleo_f746zg/nucleo_f746zg.dts @@ -59,6 +59,7 @@ led2 = &red_led; sw0 = &user_button; watchdog0 = &iwdg; + die-temp0 = &die_temp; }; }; diff --git a/boards/arm/nucleo_g070rb/nucleo_g070rb.dts b/boards/arm/nucleo_g070rb/nucleo_g070rb.dts index 84376938e7a4..3935184562be 100644 --- a/boards/arm/nucleo_g070rb/nucleo_g070rb.dts +++ b/boards/arm/nucleo_g070rb/nucleo_g070rb.dts @@ -20,20 +20,6 @@ zephyr,flash = &flash0; }; - power-states { - stop0: state0 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <1>; - min-residency-us = <20>; - }; - stop1: state1 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <2>; - min-residency-us = <100>; - }; - }; leds { compatible = "gpio-leds"; @@ -55,6 +41,7 @@ led0 = &green_led_1; sw0 = &user_button; watchdog0 = &iwdg; + die-temp0 = &die_temp; }; }; diff --git a/boards/arm/nucleo_g071rb/nucleo_g071rb.dts b/boards/arm/nucleo_g071rb/nucleo_g071rb.dts index 35da009f22d3..18fbaaecd64d 100644 --- a/boards/arm/nucleo_g071rb/nucleo_g071rb.dts +++ b/boards/arm/nucleo_g071rb/nucleo_g071rb.dts @@ -21,20 +21,6 @@ zephyr,flash = &flash0; }; - power-states { - stop0: state0 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <1>; - min-residency-us = <20>; - }; - stop1: state1 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <2>; - min-residency-us = <100>; - }; - }; leds { compatible = "gpio-leds"; @@ -56,6 +42,7 @@ led0 = &green_led_1; sw0 = &user_button; watchdog0 = &iwdg; + die-temp0 = &die_temp; }; }; diff --git a/boards/arm/nucleo_g0b1re/nucleo_g0b1re.dts b/boards/arm/nucleo_g0b1re/nucleo_g0b1re.dts index 1880653b4ff8..925163c2bb92 100644 --- a/boards/arm/nucleo_g0b1re/nucleo_g0b1re.dts +++ b/boards/arm/nucleo_g0b1re/nucleo_g0b1re.dts @@ -23,21 +23,6 @@ zephyr,canbus = &can1; }; - power-states { - stop0: state0 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <1>; - min-residency-us = <20>; - }; - stop1: state1 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <2>; - min-residency-us = <100>; - }; - }; - leds { compatible = "gpio-leds"; green_led_1: led_4 { @@ -58,6 +43,7 @@ led0 = &green_led_1; sw0 = &user_button; watchdog0 = &iwdg; + die-temp0 = &die_temp; }; }; diff --git a/boards/arm/nucleo_g474re/nucleo_g474re.dts b/boards/arm/nucleo_g474re/nucleo_g474re.dts index 819bc1cf46a1..d50617e36546 100644 --- a/boards/arm/nucleo_g474re/nucleo_g474re.dts +++ b/boards/arm/nucleo_g474re/nucleo_g474re.dts @@ -45,21 +45,6 @@ }; }; - power-states { - stop0: state0 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <1>; - min-residency-us = <20>; - }; - stop1: state1 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <2>; - min-residency-us = <100>; - }; - }; - cpus { cpu@0 { cpu-power-states = <&stop0 &stop1>; @@ -71,6 +56,7 @@ pwm-led0 = &green_pwm_led; sw0 = &user_button; watchdog0 = &iwdg; + die-temp0 = &die_temp; }; }; diff --git a/boards/arm/nucleo_h563zi/Kconfig.board b/boards/arm/nucleo_h563zi/Kconfig.board new file mode 100644 index 000000000000..debcb2a4ab89 --- /dev/null +++ b/boards/arm/nucleo_h563zi/Kconfig.board @@ -0,0 +1,8 @@ +# STM32H563ZI Nucleo board configuration + +# Copyright (c) 2023 Thomas Stranger +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_NUCLEO_H563ZI + bool "Nucleo H563ZI Development Board" + depends on SOC_STM32H563XX diff --git a/boards/arm/nucleo_h563zi/Kconfig.defconfig b/boards/arm/nucleo_h563zi/Kconfig.defconfig new file mode 100644 index 000000000000..b43ccb20cd4a --- /dev/null +++ b/boards/arm/nucleo_h563zi/Kconfig.defconfig @@ -0,0 +1,11 @@ +# STM32H563ZI Nucleo board configuration + +# Copyright (c) 2023 Thomas Stranger +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_NUCLEO_H563ZI + +config BOARD + default "nucleo_h563zi" + +endif # BOARD_NUCLEO_H563ZI diff --git a/boards/arm/nucleo_h563zi/arduino_r3_connector.dtsi b/boards/arm/nucleo_h563zi/arduino_r3_connector.dtsi new file mode 100644 index 000000000000..cb56530d7e80 --- /dev/null +++ b/boards/arm/nucleo_h563zi/arduino_r3_connector.dtsi @@ -0,0 +1,40 @@ +/* + * Copyright (c) 2021 Linaro Limited + * Copyright (c) 2023 Thomas Stranger + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + arduino_header: connector { + compatible = "arduino-header-r3"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <0 0 &gpioa 6 0>, /* A0 */ + <1 0 &gpioc 0 0>, /* A1 */ + <2 0 &gpioc 3 0>, /* A2 */ + <3 0 &gpiob 1 0>, /* A3 */ + <4 0 &gpioc 2 0>, /* A4 */ + <5 0 &gpiof 11 0>, /* A5 */ + <6 0 &gpiob 7 0>, /* D0 */ + <7 0 &gpiob 6 0>, /* D1 */ + <8 0 &gpiog 14 0>, /* D2 */ + <9 0 &gpioe 13 0>, /* D3 */ + <10 0 &gpioe 14 0>, /* D4 */ + <11 0 &gpioe 11 0>, /* D5 */ + <12 0 &gpioe 9 0>, /* D6 */ + <13 0 &gpiog 12 0>, /* D7 */ + <14 0 &gpiof 3 0>, /* D8 */ + <15 0 &gpiod 15 0>, /* D9 */ + <16 0 &gpiod 14 0>, /* D10 */ + <17 0 &gpiob 5 0>, /* D11 */ + <18 0 &gpiog 9 0>, /* D12 */ + <19 0 &gpioa 5 0>, /* D13 */ + <20 0 &gpiob 9 0>, /* D14 */ + <21 0 &gpiob 8 0>; /* D15 */ + }; +}; + +arduino_serial: &lpuart1 {}; +arduino_spi: &spi1 {}; diff --git a/boards/arm/nucleo_h563zi/board.cmake b/boards/arm/nucleo_h563zi/board.cmake new file mode 100644 index 000000000000..8899e82de745 --- /dev/null +++ b/boards/arm/nucleo_h563zi/board.cmake @@ -0,0 +1,11 @@ +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(stm32cubeprogrammer "--erase" "--port=swd" "--reset-mode=hw") + +board_runner_args(pyocd "--target=stm32h563zitx") + +board_runner_args(jlink "--device=STM32H563ZI" "--reset-after-load") + +include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake) +include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake) +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/arm/nucleo_h563zi/doc/img/nucleo_h563zi.jpg b/boards/arm/nucleo_h563zi/doc/img/nucleo_h563zi.jpg new file mode 100644 index 000000000000..1b758375f04e Binary files /dev/null and b/boards/arm/nucleo_h563zi/doc/img/nucleo_h563zi.jpg differ diff --git a/boards/arm/nucleo_h563zi/doc/index.rst b/boards/arm/nucleo_h563zi/doc/index.rst new file mode 100644 index 000000000000..1c1acf62e0e1 --- /dev/null +++ b/boards/arm/nucleo_h563zi/doc/index.rst @@ -0,0 +1,315 @@ +.. _nucleo_h563zi_board: + +ST Nucleo H563ZI +################ + +Overview +******** + +The Nucleo H563ZI board is designed as an affordable development platform for +STMicroelectronics ARM |reg| Cortex |reg|-M33 core-based STM32H563ZIT6 +microcontroller with TrustZone |reg|. +Here are some highlights of the Nucleo H563ZI board: + +- STM32H563ZI microcontroller featuring 2 Mbytes of Flash memory and 640Kbyte of + SRAM in LQFP144 package +- Board connectors: + + - USB Type-C |trade| Sink device FS + - Ethernet RJ45 connector compliant with IEEE-802.3-2002 (depending on STM32 support) + - ST Zio expansion connector including Arduino Uno V3 connectivity (CN7, CN8, CN9, CN10) + - ST morpho extension connector (CN11, CN12) + +- Flexible board power supply: + + - 5V_USB_STLK from ST-Link USB connector + - VIN (7 - 12V, 0.8A) supplied via pin header CN8 pin 15 or CN11 pin 24 + - 5V_EXT on the ST morpho connector CN11 Pin 6 (5V, 1.3) + - CHGR from a USB charger via the ST-LINK USB connector + - USB_USER from the USB user connector (5V, 3A) + - 3V3_EXT supplied via a pin header CN8 pin 7 or CN11 pin 16 (3.3V, 1.3A) + +- On-board ST-LINK/V3EC debugger/programmer + + - mass storage + - Virtual COM port + - debug port + +- Three users LEDs +- Two push-buttons: USER and RESET +- 32.789 kHz crystal oscillator + +More information about the board can be found at the `NUCLEO_H563ZI website`_. + +.. image:: img/nucleo_h563zi.jpg + :align: center + :alt: NUCLEO H563ZI + +Hardware +******** + +The STM32H563xx devices are high-performance microcontrollers from the STM32H5 +Series based on the high-performance Arm |reg| Cortex |reg|-M33 32-bit RISC core. +They operate at a frequency of up to 250 MHz. + +- Core: ARM |reg| 32-bit Cortex |reg| -M33 CPU with TrustZone |reg| and FPU. +- Performance benchmark: + + - 375 DMPIS/MHz (Dhrystone 2.1) + +- Security + + - Arm |reg| TrustZone |reg| with ARMv8-M mainline security extension + - Up to 8 configurable SAU regions + - TrustZone |reg| aware and securable peripherals + - Flexible lifecycle scheme with secure debug authentication + - SFI (secure firmware installation) + - Secure firmware upgrade support with TF-M + - HASH hardware accelerator + - True random number generator, NIST SP800-90B compliant + - 96-bit unique ID + - Active tampers + +- Clock management: + + - 25 MHz crystal oscillator (HSE) + - 32 kHz crystal oscillator for RTC (LSE) + - Internal 64 MHz (HSI) trimmable by software + - Internal low-power 32 kHz RC (LSI)( |plusminus| 5%) + - Internal 4 MHz oscillator (CSI), trimmable by software + - Internal 48 MHz (HSI48) with recovery system + - 3 PLLs for system clock, USB, audio, ADC + +- Power management + + - Embedded regulator (LDO) with three configurable range output to supply the digital circuitry + - Embedded SMPS step-down converter + +- RTC with HW calendar, alarms and calibration +- Up to 139 fast I/Os, most 5 V-tolerant, up to 10 I/Os with independent supply down to 1.08 V +- Up to 16 timers and 2 watchdogs + + - 12x 16-bit + - 2x 32-bit timers with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input + - 6x 16-bit low-power 16-bit timers (available in Stop mode) + - 2x watchdogs + - 2x SysTick timer + +- Memories + + - Up to 2 MB Flash, 2 banks read-while-write + - 1 Kbyte OTP (one-time programmable) + - 640 KB of SRAM including 64 KB with hardware parity check and 320 Kbytes with flexible ECC + - 4 Kbytes of backup SRAM available in the lowest power modes + - Flexible external memory controller with up to 16-bit data bus: SRAM, PSRAM, FRAM, SDRAM/LPSDR SDRAM, NOR/NAND memories + - 1x OCTOSPI memory interface with on-the-fly decryption and support for serial PSRAM/NAND/NOR, Hyper RAM/Flash frame formats + - 2x SD/SDIO/MMC interfaces + +- Rich analog peripherals (independent supply) + + - 2x 12-bit ADC with up to 5 MSPS in 12-bit + - 1x 12-bit D/A with 2 channels + - 1x Digital temperature sensor + +- 34x communication interfaces + + - 1x USB Type-C / USB power-delivery controller + - 1x USB 2.0 full-speed host and device + - 4x I2C FM+ interfaces (SMBus/PMBus) + - 1x I3C interface + - 12x U(S)ARTS (ISO7816 interface, LIN, IrDA, modem control) + - 1x LP UART + - 6x SPIs including 3 muxed with full-duplex I2S + - 5x additional SPI from 5x USART when configured in Synchronous mode + - 2x SAI + - 2x FDCAN + - 1x SDMMC interface + - 2x 16 channel DMA controllers + - 1x 8- to 14- bit camera interface + - 1x HDMI-CEC + - 1x Ethernel MAC interface with DMA controller + - 1x 16-bit parallel slave synchronous-interface + +- CORDIC for trigonometric functions acceleration +- FMAC (filter mathematical accelerator) +- CRC calculation unit +- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade| + +More information about STM32H563ZI can be found here: + +- `STM32H563ZI on www.st.com`_ +- `STM32H563 reference manual`_ + +Supported Features +================== + +The Zephyr nucleo_h563zi board configuration supports the following hardware features: + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| ADC | on-chip | ADC Controller | ++-----------+------------+-------------------------------------+ +| CLOCK | on-chip | reset and clock control | ++-----------+------------+-------------------------------------+ +| DAC | on-chip | DAC Controller | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+-------------------------------------+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+-------------------------------------+ +| PINMUX | on-chip | pinmux | ++-----------+------------+-------------------------------------+ +| PWM | on-chip | PWM | ++-----------+------------+-------------------------------------+ +| RNG | on-chip | True Random number generator | ++-----------+------------+-------------------------------------+ +| RTC | on-chip | Real Time Clock | ++-----------+------------+-------------------------------------+ +| SPI | on-chip | spi bus | ++-----------+------------+-------------------------------------+ +| UART | on-chip | serial port-polling; | +| | | serial port-interrupt | ++-----------+------------+-------------------------------------+ +| WATCHDOG | on-chip | independent watchdog | ++-----------+------------+-------------------------------------+ + + +Other hardware features are not yet supported on this Zephyr port. + +The default configuration can be found in the defconfig and dts files: + +- Secure target: + + - :zephyr_file:`boards/arm/nucleo_h563zi/nucleo_h563zi_defconfig` + - :zephyr_file:`boards/arm/nucleo_h563zi/nucleo_h563zi.dts` + +Zephyr board options +==================== + +The STM32H563 is an SoC with Cortex-M33 architecture. Zephyr provides support +for building for Secure firmware. + +The BOARD options are summarized below: + ++----------------------+-----------------------------------------------+ +| BOARD | Description | ++======================+===============================================+ +| nucleo_h563zi | For building Secure firmware | ++----------------------+-----------------------------------------------+ + +Connections and IOs +=================== + +Nucleo H563ZI Board has 9 GPIO controllers. These controllers are responsible for pin muxing, +input/output, pull-up, etc. + +For mode details please refer to `STM32H5 Nucleo-144 board User Manual`_. + +Default Zephyr Peripheral Mapping: +---------------------------------- + +- ADC1 channel 3 input: PA6 +- ADC1 channel 15 input: PA3 +- DAC1 channel 2 output: PA5 +- LD1 (green): PB0 +- LD2 (yellow): PF4 +- LD3 (red): PG4 +- LPUART1 TX/RX : PB6/PB7 (Arduino LPUART1) +- SPI1 SCK/MISO/MOSI/CS: PA5/PG9/PB5/PD14 +- UART3 TX/RX : PD8/PD9 (VCP) +- USER_PB : PC13 + +System Clock +------------ + +Nucleo H563ZI System Clock could be driven by internal or external oscillator, +as well as main PLL clock. By default System clock is driven by PLL clock at +240MHz, driven by 8MHz external clock provided from the STLINK-V3EC. + +Serial Port +----------- + +Nucleo H563ZI board has up to 12 U(S)ARTs. The Zephyr console output is assigned +to USART3. Default settings are 115200 8N1. + +Programming and Debugging +************************* + +Applications for the ``nucleo_h563zi`` board can be built and +flashed in the usual way (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +Flashing +======== + +Nucleo H563ZI board includes an ST-LINK/V3EC embedded debug tool interface. +This probe allows to flash the board using various tools. + +Board is configured to be flashed using west STM32CubeProgrammer runner. +Installation of `STM32CubeProgrammer`_ is then required to flash the board. + +Alternatively, pyocd or jlink via an external probe can also be used to flash +and debug the board if west is told to use it as runner, which can be done by +passing either or ``-r pyocd``, or ``-r jlink``. + +For pyocd additional target information needs to be installed. +This can be done by executing the following commands. + +.. code-block:: console + + $ pyocd pack --update + $ pyocd pack --install stm32h5 + + +Flashing an application to Nucleo H563ZI +------------------------------------------ + +Connect the Nucleo H563ZI to your host computer using the USB port. +Then build and flash an application. Here is an example for the +:ref:`hello_world` application. + +Run a serial host program to connect with your Nucleo board: + +.. code-block:: console + + $ minicom -D /dev/ttyACM0 + +Then build and flash the application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: nucleo_h563zi + :goals: build flash + +You should see the following message on the console: + +.. code-block:: console + + Hello World! nucleo_h563zi + +Debugging +========= + +You can debug an application in the usual way. Here is an example for the +:ref:`blinky-sample` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/basic/blinky + :board: nucleo_h563zi + :goals: debug + +.. _NUCLEO_H563ZI website: + https://www.st.com/en/evaluation-tools/nucleo-h563zi + +.. _STM32H5 Nucleo-144 board User Manual: + https://www.st.com/resource/en/user_manual/um3115-stm32h5-nucleo144-board-mb1404-stmicroelectronics.pdf + +.. _STM32H563ZI on www.st.com: + http://www.st.com/en/microcontrollers/stm32h563zi.html + +.. _STM32H563 reference manual: + https://www.st.com/resource/en/reference_manual/rm0481-stm32h563h573-and-stm32h562-armbased-32bit-mcus-stmicroelectronics.pdf + +.. _STM32CubeProgrammer: + https://www.st.com/en/development-tools/stm32cubeprog.html diff --git a/boards/arm/nucleo_h563zi/nucleo_h563zi-common.dtsi b/boards/arm/nucleo_h563zi/nucleo_h563zi-common.dtsi new file mode 100644 index 000000000000..22093665f938 --- /dev/null +++ b/boards/arm/nucleo_h563zi/nucleo_h563zi-common.dtsi @@ -0,0 +1,167 @@ +/* + * Copyright (c) 2021 Linaro Limited + * Copyright (c) 2023 Thomas Stranger + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include "arduino_r3_connector.dtsi" + +/ { + leds { + compatible = "gpio-leds"; + green_led_1: led_1 { + gpios = <&gpiob 0 GPIO_ACTIVE_HIGH>; + label = "User LD1"; + }; + yellow_led_1: led_2 { + gpios = <&gpiof 4 GPIO_ACTIVE_HIGH>; + label = "User LD2"; + }; + red_led_1: led_3 { + gpios = <&gpiog 4 GPIO_ACTIVE_HIGH>; + label = "User LD3"; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + user_button: button { + label = "User"; + gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>; + }; + }; + + pwmleds: pwmleds { + compatible = "pwm-leds"; + status = "disabled"; + + pwm_led_1: green_led_1 { + pwms = <&pwm3 3 PWM_MSEC(20) PWM_POLARITY_NORMAL>; + label = "green led"; + }; + }; +}; + +&clk_hse { + clock-frequency = ; /* STLink 8MHz clock */ + hse-bypass; + status = "okay"; +}; + +&clk_hsi48 { + status = "okay"; +}; + +&clk_lse { + status = "okay"; +}; + +&pll { + div-m = <2>; + mul-n = <120>; + div-p = <2>; + div-q = <2>; + div-r = <2>; + clocks = <&clk_hse>; + status = "okay"; +}; + +&rcc { + clocks = <&pll>; + clock-frequency = ; + ahb-prescaler = <1>; + apb1-prescaler = <1>; + apb2-prescaler = <1>; + apb3-prescaler = <1>; +}; + +&lpuart1 { + pinctrl-0 = <&lpuart1_tx_pb6 &lpuart1_rx_pb7>; + pinctrl-names = "default"; + current-speed = <115200>; + status = "okay"; +}; + +&usart3 { + pinctrl-0 = <&usart3_tx_pd8 &usart3_rx_pd9>; + pinctrl-names = "default"; + current-speed = <115200>; + status = "okay"; +}; + +&spi1 { + pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pg9 &spi1_mosi_pb5>; + pinctrl-names = "default"; + cs-gpios = <&gpiod 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + status = "okay"; +}; + +&timers3 { + st,prescaler = <10000>; + status = "okay"; + + pwm3: pwm { + status = "okay"; + pinctrl-0 = <&tim3_ch3_pb0>; + pinctrl-names = "default"; + }; +}; + +&rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB3 0x00200000>, + <&rcc STM32_SRC_LSE RTC_SEL(1)>; + status = "okay"; +}; + +&iwdg { + status = "okay"; +}; + +&gpdma1 { + status = "okay"; +}; + +&gpdma2 { + status = "okay"; +}; + +&dac1 { + /* outputs only on 2 pins and pa4 is reserved for VBUS_SENSE */ + pinctrl-0 = <&dac1_out2_pa5>; /* Zio D13 (on CN7) */ + pinctrl-names = "default"; + status = "okay"; +}; + +&adc1 { + pinctrl-0 = <&adc1_inp3_pa6 &adc1_inp15_pa3>; /* Zio A0, Zio D35 */ + pinctrl-names = "default"; + status = "okay"; +}; + +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x00000000 DT_SIZE_K(64)>; + }; + slot0_partition: partition@10000 { + label = "image-0"; + reg = <0x00010000 DT_SIZE_K(960)>; + }; + slot1_partition: partition@100000 { + label = "image-1"; + reg = <0x00100000 DT_SIZE_K(960)>; + }; + storage_partition: partition@1f0000 { + label = "storage"; + reg = <0x001f0000 DT_SIZE_K(64)>; + }; + }; +}; diff --git a/boards/arm/nucleo_h563zi/nucleo_h563zi.dts b/boards/arm/nucleo_h563zi/nucleo_h563zi.dts new file mode 100644 index 000000000000..1a30889ea034 --- /dev/null +++ b/boards/arm/nucleo_h563zi/nucleo_h563zi.dts @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2021 Linaro Limited + * Copyright (c) 2023 Thomas Stranger + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include "nucleo_h563zi-common.dtsi" + +/ { + model = "STMicroelectronics STM32H563ZI-NUCLEO board"; + compatible = "st,stm32h563zi-nucleo"; + + #address-cells = <1>; + #size-cells = <1>; + + chosen { + zephyr,console = &usart3; + zephyr,shell-uart = &usart3; + zephyr,sram = &sram0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + }; + + aliases { + led0 = &green_led_1; + sw0 = &user_button; + watchdog0 = &iwdg; + pwm-led0 = &pwm_led_1; + }; +}; + +&rng { + status = "okay"; +}; diff --git a/boards/arm/nucleo_h563zi/nucleo_h563zi.yaml b/boards/arm/nucleo_h563zi/nucleo_h563zi.yaml new file mode 100644 index 000000000000..39ce37e4f771 --- /dev/null +++ b/boards/arm/nucleo_h563zi/nucleo_h563zi.yaml @@ -0,0 +1,21 @@ +identifier: nucleo_h563zi +name: ST Nucleo H563ZI +type: mcu +arch: arm +toolchain: + - zephyr +ram: 640 +flash: 2048 +supported: + - arduino_gpio + - gpio + - arduino_serial + - arduino_spi + - gpio + - uart + - entropy + - adc + - dac + - pwm + - counter + - spi diff --git a/boards/arm/nucleo_h563zi/nucleo_h563zi_defconfig b/boards/arm/nucleo_h563zi/nucleo_h563zi_defconfig new file mode 100644 index 000000000000..a14e2d48eec0 --- /dev/null +++ b/boards/arm/nucleo_h563zi/nucleo_h563zi_defconfig @@ -0,0 +1,25 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_SOC_SERIES_STM32H5X=y +CONFIG_SOC_STM32H563XX=y + +# enable uart driver +CONFIG_SERIAL=y + +# console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# Enable clock +CONFIG_CLOCK_CONTROL=y + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable HW stack protection +CONFIG_HW_STACK_PROTECTION=y + +# enable GPIO +CONFIG_GPIO=y +# enable pin controller +CONFIG_PINCTRL=y diff --git a/boards/arm/nucleo_h723zg/nucleo_h723zg.dts b/boards/arm/nucleo_h723zg/nucleo_h723zg.dts index 6a98ed55d1da..0addd56d72bc 100644 --- a/boards/arm/nucleo_h723zg/nucleo_h723zg.dts +++ b/boards/arm/nucleo_h723zg/nucleo_h723zg.dts @@ -35,6 +35,10 @@ gpios = <&gpioe 1 GPIO_ACTIVE_HIGH>; label = "User LD2"; }; + red_led: led_2 { + gpios = <&gpiob 14 GPIO_ACTIVE_HIGH>; + label = "User LD3"; + }; }; pwmleds { @@ -57,6 +61,7 @@ aliases { led0 = &green_led; led1 = &yellow_led; + led2 = &red_led; pwm-led0 = &red_pwm_led; sw0 = &user_button; }; diff --git a/boards/arm/nucleo_h743zi/nucleo_h743zi.dts b/boards/arm/nucleo_h743zi/nucleo_h743zi.dts index 6c57d6636298..b7218893a622 100644 --- a/boards/arm/nucleo_h743zi/nucleo_h743zi.dts +++ b/boards/arm/nucleo_h743zi/nucleo_h743zi.dts @@ -57,6 +57,7 @@ pwm-led0 = &red_pwm_led; sw0 = &user_button; watchdog0 = &iwdg; + die-temp0 = &die_temp; }; }; diff --git a/boards/arm/nucleo_l073rz/nucleo_l073rz.dts b/boards/arm/nucleo_l073rz/nucleo_l073rz.dts index 72023ac26b97..ef8e2d3a33d6 100644 --- a/boards/arm/nucleo_l073rz/nucleo_l073rz.dts +++ b/boards/arm/nucleo_l073rz/nucleo_l073rz.dts @@ -61,6 +61,7 @@ pwm-led0 = &green_pwm_led; watchdog0 = &iwdg; eeprom-0 = &eeprom; + die-temp0 = &die_temp; }; }; diff --git a/boards/arm/nucleo_l152re/nucleo_l152re.dts b/boards/arm/nucleo_l152re/nucleo_l152re.dts index 0ad6825eed0d..985a0b5a684b 100644 --- a/boards/arm/nucleo_l152re/nucleo_l152re.dts +++ b/boards/arm/nucleo_l152re/nucleo_l152re.dts @@ -41,6 +41,7 @@ sw0 = &user_button; eeprom-0 = &eeprom; watchdog0 = &iwdg; + die-temp0 = &die_temp; }; }; diff --git a/boards/arm/nucleo_l476rg/nucleo_l476rg.dts b/boards/arm/nucleo_l476rg/nucleo_l476rg.dts index b77274b7b590..eaa5f54b9cde 100644 --- a/boards/arm/nucleo_l476rg/nucleo_l476rg.dts +++ b/boards/arm/nucleo_l476rg/nucleo_l476rg.dts @@ -20,27 +20,6 @@ zephyr,flash = &flash0; }; - power-states { - stop0: state0 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <1>; - min-residency-us = <500>; - }; - stop1: state1 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <2>; - min-residency-us = <700>; - }; - stop2: state2 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <3>; - min-residency-us = <1000>; - }; - }; - leds { compatible = "gpio-leds"; green_led_2: led_2 { diff --git a/boards/arm/nucleo_l552ze_q/nucleo_l552ze_q-common.dtsi b/boards/arm/nucleo_l552ze_q/nucleo_l552ze_q-common.dtsi index d10619d374fa..72a4189bac19 100644 --- a/boards/arm/nucleo_l552ze_q/nucleo_l552ze_q-common.dtsi +++ b/boards/arm/nucleo_l552ze_q/nucleo_l552ze_q-common.dtsi @@ -32,6 +32,10 @@ gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>; }; }; + + aliases { + die-temp0 = &die_temp; + }; }; &clk_hsi48 { diff --git a/boards/arm/nucleo_wb55rg/nucleo_wb55rg.dts b/boards/arm/nucleo_wb55rg/nucleo_wb55rg.dts index e6972cd6ee35..a75a28c03a40 100644 --- a/boards/arm/nucleo_wb55rg/nucleo_wb55rg.dts +++ b/boards/arm/nucleo_wb55rg/nucleo_wb55rg.dts @@ -23,27 +23,6 @@ zephyr,code-partition = &slot0_partition; }; - power-states { - stop0: state0 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <1>; - min-residency-us = <100>; - }; - stop1: state1 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <2>; - min-residency-us = <500>; - }; - stop2: state2 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <3>; - min-residency-us = <900>; - }; - }; - leds { compatible = "gpio-leds"; blue_led_1: led_0 { @@ -82,6 +61,7 @@ sw1 = &user_button_2; sw2 = &user_button_3; watchdog0 = &iwdg; + die-temp0 = &die_temp; }; }; diff --git a/boards/arm/nucleo_wl55jc/nucleo_wl55jc.dts b/boards/arm/nucleo_wl55jc/nucleo_wl55jc.dts index 06d6a4d0c274..af81c56c4292 100644 --- a/boards/arm/nucleo_wl55jc/nucleo_wl55jc.dts +++ b/boards/arm/nucleo_wl55jc/nucleo_wl55jc.dts @@ -60,27 +60,7 @@ sw2 = &user_button_3; lora0 = &lora; watchdog0 = &iwdg; - }; - - power-states { - stop0: state0 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <1>; - min-residency-us = <100>; - }; - stop1: state1 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <2>; - min-residency-us = <500>; - }; - stop2: state2 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <3>; - min-residency-us = <900>; - }; + die-temp0 = &die_temp; }; }; diff --git a/boards/arm/olimex_lora_stm32wl_devkit/doc/olimex_lora_stm32wl_devkit.rst b/boards/arm/olimex_lora_stm32wl_devkit/doc/olimex_lora_stm32wl_devkit.rst index 4429a9f44aba..8185d7ef445d 100644 --- a/boards/arm/olimex_lora_stm32wl_devkit/doc/olimex_lora_stm32wl_devkit.rst +++ b/boards/arm/olimex_lora_stm32wl_devkit/doc/olimex_lora_stm32wl_devkit.rst @@ -116,6 +116,15 @@ Connect the board to your host computer and build and flash an application. :board: olimex_lora_stm32wl_devkit :goals: build flash +If you're using devkit revision C or higher, you'll need to specify the +appropriate revision letter to enable the VDDIO supply to the UEXT1 connector and +CON1 pin header. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: olimex_lora_stm32wl_devkit@D + :goals: build flash + Run a serial terminal to connect with your board. By default, ``usart1`` is accessible via the the built-in USB to UART converter. @@ -135,6 +144,14 @@ You can debug an application in the usual way. Here is an example for the :maybe-skip-config: :goals: debug +On board revisions C or newer: + +.. zephyr-app-commands:: + :zephyr-app: samples/basic/blinky + :board: olimex_lora_stm32wl_devkit@D + :maybe-skip-config: + :goals: debug + .. _LoRa-STM32WL-DevKit Repository: https://github.com/OLIMEX/LoRa-STM32WL-DevKIT diff --git a/boards/arm/olimex_lora_stm32wl_devkit/olimex_lora_stm32wl_devkit.dts b/boards/arm/olimex_lora_stm32wl_devkit/olimex_lora_stm32wl_devkit.dts index 34b7edf937d2..8655ee06add6 100644 --- a/boards/arm/olimex_lora_stm32wl_devkit/olimex_lora_stm32wl_devkit.dts +++ b/boards/arm/olimex_lora_stm32wl_devkit/olimex_lora_stm32wl_devkit.dts @@ -41,27 +41,6 @@ lora0 = &lora; watchdog0 = &iwdg; }; - - power-states { - stop0: state0 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <1>; - min-residency-us = <100>; - }; - stop1: state1 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <2>; - min-residency-us = <500>; - }; - stop2: state2 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <3>; - min-residency-us = <900>; - }; - }; }; &cpu0 { @@ -97,7 +76,7 @@ }; uext_serial: &lpuart1 { - pinctrl-0 = <&lpuart1_tx_pa2 &lpuart1_rx_pa3 &lpuart1_cts_pa6 &lpuart1_rts_pb12>; + pinctrl-0 = <&lpuart1_tx_pa2 &lpuart1_rx_pa3>; pinctrl-names = "default"; current-speed = <115200>; status = "okay"; diff --git a/boards/arm/olimex_lora_stm32wl_devkit/olimex_lora_stm32wl_devkit_C.conf b/boards/arm/olimex_lora_stm32wl_devkit/olimex_lora_stm32wl_devkit_C.conf new file mode 100644 index 000000000000..d85d30bcc638 --- /dev/null +++ b/boards/arm/olimex_lora_stm32wl_devkit/olimex_lora_stm32wl_devkit_C.conf @@ -0,0 +1,2 @@ +# Regulator support +CONFIG_REGULATOR=y diff --git a/boards/arm/olimex_lora_stm32wl_devkit/olimex_lora_stm32wl_devkit_C.overlay b/boards/arm/olimex_lora_stm32wl_devkit/olimex_lora_stm32wl_devkit_C.overlay new file mode 100644 index 000000000000..409eea74122e --- /dev/null +++ b/boards/arm/olimex_lora_stm32wl_devkit/olimex_lora_stm32wl_devkit_C.overlay @@ -0,0 +1,15 @@ +/* + * Copyright (c) 2023 Kenneth J. Miller + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + /* Controls 3.3V VDDIO supply for UEXT1 connector and CON1 header */ + vddio_reg: fet2_regulator { + compatible = "regulator-fixed"; + enable-gpios = <&gpiob 12 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + regulator-name = "fet2_regulator"; + regulator-boot-on; + }; +}; diff --git a/boards/arm/olimex_lora_stm32wl_devkit/olimex_lora_stm32wl_devkit_D.conf b/boards/arm/olimex_lora_stm32wl_devkit/olimex_lora_stm32wl_devkit_D.conf new file mode 100644 index 000000000000..d85d30bcc638 --- /dev/null +++ b/boards/arm/olimex_lora_stm32wl_devkit/olimex_lora_stm32wl_devkit_D.conf @@ -0,0 +1,2 @@ +# Regulator support +CONFIG_REGULATOR=y diff --git a/boards/arm/olimex_lora_stm32wl_devkit/olimex_lora_stm32wl_devkit_D.overlay b/boards/arm/olimex_lora_stm32wl_devkit/olimex_lora_stm32wl_devkit_D.overlay new file mode 100644 index 000000000000..f095edf4fc52 --- /dev/null +++ b/boards/arm/olimex_lora_stm32wl_devkit/olimex_lora_stm32wl_devkit_D.overlay @@ -0,0 +1,7 @@ +/* + * Copyright (c) 2023 Kenneth J. Miller + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "olimex_lora_stm32wl_devkit_C.overlay" diff --git a/boards/arm/olimex_lora_stm32wl_devkit/revision.cmake b/boards/arm/olimex_lora_stm32wl_devkit/revision.cmake new file mode 100644 index 000000000000..96501fe7e0b5 --- /dev/null +++ b/boards/arm/olimex_lora_stm32wl_devkit/revision.cmake @@ -0,0 +1,11 @@ +# +# Copyright (c) 2023 Kenneth J. Miller +# +# SPDX-License-Identifier: Apache-2.0 +# + +board_check_revision( + FORMAT LETTER + DEFAULT_REVISION B + VALID_REVISIONS A B C D +) diff --git a/boards/arm/particle_argon/board.c b/boards/arm/particle_argon/board.c index 7357c33882e4..3dbff3cb87f4 100644 --- a/boards/arm/particle_argon/board.c +++ b/boards/arm/particle_argon/board.c @@ -28,9 +28,8 @@ static inline void external_antenna(bool on) gpio_pin_configure_dt(&pcb_gpio, (on ? GPIO_OUTPUT_INACTIVE : GPIO_OUTPUT_ACTIVE)); } -static int board_particle_argon_init(const struct device *dev) +static int board_particle_argon_init(void) { - ARG_UNUSED(dev); /* * On power-up the SKY13351 is left uncontrolled, so neither diff --git a/boards/arm/particle_boron/board.c b/boards/arm/particle_boron/board.c index 0213cd62fedb..7f313336c112 100644 --- a/boards/arm/particle_boron/board.c +++ b/boards/arm/particle_boron/board.c @@ -27,9 +27,8 @@ static inline void external_antenna(bool on) gpio_pin_configure_dt(&ufl_gpio, (on ? GPIO_OUTPUT_ACTIVE : GPIO_OUTPUT_INACTIVE)); } -static int board_particle_boron_init(const struct device *dev) +static int board_particle_boron_init(void) { - ARG_UNUSED(dev); external_antenna(false); diff --git a/boards/arm/particle_xenon/board.c b/boards/arm/particle_xenon/board.c index d6d2b890bb6e..9c29e77a5807 100644 --- a/boards/arm/particle_xenon/board.c +++ b/boards/arm/particle_xenon/board.c @@ -28,9 +28,8 @@ static inline void external_antenna(bool on) gpio_pin_configure_dt(&pcb_gpio, (on ? GPIO_OUTPUT_INACTIVE : GPIO_OUTPUT_ACTIVE)); } -static int board_particle_xenon_init(const struct device *dev) +static int board_particle_xenon_init(void) { - ARG_UNUSED(dev); /* * On power-up the SKY13351 is left uncontrolled, so neither diff --git a/boards/arm/pinetime_devkit0/key_out.c b/boards/arm/pinetime_devkit0/key_out.c index 66eddc27f087..db8f3506f934 100644 --- a/boards/arm/pinetime_devkit0/key_out.c +++ b/boards/arm/pinetime_devkit0/key_out.c @@ -15,9 +15,8 @@ LOG_MODULE_REGISTER(pine64_pinetime_key_out); static const struct gpio_dt_spec key_out = GPIO_DT_SPEC_GET(KEY_OUT_NODE, gpios); -static int pinetime_key_out_init(const struct device *arg) +static int pinetime_key_out_init(void) { - ARG_UNUSED(arg); int ret; if (!device_is_ready(key_out.port)) { diff --git a/boards/arm/qemu_cortex_m0/nrf_timer_timer.c b/boards/arm/qemu_cortex_m0/nrf_timer_timer.c index 203ece46b06a..eb12afaf532f 100644 --- a/boards/arm/qemu_cortex_m0/nrf_timer_timer.c +++ b/boards/arm/qemu_cortex_m0/nrf_timer_timer.c @@ -232,9 +232,8 @@ uint32_t sys_clock_cycle_get_32(void) return ret; } -static int sys_clock_driver_init(const struct device *dev) +static int sys_clock_driver_init(void) { - ARG_UNUSED(dev); /* FIXME switch to 1 MHz once this is fixed in QEMU */ nrf_timer_prescaler_set(TIMER, NRF_TIMER_FREQ_2MHz); diff --git a/boards/arm/qomu/board.c b/boards/arm/qomu/board.c index e62357f20443..d6752dff9133 100644 --- a/boards/arm/qomu/board.c +++ b/boards/arm/qomu/board.c @@ -8,9 +8,8 @@ #include #include "board.h" -static int qomu_board_init(const struct device *arg) +static int qomu_board_init(void) { - ARG_UNUSED(arg); /* IO MUX setup for UART */ eos_s3_io_mux(UART_TX_PAD, UART_TX_PAD_CFG); diff --git a/boards/arm/quick_feather/board.c b/boards/arm/quick_feather/board.c index c05ca4ba9a10..cf89c208ced0 100644 --- a/boards/arm/quick_feather/board.c +++ b/boards/arm/quick_feather/board.c @@ -8,9 +8,8 @@ #include #include -static int eos_s3_board_init(const struct device *arg) +static int eos_s3_board_init(void) { - ARG_UNUSED(arg); /* IO MUX setup for UART */ eos_s3_io_mux(UART_TX_PAD, UART_TX_PAD_CFG); diff --git a/boards/arm/reel_board/board.c b/boards/arm/reel_board/board.c index 6a3d90c6afb7..3a94dbc05748 100644 --- a/boards/arm/reel_board/board.c +++ b/boards/arm/reel_board/board.c @@ -10,9 +10,8 @@ /* Peripheral voltage ON/OFF GPIO */ #define PERIPH_PON_PIN 0 -static int board_reel_board_init(const struct device *dev) +static int board_reel_board_init(void) { - ARG_UNUSED(dev); volatile NRF_GPIO_Type *gpio = NRF_P1; /* diff --git a/boards/arm/rpi_pico/rpi_pico.yaml b/boards/arm/rpi_pico/rpi_pico.yaml index 96aa12649e64..d3baa1f1822f 100644 --- a/boards/arm/rpi_pico/rpi_pico.yaml +++ b/boards/arm/rpi_pico/rpi_pico.yaml @@ -18,3 +18,4 @@ supported: - watchdog - pwm - flash + - dma diff --git a/boards/arm/sam4e_xpro/sam4e_xpro-pinctrl.dtsi b/boards/arm/sam4e_xpro/sam4e_xpro-pinctrl.dtsi index 0ab0c73ddfa8..e83b9eeffe89 100644 --- a/boards/arm/sam4e_xpro/sam4e_xpro-pinctrl.dtsi +++ b/boards/arm/sam4e_xpro/sam4e_xpro-pinctrl.dtsi @@ -1,11 +1,24 @@ /* - * Copyright (c) 2022, Gerson Fernando Budke + * Copyright (c) 2022-2023, Gerson Fernando Budke * SPDX-License-Identifier: Apache-2.0 */ #include &pinctrl { + afec0_default: afec0_default { + group1 { + pinmux = , + ; + }; + }; + afec1_default: afec1_default { + group1 { + pinmux = , + ; + }; + }; + gmac_mii: gmac_mii { group1 { pinmux = , @@ -74,4 +87,11 @@ ; }; }; + + pwm0_default: pwm0_default { + group1 { + pinmux = , + ; + }; + }; }; diff --git a/boards/arm/sam4e_xpro/sam4e_xpro.dts b/boards/arm/sam4e_xpro/sam4e_xpro.dts index 7a30c4ffc2d9..24bcfc7f4a84 100644 --- a/boards/arm/sam4e_xpro/sam4e_xpro.dts +++ b/boards/arm/sam4e_xpro/sam4e_xpro.dts @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019 Gerson Fernando Budke + * Copyright (c) 2019-2023 Gerson Fernando Budke * * SPDX-License-Identifier: Apache-2.0 */ @@ -15,6 +15,7 @@ aliases { i2c-0 = &twi0; + pwm-0 = &pwm0; led0 = &yellow_led_1; sw0 = &user_button; wdog = &wdt; @@ -125,6 +126,20 @@ clock-frequency = <120000000>; }; +&afec0 { + status = "okay"; + + pinctrl-0 = <&afec0_default>; + pinctrl-names = "default"; +}; + +&afec1 { + status = "okay"; + + pinctrl-0 = <&afec1_default>; + pinctrl-names = "default"; +}; + &twi0 { status = "okay"; @@ -187,6 +202,13 @@ pinctrl-names = "default"; }; +&pwm0 { + status = "okay"; + + pinctrl-0 = <&pwm0_default>; + pinctrl-names = "default"; +}; + &wdt { status = "okay"; }; diff --git a/boards/arm/sam4s_xplained/doc/index.rst b/boards/arm/sam4s_xplained/doc/index.rst index 689a13a20c7d..092079cb984c 100644 --- a/boards/arm/sam4s_xplained/doc/index.rst +++ b/boards/arm/sam4s_xplained/doc/index.rst @@ -58,6 +58,8 @@ features: +-----------+------------+-------------------------------------+ | PWM | on-chip | pwm | +-----------+------------+-------------------------------------+ +| ADC | on-chip | adc | ++-----------+------------+-------------------------------------+ Other hardware features are not currently supported by Zephyr. diff --git a/boards/arm/sam4s_xplained/sam4s_xplained-pinctrl.dtsi b/boards/arm/sam4s_xplained/sam4s_xplained-pinctrl.dtsi index 951c5e14503d..703e04ca5e12 100644 --- a/boards/arm/sam4s_xplained/sam4s_xplained-pinctrl.dtsi +++ b/boards/arm/sam4s_xplained/sam4s_xplained-pinctrl.dtsi @@ -48,6 +48,12 @@ ; }; }; + adc0_default: adc0_default { + group1 { + pinmux = , + ; + }; + }; smc_default: smc_default { group1 { pinmux = , diff --git a/boards/arm/sam4s_xplained/sam4s_xplained.dts b/boards/arm/sam4s_xplained/sam4s_xplained.dts index 571dbfb778f3..8010dd0f5686 100644 --- a/boards/arm/sam4s_xplained/sam4s_xplained.dts +++ b/boards/arm/sam4s_xplained/sam4s_xplained.dts @@ -176,6 +176,18 @@ pinctrl-names = "default"; }; +&adc0 { + status = "okay"; + + pinctrl-0 = <&adc0_default>; + pinctrl-names = "default"; + + prescaler = <9>; + startup-time = <64>; + settling-time = <3>; + tracking-time = <2>; +}; + &wdt { status = "okay"; }; diff --git a/boards/arm/sam4s_xplained/sam4s_xplained.yaml b/boards/arm/sam4s_xplained/sam4s_xplained.yaml index 9f8511d80875..3b537a2b56e2 100644 --- a/boards/arm/sam4s_xplained/sam4s_xplained.yaml +++ b/boards/arm/sam4s_xplained/sam4s_xplained.yaml @@ -7,6 +7,7 @@ toolchain: - gnuarmemb - xtools supported: + - adc - gpio - memc - pwm diff --git a/boards/arm/sam_e70_xplained/sam_e70_xplained.dts b/boards/arm/sam_e70_xplained/sam_e70_xplained.dts index 05636e2dddd9..968b19e7562d 100644 --- a/boards/arm/sam_e70_xplained/sam_e70_xplained.dts +++ b/boards/arm/sam_e70_xplained/sam_e70_xplained.dts @@ -1,7 +1,7 @@ /* * Copyright (c) 2017 Piotr Mienkowski * Copyright (c) 2017 Justin Watson - * Copyright (c) 2020 Gerson Fernando Budke + * Copyright (c) 2020-2023 Gerson Fernando Budke * * SPDX-License-Identifier: Apache-2.0 */ @@ -15,3 +15,11 @@ model = "Atmel SAM E70 Xplained board"; compatible = "atmel,sam_e70_xplained", "atmel,same70q21", "atmel,same70"; }; + +&tc0 { + status = "okay"; + compatible = "atmel,sam-tc-qdec"; + + pinctrl-0 = <&tc0_qdec_default>; + pinctrl-names = "default"; +}; diff --git a/boards/arm/sam_e70_xplained/sam_e70b_xplained.yaml b/boards/arm/sam_e70_xplained/sam_e70b_xplained.yaml index 3e215d6e5169..99c53142c186 100644 --- a/boards/arm/sam_e70_xplained/sam_e70b_xplained.yaml +++ b/boards/arm/sam_e70_xplained/sam_e70b_xplained.yaml @@ -11,6 +11,7 @@ toolchain: supported: - netif:eth - adc + - dac - gpio - spi - watchdog diff --git a/boards/arm/sam_v71_xult/sam_v71b_xult.yaml b/boards/arm/sam_v71_xult/sam_v71b_xult.yaml index 7739e8ae6a30..3090a3a155d2 100644 --- a/boards/arm/sam_v71_xult/sam_v71b_xult.yaml +++ b/boards/arm/sam_v71_xult/sam_v71b_xult.yaml @@ -12,6 +12,7 @@ supported: - arduino_gpio - arduino_i2c - arduino_spi + - dac - gpio - spi - watchdog diff --git a/boards/arm/sparkfun_thing_plus_nrf9160/board.c b/boards/arm/sparkfun_thing_plus_nrf9160/board.c index c3ae0c37c1e5..b582182e6fcf 100644 --- a/boards/arm/sparkfun_thing_plus_nrf9160/board.c +++ b/boards/arm/sparkfun_thing_plus_nrf9160/board.c @@ -10,9 +10,8 @@ #define GPIO0 DT_NODELABEL(gpio0) #define POWER_LATCH_PIN 31 -static int board_sparkfun_thing_plus_nrf9160_init(const struct device *dev) +static int board_sparkfun_thing_plus_nrf9160_init(void) { - ARG_UNUSED(dev); /* Get handle of the GPIO device. */ const struct device *const gpio = DEVICE_DT_GET(GPIO0); diff --git a/boards/arm/sparkfun_thing_plus_nrf9160/sparkfun_thing_plus_nrf9160_common.dts b/boards/arm/sparkfun_thing_plus_nrf9160/sparkfun_thing_plus_nrf9160_common.dts index 79f44d03bf1e..88adec18728a 100644 --- a/boards/arm/sparkfun_thing_plus_nrf9160/sparkfun_thing_plus_nrf9160_common.dts +++ b/boards/arm/sparkfun_thing_plus_nrf9160/sparkfun_thing_plus_nrf9160_common.dts @@ -162,18 +162,6 @@ }; }; -&timer0 { - status = "okay"; -}; - -&timer1 { - status = "okay"; -}; - -&timer2 { - status = "okay"; -}; - &flash0 { partitions { compatible = "fixed-partitions"; diff --git a/boards/arm/stm32f072b_disco/stm32f072b_disco.dts b/boards/arm/stm32f072b_disco/stm32f072b_disco.dts index dc13e7e99baf..1e6e10f79cd4 100644 --- a/boards/arm/stm32f072b_disco/stm32f072b_disco.dts +++ b/boards/arm/stm32f072b_disco/stm32f072b_disco.dts @@ -48,11 +48,21 @@ }; }; + pwmleds: pwmleds { + compatible = "pwm-leds"; + status = "disabled"; + + red_pwm_led: red_pwm_led { + pwms = <&pwm3 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>; + }; + }; + aliases { led0 = &red_up_led_3; led1 = &yellow_left_4; led2 = &green_right_led_5; led3 = &blue_low_led_6; + pwm-led0 = &red_pwm_led; sw0 = &user_button; watchdog0 = &iwdg; }; @@ -113,3 +123,14 @@ &iwdg { status = "okay"; }; + +&timers3 { + st,prescaler = <10000>; + status = "okay"; + + pwm3: pwm { + status = "okay"; + pinctrl-0 = <&tim3_ch1_pc6>; + pinctrl-names = "default"; + }; +}; diff --git a/boards/arm/stm32f103_mini/stm32f103_mini.dts b/boards/arm/stm32f103_mini/stm32f103_mini.dts index d6a14bd4ae28..95a6cc5233aa 100644 --- a/boards/arm/stm32f103_mini/stm32f103_mini.dts +++ b/boards/arm/stm32f103_mini/stm32f103_mini.dts @@ -30,6 +30,7 @@ aliases { led0 = &green_led_1; watchdog0 = &iwdg; + die-temp0 = &die_temp; }; }; @@ -129,3 +130,7 @@ zephyr_udc0: &usb { pinctrl-names = "default"; status = "okay"; }; + +&die_temp { + status = "okay"; +}; diff --git a/boards/arm/stm32f3_disco/stm32f3_disco.dts b/boards/arm/stm32f3_disco/stm32f3_disco.dts index 2263cce0ab22..4b92cffb2050 100644 --- a/boards/arm/stm32f3_disco/stm32f3_disco.dts +++ b/boards/arm/stm32f3_disco/stm32f3_disco.dts @@ -71,6 +71,7 @@ magn0 = &lsm303dlhc_magn; watchdog0 = &iwdg; accel0 = &lsm303dlhc_accel; + die-temp0 = &die_temp; }; }; diff --git a/boards/arm/stm32f723e_disco/stm32f723e_disco.dts b/boards/arm/stm32f723e_disco/stm32f723e_disco.dts index c9296aab96a6..a2f1ebed53ac 100644 --- a/boards/arm/stm32f723e_disco/stm32f723e_disco.dts +++ b/boards/arm/stm32f723e_disco/stm32f723e_disco.dts @@ -18,6 +18,7 @@ zephyr,shell-uart = &usart6; zephyr,sram = &sram0; zephyr,flash = &flash0; + zephyr,flash-controller = &mx25r512; }; leds { @@ -49,6 +50,7 @@ led1 = &red_led; led2 = &green_led; sw0 = &user_button; + spi-flash0 = &mx25r512; }; }; @@ -112,6 +114,25 @@ status = "okay"; }; +&quadspi { + pinctrl-names = "default"; + pinctrl-0 = <&quadspi_clk_pb2 &quadspi_bk1_ncs_pb6 + &quadspi_bk1_io0_pc9 &quadspi_bk1_io1_pc10 + &quadspi_bk1_io2_pe2 &quadspi_bk1_io3_pd13>; + flash-id = <1>; + status = "okay"; + + mx25r512: qspi-nor-flash@0 { + compatible = "st,stm32-qspi-nor"; + reg = <0>; + qspi-max-frequency = <8000000>; + size = ; /* 64 MBytes */ + status = "okay"; + spi-bus-width = <4>; + writeoc = "PP_1_4_4"; + }; +}; + zephyr_udc0: &usbotg_fs { pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>; pinctrl-names = "default"; diff --git a/boards/arm/stm32f746g_disco/Kconfig.defconfig b/boards/arm/stm32f746g_disco/Kconfig.defconfig index 4dd3630095e7..69ad80e9b676 100644 --- a/boards/arm/stm32f746g_disco/Kconfig.defconfig +++ b/boards/arm/stm32f746g_disco/Kconfig.defconfig @@ -15,6 +15,9 @@ config NET_L2_ETHERNET endif # NETWORKING +config INPUT + default y if KSCAN + if DISPLAY config KSCAN @@ -27,12 +30,12 @@ config MEMC endif # DISPLAY -if KSCAN +if INPUT -config KSCAN_FT5336_INTERRUPT +config INPUT_FT5336_INTERRUPT default y -endif # KSCAN +endif # INPUT config DISK_DRIVER_SDMMC default y if DISK_DRIVERS diff --git a/boards/arm/stm32f746g_disco/stm32f746g_disco.dts b/boards/arm/stm32f746g_disco/stm32f746g_disco.dts index 08cd3e6cf6a9..8dea3ec4af66 100644 --- a/boards/arm/stm32f746g_disco/stm32f746g_disco.dts +++ b/boards/arm/stm32f746g_disco/stm32f746g_disco.dts @@ -21,7 +21,7 @@ zephyr,dtcm = &dtcm; zephyr,flash-controller = &n25q128a1; zephyr,display = <dc; - zephyr,keyboard-scan = &touch_controller; + zephyr,keyboard-scan = &kscan_input; }; leds { @@ -51,7 +51,7 @@ aliases { led0 = &green_led_1; sw0 = &user_button; - kscan0 = &touch_controller; + kscan0 = &kscan_input; spi-flash0 = &n25q128a1; }; }; @@ -95,10 +95,14 @@ status = "okay"; clock-frequency = ; - touch_controller: ft5336@38 { + ft5336@38 { compatible = "focaltech,ft5336"; reg = <0x38>; int-gpios = <&gpioi 13 0>; + + kscan_input: kscan-input { + compatible = "zephyr,kscan-input"; + }; }; }; diff --git a/boards/arm/stm32f7508_dk/Kconfig.defconfig b/boards/arm/stm32f7508_dk/Kconfig.defconfig index a979b1ab1b57..a9c02111ffe2 100644 --- a/boards/arm/stm32f7508_dk/Kconfig.defconfig +++ b/boards/arm/stm32f7508_dk/Kconfig.defconfig @@ -27,12 +27,15 @@ config MEMC endif # DISPLAY -if KSCAN +config INPUT + default y if KSCAN -config KSCAN_FT5336_INTERRUPT +if INPUT + +config INPUT_FT5336_INTERRUPT default y -endif # KSCAN +endif # INPUT config DISK_DRIVER_SDMMC default y if DISK_DRIVERS diff --git a/boards/arm/stm32f7508_dk/stm32f7508_dk.dts b/boards/arm/stm32f7508_dk/stm32f7508_dk.dts index 0bdcd0212a34..88b1485df2b1 100644 --- a/boards/arm/stm32f7508_dk/stm32f7508_dk.dts +++ b/boards/arm/stm32f7508_dk/stm32f7508_dk.dts @@ -22,7 +22,7 @@ zephyr,dtcm = &dtcm; zephyr,flash-controller = &n25q128a1; zephyr,display = <dc; - zephyr,keyboard-scan = &touch_controller; + zephyr,keyboard-scan = &kscan_input; }; leds { @@ -52,7 +52,7 @@ aliases { led0 = &green_led_1; sw0 = &user_button; - kscan0 = &touch_controller; + kscan0 = &kscan_input; spi-flash0 = &n25q128a1; }; }; @@ -96,10 +96,14 @@ status = "okay"; clock-frequency = ; - touch_controller: ft5336@38 { + ft5336@38 { compatible = "focaltech,ft5336"; reg = <0x38>; int-gpios = <&gpioi 13 0>; + + kscan_input: kscan-input { + compatible = "zephyr,kscan-input"; + }; }; }; diff --git a/boards/arm/stm32f769i_disco/Kconfig.defconfig b/boards/arm/stm32f769i_disco/Kconfig.defconfig index ae76044e9e5e..8ea8440dd8be 100644 --- a/boards/arm/stm32f769i_disco/Kconfig.defconfig +++ b/boards/arm/stm32f769i_disco/Kconfig.defconfig @@ -12,6 +12,9 @@ config SPI_STM32_INTERRUPT default y depends on SPI +config INPUT + default y if KSCAN + if NETWORKING config NET_L2_ETHERNET diff --git a/boards/arm/stm32f769i_disco/stm32f769i_disco.dts b/boards/arm/stm32f769i_disco/stm32f769i_disco.dts index d1905d79a516..26dfa4c6c31b 100644 --- a/boards/arm/stm32f769i_disco/stm32f769i_disco.dts +++ b/boards/arm/stm32f769i_disco/stm32f769i_disco.dts @@ -20,7 +20,7 @@ zephyr,flash = &flash0; zephyr,dtcm = &dtcm; zephyr,flash-controller = &mx25l51245g; - zephyr,keyboard-scan = &touch_controller; + zephyr,keyboard-scan = &kscan_input; }; sdram1: sdram@c0000000 { @@ -65,7 +65,7 @@ led2 = &green_led_3; led3 = &red_led_4; sw0 = &user_button; - kscan0 = &touch_controller; + kscan0 = &kscan_input; spi-flash0 = &mx25l51245g; }; }; @@ -123,10 +123,14 @@ arduino_serial: &usart6 {}; status = "okay"; clock-frequency = ; - touch_controller: ft6202@2a { + ft6202@2a { compatible = "focaltech,ft5336"; reg = <0x2a>; int-gpios = <&gpioi 13 0>; + + kscan_input: kscan-input { + compatible = "zephyr,kscan-input"; + }; }; }; diff --git a/boards/arm/stm32h573i_dk/Kconfig.board b/boards/arm/stm32h573i_dk/Kconfig.board new file mode 100644 index 000000000000..adb46f393005 --- /dev/null +++ b/boards/arm/stm32h573i_dk/Kconfig.board @@ -0,0 +1,10 @@ +# STM32H573I-DK Discovery kit board configuration +# +# Copyright (c) 2023 STMicroelectronics +# +# SPDX-License-Identifier: Apache-2.0 +# + +config BOARD_STM32H573I_DK + bool "STM32H573I-DK Discovery Development Board" + depends on SOC_STM32H573XX diff --git a/boards/arm/stm32h573i_dk/Kconfig.defconfig b/boards/arm/stm32h573i_dk/Kconfig.defconfig new file mode 100644 index 000000000000..166ce9e13dd9 --- /dev/null +++ b/boards/arm/stm32h573i_dk/Kconfig.defconfig @@ -0,0 +1,13 @@ +# STM32H573I DISCOVERY KIT board configuration +# +# Copyright (c) 2023 STMicroelectronics +# +# SPDX-License-Identifier: Apache-2.0 +# + +if BOARD_STM32H573I_DK + +config BOARD + default "stm32h573i_dk" + +endif # BOARD_STM32H573I_DK diff --git a/boards/arm/stm32h573i_dk/arduino_r3_connector.dtsi b/boards/arm/stm32h573i_dk/arduino_r3_connector.dtsi new file mode 100644 index 000000000000..87f3e6332dff --- /dev/null +++ b/boards/arm/stm32h573i_dk/arduino_r3_connector.dtsi @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2023 STMicroelectronics + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + arduino_header: connector { + compatible = "arduino-header-r3"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <0 0 &gpiob 0 0>, /* A0 */ + <1 0 &gpioa 4 0>, /* A1 */ + <2 0 &gpioa 0 0>, /* A2 */ + <3 0 &gpioa 5 0>, /* A3 */ + <4 0 &gpioa 6 0>, /* A4 */ + <5 0 &gpiof 12 0>, /* A5 */ + <6 0 &gpiob 11 0>, /* D0 */ + <7 0 &gpiob 10 0>, /* D1 */ + <8 0 &gpiog 15 0>, /* D2 */ + <9 0 &gpiob 5 0>, /* D3 */ + <10 0 &gpiog 4 0>, /* D4 */ + <11 0 &gpioh 11 0>, /* D5 */ + <12 0 &gpioh 10 0>, /* D6 */ + <13 0 &gpiog 5 0>, /* D7 */ + <14 0 &gpiog 8 0>, /* D8 */ + <15 0 &gpioa 8 0>, /* D9 */ + <16 0 &gpioa 3 0>, /* D10 */ + <17 0 &gpiob 15 0>, /* D11 */ + <18 0 &gpioi 2 0>, /* D12 */ + <19 0 &gpioi 1 0>, /* D13 */ + <20 0 &gpiob 7 0>, /* D14 */ + <21 0 &gpiob 6 0>; /* D15 */ + }; +}; + +arduino_spi: &spi2 {}; diff --git a/boards/arm/stm32h573i_dk/board.cmake b/boards/arm/stm32h573i_dk/board.cmake new file mode 100644 index 000000000000..ef9e83189cbc --- /dev/null +++ b/boards/arm/stm32h573i_dk/board.cmake @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(stm32cubeprogrammer "--erase" "--port=swd" "--reset-mode=hw") + +include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake) +# FIXME: openocd runner not yet available. diff --git a/boards/arm/stm32h573i_dk/doc/img/stm32h573i_dk.jpg b/boards/arm/stm32h573i_dk/doc/img/stm32h573i_dk.jpg new file mode 100644 index 000000000000..c021d1ad9ab1 Binary files /dev/null and b/boards/arm/stm32h573i_dk/doc/img/stm32h573i_dk.jpg differ diff --git a/boards/arm/stm32h573i_dk/doc/index.rst b/boards/arm/stm32h573i_dk/doc/index.rst new file mode 100644 index 000000000000..ae75f58e8b2a --- /dev/null +++ b/boards/arm/stm32h573i_dk/doc/index.rst @@ -0,0 +1,314 @@ +.. _stm32h573i_dk_board: + +ST STM32H573I-DK Discovery +########################## + +Overview +******** + +The STM32H573I-DK Discovery kit is designed as a complete demonstration and +development platform for STMicroelectronics Arm |reg| Cortex |reg|-M33 core-based +STM32H573IIK3Q microcontroller with TrustZone |reg|. Here are some highlights of +the STM32H573I-DK Discovery board: + + +- STM32H573IIK3Q microcontroller featuring 2 Mbytes of Flash memory and 640 Kbytes of SRAM in 176-pin BGA package +- 1.54-inch 240x240 pixels TFT-LCD with LED backlight and touch panel +- USB Type-C |trade| Host and device with USB power-delivery controller +- SAI Audio DAC stereo with one audio jacks for input/output, +- ST MEMS digital microphone with PDM interface +- Octo-SPI interface connected to 152Mbit Octo-SPI NORFlash memory device (MX25LM51245GXDI00 from MACRONIX) +- 10/100-Mbit Ethernet, +- microSD |trade| +- A Wi‑Fi® add-on board +- Board connectors + + - STMod+ expansion connector with fan-out expansion board for Wi‑Fi |reg|, Grove and mikroBUS |trade| compatible connectors + - Pmod |trade| expansion connector + - Audio MEMS daughterboard expansion connector + - ARDUINO |reg| Uno V3 expansion connector + +- Flexible power-supply options + + - ST-LINK + - USB VBUS + - external sources + +- On-board STLINK-V3E debugger/programmer with USB re-enumeration capability: + + - mass storage + - Virtual COM port + - debug port + +- 4 user LEDs +- User and reset push-buttons + +.. image:: img/stm32h573i_dk.jpg + :align: center + :alt: STM32H573I-DK Discovery + +More information about the board can be found at the `STM32H573I-DK Discovery website`_. + +Hardware +******** + +The STM32H573xx devices are an high-performance microcontrollers family (STM32H5 +Series) based on the high-performance Arm |reg| Cortex |reg|-M33 32-bit RISC core. +They operate at a frequency of up to 250 MHz. + +- Core: ARM |reg| 32-bit Cortex |reg| -M33 CPU with TrustZone |reg| and FPU. +- Performance benchmark: + + - 375 DMPIS/MHz (Dhrystone 2.1) + +- Security + + - Arm |reg| TrustZone |reg| with ARMv8-M mainline security extension + - Up to 8 configurable SAU regions + - TrustZone |reg| aware and securable peripherals + - Flexible lifecycle scheme with secure debug authentication + - Preconfigured immutable root of trust (ST-iROT) + - SFI (secure firmware installation) + - Secure data storage with hardware unique key (HUK) + - Secure firmware upgrade support with TF-M + - 2x AES coprocessors including one with DPA resistance + - Public key accelerator, DPA resistant + - On-the-fly decryption of Octo-SPI external memories + - HASH hardware accelerator + - True random number generator, NIST SP800-90B compliant + - 96-bit unique ID + - Active tampers + - True Random Number Generator (RNG) NIST SP800-90B compliant + +- Clock management: + + - 25 MHz crystal oscillator (HSE) + - 32 kHz crystal oscillator for RTC (LSE) + - Internal 64 MHz (HSI) trimmable by software + - Internal low-power 32 kHz RC (LSI)( |plusminus| 5%) + - Internal 4 MHz oscillator (CSI), trimmable by software + - Internal 48 MHz (HSI48) with recovery system + - 3 PLLs for system clock, USB, audio, ADC + +- Power management + + - Embedded regulator (LDO) with three configurable range output to supply the digital circuitry + - Embedded SMPS step-down converter + +- RTC with HW calendar, alarms and calibration +- Up to 139 fast I/Os, most 5 V-tolerant, up to 10 I/Os with independent supply down to 1.08 V +- Up to 16 timers and 2 watchdogs + + - 12x 16-bit + - 2x 32-bit timers with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input + - 6x 16-bit low-power 16-bit timers (available in Stop mode) + - 2x watchdogs + - 2x SysTick timer + +- Memories + + - Up to 2 MB Flash, 2 banks read-while-write + - 1 Kbyte OTP (one-time programmable) + - 640 KB of SRAM including 64 KB with hardware parity check and 320 Kbytes with flexible ECC + - 4 Kbytes of backup SRAM available in the lowest power modes + - Flexible external memory controller with up to 16-bit data bus: SRAM, PSRAM, FRAM, SDRAM/LPSDR SDRAM, NOR/NAND memories + - 1x OCTOSPI memory interface with on-the-fly decryption and support for serial PSRAM/NAND/NOR, Hyper RAM/Flash frame formats + - 2x SD/SDIO/MMC interfaces + +- Rich analog peripherals (independent supply) + + - 2x 12-bit ADC with up to 5 MSPS in 12-bit + - 2x 12-bit D/A converters + - 1x Digital temperature sensor + +- 34x communication interfaces + + - 1x USB Type-C / USB power-delivery controller + - 1x USB 2.0 full-speed host and device + - 4x I2C FM+ interfaces (SMBus/PMBus) + - 1x I3C interface + - 12x U(S)ARTS (ISO7816 interface, LIN, IrDA, modem control) + - 1x LP UART + - 6x SPIs including 3 muxed with full-duplex I2S + - 5x additional SPI from 5x USART when configured in Synchronous mode + - 2x SAI + - 2x FDCAN + - 1x SDMMC interface + - 2x 16 channel DMA controllers + - 1x 8- to 14- bit camera interface + - 1x HDMI-CEC + - 1x Ethernel MAC interface with DMA controller + - 1x 16-bit parallel slave synchronous-interface + +- CORDIC for trigonometric functions acceleration +- FMAC (filter mathematical accelerator) +- CRC calculation unit +- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade| + + +More information about STM32H573 can be found here: + +- `STM32H573 on www.st.com`_ +- `STM32H573 reference manual`_ + +Supported Features +================== + +The Zephyr STM32H573I_DK board configuration supports the following +hardware features: + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| CLOCK | on-chip | reset and clock control | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+-------------------------------------+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+-------------------------------------+ +| PINMUX | on-chip | pinmux | ++-----------+------------+-------------------------------------+ +| RNG | on-chip | True Random number generator | ++-----------+------------+-------------------------------------+ +| UART | on-chip | serial port-polling; | +| | | serial port-interrupt | ++-----------+------------+-------------------------------------+ +| WATCHDOG | on-chip | independent watchdog | ++-----------+------------+-------------------------------------+ +| DAC | on-chip | DAC Controller | ++-----------+------------+-------------------------------------+ +| ADC | on-chip | ADC Controller | ++-----------+------------+-------------------------------------+ +| PWM | on-chip | PWM | ++-----------+------------+-------------------------------------+ +| RTC | on-chip | Real Time Clock | ++-----------+------------+-------------------------------------+ +| SPI | on-chip | spi bus | ++-----------+------------+-------------------------------------+ +| OCTOSPI | on-chip | octospi | ++-----------+------------+-------------------------------------+ +| CAN | on-chip | can bus | ++-----------+------------+-------------------------------------+ + +Other hardware features are not yet supported on this Zephyr port. + +The default configuration can be found in the defconfig and dts files: + +- Secure target: + + - :zephyr_file:`boards/arm/stm32h573i_dk/stm32h573i_dk_defconfig` + - :zephyr_file:`boards/arm/stm32h573i_dk/stm32h573i_dk.dts` + +Zephyr board options +==================== + +The STM32H573 is an SoC with Cortex-M33 architecture. Zephyr provides support +for building for Secure firmware. + +The BOARD options are summarized below: + ++----------------------+-----------------------------------------------+ +| BOARD | Description | ++======================+===============================================+ +| stm32h573i_dk | For building Secure firmware | ++----------------------+-----------------------------------------------+ + +Connections and IOs +=================== + +STM32H573I-DK Discovery Board has 9 GPIO controllers. These controllers are responsible for pin muxing, +input/output, pull-up, etc. + +For mode details please refer to `STM32H573I-DK Discovery board User Manual`_. + +Default Zephyr Peripheral Mapping: +---------------------------------- + +- USART_1 TX/RX : PA9/PA10 (VCP) +- USART_3 TX/RX : PB11/PB10 (Arduino USART3) +- USER_PB : PC13 +- LD1 (green) : PI9 +- DAC1 channel 1 output : PA4 +- ADC1 channel 6 input : PF12 + +System Clock +------------ + +STM32H573I-DK System Clock could be driven by internal or external oscillator, +as well as main PLL clock. By default System clock is driven by PLL clock at +240MHz, driven by 25MHz external oscillator (HSE). + +Serial Port +----------- + +STM32H573I-DK Discovery board has 3 U(S)ARTs. The Zephyr console output is +assigned to USART1. Default settings are 115200 8N1. + + +Programming and Debugging +************************* + +Applications for the ``stm32h573i_dk`` board configuration can be built and +flashed in the usual way (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +Flashing +======== + +STM32H573I-DK Discovery board includes an ST-LINK/V3E embedded debug tool +interface. Support is available on STM32CubeProgrammer V2.13.0. + +Alternatively, this interface will be supported by a next openocd version. + +Flashing an application to STM32H573I-DK Discovery +-------------------------------------------------- + +Connect the STM32H573I-DK Discovery to your host computer using the USB port. +Then build and flash an application. Here is an example for the +:ref:`hello_world` application. + +Run a serial host program to connect with your Nucleo board: + +.. code-block:: console + + $ minicom -D /dev/ttyACM0 + +Then build and flash the application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: stm32h573i_dk + :goals: build flash + +You should see the following message on the console: + +.. code-block:: console + + Hello World! stm32h573i_dk + +Debugging +========= + +You can debug an application in the usual way. Here is an example for the +:ref:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: stm32h573i_dk + :maybe-skip-config: + :goals: debug + +.. _STM32H573I-DK Discovery website: + https://www.st.com/en/evaluation-tools/stm32h573i-dk.html + +.. _STM32H573I-DK Discovery board User Manual: + https://www.st.com/en/evaluation-tools/stm32h573i-dk.html + +.. _STM32H573 on www.st.com: + https://www.st.com/en/microcontrollers/stm32h573ii.html + +.. _STM32H573 reference manual: + https://www.st.com/resource/en/reference_manual/rm0481-stm32h563h573-and-stm32h562-armbased-32bit-mcus-stmicroelectronics.pdf + +.. _STM32CubeProgrammer: + https://www.st.com/en/development-tools/stm32cubeprog.html diff --git a/boards/arm/stm32h573i_dk/stm32h573i_dk.dts b/boards/arm/stm32h573i_dk/stm32h573i_dk.dts new file mode 100644 index 000000000000..ec191afee080 --- /dev/null +++ b/boards/arm/stm32h573i_dk/stm32h573i_dk.dts @@ -0,0 +1,238 @@ +/* + * Copyright (c) 2023 STMicroelectronics + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include +#include "arduino_r3_connector.dtsi" + +/ { + model = "STMicroelectronics STM32H573I DISCOVERY KIT board"; + compatible = "st,stm32h573i-dk"; + + chosen { + zephyr,console = &usart1; + zephyr,shell-uart = &usart1; + zephyr,sram = &sram0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + zephyr,canbus = &can1; + }; + + leds { + compatible = "gpio-leds"; + green_led_0: led_1 { + gpios = <&gpioi 9 GPIO_ACTIVE_LOW>; + label = "User LD1"; + }; + orange_led_0: led_2 { + gpios = <&gpioi 8 GPIO_ACTIVE_LOW>; + label = "User LD2"; + }; + red_led_0: led_3 { + gpios = <&gpiof 1 GPIO_ACTIVE_LOW>; + label = "User LD3"; + }; + blue_led_0: led_4 { + gpios = <&gpiof 4 GPIO_ACTIVE_LOW>; + label = "User LD4"; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + user_button: button { + label = "User"; + gpios = <&gpioc 13 GPIO_ACTIVE_LOW>; + }; + }; + + aliases { + led0 = &blue_led_0; + sw0 = &user_button; + watchdog0 = &iwdg; + spi-flash0 = &mx25lm51245; + }; +}; + +&clk_hsi48 { + status = "okay"; +}; + +&clk_lse { + status = "okay"; +}; + +&clk_hse { + clock-frequency = ; + hse-bypass; /* X3 is a 25MHz oscillator on PH0 */ + status = "okay"; +}; + +&pll { + div-m = <5>; + mul-n = <96>; + div-p = <2>; + div-q = <2>; + div-r = <2>; + clocks = <&clk_hse>; + status = "okay"; +}; + +&rcc { + clocks = <&pll>; + clock-frequency = ; + ahb-prescaler = <1>; + apb1-prescaler = <1>; + apb2-prescaler = <1>; + apb3-prescaler = <1>; +}; + +&usart1 { + pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>; + pinctrl-names = "default"; + current-speed = <115200>; + status = "okay"; +}; + +&timers2 { + st,prescaler = <10000>; + status = "okay"; + + pwm2: pwm { + status = "okay"; + pinctrl-0 = <&tim2_ch4_pa3>; + pinctrl-names = "default"; + }; +}; + +&timers3 { + st,prescaler = <10000>; + status = "okay"; + + pwm3: pwm { + status = "okay"; + pinctrl-0 = <&tim3_ch2_pb5>; + pinctrl-names = "default"; + }; +}; + +&rng { + status = "okay"; +}; + +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + /* Set the partitions with first MB to make use of the whole Bank1 */ + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x00000000 DT_SIZE_K(64)>; + }; + slot0_partition: partition@10000 { + label = "image-0"; + reg = <0x00010000 DT_SIZE_K(416)>; + }; + slot1_partition: partition@78000 { + label = "image-1"; + reg = <0x00078000 DT_SIZE_K(416)>; + }; + scratch_partition: partition@e0000 { + label = "image-scratch"; + reg = <0x000e0000 DT_SIZE_K(64)>; + }; + /* Set 64KB of storage at the end of Bank1 */ + storage_partition: partition@f0000 { + label = "storage"; + reg = <0x000f0000 DT_SIZE_K(64)>; + }; + }; +}; + +&rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB3 0x00200000>, + <&rcc STM32_SRC_LSE RTC_SEL(1)>; + status = "okay"; +}; + +&iwdg { + status = "okay"; +}; + +&gpdma1 { + status = "okay"; +}; + +&gpdma2 { + status = "okay"; +}; + +&dac1 { + /* only 2 output channels : out1 on pa4 or out2 on pa5 */ + pinctrl-0 = <&dac1_out1_pa4>; /* Arduino A1 */ + pinctrl-names = "default"; + status = "okay"; +}; + +&adc1 { + pinctrl-0 = <&adc1_inp6_pf12>; /* Arduino A5 */ + pinctrl-names = "default"; + status = "okay"; +}; + +&spi2 { + pinctrl-0 = <&spi2_nss_pa3 &spi2_sck_pi1 + &spi2_miso_pi2 &spi2_mosi_pb15>; + pinctrl-names = "default"; + status = "okay"; +}; + +&can1 { + clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000200>, + <&rcc STM32_SRC_PLL1_Q FDCAN_SEL(1)>; + pinctrl-0 = <&fdcan1_rx_pa11 &fdcan1_tx_pa12>; + pinctrl-names = "default"; + bus-speed = <125000>; + bus-speed-data = <1000000>; + status = "okay"; +}; + +&octospi1 { + pinctrl-0 = <&octospi1_io0_pb1 &octospi1_io1_pd12 + &octospi1_io2_pc2 &octospi1_io3_pd13 + &octospi1_io4_ph2 &octospi1_io5_ph3 + &octospi1_io6_pg9 &octospi1_io7_pc0 + &octospi1_clk_pf10 &octospi1_ncs_pg6 + &octospi1_dqs_pb2>; + pinctrl-names = "default"; + + status = "okay"; + + mx25lm51245: ospi-nor-flash@0 { + compatible = "st,stm32-ospi-nor"; + reg = <0>; + ospi-max-frequency = ; + size = ; /* 64 MBytes */ + spi-bus-width = ; + data-rate = ; + four-byte-opcodes; + status = "okay"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "nor"; + reg = <0x00000000 DT_SIZE_M(64)>; + }; + }; + }; +}; diff --git a/boards/arm/stm32h573i_dk/stm32h573i_dk.yaml b/boards/arm/stm32h573i_dk/stm32h573i_dk.yaml new file mode 100644 index 000000000000..9b014f5ed639 --- /dev/null +++ b/boards/arm/stm32h573i_dk/stm32h573i_dk.yaml @@ -0,0 +1,22 @@ +identifier: stm32h573i_dk +name: ST STM32H573I Discovery Kit +type: mcu +arch: arm +toolchain: + - zephyr +ram: 640 +flash: 2048 +supported: + - arduino_gpio + - gpio + - uart + - watchdog + - entropy + - dma + - adc + - dac + - pwm + - counter + - spi + - octospi + - can diff --git a/boards/arm/stm32h573i_dk/stm32h573i_dk_defconfig b/boards/arm/stm32h573i_dk/stm32h573i_dk_defconfig new file mode 100644 index 000000000000..a8050bc4e821 --- /dev/null +++ b/boards/arm/stm32h573i_dk/stm32h573i_dk_defconfig @@ -0,0 +1,26 @@ +# Copyright (c) 2023 STMicroelectronics +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_SOC_SERIES_STM32H5X=y +CONFIG_SOC_STM32H573XX=y + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable HW stack protection +CONFIG_HW_STACK_PROTECTION=y + +# enable uart driver +CONFIG_SERIAL=y +# enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# enable GPIO +CONFIG_GPIO=y + +# Enable Clocks +CONFIG_CLOCK_CONTROL=y + +# enable pin controller +CONFIG_PINCTRL=y diff --git a/boards/arm/stm32h735g_disco/pmod_connector.dtsi b/boards/arm/stm32h735g_disco/pmod_connector.dtsi new file mode 100644 index 000000000000..8028cc55b257 --- /dev/null +++ b/boards/arm/stm32h735g_disco/pmod_connector.dtsi @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2023 Elektronikutvecklingsbyrån EUB AB + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + pmod0: pmod-connector { + compatible = "digilent,pmod"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <0 0 &gpiof 9 0>, /* IO1 */ + <1 0 &gpiof 7 0>, /* IO2 */ + <2 0 &gpiof 6 0>, /* IO3 */ + <3 0 &gpiof 8 0>, /* IO4 */ + <4 0 &gpioh 12 0>, /* IO5 */ + <5 0 &gpioh 1 0>; /* IO6 */ + /* IO7 - not connected */ + /* IO8 - not connected */ + }; +}; diff --git a/boards/arm/stm32h735g_disco/stm32h735g_disco.dts b/boards/arm/stm32h735g_disco/stm32h735g_disco.dts index f8b296acc906..143176dab063 100644 --- a/boards/arm/stm32h735g_disco/stm32h735g_disco.dts +++ b/boards/arm/stm32h735g_disco/stm32h735g_disco.dts @@ -7,6 +7,7 @@ /dts-v1/; #include #include +#include "pmod_connector.dtsi" / { model = "STMicroelectronics STM32H735G DISCOVERY board"; diff --git a/boards/arm/stm32h735g_disco/stm32h735g_disco.yaml b/boards/arm/stm32h735g_disco/stm32h735g_disco.yaml index 7723332ad6ad..16d056e600da 100644 --- a/boards/arm/stm32h735g_disco/stm32h735g_disco.yaml +++ b/boards/arm/stm32h735g_disco/stm32h735g_disco.yaml @@ -14,3 +14,4 @@ supported: - netif:eth - memc - adc + - counter diff --git a/boards/arm/stm32h747i_disco/doc/index.rst b/boards/arm/stm32h747i_disco/doc/index.rst index 0d88747c0669..d8c670aae52f 100644 --- a/boards/arm/stm32h747i_disco/doc/index.rst +++ b/boards/arm/stm32h747i_disco/doc/index.rst @@ -75,6 +75,9 @@ The current Zephyr stm32h747i_disco board configuration supports the following h +-----------+------------+-------------------------------------+ | IPM | on-chip | virtual mailbox based on HSEM | +-----------+------------+-------------------------------------+ +| DISPLAY | on-chip | MIPI DSI Host with shield (MP1166) | +| | | st_b_lcd40_dsi1_mb1166 | ++-----------+------------+-------------------------------------+ (*) From UM2411 Rev 4: With the default setting, the Ethernet feature is not working because of @@ -152,6 +155,20 @@ Following two images shows necessary changes on the board marked: :align: center :alt: STM32H747I-DISCO - Ethernet modification 2 (**SB21**, **R87**, **SB22**, **SB17** and **SB8**) +Display +======= + +The STM32H747I Discovery kit has a dedicated DSI LCD connector **CN15**, where +the MB1166 (B-LCD40-DSI1) display extension board can be mounted. Enable display +support in Zephyr by adding the shield ``st_b_lcd40_dsi1_mb1166`` to your build +command, for example: + +.. zephyr-app-commands:: + :zephyr-app: samples/drivers/display + :board: stm32h747i_disco_m7 + :shield: st_b_lcd40_dsi1_mb1166 + :goals: build flash + Resources sharing ================= diff --git a/boards/arm/stm32h747i_disco/pmod_connector.dtsi b/boards/arm/stm32h747i_disco/pmod_connector.dtsi new file mode 100644 index 000000000000..cc96b687d07f --- /dev/null +++ b/boards/arm/stm32h747i_disco/pmod_connector.dtsi @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2023 Elektronikutvecklingsbyrån EUB AB + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + pmod0: pmod-connector { + compatible = "digilent,pmod"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <0 0 &gpioa 11 0>, /* IO1 */ + <1 0 &gpioc 3 0>, /* IO2 */ + <2 0 &gpioc 2 0>, /* IO3 */ + <3 0 &gpioa 12 0>, /* IO4 */ + <4 0 &gpioc 6 0>, /* IO5 */ + <5 0 &gpioj 13 0>; /* IO6 */ + /* IO7 - not connected */ + /* IO8 - not connected */ + }; +}; diff --git a/boards/arm/stm32h747i_disco/stm32h747i_disco.dtsi b/boards/arm/stm32h747i_disco/stm32h747i_disco.dtsi index 67c288640342..f8b58cb81a41 100644 --- a/boards/arm/stm32h747i_disco/stm32h747i_disco.dtsi +++ b/boards/arm/stm32h747i_disco/stm32h747i_disco.dtsi @@ -5,27 +5,28 @@ */ #include "arduino_r3_connector.dtsi" +#include "pmod_connector.dtsi" / { leds { compatible = "gpio-leds"; green_led_1:led_1 { - gpios = <&gpioi 12 GPIO_ACTIVE_HIGH>; + gpios = <&gpioi 12 GPIO_ACTIVE_LOW>; label = "User LD1"; status = "disabled"; }; orange_led_2:led_2 { - gpios = <&gpioi 13 GPIO_ACTIVE_HIGH>; + gpios = <&gpioi 13 GPIO_ACTIVE_LOW>; label = "User LD2"; status = "disabled"; }; red_led_3:led_3 { - gpios = <&gpioi 14 GPIO_ACTIVE_HIGH>; + gpios = <&gpioi 14 GPIO_ACTIVE_LOW>; label = "User LD3"; status = "disabled"; }; blue_led_4:led_4 { - gpios = <&gpioi 15 GPIO_ACTIVE_HIGH>; + gpios = <&gpioi 15 GPIO_ACTIVE_LOW>; label = "User LD4"; status = "disabled"; }; @@ -64,6 +65,24 @@ status = "disabled"; }; }; + + dsi_lcd_qsh_030: connector_dsi_lcd { + compatible = "st,dsi-lcd-qsh-030"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <4 0 &gpiok 7 0>, /* TOUCH_INT */ + <35 0 &gpioe 5 0>, /* SCLK/MCLK */ + <37 0 &gpioe 4 0>, /* LRCLK */ + <39 0 &gpioe 6 0>, /* I2S */ + <40 0 &gpiod 13 0>, /* I2C4_SDA */ + <44 0 &gpiod 12 0>, /* I2C4_SCL */ + <45 0 &gpioa 8 0>, /* CEC_CLK */ + <47 0 &gpiob 6 0>, /* CEC */ + <49 0 &gpioj 2 0>, /* DSI_TE */ + <53 0 &gpioj 12 0>, /* LCD_BL_CTRL */ + <57 0 &gpiog 3 0>; /* DSI_RESET */ + }; }; &rcc { diff --git a/boards/arm/stm32h7b3i_dk/Kconfig.defconfig b/boards/arm/stm32h7b3i_dk/Kconfig.defconfig index c234dfe876db..45d67c67e928 100644 --- a/boards/arm/stm32h7b3i_dk/Kconfig.defconfig +++ b/boards/arm/stm32h7b3i_dk/Kconfig.defconfig @@ -11,8 +11,11 @@ config BOARD config KSCAN default y if DISPLAY -config KSCAN_FT5336_INTERRUPT - default y if KSCAN_FT5336 +config INPUT + default y if KSCAN + +config INPUT_FT5336_INTERRUPT + default y if INPUT_FT5336 # MEMC needs to be enabled in order to store # display buffer to external SDRAM connected to FMC diff --git a/boards/arm/stm32h7b3i_dk/stm32h7b3i_dk.dts b/boards/arm/stm32h7b3i_dk/stm32h7b3i_dk.dts index 1ccc6b9dc471..d088aae2f089 100644 --- a/boards/arm/stm32h7b3i_dk/stm32h7b3i_dk.dts +++ b/boards/arm/stm32h7b3i_dk/stm32h7b3i_dk.dts @@ -21,7 +21,7 @@ zephyr,flash = &flash0; zephyr,display = <dc; zephyr,canbus = &can1; - zephyr,keyboard-scan = &touch_controller; + zephyr,keyboard-scan = &kscan_input; }; leds { @@ -63,7 +63,7 @@ led0 = &blue_led; led1 = &red_led; sw0 = &user_button; - kscan0 = &touch_controller; + kscan0 = &kscan_input; }; }; @@ -129,10 +129,14 @@ clock-frequency = ; status = "okay"; - touch_controller: ft5336@38 { + ft5336@38 { compatible = "focaltech,ft5336"; reg = <0x38>; int-gpios = <&gpioh 2 0>; + + kscan_input: kscan-input { + compatible = "zephyr,kscan-input"; + }; }; }; diff --git a/boards/arm/stm32l496g_disco/board_adc_vref.c b/boards/arm/stm32l496g_disco/board_adc_vref.c index 438720fd7b26..3de88bf3dd58 100644 --- a/boards/arm/stm32l496g_disco/board_adc_vref.c +++ b/boards/arm/stm32l496g_disco/board_adc_vref.c @@ -8,7 +8,7 @@ #include #include -static int enable_adc_reference(const struct device *dev) +static int enable_adc_reference(void) { uint8_t init_status; /* VREF+ is not connected to VDDA by default */ diff --git a/boards/arm/stm32l562e_dk/stm32l562e_dk_common.dtsi b/boards/arm/stm32l562e_dk/stm32l562e_dk_common.dtsi index 607814c421e3..55c32f2d5d99 100644 --- a/boards/arm/stm32l562e_dk/stm32l562e_dk_common.dtsi +++ b/boards/arm/stm32l562e_dk/stm32l562e_dk_common.dtsi @@ -29,29 +29,9 @@ }; }; - power-states { - stop0: state0 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <1>; - min-residency-us = <100>; - }; - stop1: state1 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <2>; - min-residency-us = <500>; - }; - stop2: state2 { - compatible = "zephyr,power-state"; - power-state-name = "suspend-to-idle"; - substate-id = <3>; - min-residency-us = <900>; - }; - }; - aliases { spi-flash0 = &mx25lm51245; + die-temp0 = &die_temp; }; }; @@ -225,6 +205,10 @@ status = "okay"; }; +&die_temp { + status = "okay"; +}; + &spi3 { pinctrl-0 = <&spi3_sck_pg9 &spi3_mosi_pb5 &spi3_miso_pb4>; pinctrl-names = "default"; diff --git a/boards/arm/swan_r5/board.c b/boards/arm/swan_r5/board.c index 577e15370871..51a06b7c0f4d 100644 --- a/boards/arm/swan_r5/board.c +++ b/boards/arm/swan_r5/board.c @@ -7,12 +7,11 @@ #include #include -static int board_swan_init(const struct device *dev) +static int board_swan_init(void) { const struct gpio_dt_spec dischrg = GPIO_DT_SPEC_GET(DT_PATH(zephyr_user), dischrg_gpios); - ARG_UNUSED(dev); if (!device_is_ready(dischrg.port)) { return -ENODEV; diff --git a/boards/arm/tdk_robokit1/tdk_robokit1-common.dtsi b/boards/arm/tdk_robokit1/tdk_robokit1-common.dtsi index 33ed93f7a60d..7ea31acd9867 100644 --- a/boards/arm/tdk_robokit1/tdk_robokit1-common.dtsi +++ b/boards/arm/tdk_robokit1/tdk_robokit1-common.dtsi @@ -4,7 +4,9 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include #include "tdk_robokit1-pinctrl.dtsi" +#include "tdk_robokit1-thermistor.dtsi" / { aliases { @@ -12,6 +14,7 @@ magn0 = &akm09918c; accel0 = &icm42688; die-temp0 = &icm42688; + ambient-temp0 = &temp_sensor; }; chosen { @@ -41,6 +44,17 @@ label = "User LED"; }; }; + + temp_sensor: ambient_temp_sensor { + compatible = "zephyr,ntc-thermistor"; + io-channels = <&spi_adc 0>; + zephyr,rt-table = <&thermistor_R25_10000_B_3974>; + r25-ohm = <10000>; + pullup-uv = <3300000>; + pullup-ohm = <0>; + pulldown-ohm = <10000>; + connection-type = "NTC_CONNECTED_POSITIVE"; + }; }; &cpu0 { @@ -90,7 +104,8 @@ pinctrl-names = "default"; dmas = <&xdmac 0 DMA_PERID_SPI0_TX>, <&xdmac 1 DMA_PERID_SPI0_RX>; dma-names = "tx", "rx"; - cs-gpios =<&pioa 31 GPIO_ACTIVE_LOW>; + cs-gpios =<&pioa 31 GPIO_ACTIVE_LOW>, + <&pioc 31 GPIO_ACTIVE_LOW>; status = "okay"; icm42688: icm42688p@0 { @@ -103,6 +118,22 @@ gyro-hz = <32000>; gyro-fs = <2000>; }; + spi_adc: adc@1 { + compatible = "ti,ads7052"; + reg = <1>; + #io-channel-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <12000000>; + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_VDD_1"; + zephyr,vref-mv = <3300>; + zephyr,acquisition-time = ; + zephyr,resolution = <14>; + }; + }; }; &spi1 { @@ -201,3 +232,6 @@ zephyr_udc0: &usbhs { }; }; +&thermistor_R25_10000_B_3974 { + status = "okay"; +}; diff --git a/boards/arm/tdk_robokit1/tdk_robokit1-thermistor.dtsi b/boards/arm/tdk_robokit1/tdk_robokit1-thermistor.dtsi new file mode 100644 index 000000000000..26ed27522ac8 --- /dev/null +++ b/boards/arm/tdk_robokit1/tdk_robokit1-thermistor.dtsi @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2023 Google LLC + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* NTC Thermistor Table Generated with ntc_thermistor_table.py */ + +/ { + thermistor_R25_10000_B_3974: thermistor-R25-10000-B-3974 { + status = "disabled"; + compatible = "zephyr,ntc-thermistor-rt-table"; + /* Format */ + tr-table = <(-25) 146676>, + <(-15) 78875>, + <(-5) 44424>, + <(5) 26075>, + <(15) 15881>, + <(25) 10000>, + <(35) 6488>, + <(45) 4326>, + <(55) 2956>, + <(65) 2066>, + <(75) 1474>, + <(85) 1072>, + <(95) 793>, + <(105) 596>, + <(115) 454>, + <(125) 351>; + }; +}; diff --git a/boards/arm/teensy4/teensy40.dts b/boards/arm/teensy4/teensy40.dts index 9e03e1b80f11..0c8d07db2ec8 100644 --- a/boards/arm/teensy4/teensy40.dts +++ b/boards/arm/teensy4/teensy40.dts @@ -8,6 +8,8 @@ #include #include "teensy4-pinctrl.dtsi" +#include +#include / { model = "PJRC TEENSY 4.0 board"; @@ -18,10 +20,13 @@ }; chosen { + zephyr,flash-controller = &w25q16jvuxim; + zephyr,flash = &w25q16jvuxim; zephyr,sram = &ocram; zephyr,itcm = &itcm; zephyr,dtcm = &dtcm; zephyr,console = &lpuart6; /* Teensy Pins 0(RX1) 1(TX1) */ + zephyr,shell-uart = &lpuart6; zephyr,canbus = &flexcan1; /* Teensy Pins 23(CRX1) 22(CTX1) */ }; @@ -35,15 +40,20 @@ }; &flexspi { - reg = <0x402a8000 0x4000>, <0x60000000 0x200000>; + status = "okay"; + + reg = <0x402a8000 0x4000>, <0x60000000 DT_SIZE_M(2)>; /* WINBOND flash memory*/ w25q16jvuxim: w25q16jvuxim@0 { - compatible = "winbond,w25q16jvuxim"; - size = <16777208>; + compatible = "nxp,imx-flexspi-nor"; + size = ; reg = <0>; - spi-max-frequency = <133000000>; + spi-max-frequency = ; status = "okay"; jedec-id = [ef 40 15]; + + erase-block-size = <4096>; + write-block-size = <1>; }; }; diff --git a/boards/arm/teensy4/teensy41.dts b/boards/arm/teensy4/teensy41.dts index c0aadf9667a9..e113183c66f5 100644 --- a/boards/arm/teensy4/teensy41.dts +++ b/boards/arm/teensy4/teensy41.dts @@ -6,17 +6,31 @@ #include "teensy40.dts" +/ { + model = "PJRC TEENSY 4.1 board"; + + chosen { + zephyr,flash-controller = &w25q64jvxgim; + zephyr,flash = &w25q64jvxgim; + }; +}; + /delete-node/ &w25q16jvuxim; &flexspi { - reg = < 0x402a8000 0x4000 >, < 0x60000000 0x800000 >; + status = "okay"; + + reg = <0x402a8000 0x4000>, <0x60000000 DT_SIZE_M(8)>; /* WINBOND flash memory*/ w25q64jvxgim: w25q64jvxgim@0 { - compatible = "winbond,w25q64jvxgim"; - size = < 8388607 >; - reg = < 0 >; - spi-max-frequency = < 133000000 >; + compatible = "nxp,imx-flexspi-nor"; + size = ; + reg = <0>; + spi-max-frequency = ; status = "okay"; - jedec-id = [ ef 70 17 ]; + jedec-id = [ef 70 17]; + + erase-block-size = <4096>; + write-block-size = <1>; }; }; diff --git a/boards/arm/thingy52_nrf52832/board.c b/boards/arm/thingy52_nrf52832/board.c index 18f097b657d3..645cd4a0a309 100644 --- a/boards/arm/thingy52_nrf52832/board.c +++ b/boards/arm/thingy52_nrf52832/board.c @@ -11,7 +11,7 @@ static const struct gpio_dt_spec ccs_gpio = GPIO_DT_SPEC_GET(DT_NODELABEL(ccs_pwr), enable_gpios); -static int pwr_ctrl_init(const struct device *dev) +static int pwr_ctrl_init(void) { int ret; diff --git a/boards/arm/thingy52_nrf52832/board.cmake b/boards/arm/thingy52_nrf52832/board.cmake index cd6796aae4d6..ee8654406105 100644 --- a/boards/arm/thingy52_nrf52832/board.cmake +++ b/boards/arm/thingy52_nrf52832/board.cmake @@ -3,5 +3,6 @@ board_runner_args(nrfjprog "--softreset") board_runner_args(jlink "--device=nRF52832_xxAA" "--speed=4000") include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) +include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake) include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) include(${ZEPHYR_BASE}/boards/common/openocd-nrf5.board.cmake) diff --git a/boards/arm/thingy53_nrf5340/Kconfig.defconfig b/boards/arm/thingy53_nrf5340/Kconfig.defconfig index 7401aae17b71..c79eb908c215 100644 --- a/boards/arm/thingy53_nrf5340/Kconfig.defconfig +++ b/boards/arm/thingy53_nrf5340/Kconfig.defconfig @@ -128,6 +128,10 @@ config USB_DEVICE_INITIALIZE_AT_BOOT config SHELL_BACKEND_SERIAL_CHECK_DTR default SHELL + depends on UART_LINE_CTRL + +config UART_LINE_CTRL + default SHELL config USB_DEVICE_REMOTE_WAKEUP default n diff --git a/boards/arm/thingy53_nrf5340/board.c b/boards/arm/thingy53_nrf5340/board.c index 39a194e93de1..509ec04bdab5 100644 --- a/boards/arm/thingy53_nrf5340/board.c +++ b/boards/arm/thingy53_nrf5340/board.c @@ -57,9 +57,8 @@ static void enable_cpunet(void) #endif /* !CONFIG_TRUSTED_EXECUTION_SECURE */ } -static int setup(const struct device *dev) +static int setup(void) { - ARG_UNUSED(dev); #if !defined(CONFIG_TRUSTED_EXECUTION_SECURE) if (IS_ENABLED(CONFIG_SENSOR)) { diff --git a/boards/arm/thingy53_nrf5340/board.cmake b/boards/arm/thingy53_nrf5340/board.cmake index 084e296d052e..75edf877f104 100644 --- a/boards/arm/thingy53_nrf5340/board.cmake +++ b/boards/arm/thingy53_nrf5340/board.cmake @@ -9,4 +9,5 @@ board_runner_args(jlink "--device=nrf5340_xxaa_net" "--speed=4000") endif() include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) +include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake) include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/arm/thingy53_nrf5340/thingy53_nrf5340_common.dts b/boards/arm/thingy53_nrf5340/thingy53_nrf5340_common.dts index 0c9b3fff8991..3ce47a68f628 100644 --- a/boards/arm/thingy53_nrf5340/thingy53_nrf5340_common.dts +++ b/boards/arm/thingy53_nrf5340/thingy53_nrf5340_common.dts @@ -167,13 +167,13 @@ reg = <0x10>; }; - bh1749@38 { + bh1749: bh1749@38 { compatible = "rohm,bh1749"; reg = <0x38>; int-gpios = <&gpio1 5 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; }; - bme688@76 { + bme688: bme688@76 { compatible = "bosch,bme680"; reg = <0x76>; }; @@ -250,18 +250,6 @@ }; }; -&timer0 { - status = "okay"; -}; - -&timer1 { - status = "okay"; -}; - -&timer2 { - status = "okay"; -}; - &flash0 { partitions { compatible = "fixed-partitions"; diff --git a/boards/arm/thingy53_nrf5340/thingy53_nrf5340_cpunet.dts b/boards/arm/thingy53_nrf5340/thingy53_nrf5340_cpunet.dts index e1461288e810..25eefde08ab6 100644 --- a/boards/arm/thingy53_nrf5340/thingy53_nrf5340_cpunet.dts +++ b/boards/arm/thingy53_nrf5340/thingy53_nrf5340_cpunet.dts @@ -94,18 +94,6 @@ pinctrl-names = "default", "sleep"; }; -&timer0 { - status = "okay"; -}; - -&timer1 { - status = "okay"; -}; - -&timer2 { - status = "okay"; -}; - &flash1 { partitions { diff --git a/boards/arm/twr_ke18f/pinmux.c b/boards/arm/twr_ke18f/pinmux.c index e6583c561c35..72eff0697299 100644 --- a/boards/arm/twr_ke18f/pinmux.c +++ b/boards/arm/twr_ke18f/pinmux.c @@ -8,9 +8,8 @@ #include #include -static int twr_ke18f_pinmux_init(const struct device *dev) +static int twr_ke18f_pinmux_init(void) { - ARG_UNUSED(dev); int err; /* Used by pinctrl functions */ diff --git a/boards/arm/ubx_bmd345eval_nrf52840/board.c b/boards/arm/ubx_bmd345eval_nrf52840/board.c index 7b3a197d9967..879672443b7d 100644 --- a/boards/arm/ubx_bmd345eval_nrf52840/board.c +++ b/boards/arm/ubx_bmd345eval_nrf52840/board.c @@ -11,9 +11,8 @@ #define MODE_PIN 4 /* P1.04 */ #define A_SEL_PIN 2 /* P1.02 */ -static int bmd345_fem_init(const struct device *dev) +static int bmd345_fem_init(void) { - ARG_UNUSED(dev); int ret; const struct device *mode_asel_port_dev; diff --git a/boards/arm/v2m_beetle/pinmux.c b/boards/arm/v2m_beetle/pinmux.c index 272adec76f03..856239761b80 100644 --- a/boards/arm/v2m_beetle/pinmux.c +++ b/boards/arm/v2m_beetle/pinmux.c @@ -132,9 +132,8 @@ static void arm_v2m_beetle_pinmux_defaults(void) CMSDK_AHB_GPIO1_DEV->data |= (0x1 << 15); } -static int arm_v2m_beetle_pinmux_init(const struct device *port) +static int arm_v2m_beetle_pinmux_init(void) { - ARG_UNUSED(port); arm_v2m_beetle_pinmux_defaults(); diff --git a/boards/arm/v2m_musca_b1/pinmux.c b/boards/arm/v2m_musca_b1/pinmux.c index 1d7238dc577f..443d462eb212 100644 --- a/boards/arm/v2m_musca_b1/pinmux.c +++ b/boards/arm/v2m_musca_b1/pinmux.c @@ -55,9 +55,8 @@ static void arm_musca_b1_pinmux_defaults(void) } #endif -static int arm_musca_pinmux_init(const struct device *port) +static int arm_musca_pinmux_init(void) { - ARG_UNUSED(port); arm_musca_b1_pinmux_defaults(); diff --git a/boards/arm/v2m_musca_s1/pinmux.c b/boards/arm/v2m_musca_s1/pinmux.c index cdf74172dcd0..a1a1a4ad2523 100644 --- a/boards/arm/v2m_musca_s1/pinmux.c +++ b/boards/arm/v2m_musca_s1/pinmux.c @@ -54,9 +54,8 @@ static void arm_musca_s1_pinmux_defaults(void) } #endif -static int arm_musca_pinmux_init(const struct device *port) +static int arm_musca_pinmux_init(void) { - ARG_UNUSED(port); arm_musca_s1_pinmux_defaults(); diff --git a/boards/arm/wio_terminal/Kconfig.board b/boards/arm/wio_terminal/Kconfig.board new file mode 100644 index 000000000000..cec329c248f4 --- /dev/null +++ b/boards/arm/wio_terminal/Kconfig.board @@ -0,0 +1,8 @@ +# Copyright (c) 2023 Joel Guittet +# Wio Terminal board configuration + +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_WIO_TERMINAL + bool "Wio Terminal" + depends on SOC_PART_NUMBER_SAMD51P19A diff --git a/boards/arm/wio_terminal/Kconfig.defconfig b/boards/arm/wio_terminal/Kconfig.defconfig new file mode 100644 index 000000000000..a8974dbd5664 --- /dev/null +++ b/boards/arm/wio_terminal/Kconfig.defconfig @@ -0,0 +1,8 @@ +# Copyright (c) 2023 Joel Guittet +# Wio Terminal board configuration + +# SPDX-License-Identifier: Apache-2.0 + +config BOARD + default "wio_terminal" + depends on BOARD_WIO_TERMINAL diff --git a/boards/arm/wio_terminal/board.cmake b/boards/arm/wio_terminal/board.cmake new file mode 100644 index 000000000000..42f5b451d285 --- /dev/null +++ b/boards/arm/wio_terminal/board.cmake @@ -0,0 +1,5 @@ +# Copyright (c) 2023 Joel Guittet +# SPDX-License-Identifier: Apache-2.0 + +include(${ZEPHYR_BASE}/boards/common/bossac.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/arm/wio_terminal/doc/img/wio_terminal.png b/boards/arm/wio_terminal/doc/img/wio_terminal.png new file mode 100644 index 000000000000..ada43bf984b9 Binary files /dev/null and b/boards/arm/wio_terminal/doc/img/wio_terminal.png differ diff --git a/boards/arm/wio_terminal/doc/index.rst b/boards/arm/wio_terminal/doc/index.rst new file mode 100644 index 000000000000..613061d8d50a --- /dev/null +++ b/boards/arm/wio_terminal/doc/index.rst @@ -0,0 +1,212 @@ +.. _wio_terminal: + +Wio Terminal +############ + +Overview +******** + +The Wio Terminal is a small (72 mm x 57 mm x 12 mm) and powerful ARM board with +wireless connectivity (2.4G/5G dual-band Wi-Fi and BLE 5.0), LCD display, +USB C port, FPC connector, microSD card slot, Raspberry Pi compatible 40-pins +header and 2 Grove connectors. + +.. image:: img/wio_terminal.png + :width: 500px + :align: center + :alt: Seeed Studio Wio Terminal + +Hardware +******** + +- ATSAMD51P19 ARM Cortex-M4F processor at 120 MHz +- 512 KiB flash memory and 192 KiB of RAM +- 4 MiB external flash +- MicroSD card slot +- RTL8720DN 2.4G/5G Dual Bands Wireless and BLE5.0 Combo Module +- 2.4inch LCD display +- LIS3DH accelerometer +- Microphone 1.0V-10V -42dB +- Speaker ≥78dB @10cm 4000Hz +- Light Sensor 400-1050nm +- Infrared Emitter 940nm +- GPIO 40 pin (Raspberry Pi compatible) +- 2x Grove connectors +- 1x user LED +- 3x user buttons +- 5-way user button +- Power/Reset/Boot mode switch +- Native USB port + +Supported Features +================== + +The wio_terminal board configuration supports the following hardware features: + +.. list-table:: + :header-rows: 1 + + * - Interface + - Controller + - Driver / Component + * - NVIC + - on-chip + - Nested vector interrupt controller + * - Flash + - on-chip + - Can be used with LittleFS to store files + * - SYSTICK + - on-chip + - Systick + * - WDT + - on-chip + - Watchdog + * - GPIO + - on-chip + - I/O ports + * - USART + - on-chip + - Serial port + * - I2C + - on-chip + - Inter-Integrated Circuit + * - SPI + - on-chip + - Serial Peripheral Interface port + * - TRNG + - on-chip + - True Random Number Generator + * - HWINFO + - on-chip + - Unique 128 bit serial number + * - RTC + - on-chip + - Real-Time Counter + * - USB + - on-chip + - USB device + * - PWM + - on-chip + - PWM + +Other hardware features are not currently supported by Zephyr. + +The default configuration can be found in the Kconfig file +:zephyr_file:`boards/arm/wio_terminal/wio_terminal_defconfig`. + +Zephyr can use the default Cortex-M SYSTICK timer or the SAM0 specific RTC. +To use the RTC, set :kconfig:option:`CONFIG_CORTEX_M_SYSTICK=n` and set +:kconfig:option:`CONFIG_SYS_CLOCK_TICKS_PER_SEC` to no more than 32 kHZ divided +by 7, i.e. no more than 4500. + +Connections and IOs +=================== + +The `Wio Terminal Getting started guide`_ has detailed information about the +board including `pinouts`_ and its `schematics`_. + +System Clock +============ + +The SAMD51 MCU is configured to use the 32.768 kHz internal oscillator with the +on-chip PLL generating the 120 MHz system clock. + +Serial Port +=========== + +Zephyr console output is available using the USB connector, which is used to +make the console available on PC as USB CDC class. + +USB Device Port +=============== + +The SAMD51 MCU has a USB device port that can be used to communicate with a +host PC. See the :ref:`usb-samples` sample applications for more, such as the +:ref:`usb_cdc-acm` sample which sets up a virtual serial port that echos +characters back to the host PC. + +Programming and Debugging +************************* + +The Wio Terminal ships with an UF2 bootloader that is BOSSA compatible. The +bootloader can be entered by quickly tapping the reset button twice. + +The UF2 file is generated when building the application, and it is possible to +use it to flash the target. Enter the bootloader by quickly sliding the power +button twice, and copy the UF2 file to the USB mass storage device. The device +reboots on the new firmware after the UF2 file has finished transferring. + +Flashing +======== + +#. Build the Zephyr kernel and the :code:`button` sample application: + + .. zephyr-app-commands:: + :zephyr-app: samples/basic/button + :board: wio_terminal + :goals: build + :compact: + +#. Swipe the reset/power button down twice quickly to enter bootloader mode + +#. Flash the image: + + .. zephyr-app-commands:: + :zephyr-app: samples/basic/button + :board: wio_terminal + :goals: flash + :compact: + + You should see the blue (user) LED flashing whenever you press the third + (counting from the top left) user button at the top of the Wio Terminal. + +Debugging +========= + +In addition to the built-in bootloader, the Wio Terminal can be flashed and +debugged using an SWD probe such as the Segger J-Link. + +#. Solder cables to the code:`SWCLK`, :code:`SWDIO`, :code:`RESET`, + :code:`GND`, and :code:`3V3` pins. See `Test with SWD`_ for more + information. + +#. Connect the board to the probe by connecting the :code:`SWCLK`, + :code:`SWDIO`, :code:`RESET`, :code:`GND`, and :code:`3V3` pins on the + Wio Terminal to the :code:`SWCLK`, :code:`SWDIO`, :code:`RESET`, + :code:`GND`, and :code:`VTref` pins on the `J-Link`_. + +#. Flash the image: + + .. zephyr-app-commands:: + :zephyr-app: samples/basic/button + :board: wio_terminal + :goals: flash -r openocd + :compact: + +#. Start debugging: + + .. zephyr-app-commands:: + :zephyr-app: samples/basic/button + :board: wio_terminal + :goals: debug + :compact: + +References +********** + +.. target-notes:: + +.. _Wio Terminal Getting started guide: + https://wiki.seeedstudio.com/Wio-Terminal-Getting-Started/ + +.. _pinouts: + https://wiki.seeedstudio.com/Wio-Terminal-Getting-Started/#pinout-diagram + +.. _schematics: + https://wiki.seeedstudio.com/Wio-Terminal-Getting-Started/#resources + +.. _Test with SWD: + https://wiki.seeedstudio.com/Wio-Terminal-Getting-Started/#test-with-swd + +.. _J-Link: + https://www.segger.com/products/debug-probes/j-link/technology/interface-description/ diff --git a/boards/arm/wio_terminal/grove_connectors.dtsi b/boards/arm/wio_terminal/grove_connectors.dtsi new file mode 100644 index 000000000000..c8c213ac79a0 --- /dev/null +++ b/boards/arm/wio_terminal/grove_connectors.dtsi @@ -0,0 +1,25 @@ +/* + * Copyright (c) 2023 Joel Guittet + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + grove_header0: grove_header0 { + compatible = "grove-header"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <0 0 &portb 8 0>, /* A0/D0 */ + <1 0 &portb 9 0>; /* A1/D1 */ + }; + grove_header1: grove_header1 { + compatible = "grove-header"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <0 0 &porta 16 0>, /* I2C1_SCL */ + <1 0 &porta 17 0>; /* I2C1_SDA */ + }; +}; + +grove_i2c1: &sercom3 {}; diff --git a/boards/arm/wio_terminal/pre_dt_board.cmake b/boards/arm/wio_terminal/pre_dt_board.cmake new file mode 100644 index 000000000000..2a14587c24b1 --- /dev/null +++ b/boards/arm/wio_terminal/pre_dt_board.cmake @@ -0,0 +1,9 @@ +# Copyright (c) 2023 Joel Guittet +# SPDX-License-Identifier: Apache-2.0 + +# SPI is implemented via sercom so node name isn't spi@... +list(APPEND EXTRA_DTC_FLAGS "-Wno-spi_bus_bridge") + +# Suppress "unique_unit_address_if_enabled" to handle the following overlaps: +# - /soc/pinmux@41008000 & /soc/gpio@41008000 +list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled") diff --git a/boards/arm/wio_terminal/raspberrypi_40pins_connector.dtsi b/boards/arm/wio_terminal/raspberrypi_40pins_connector.dtsi new file mode 100644 index 000000000000..75ed89e635e6 --- /dev/null +++ b/boards/arm/wio_terminal/raspberrypi_40pins_connector.dtsi @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2023 Joel Guittet + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + raspberrypi_header: raspberrypi_header { + compatible = "raspberrypi-40pins-header"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <0 0 &porta 17 0>, /* I2C1_SDA */ + <1 0 &porta 16 0>, /* I2C1_SCL */ + <2 0 &portb 14 0>, /* GPCLK0 */ + <3 0 &portb 26 0>, /* TXD */ + <4 0 &portb 27 0>, /* RXD */ + <5 0 &porta 2 0>, /* DAC0 */ + <6 0 &portb 16 0>, /* I2S_BLCK */ + <7 0 &portb 8 0>, /* A0/D0 */ + <8 0 &portb 9 0>, /* A1/D1 */ + <9 0 &porta 7 0>, /* A2/D2 */ + <10 0 &portb 4 0>, /* A3/D3 */ + <11 0 &portb 2 0>, /* SPI_MOSI */ + <12 0 &portb 0 0>, /* SPI_MISO */ + <13 0 &portb 5 0>, /* A4/D4 */ + <14 0 &portb 3 0>, /* SPI_SCK */ + <15 0 &portb 1 0>, /* SPI_CS */ + <16 0 &porta 5 0>, /* DAC1 */ + <17 0 &porta 13 0>, /* I2C0_SDA */ + <18 0 &porta 12 0>, /* I2C0_SCL */ + <19 0 &portb 12 0>, /* GPCLK1 */ + <20 0 &portb 13 0>, /* GPCLK2 */ + <21 0 &portb 6 0>, /* A5/D5 */ + <22 0 &porta 4 0>, /* A6/D6 */ + <23 0 &porta 20 0>, /* I2S_LRCLK */ + <24 0 &portb 7 0>, /* A7/D7 */ + <25 0 &porta 6 0>, /* A8/D8 */ + <26 0 &porta 21 0>, /* I2S_SDIN */ + <27 0 &porta 22 0>; /* I2S_SDOUT */ + }; +}; + +raspberrypi_serial: &sercom2 {}; +raspberrypi_i2c0: &sercom4 {}; +raspberrypi_i2c1: &sercom3 {}; +raspberrypi_spi: &sercom5 {}; diff --git a/boards/arm/wio_terminal/support/openocd.cfg b/boards/arm/wio_terminal/support/openocd.cfg new file mode 100644 index 000000000000..ce9baa8012f1 --- /dev/null +++ b/boards/arm/wio_terminal/support/openocd.cfg @@ -0,0 +1,22 @@ +# SPDX-License-Identifier: Apache-2.0 + +source [find interface/jlink.cfg] + +transport select swd + +set CHIPNAME atsamd51p19 + +source [find target/atsame5x.cfg] + +adapter_khz 500 +reset_config srst_only + +$_TARGETNAME configure -event gdb-attach { + echo "Debugger attaching: halting execution" + reset halt +} + +$_TARGETNAME configure -event gdb-detach { + echo "Debugger detaching: resuming execution" + resume +} diff --git a/boards/arm/wio_terminal/wio_terminal-pinctrl.dtsi b/boards/arm/wio_terminal/wio_terminal-pinctrl.dtsi new file mode 100644 index 000000000000..c2fafd25ad97 --- /dev/null +++ b/boards/arm/wio_terminal/wio_terminal-pinctrl.dtsi @@ -0,0 +1,76 @@ +/* + * Copyright (c) 2023 Joel Guittet + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +&pinctrl { + + sercom0_spi_default: sercom0_spi_default { + group1 { + pinmux = , + , + ; + }; + }; + + sercom1_uart_default: sercom1_uart_default { + group1 { + pinmux = , + ; + }; + }; + + sercom2_uart_default: sercom2_uart_default { + group1 { + pinmux = , + ; + }; + }; + + sercom3_i2c_default: sercom3_i2c_default { + group1 { + pinmux = , + ; + }; + }; + + sercom4_i2c_default: sercom4_i2c_default { + group1 { + pinmux = , + ; + }; + }; + + sercom5_spi_default: sercom5_spi_default { + group1 { + pinmux = , + , + ; + }; + }; + + sercom6_spi_default: sercom6_spi_default { + group1 { + pinmux = , + , + ; + }; + }; + + sercom7_spi_default: sercom7_spi_default { + group1 { + pinmux = , + , + ; + }; + }; + + usb_dc_default: usb_dc_default { + group1 { + pinmux = , + ; + }; + }; +}; diff --git a/boards/arm/wio_terminal/wio_terminal.dts b/boards/arm/wio_terminal/wio_terminal.dts new file mode 100644 index 000000000000..32b63554b28d --- /dev/null +++ b/boards/arm/wio_terminal/wio_terminal.dts @@ -0,0 +1,282 @@ +/* + * Copyright (c) 2023 Joel Guittet + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include "wio_terminal-pinctrl.dtsi" +#include "grove_connectors.dtsi" +#include "raspberrypi_40pins_connector.dtsi" +#include + +/ { + model = "Wio Terminal"; + compatible = "seeed,wio-terminal"; + + chosen { + zephyr,sram = &sram0; + zephyr,flash = &flash0; + zephyr,console = &wio_terminal_console; + zephyr,shell-uart = &wio_terminal_console; + zephyr,code-partition = &code_partition; + zephyr,display = &ili9341; + }; + + /* These aliases are provided for compatibility with samples */ + aliases { + led0 = &led0; + sw0 = &user_button_0; + sw1 = &user_button_1; + sw2 = &user_button_2; + i2c0 = &sercom4; + i2c1 = &sercom3; + spi0 = &sercom5; + uart0 = &sercom2; + accel0 = &lis3dh; + sdhc0 = &sdhc0; + }; + + /* LEDs */ + leds { + compatible = "gpio-leds"; + led0: led_0 { + label = "LED"; + gpios = <&porta 15 GPIO_ACTIVE_HIGH>; + }; + }; + + /* Buttons */ + gpio_keys { + compatible = "gpio-keys"; + user_button_0: button_0 { + label = "User Button 0"; + gpios = <&portc 26 GPIO_ACTIVE_LOW>; + }; + user_button_1: button_1 { + label = "User Button 1"; + gpios = <&portc 27 GPIO_ACTIVE_LOW>; + }; + user_button_2: button_2 { + label = "User Button 2"; + gpios = <&portc 28 GPIO_ACTIVE_LOW>; + }; + joy_sel: joystick_selection { + label = "joystick selection"; + gpios = <&portd 10 GPIO_ACTIVE_LOW>; + }; + joy_down: joystick_down { + label = "joystick down"; + gpios = <&portd 8 GPIO_ACTIVE_LOW>; + }; + joy_up: joystick_up { + label = "joystick up"; + gpios = <&portd 20 GPIO_ACTIVE_LOW>; + }; + joy_left: joystick_left { + label = "joystick left"; + gpios = <&portd 12 GPIO_ACTIVE_LOW>; + }; + joy_right: joystick_right { + label = "joystick right"; + gpios = <&portd 9 GPIO_ACTIVE_LOW>; + }; + }; + + /* Regulators */ + lcd_backlight_en { + compatible = "regulator-fixed"; + regulator-name = "lcd_backlight_enable"; + enable-gpios = <&portc 5 GPIO_ACTIVE_HIGH>; + regulator-boot-on; + }; + rpi_power_3v3_en { + compatible = "regulator-fixed"; + regulator-name = "rpi_power_3v3_enable"; + enable-gpios = <&portc 15 GPIO_ACTIVE_LOW>; + regulator-boot-on; + }; + rpi_power_5v_en { + compatible = "regulator-fixed"; + regulator-name = "rpi_power_5v_enable"; + enable-gpios = <&portc 14 GPIO_ACTIVE_HIGH>; + regulator-boot-on; + }; + usb_power_5v_en { + compatible = "regulator-fixed"; + regulator-name = "usb_power_5v_en"; + enable-gpios = <&porta 27 GPIO_ACTIVE_LOW>; + }; +}; + +&cpu0 { + clock-frequency = <120000000>; +}; + +&dmac { + status = "okay"; +}; + +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@0 { + label = "uf2"; + reg = <0x00000000 DT_SIZE_K(16)>; + read-only; + }; + + code_partition: partition@4000 { + label = "code"; + reg = <0x4000 DT_SIZE_K(512-16)>; + read-only; + }; + }; +}; + +/* RTL8720D (Wifi/BLE) */ +&sercom0 { + status = "okay"; + compatible = "atmel,sam0-spi"; + #address-cells = <1>; + #size-cells = <0>; + dipo = <2>; + dopo = <0>; + pinctrl-0 = <&sercom0_spi_default>; + pinctrl-names = "default"; + cs-gpios = <&portc 25 GPIO_ACTIVE_LOW>; +}; + +/* RTL8720D (Wifi/BLE) */ +&sercom1 { + status = "okay"; + compatible = "atmel,sam0-uart"; + current-speed = <115200>; + rxpo = <1>; + txpo = <0>; + pinctrl-0 = <&sercom1_uart_default>; + pinctrl-names = "default"; +}; + +/* UART, Raspberry Pi connector */ +&sercom2 { + status = "okay"; + compatible = "atmel,sam0-uart"; + current-speed = <115200>; + rxpo = <1>; + txpo = <0>; + pinctrl-0 = <&sercom2_uart_default>; + pinctrl-names = "default"; +}; + +/* I2C1, Raspberry Pi and Groove connectors */ +&sercom3 { + status = "okay"; + compatible = "atmel,sam0-i2c"; + clock-frequency = ; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&sercom3_i2c_default>; + pinctrl-names = "default"; +}; + +/* I2C0, LIS3DH, ATECC608, Raspberry Pi connector */ +&sercom4 { + status = "okay"; + compatible = "atmel,sam0-i2c"; + clock-frequency = ; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&sercom4_i2c_default>; + pinctrl-names = "default"; + + /* LIS3DH */ + lis3dh: lis3dh@18 { + compatible = "st,lis3dh", "st,lis2dh"; + status = "okay"; + reg = <0x18>; + irq-gpios = <&portc 21 GPIO_ACTIVE_HIGH>; + }; + + /* ATECC608A */ + atecc608a@6a { + compatible = "atmel,atecc608"; + reg = <0x6a>; + }; +}; + +/* SPI, Raspberry Pi connector */ +&sercom5 { + status = "okay"; + compatible = "atmel,sam0-spi"; + #address-cells = <1>; + #size-cells = <0>; + dipo = <2>; + dopo = <0>; + pinctrl-0 = <&sercom5_spi_default>; + pinctrl-names = "default"; + cs-gpios = <&portb 1 GPIO_ACTIVE_LOW>; +}; + +/* microSD Card */ +&sercom6 { + status = "okay"; + compatible = "atmel,sam0-spi"; + #address-cells = <1>; + #size-cells = <0>; + dipo = <2>; + dopo = <0>; + pinctrl-0 = <&sercom6_spi_default>; + pinctrl-names = "default"; + cs-gpios = <&portc 19 GPIO_ACTIVE_LOW>; + + /* microSD Card */ + sdhc0: sdhc@0 { + compatible = "zephyr,sdhc-spi-slot"; + reg = <0>; + spi-max-frequency = <24000000>; + mmc { + compatible = "zephyr,sdmmc-disk"; + }; + }; +}; + +/* LCD */ +&sercom7 { + status = "okay"; + compatible = "atmel,sam0-spi"; + #address-cells = <1>; + #size-cells = <0>; + dipo = <2>; + dopo = <3>; + pinctrl-0 = <&sercom7_spi_default>; + pinctrl-names = "default"; + cs-gpios = <&portb 21 GPIO_ACTIVE_LOW>; + + /* LCD */ + ili9341: ili9341@0 { + compatible = "ilitek,ili9341"; + spi-max-frequency = <24000000>; + reg = <0>; + cmd-data-gpios = <&portc 6 GPIO_ACTIVE_LOW>; + reset-gpios = <&portc 7 GPIO_ACTIVE_LOW>; + pixel-format = ; + rotation = <270>; + width = <320>; + height = <240>; + }; +}; + +/* USB */ +zephyr_udc0: &usb0 { + status = "okay"; + pinctrl-0 = <&usb_dc_default>; + pinctrl-names = "default"; + + wio_terminal_console: wio_terminal_console { + compatible = "zephyr,cdc-acm-uart"; + }; +}; diff --git a/boards/arm/wio_terminal/wio_terminal.yaml b/boards/arm/wio_terminal/wio_terminal.yaml new file mode 100644 index 000000000000..3612a32d33b4 --- /dev/null +++ b/boards/arm/wio_terminal/wio_terminal.yaml @@ -0,0 +1,21 @@ +identifier: wio_terminal +name: Wio Terminal +type: mcu +arch: arm +ram: 192 +flash: 512 +toolchain: + - zephyr + - gnuarmemb + - xtools +supported: + - adc + - counter + - dma + - gpio + - i2c + - pwm + - spi + - usb_cdc + - usb_device + - watchdog diff --git a/boards/arm/wio_terminal/wio_terminal_defconfig b/boards/arm/wio_terminal/wio_terminal_defconfig new file mode 100644 index 000000000000..353a699c150c --- /dev/null +++ b/boards/arm/wio_terminal/wio_terminal_defconfig @@ -0,0 +1,31 @@ +# Copyright (c) 2023 Joel Guittet +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_SOC_SERIES_SAMD51=y +CONFIG_SOC_PART_NUMBER_SAMD51P19A=y +CONFIG_SOC_ATMEL_SAMD5X_XOSC32K=y +CONFIG_SOC_ATMEL_SAMD5X_XOSC32K_AS_MAIN=y +CONFIG_BOARD_WIO_TERMINAL=y +CONFIG_ARM_MPU=y +CONFIG_CORTEX_M_SYSTICK=y +CONFIG_HW_STACK_PROTECTION=y +CONFIG_REGULATOR=y +CONFIG_GPIO=y + +# BOSSA bootloader +CONFIG_BOOTLOADER_BOSSA=y +CONFIG_BOOTLOADER_BOSSA_ADAFRUIT_UF2=y +CONFIG_BUILD_OUTPUT_UF2=y + +# Console over USB CDC-ACM +CONFIG_SERIAL=y +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y +CONFIG_UART_INTERRUPT_DRIVEN=y +CONFIG_USB_DEVICE_STACK=y +CONFIG_USB_DEVICE_INITIALIZE_AT_BOOT=y +CONFIG_USB_DEVICE_VID=0x2886 +CONFIG_USB_DEVICE_PID=0x802D +CONFIG_USB_DEVICE_MANUFACTURER="Seeed Studio" +CONFIG_USB_DEVICE_PRODUCT="Wio Terminal" +CONFIG_USB_CDC_ACM_LOG_LEVEL_OFF=y diff --git a/boards/arm/xiao_ble/xiao_ble_common.dtsi b/boards/arm/xiao_ble/xiao_ble_common.dtsi index 4a8f1f44ab83..588f381868a2 100644 --- a/boards/arm/xiao_ble/xiao_ble_common.dtsi +++ b/boards/arm/xiao_ble/xiao_ble_common.dtsi @@ -54,7 +54,7 @@ bootloader-led0 = &led0; mcuboot-led0 = &led0; watchdog0 = &wdt0; - spi-flash0 = &p25q16h_spi; + spi-flash0 = &p25q16h; }; }; @@ -107,18 +107,16 @@ pinctrl-names = "default", "sleep"; }; -&spi3 { +&qspi { status = "okay"; - pinctrl-0 = <&spi3_default>; - pinctrl-1 = <&spi3_sleep>; + pinctrl-0 = <&qspi_default>; + pinctrl-1 = <&qspi_sleep>; pinctrl-names = "default", "sleep"; - cs-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>; - p25q16h_spi: p25q16h@0 { - compatible = "jedec,spi-nor"; + p25q16h: p25q16h@0 { + compatible = "nordic,qspi-nor"; reg = <0>; - wp-gpios = <&gpio0 22 GPIO_ACTIVE_LOW>; - hold-gpios = <&gpio0 23 GPIO_ACTIVE_LOW>; - spi-max-frequency = <104000000>; + sck-frequency = <104000000>; + quad-enable-requirements = "S2B1v1"; jedec-id = [85 60 15]; sfdp-bfp = [ e5 20 f1 ff ff ff ff 00 44 eb 08 6b 08 3b 80 bb diff --git a/boards/arm/xmc45_relax_kit/xmc45_relax_kit.yaml b/boards/arm/xmc45_relax_kit/xmc45_relax_kit.yaml index 6a42215c36ef..035c48e7d621 100644 --- a/boards/arm/xmc45_relax_kit/xmc45_relax_kit.yaml +++ b/boards/arm/xmc45_relax_kit/xmc45_relax_kit.yaml @@ -6,5 +6,11 @@ toolchain: - zephyr - gnuarmemb - xtools +supported: + - adc + - dma + - gpio + - spi + - uart ram: 160 flash: 1024 diff --git a/boards/arm64/fvp_base_revc_2xaemv8a/doc/index.rst b/boards/arm64/fvp_base_revc_2xaemv8a/doc/index.rst index dd75e701fd34..224fbd959608 100644 --- a/boards/arm64/fvp_base_revc_2xaemv8a/doc/index.rst +++ b/boards/arm64/fvp_base_revc_2xaemv8a/doc/index.rst @@ -33,6 +33,8 @@ The following hardware features are supported: +-----------------------+------------+----------------------+ | ARM GENERIC TIMER | on-chip | system clock | +-----------------------+------------+----------------------+ +| SMSC_91C111 | on-chip | ethernet device | ++-----------------------+------------+----------------------+ The kernel currently does not support other hardware features on this platform. diff --git a/boards/arm64/fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a.dts b/boards/arm64/fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a.dts index f00e55b386e4..c089a959fa17 100644 --- a/boards/arm64/fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a.dts +++ b/boards/arm64/fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a.dts @@ -100,7 +100,7 @@ compatible = "arm,pl011"; reg = <0x1c090000 0x1000>; status = "disabled"; - interrupts = ; + interrupts = ; interrupt-names = "irq_5"; clocks = <&uartclk>; }; @@ -109,7 +109,7 @@ compatible = "arm,pl011"; reg = <0x1c0a0000 0x1000>; status = "disabled"; - interrupts = ; + interrupts = ; interrupt-names = "irq_6"; clocks = <&uartclk>; }; @@ -118,7 +118,7 @@ compatible = "arm,pl011"; reg = <0x1c0b0000 0x1000>; status = "disabled"; - interrupts = ; + interrupts = ; interrupt-names = "irq_7"; clocks = <&uartclk>; }; @@ -127,11 +127,30 @@ compatible = "arm,pl011"; reg = <0x1c0c0000 0x1000>; status = "disabled"; - interrupts = ; + interrupts = ; interrupt-names = "irq_8"; clocks = <&uartclk>; }; + eth: ethernet@1a000000 { + compatible = "smsc,lan91c111"; + reg = <0x1a000000 0x1000>; + interrupts = ; + status = "disabled"; + + phy: phy { + compatible = "ethernet-phy"; + status = "disabled"; + address = <0>; + mdio = <&mdio>; + }; + + mdio: mdio { + compatible = "smsc,lan91c111-mdio"; + status = "disabled"; + }; + }; + flash0: flash@0 { compatible = "soc-nv-flash"; reg = <0x0 DT_SIZE_K(64)>; diff --git a/boards/arm64/fvp_baser_aemv8r/doc/index.rst b/boards/arm64/fvp_baser_aemv8r/doc/index.rst index cf7db85573eb..862e574715b3 100644 --- a/boards/arm64/fvp_baser_aemv8r/doc/index.rst +++ b/boards/arm64/fvp_baser_aemv8r/doc/index.rst @@ -46,6 +46,8 @@ The following hardware features are supported: +-----------------------+------------+----------------------+ | Arm GENERIC TIMER | on-chip | system clock | +-----------------------+------------+----------------------+ +| SMSC_91C111 | on-chip | ethernet device | ++-----------------------+------------+----------------------+ The kernel currently does not support other hardware features on this platform. diff --git a/boards/arm64/fvp_baser_aemv8r/fvp_baser_aemv8r.dts b/boards/arm64/fvp_baser_aemv8r/fvp_baser_aemv8r.dts index 0466adfda18b..86b95839506b 100644 --- a/boards/arm64/fvp_baser_aemv8r/fvp_baser_aemv8r.dts +++ b/boards/arm64/fvp_baser_aemv8r/fvp_baser_aemv8r.dts @@ -36,6 +36,13 @@ compatible = "mmio-dram"; reg = <0x0 DT_SIZE_M(128)>; }; + + device_region: memory@80000000 { + compatible = "zephyr,memory-region", "mmio-dram"; + reg = <0x80000000 DT_SIZE_M(2048)>; + zephyr,memory-region = "DEVICE_REGION"; + zephyr,memory-region-mpu = "IO"; + }; }; }; diff --git a/boards/arm64/mimx8mm_evk/doc/index.rst b/boards/arm64/mimx8mm_evk/doc/index.rst index be9095c1180a..aa82dbdda83e 100644 --- a/boards/arm64/mimx8mm_evk/doc/index.rst +++ b/boards/arm64/mimx8mm_evk/doc/index.rst @@ -88,7 +88,7 @@ Or kick SMP zephyr.bin: .. code-block:: console - mw 303d0518 f 1; fatload mmc 1:1 0x93c00000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; cpu release 2 0x93c00000 + mw 303d0518 f 1; fatload mmc 1:1 0x93c00000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; cpu 2 release 0x93c00000 Use this configuration to run basic Zephyr applications and kernel tests, diff --git a/boards/arm64/mimx8mn_evk/doc/index.rst b/boards/arm64/mimx8mn_evk/doc/index.rst index e96aa6216977..4e7497b672e7 100644 --- a/boards/arm64/mimx8mn_evk/doc/index.rst +++ b/boards/arm64/mimx8mn_evk/doc/index.rst @@ -88,7 +88,7 @@ Or kick SMP zephyr.bin: .. code-block:: console - mw 303d0518 f 1; fatload mmc 1:1 0x93c00000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; cpu release 2 0x93c00000 + mw 303d0518 f 1; fatload mmc 1:1 0x93c00000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; cpu 2 release 0x93c00000 Use this configuration to run basic Zephyr applications and kernel tests, diff --git a/boards/arm64/mimx8mp_evk/doc/index.rst b/boards/arm64/mimx8mp_evk/doc/index.rst index 3d8a1a775e02..ab63461f2e88 100644 --- a/boards/arm64/mimx8mp_evk/doc/index.rst +++ b/boards/arm64/mimx8mp_evk/doc/index.rst @@ -88,7 +88,7 @@ Or kick SMP zephyr.bin: .. code-block:: console - mw 303d0518 f 1; fatload mmc 1:1 0xc0000000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; cpu release 2 0xc0000000 + mw 303d0518 f 1; fatload mmc 1:1 0xc0000000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; cpu 2 release 0xc0000000 Use this configuration to run basic Zephyr applications and kernel tests, for example, with the :ref:`synchronization_sample`: diff --git a/boards/arm64/mimx93_evk/doc/index.rst b/boards/arm64/mimx93_evk/doc/index.rst index fafc45a8b107..1e3bb0180c97 100644 --- a/boards/arm64/mimx93_evk/doc/index.rst +++ b/boards/arm64/mimx93_evk/doc/index.rst @@ -86,7 +86,7 @@ Use U-Boot to load and kick zephyr.bin to Cortex-A55 Core1: .. code-block:: console - fatload mmc 1:1 0xc0000000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; cpu release 1 0xc0000000 + fatload mmc 1:1 0xc0000000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; cpu 1 release 0xc0000000 Or use the following command to kick zephyr.bin to Cortex-A55 Core0: diff --git a/boards/common/actinius/actinius_board_common.c b/boards/common/actinius/actinius_board_common.c index b0a770319ca1..a18f88a0f77b 100644 --- a/boards/common/actinius/actinius_board_common.c +++ b/boards/common/actinius/actinius_board_common.c @@ -65,9 +65,8 @@ static int actinius_board_set_charger_enable(void) } #endif /* CHARGER_ENABLE */ -static int actinius_board_init(const struct device *dev) +static int actinius_board_init(void) { - ARG_UNUSED(dev); int result = 0; diff --git a/boards/common/nrfutil.board.cmake b/boards/common/nrfutil.board.cmake new file mode 100644 index 000000000000..c032e4376a2f --- /dev/null +++ b/boards/common/nrfutil.board.cmake @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: Apache-2.0 + +board_set_flasher_ifnset(nrfutil) +board_finalize_runner_args(nrfutil) # No default arguments to provide. diff --git a/boards/posix/native_posix/native_posix.dts b/boards/posix/native_posix/native_posix.dts index aa11130a7361..db0a46526c04 100644 --- a/boards/posix/native_posix/native_posix.dts +++ b/boards/posix/native_posix/native_posix.dts @@ -22,7 +22,7 @@ zephyr,flash-controller = &flashcontroller0; zephyr,display = &sdl_dc; zephyr,canbus = &can_loopback0; - zephyr,keyboard-scan = &sdl_kscan; + zephyr,keyboard-scan = &kscan_input; }; aliases { @@ -30,7 +30,8 @@ i2c-0 = &i2c0; spi-0 = &spi0; led0 = &led0; - kscan0 = &sdl_kscan; + kscan0 = &kscan_input; + rtc = &rtc; }; leds { @@ -177,8 +178,11 @@ width = <320>; }; - sdl_kscan: sdl_kscan { - compatible = "zephyr,sdl-kscan"; + input-sdl-touch { + compatible = "zephyr,input-sdl-touch"; + kscan_input: kscan-input { + compatible = "zephyr,kscan-input"; + }; }; can_loopback0: can_loopback0 { @@ -200,4 +204,10 @@ sample-point = <875>; bus-speed = <125000>; }; + + rtc: rtc { + status = "okay"; + compatible = "zephyr,rtc-emul"; + alarms-count = <2>; + }; }; diff --git a/boards/posix/native_posix/timer_model.c b/boards/posix/native_posix/timer_model.c index f20b0b4b694f..cfa1c10ef060 100644 --- a/boards/posix/native_posix/timer_model.c +++ b/boards/posix/native_posix/timer_model.c @@ -29,7 +29,7 @@ #include #include #include "cmdline.h" -#include "soc.h" +#include "posix_native_task.h" #define DEBUG_NP_TIMER 0 diff --git a/boards/posix/nrf52_bsim/CMakeLists.txt b/boards/posix/nrf52_bsim/CMakeLists.txt index 2d5528dcf999..19bb7935d888 100644 --- a/boards/posix/nrf52_bsim/CMakeLists.txt +++ b/boards/posix/nrf52_bsim/CMakeLists.txt @@ -29,9 +29,13 @@ zephyr_library_sources( main.c time_machine.c trace_hook.c - cmsis.c + cmsis/cmsis.c + soc/nrfx_coredep.c ) +zephyr_include_directories(soc) +zephyr_include_directories(cmsis) + zephyr_library_include_directories( $ENV{BSIM_COMPONENTS_PATH}/libUtilv1/src/ $ENV{BSIM_COMPONENTS_PATH}/libPhyComv1/src/ diff --git a/boards/posix/nrf52_bsim/Kconfig.board b/boards/posix/nrf52_bsim/Kconfig.board index 56452a4e18c3..cbf192279bd7 100644 --- a/boards/posix/nrf52_bsim/Kconfig.board +++ b/boards/posix/nrf52_bsim/Kconfig.board @@ -11,6 +11,7 @@ config BOARD_NRF52_BSIM select NRF_RTC_TIMER select CLOCK_CONTROL select HAS_NRFX + select HAS_NORDIC_DRIVERS help Will produce a console Linux process which can be executed natively. It needs the BabbleSim simulator both in compile time and to execute diff --git a/boards/posix/nrf52_bsim/Kconfig.defconfig b/boards/posix/nrf52_bsim/Kconfig.defconfig index ad3630d060c5..3e11949abc5b 100644 --- a/boards/posix/nrf52_bsim/Kconfig.defconfig +++ b/boards/posix/nrf52_bsim/Kconfig.defconfig @@ -25,6 +25,12 @@ config BT_CTLR default y depends on BT +# The 15.4 driver Tx encryption is currently not functional with this +# simulated board => we disable it by default. With this Openthread will normally +# default to encrypt packets on its own. +config NRF_802154_ENCRYPTION + default n + if LOG # For this board we can log synchronously without any problem diff --git a/boards/posix/nrf52_bsim/argparse.c b/boards/posix/nrf52_bsim/argparse.c index 4e3196dd0c84..0058109803c9 100644 --- a/boards/posix/nrf52_bsim/argparse.c +++ b/boards/posix/nrf52_bsim/argparse.c @@ -63,6 +63,16 @@ static void cmd_no_delay_init_found(char *argv, int offset) arg.delay_init = false; } +static void cmd_no_sync_preinit_found(char *argv, int offset) +{ + arg.sync_preinit = false; +} + +static void cmd_no_sync_preboot_found(char *argv, int offset) +{ + arg.sync_preboot = false; +} + static void save_test_arg(struct NRF_bsim_args_t *args, char *argv) { if (args->test_case_argc >= MAXPARAMS_TESTCASES) { @@ -116,6 +126,29 @@ void nrfbsim_register_args(void) (void *)&nosim, cmd_nosim_found, "(debug feature) Do not connect to the phy"}, { false, false, true, + "sync_preinit", "", 'b', + (void *)&arg.sync_preinit, NULL, + "Postpone pre-initialization and boot " + "until the phy has reached time 0 (or start_offset) (by default not set)" + }, + { false, false, true, + "no_sync_preinit", "", 'b', + NULL, cmd_no_sync_preinit_found, + "Clear sync_preinit. Note that by default sync_preinit is not set" + }, + { false, false, true, + "sync_preboot", "", 'b', + (void *)&arg.sync_preboot, NULL, + "Postpone CPU boot " + "until the phy has reached time 0 (or start_offset) (by default not set)" + "If sync_preinit is set, this option has no effect." + }, + { false, false, true, + "no_sync_preboot", "", 'b', + NULL, cmd_no_sync_preboot_found, + "Clear sync_preboot. Note that by default sync_preboot is not set" + }, + { false, false, true, "delay_init", "", 'b', (void *)&arg.delay_init, NULL, "If start_offset is used, postpone initialization and startup " diff --git a/boards/posix/nrf52_bsim/argparse.h b/boards/posix/nrf52_bsim/argparse.h index d13e440499ba..e46bb035eb99 100644 --- a/boards/posix/nrf52_bsim/argparse.h +++ b/boards/posix/nrf52_bsim/argparse.h @@ -22,6 +22,8 @@ struct NRF_bsim_args_t { char *test_case_argv[MAXPARAMS_TESTCASES]; int test_case_argc; bool delay_init; + bool sync_preinit; + bool sync_preboot; nrf_hw_sub_args_t nrf_hw; }; diff --git a/boards/posix/nrf52_bsim/board_irq.h b/boards/posix/nrf52_bsim/board_irq.h index 6c1d202f825a..e333b419032a 100644 --- a/boards/posix/nrf52_bsim/board_irq.h +++ b/boards/posix/nrf52_bsim/board_irq.h @@ -19,6 +19,8 @@ void posix_isr_declare(unsigned int irq_p, int flags, void isr_p(const void *), const void *isr_param_p); void posix_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags); +void nrfbsim_WFE_model(void); +void nrfbsim_SEV_model(void); /** * Configure a static interrupt. @@ -80,6 +82,8 @@ extern void posix_irq_check_idle_exit(void); #define ARCH_ISR_DIRECT_PM() do { } while (false) #endif +#define IRQ_ZERO_LATENCY BIT(1) /* Unused in this board*/ + #ifdef __cplusplus } #endif diff --git a/boards/posix/nrf52_bsim/bstests_entry.c b/boards/posix/nrf52_bsim/bstests_entry.c index 556073c5f9e5..1f1208b9de20 100644 --- a/boards/posix/nrf52_bsim/bstests_entry.c +++ b/boards/posix/nrf52_bsim/bstests_entry.c @@ -191,18 +191,16 @@ bool bst_irq_sniffer(int irq_number) } } -static int bst_fake_device_driver_pre2_init(const struct device *arg) +static int bst_fake_device_driver_pre2_init(void) { - ARG_UNUSED(arg); if (current_test && current_test->test_fake_ddriver_prekernel_f) { current_test->test_fake_ddriver_prekernel_f(); } return 0; } -static int bst_fake_device_driver_post_init(const struct device *arg) +static int bst_fake_device_driver_post_init(void) { - ARG_UNUSED(arg); if (current_test && current_test->test_fake_ddriver_postkernel_f) { current_test->test_fake_ddriver_postkernel_f(); } diff --git a/boards/posix/nrf52_bsim/cmsis.h b/boards/posix/nrf52_bsim/cmsis.h deleted file mode 100644 index a068aa6bb1d8..000000000000 --- a/boards/posix/nrf52_bsim/cmsis.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Copyright (c) 2020 Oticon A/S - * - * SPDX-License-Identifier: Apache-2.0 - */ - -/** - * This header defines replacements for inline - * ARM Cortex-M CMSIS intrinsics. - */ - -#ifndef BOARDS_POSIX_NRF52_BSIM_CMSIS_H -#define BOARDS_POSIX_NRF52_BSIM_CMSIS_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* Implement the following ARM intrinsics as no-op: - * - ARM Data Synchronization Barrier - * - ARM Data Memory Synchronization Barrier - * - ARM Instruction Synchronization Barrier - * - ARM No Operation - */ -#ifndef __DMB -#define __DMB() -#endif - -#ifndef __DSB -#define __DSB() -#endif - -#ifndef __ISB -#define __ISB() -#endif - -#ifndef __NOP -#define __NOP() -#endif - -void __enable_irq(void); - -void __disable_irq(void); - -uint32_t __get_PRIMASK(void); - -void __set_PRIMASK(uint32_t primask); - -#ifdef __cplusplus -} -#endif - -#endif /* BOARDS_POSIX_NRF52_BSIM_CMSIS_H */ diff --git a/boards/posix/nrf52_bsim/cmsis.c b/boards/posix/nrf52_bsim/cmsis/cmsis.c similarity index 84% rename from boards/posix/nrf52_bsim/cmsis.c rename to boards/posix/nrf52_bsim/cmsis/cmsis.c index 9e8c85800e81..bf431d9ed3e4 100644 --- a/boards/posix/nrf52_bsim/cmsis.c +++ b/boards/posix/nrf52_bsim/cmsis/cmsis.c @@ -10,6 +10,7 @@ #include "posix_core.h" #include "posix_board_if.h" #include "board_soc.h" +#include "bs_tracing.h" /* * Replacement for ARMs NVIC functions() @@ -46,8 +47,7 @@ uint32_t NVIC_GetPriority(IRQn_Type IRQn) void NVIC_SystemReset(void) { - posix_print_warning("%s called. Exiting\n", __func__); - posix_exit(1); + bs_trace_error_time_line("%s called. Exiting\n", __func__); } /* @@ -72,3 +72,18 @@ void __set_PRIMASK(uint32_t primask) { hw_irq_ctrl_change_lock(primask != 0); } + +void __WFE(void) +{ + nrfbsim_WFE_model(); +} + +void __WFI(void) +{ + __WFE(); +} + +void __SEV(void) +{ + nrfbsim_SEV_model(); +} diff --git a/boards/posix/nrf52_bsim/cmsis/cmsis.h b/boards/posix/nrf52_bsim/cmsis/cmsis.h new file mode 100644 index 000000000000..f40ae49a9b78 --- /dev/null +++ b/boards/posix/nrf52_bsim/cmsis/cmsis.h @@ -0,0 +1,40 @@ +/* + * Copyright (c) 2020 Oticon A/S + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** + * This header defines replacements for inline + * ARM Cortex-M CMSIS intrinsics. + */ + +#ifndef BOARDS_POSIX_NRF52_BSIM_CMSIS_H +#define BOARDS_POSIX_NRF52_BSIM_CMSIS_H + +#include +#include "cmsis_instr.h" +#include "nrf52833.h" + +#ifdef __cplusplus +extern "C" { +#endif + +void __enable_irq(void); +void __disable_irq(void); +uint32_t __get_PRIMASK(void); +void __set_PRIMASK(uint32_t primask); + +void NVIC_SetPendingIRQ(IRQn_Type IRQn); +void NVIC_ClearPendingIRQ(IRQn_Type IRQn); +void NVIC_DisableIRQ(IRQn_Type IRQn); +void NVIC_EnableIRQ(IRQn_Type IRQn); +void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority); +uint32_t NVIC_GetPriority(IRQn_Type IRQn); +void NVIC_SystemReset(void); + +#ifdef __cplusplus +} +#endif + +#endif /* BOARDS_POSIX_NRF52_BSIM_CMSIS_H */ diff --git a/boards/posix/nrf52_bsim/cmsis_compiler.h b/boards/posix/nrf52_bsim/cmsis/cmsis_compiler.h similarity index 100% rename from boards/posix/nrf52_bsim/cmsis_compiler.h rename to boards/posix/nrf52_bsim/cmsis/cmsis_compiler.h diff --git a/boards/posix/nrf52_bsim/cmsis/cmsis_instr.h b/boards/posix/nrf52_bsim/cmsis/cmsis_instr.h new file mode 100644 index 000000000000..978b1d8c349f --- /dev/null +++ b/boards/posix/nrf52_bsim/cmsis/cmsis_instr.h @@ -0,0 +1,154 @@ +/* + * Copyright (c) 2023 Nordic Semiconductor ASA + * Copyright (c) 2020 Oticon A/S + * Copyright (c) 2009-2017 ARM Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** + * This header defines replacements for inline + * ARM Cortex-M CMSIS intrinsics. + */ + +#ifndef BOARDS_POSIX_NRF52_BSIM_CMSIS_INSTR_H +#define BOARDS_POSIX_NRF52_BSIM_CMSIS_INSTR_H + +/* Implement the following ARM intrinsics as no-op: + * - ARM Data Synchronization Barrier + * - ARM Data Memory Synchronization Barrier + * - ARM Instruction Synchronization Barrier + * - ARM No Operation + */ +#ifndef __DMB +#define __DMB() +#endif + +#ifndef __DSB +#define __DSB() +#endif + +#ifndef __ISB +#define __ISB() +#endif + +#ifndef __NOP +#define __NOP() +#endif + +void __WFE(void); +void __WFI(void); +void __SEV(void); + +/* + * Implement the following ARM intrinsics as non-exclusive accesses + * + * - STR Exclusive(8,16 & 32bit) (__STREX{B,H,W}) + * - LDR Exclusive(8,16 & 32bit) (__LDREX{B,H,W}) + * - CLREX : Exclusive lock removal (__CLREX) - no-op + * + * Description: + * These accesses always succeed, and do NOT set any kind of internal + * exclusive access flag; + * There is no local/global memory monitors, MPU control of what are + * shareable regions, exclusive reservations granules, automatic clearing + * on context switch, or so. + * + * This should be enough for the expected uses of LDR/STREXB + * (locking mutexes or guarding other atomic operations, inside a few lines + * of code in the same function): As the POSIX arch will not make an embedded + * thread lose context while just executing its own code, and it does not + * allow parallel embedded SW threads to execute at the same exact time, + * there is no actual need to protect atomicity. + * + * But as this ARM exclusive access monitor mechanism can in principle be + * used for other, unexpected, purposes, this simple replacement may not be + * enough. + */ + +/** + * \brief Pretend to execute a STR Exclusive (8 bit) + * \details Executes a ~exclusive~ STR instruction for 8 bit values. + * \param [in] value Value to store + * \param [in] ptr Pointer to location + * \return 0 Function succeeded (always) + */ +static inline uint32_t __STREXB(uint8_t value, volatile uint8_t *ptr) +{ + *ptr = value; + return 0; +} + +/** + * \brief Pretend to execute a STR Exclusive (16 bit) + * \details Executes a ~exclusive~ STR instruction for 16 bit values. + * \param [in] value Value to store + * \param [in] ptr Pointer to location + * \return 0 Function succeeded (always) + */ +static inline uint32_t __STREXH(uint16_t value, volatile uint16_t *ptr) +{ + *ptr = value; + return 0; +} + +/** + * \brief Pretend to execute a STR Exclusive (32 bit) + * \details Executes a ~exclusive~ STR instruction for 32 bit values. + * \param [in] value Value to store + * \param [in] ptr Pointer to location + * \return 0 Function succeeded (always) + */ +static inline uint32_t __STREXW(uint32_t value, volatile uint32_t *ptr) +{ + *ptr = value; + return 0; +} + +/** + * \brief Pretend to execute a LDR Exclusive (8 bit) + * \details Executes an ~exclusive~ LDR instruction for 8 bit value. + * Meaning, it does not set a exclusive lock, + * instead just loads the stored value + * \param [in] ptr Pointer to data + * \return value of type uint8_t at (*ptr) + */ +static inline uint8_t __LDREXB(volatile uint8_t *ptr) +{ + return *ptr; +} + +/** + * \brief Pretend to execute a LDR Exclusive (16 bit) + * \details Executes an ~exclusive~ LDR instruction for 16 bit value. + * Meaning, it does not set a exclusive lock, + * instead just loads the stored value + * \param [in] ptr Pointer to data + * \return value of type uint8_t at (*ptr) + */ +static inline uint16_t __LDREXH(volatile uint16_t *ptr) +{ + return *ptr; +} + +/** + * \brief Pretend to execute a LDR Exclusive (32 bit) + * \details Executes an ~exclusive~ LDR instruction for 32 bit value. + * Meaning, it does not set a exclusive lock, + * instead just loads the stored value + * \param [in] ptr Pointer to data + * \return value of type uint8_t at (*ptr) + */ +static inline uint32_t __LDREXW(volatile uint32_t *ptr) +{ + return *ptr; +} + +/** + * \brief Pretend to remove the exclusive lock + * \details The real function would removes the exclusive lock which is created + * by LDREX, this one does nothing + */ +static inline void __CLREX(void) { /* Nothing to be done */ } + +#endif /* BOARDS_POSIX_NRF52_BSIM_CMSIS_INSTR_H */ diff --git a/boards/posix/nrf52_bsim/doc/index.rst b/boards/posix/nrf52_bsim/doc/index.rst index 31d754dea86d..82df5072c583 100644 --- a/boards/posix/nrf52_bsim/doc/index.rst +++ b/boards/posix/nrf52_bsim/doc/index.rst @@ -25,6 +25,7 @@ This board models some of the NRF52 SOC peripherals: * Accelerated address resolver * Clock control * PPI (Programmable Peripheral Interconnect) +* EGU (Event Generator Unit) The nrf52_bsim board definition uses the POSIX architecture to run applications natively on the development system, this has the benefit of diff --git a/boards/posix/nrf52_bsim/irq_handler.c b/boards/posix/nrf52_bsim/irq_handler.c index 104cbd0fbbcf..c14d197daa88 100644 --- a/boards/posix/nrf52_bsim/irq_handler.c +++ b/boards/posix/nrf52_bsim/irq_handler.c @@ -327,7 +327,7 @@ void posix_irq_offload(void (*routine)(const void *), const void *parameter) */ static bool CPU_event_set_flag; -void __WFE(void) +void nrfbsim_WFE_model(void) { if (CPU_event_set_flag == false) { CPU_will_be_awaken_from_WFE = true; @@ -337,12 +337,7 @@ void __WFE(void) CPU_event_set_flag = false; } -void __WFI(void) -{ - __WFE(); -} - -void __SEV(void) +void nrfbsim_SEV_model(void) { CPU_event_set_flag = true; } diff --git a/boards/posix/nrf52_bsim/main.c b/boards/posix/nrf52_bsim/main.c index cc5d28eaeaca..13f86b416bc9 100644 --- a/boards/posix/nrf52_bsim/main.c +++ b/boards/posix/nrf52_bsim/main.c @@ -37,6 +37,7 @@ uint8_t inner_main_clean_up(int exit_code) bs_dump_files_close_all(); bs_clean_back_channels(); + bs_clear_Tsymbols(); uint8_t bst_result = bst_delete(); @@ -95,11 +96,13 @@ int main(int argc, char *argv[]) /* We pass to a possible testcase its command line arguments */ bst_pass_args(args->test_case_argc, args->test_case_argv); - if ((args->nrf_hw.start_offset > 0) && (args->delay_init)) { + if (((args->nrf_hw.start_offset > 0) && (args->delay_init)) + || args->sync_preinit) { /* Delay the next steps until the simulation time has - * reached start_offset + * reached either time 0 or start_offset. */ - hwll_wait_for_phy_simu_time(args->nrf_hw.start_offset); + hwll_wait_for_phy_simu_time(BS_MAX(args->nrf_hw.start_offset, 0)); + args->sync_preboot = false; /* Already sync'ed */ } nrf_hw_initialize(&args->nrf_hw); @@ -108,6 +111,10 @@ int main(int argc, char *argv[]) bst_pre_init(); + if (args->sync_preboot) { + hwll_wait_for_phy_simu_time(BS_MAX(args->nrf_hw.start_offset, 0)); + } + posix_boot_cpu(); run_native_tasks(_NATIVE_FIRST_SLEEP_LEVEL); diff --git a/boards/posix/nrf52_bsim/nrf52_bsim.dts b/boards/posix/nrf52_bsim/nrf52_bsim.dts index 224462c2b5e5..26294e5501dd 100644 --- a/boards/posix/nrf52_bsim/nrf52_bsim.dts +++ b/boards/posix/nrf52_bsim/nrf52_bsim.dts @@ -23,7 +23,6 @@ /delete-property/ uart-0; /delete-property/ uart-1; /delete-property/ adc-0; - /delete-property/ gpio-0; /delete-property/ gpio-1; /delete-property/ gpiote-0; /delete-property/ wdt-0; @@ -36,6 +35,7 @@ chosen { /delete-property/ zephyr,flash-controller; + zephyr,ieee802154 = &ieee802154; }; soc { @@ -45,7 +45,6 @@ /delete-node/ uart@40002000; /delete-node/ uart@40028000; /delete-node/ gpiote@40006000; - /delete-node/ gpio@50000000; /delete-node/ gpio@50000300; /delete-node/ i2c@40003000; /delete-node/ i2c@40004000; @@ -58,7 +57,6 @@ /delete-node/ spi@40004000; /delete-node/ spi@40023000; /delete-node/ spi@4002f000; - /delete-node/ temp@4000c000; /delete-node/ watchdog@40010000; /delete-node/ acl@4001e000; /delete-node/ usbd@40027000; @@ -70,6 +68,16 @@ &radio { /* These features are not yet supported by the RADIO model */ /delete-property/ dfe-supported; - /delete-property/ ieee802154-supported; /delete-property/ ble-coded-phy-supported; }; + +&ieee802154 { + status = "okay"; +}; + +&gpio0 { + /* Needed by + * modules/hal_nordic/nrf_802154/sl_opensource/platform/nrf_802154_gpiote_zephyr.c + */ + status = "okay"; +}; diff --git a/boards/posix/nrf52_bsim/soc/nrfx_coredep.c b/boards/posix/nrf52_bsim/soc/nrfx_coredep.c new file mode 100644 index 000000000000..e0521b5effa7 --- /dev/null +++ b/boards/posix/nrf52_bsim/soc/nrfx_coredep.c @@ -0,0 +1,23 @@ +/* + * Copyright (c) 2023 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +/* + * Replacement for the nrfx nrfx_coredep_delay_us() + * which busy waits for the given number of microseconds. + * + * This function will replace at *link* time the + * nrfx one which had been marked as weak. + */ +void nrfx_coredep_delay_us(uint32_t time_us) +{ + if (time_us == 0) { + return; + } + arch_busy_wait(time_us); +} diff --git a/boards/posix/nrf52_bsim/soc/soc_secure.h b/boards/posix/nrf52_bsim/soc/soc_secure.h new file mode 100644 index 000000000000..667823334d00 --- /dev/null +++ b/boards/posix/nrf52_bsim/soc/soc_secure.h @@ -0,0 +1,24 @@ +/* + * Copyright (c) 2023 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* + * Replacement for Nordic's nrf soc/arm/nordic_nrf/common/soc_secure.h + */ +#ifndef BOARDS_POSIX_NRF52_BSIM_SOC_SECURE_H +#define BOARDS_POSIX_NRF52_BSIM_SOC_SECURE_H + + +#include +#include +#include + +static inline void soc_secure_read_deviceid(uint32_t deviceid[2]) +{ + deviceid[0] = nrf_ficr_deviceid_get(NRF_FICR, 0); + deviceid[1] = nrf_ficr_deviceid_get(NRF_FICR, 1); +} + +#endif /* BOARDS_POSIX_NRF52_BSIM_SOC_SECURE_H */ diff --git a/boards/posix/nrf52_bsim/trace_hook.c b/boards/posix/nrf52_bsim/trace_hook.c index a54667d5f34c..cd2f36ce4fb9 100644 --- a/boards/posix/nrf52_bsim/trace_hook.c +++ b/boards/posix/nrf52_bsim/trace_hook.c @@ -59,9 +59,8 @@ void posix_flush_stdout(void) * * @return 0 if successful, otherwise failed. */ -static int printk_init(const struct device *arg) +static int printk_init(void) { - ARG_UNUSED(arg); extern void __printk_hook_install(int (*fn)(int)); __printk_hook_install(print_char); diff --git a/boards/riscv/beaglev_starlight_jh7100/Kconfig.board b/boards/riscv/beaglev_starlight_jh7100/Kconfig.board deleted file mode 100644 index ddb5420e4a7a..000000000000 --- a/boards/riscv/beaglev_starlight_jh7100/Kconfig.board +++ /dev/null @@ -1,7 +0,0 @@ -# Copyright (c) 2021 Rajnesh Kanwal -# SPDX-License-Identifier: Apache-2.0 - -config BOARD_BEAGLEV_STARLIGHT_JH7100 - bool "BeagleV Starlight JH7100 RISCV64 target" - depends on SOC_JH7100 - select 64BIT diff --git a/boards/riscv/beaglev_starlight_jh7100/Kconfig.defconfig b/boards/riscv/beaglev_starlight_jh7100/Kconfig.defconfig deleted file mode 100644 index 1c1647804ecd..000000000000 --- a/boards/riscv/beaglev_starlight_jh7100/Kconfig.defconfig +++ /dev/null @@ -1,6 +0,0 @@ -# Copyright (c) 2021 Rajnesh Kanwal -# SPDX-License-Identifier: Apache-2.0 - -config BOARD - default "beaglev_starlight_jh7100" - depends on BOARD_BEAGLEV_STARLIGHT_JH7100 diff --git a/boards/riscv/beaglev_starlight_jh7100/beaglev_starlight_jh7100.dts b/boards/riscv/beaglev_starlight_jh7100/beaglev_starlight_jh7100.dts deleted file mode 100644 index 85aa60ecf100..000000000000 --- a/boards/riscv/beaglev_starlight_jh7100/beaglev_starlight_jh7100.dts +++ /dev/null @@ -1,25 +0,0 @@ -/* - * Copyright (c) 2021 Rajnesh Kanwal - * - * SPDX-License-Identifier: Apache-2.0 - */ - -/dts-v1/; - -#include "starfive/starfive_jh7100_beagle_v.dtsi" - -/ { - model = "BeagleV StarLight JH7100"; - compatible = "beagle,beaglev-starlight-jh7100"; - - chosen { - zephyr,console = &uart3; - zephyr,shell-uart = &uart3; - zephyr,sram = &ram0; - }; -}; - -&uart3 { - status = "okay"; - current-speed = <115200>; -}; diff --git a/boards/riscv/beaglev_starlight_jh7100/beaglev_starlight_jh7100.yaml b/boards/riscv/beaglev_starlight_jh7100/beaglev_starlight_jh7100.yaml deleted file mode 100644 index 87d41946d4e9..000000000000 --- a/boards/riscv/beaglev_starlight_jh7100/beaglev_starlight_jh7100.yaml +++ /dev/null @@ -1,9 +0,0 @@ -identifier: beaglev_starlight_jh7100 -name: BeagleV Starlight JH7100 (NON-SMP) -type: mcu -arch: riscv64 -toolchain: - - zephyr - - cross-compile -supported: - - uart diff --git a/boards/riscv/beaglev_starlight_jh7100/beaglev_starlight_jh7100_defconfig b/boards/riscv/beaglev_starlight_jh7100/beaglev_starlight_jh7100_defconfig deleted file mode 100644 index 72463474717e..000000000000 --- a/boards/riscv/beaglev_starlight_jh7100/beaglev_starlight_jh7100_defconfig +++ /dev/null @@ -1,19 +0,0 @@ -# SPDX-License-Identifier: Apache-2.0 - -# Platform Configuration -CONFIG_SOC_SERIES_STARFIVE_JH71XX=y -CONFIG_SOC_JH7100=y -CONFIG_BOARD_BEAGLEV_STARLIGHT_JH7100=y -CONFIG_STACK_SENTINEL=y - -# Zephyr Kernel Configuration -CONFIG_XIP=n - -# Serial Drivers -CONFIG_SERIAL=y -CONFIG_UART_INTERRUPT_DRIVEN=y -CONFIG_UART_NS16550_ACCESS_WORD_ONLY=y - -# Enable Console -CONFIG_CONSOLE=y -CONFIG_UART_CONSOLE=y diff --git a/boards/riscv/beaglev_starlight_jh7100/board.cmake b/boards/riscv/beaglev_starlight_jh7100/board.cmake deleted file mode 100644 index 9881313609aa..000000000000 --- a/boards/riscv/beaglev_starlight_jh7100/board.cmake +++ /dev/null @@ -1 +0,0 @@ -# SPDX-License-Identifier: Apache-2.0 diff --git a/boards/riscv/beaglev_starlight_jh7100/doc/index.rst b/boards/riscv/beaglev_starlight_jh7100/doc/index.rst deleted file mode 100644 index 6621d9a79c03..000000000000 --- a/boards/riscv/beaglev_starlight_jh7100/doc/index.rst +++ /dev/null @@ -1,70 +0,0 @@ -.. _beaglev_starlight_jh7100: - -BeagleV Starlight JH7100 -######################## - -Overview -******** - -The BeagleV Starlight is an 64-bit open-source RISC-V development board with -a StarFive JH7100 SoC. - -Programming and debugging -************************* - -Building -======== - -Applications for the ``beaglev_starlight_jh7100`` board configuration can be built -as usual (see :ref:`build_an_application`) using the corresponding board name: - -.. zephyr-app-commands:: - :board: beaglev_starlight_jh7100 - :goals: build - -The bootloader expects size information at the start of the binary file, -so the bin file needs to be processed first to include that information. -Download the helper script from starfive-tech github repo `here -`_ - -.. code-block:: console - - ./fsz.sh build/zephyr/zephyr.bin - -This will create a new file build/zephyr/zephyr.bin.out that can be flashed. - -Flashing -======== - -.. note:: - The following steps use minicom for serial communication, feel free to use - any other serial terminal that supports xmodem based file transfers. - -#. BeagleV Starlight uses uart for flashing. Refer to `BeagleV Getting Started - `_ - to connect your serial-to-usb converter. Now power on the board and using - minicom access board's serial. - - .. code-block:: console - - minicom -D /dev/ttyUSB0 -b 115200 - -#. Press any key to stop the boot sequence. This will output a menu - - .. code-block:: console - - *************************************************** - *************** FLASH PROGRAMMING ***************** - *************************************************** - - 0:update uboot - 1:quit - select the function: - -#. Select 0 to flash a new image. -#. Press Ctrl+A and then press s to enter upload mode -#. Select xmodem and press Enter -#. Select Goto from the bottom tab menu and press Enter -#. Enter the directory path and press Enter -#. Select zephyr.bin.out by navigating using arrow keys, press Space and press Enter -#. Once uploaded hit any key to continue and reset the board to boot the zephyr binary diff --git a/boards/riscv/esp32c3_devkitm/Kconfig.defconfig b/boards/riscv/esp32c3_devkitm/Kconfig.defconfig index bb789e7ecd1e..3686c1e8ad34 100644 --- a/boards/riscv/esp32c3_devkitm/Kconfig.defconfig +++ b/boards/riscv/esp32c3_devkitm/Kconfig.defconfig @@ -9,7 +9,7 @@ config BOARD config HEAP_MEM_POOL_SIZE default 98304 if WIFI - default 16384 if BT + default 40960 if BT default 4096 choice BT_HCI_BUS_TYPE diff --git a/boards/riscv/esp32c3_devkitm/esp32c3_devkitm.yaml b/boards/riscv/esp32c3_devkitm/esp32c3_devkitm.yaml index 3cc9a1970232..cf5af0fcb8d4 100644 --- a/boards/riscv/esp32c3_devkitm/esp32c3_devkitm.yaml +++ b/boards/riscv/esp32c3_devkitm/esp32c3_devkitm.yaml @@ -1,7 +1,7 @@ identifier: esp32c3_devkitm name: ESP32-C3 type: mcu -arch: riscv +arch: riscv32 toolchain: - zephyr supported: diff --git a/boards/riscv/hifive1/hifive1.dts b/boards/riscv/hifive1/hifive1.dts index 68c5f1d151df..2034d10bc95f 100644 --- a/boards/riscv/hifive1/hifive1.dts +++ b/boards/riscv/hifive1/hifive1.dts @@ -10,10 +10,14 @@ / { model = "SiFive HiFive 1"; compatible = "sifive,hifive1"; + aliases { - pwm-led0 = &led0; - pwm-led1 = &led1; - pwm-led2 = &led2; + led0 = &led0; + led1 = &led1; + led2 = &led2; + pwm-led0 = &pwmled0; + pwm-led1 = &pwmled1; + pwm-led2 = &pwmled2; watchdog0 = &wdog0; }; @@ -25,16 +29,32 @@ }; leds { - compatible = "pwm-leds"; + compatible = "gpio-leds"; led0: led_0 { - pwms = <&pwm1 1 PWM_MSEC(20)>; + gpios = <&gpio0 19 GPIO_ACTIVE_LOW>; label = "Green LED"; }; led1: led_1 { - pwms = <&pwm1 2 PWM_MSEC(20)>; + gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; label = "Blue LED"; }; led2: led_2 { + gpios = <&gpio0 22 GPIO_ACTIVE_LOW>; + label = "Red LED"; + }; + }; + + pwmleds { + compatible = "pwm-leds"; + pwmled0: pwmled_0 { + pwms = <&pwm1 1 PWM_MSEC(20)>; + label = "Green LED"; + }; + pwmled1: pwmled_1 { + pwms = <&pwm1 2 PWM_MSEC(20)>; + label = "Blue LED"; + }; + pwmled2: pwmled_2 { pwms = <&pwm1 3 PWM_MSEC(20)>; label = "Red LED"; }; diff --git a/boards/riscv/hifive_unmatched/hifive_unmatched.dts b/boards/riscv/hifive_unmatched/hifive_unmatched.dts index 39a3c3c36fdb..b5a7f37fcb8c 100644 --- a/boards/riscv/hifive_unmatched/hifive_unmatched.dts +++ b/boards/riscv/hifive_unmatched/hifive_unmatched.dts @@ -17,7 +17,7 @@ ram0: ram0@80000000 { compatible = "memory"; - reg = <0x80000000 0xf0000000>; + reg = <0x0 0x80000000 0x4 0x00000000>; reg-names = "mem"; }; }; @@ -29,7 +29,7 @@ /* disabled (used by Flash ROM by default) */ &spi0 { - reg = <0x10040000 0x1000 0x20000000 0x2000000>; + reg = <0x0 0x10040000 0x0 0x1000 0x0 0x20000000 0x0 0x2000000>; flash0: flash@0 { compatible = "issi,is25wp256d", "jedec,spi-nor"; status = "disabled"; diff --git a/boards/riscv/hifive_unmatched/hifive_unmatched.yaml b/boards/riscv/hifive_unmatched/hifive_unmatched.yaml index d0543af145c6..e054abf43c61 100644 --- a/boards/riscv/hifive_unmatched/hifive_unmatched.yaml +++ b/boards/riscv/hifive_unmatched/hifive_unmatched.yaml @@ -11,3 +11,4 @@ testing: - bluetooth supported: - spi + - memc diff --git a/boards/riscv/hifive_unmatched/support/openocd_hifive_unleashed.cfg b/boards/riscv/hifive_unmatched/support/openocd_hifive_unmatched.cfg similarity index 100% rename from boards/riscv/hifive_unmatched/support/openocd_hifive_unleashed.cfg rename to boards/riscv/hifive_unmatched/support/openocd_hifive_unmatched.cfg diff --git a/boards/riscv/icev_wireless/Kconfig.defconfig b/boards/riscv/icev_wireless/Kconfig.defconfig index 730c40e0704e..84ce94865596 100644 --- a/boards/riscv/icev_wireless/Kconfig.defconfig +++ b/boards/riscv/icev_wireless/Kconfig.defconfig @@ -7,7 +7,7 @@ config BOARD config HEAP_MEM_POOL_SIZE default 98304 if WIFI - default 16384 if BT + default 40960 if BT default 4096 choice BT_HCI_BUS_TYPE diff --git a/boards/riscv/icev_wireless/icev_wireless.yaml b/boards/riscv/icev_wireless/icev_wireless.yaml index de671c06d013..9321db80125c 100644 --- a/boards/riscv/icev_wireless/icev_wireless.yaml +++ b/boards/riscv/icev_wireless/icev_wireless.yaml @@ -1,7 +1,7 @@ identifier: icev_wireless name: ICE-V Wireless type: mcu -arch: riscv +arch: riscv32 toolchain: - zephyr testing: diff --git a/boards/riscv/rv32m1_vega/board.c b/boards/riscv/rv32m1_vega/board.c index ef201ec70bb4..19ddc931d617 100644 --- a/boards/riscv/rv32m1_vega/board.c +++ b/boards/riscv/rv32m1_vega/board.c @@ -8,13 +8,12 @@ #include #include -static int rv32m1_vega_board_init(const struct device *dev) +static int rv32m1_vega_board_init(void) { const struct device *const gpiob = DEVICE_DT_GET(DT_NODELABEL(gpiob)); const struct device *const gpioc = DEVICE_DT_GET(DT_NODELABEL(gpioc)); const struct device *const gpiod = DEVICE_DT_GET(DT_NODELABEL(gpiod)); - ARG_UNUSED(dev); __ASSERT_NO_MSG(device_is_ready(gpiob)); __ASSERT_NO_MSG(device_is_ready(gpioc)); diff --git a/boards/riscv/stamp_c3/Kconfig.defconfig b/boards/riscv/stamp_c3/Kconfig.defconfig index 56e120d5d1e1..cbd96af9cd05 100644 --- a/boards/riscv/stamp_c3/Kconfig.defconfig +++ b/boards/riscv/stamp_c3/Kconfig.defconfig @@ -9,7 +9,7 @@ config BOARD config HEAP_MEM_POOL_SIZE default 98304 if WIFI - default 16384 if BT + default 40960 if BT default 4096 if BT diff --git a/boards/riscv/stamp_c3/stamp_c3.yaml b/boards/riscv/stamp_c3/stamp_c3.yaml index 49539b34f193..b73d85c982bc 100644 --- a/boards/riscv/stamp_c3/stamp_c3.yaml +++ b/boards/riscv/stamp_c3/stamp_c3.yaml @@ -1,7 +1,7 @@ identifier: stamp_c3 name: M5Stack STAMP-C3 type: mcu -arch: riscv +arch: riscv32 toolchain: - zephyr supported: diff --git a/boards/riscv/xiao_esp32c3/Kconfig.defconfig b/boards/riscv/xiao_esp32c3/Kconfig.defconfig index 1f227163ebc2..e67ddbcc42e1 100644 --- a/boards/riscv/xiao_esp32c3/Kconfig.defconfig +++ b/boards/riscv/xiao_esp32c3/Kconfig.defconfig @@ -7,7 +7,7 @@ config BOARD config HEAP_MEM_POOL_SIZE default 98304 if WIFI - default 16384 if BT + default 40960 if BT default 4096 choice BT_HCI_BUS_TYPE diff --git a/boards/riscv/xiao_esp32c3/xiao_esp32c3.yaml b/boards/riscv/xiao_esp32c3/xiao_esp32c3.yaml index ef67152638cb..6a34ba08bc6f 100644 --- a/boards/riscv/xiao_esp32c3/xiao_esp32c3.yaml +++ b/boards/riscv/xiao_esp32c3/xiao_esp32c3.yaml @@ -1,7 +1,7 @@ identifier: xiao_esp32c3 name: XIAO ESP32C3 type: mcu -arch: riscv +arch: riscv32 toolchain: - zephyr supported: diff --git a/boards/shields/adafruit_2_8_tft_touch_v2/Kconfig.defconfig b/boards/shields/adafruit_2_8_tft_touch_v2/Kconfig.defconfig index 02b96e580f95..3bb489e66277 100644 --- a/boards/shields/adafruit_2_8_tft_touch_v2/Kconfig.defconfig +++ b/boards/shields/adafruit_2_8_tft_touch_v2/Kconfig.defconfig @@ -8,13 +8,13 @@ config GPIO if DISPLAY -if KSCAN +if INPUT # NOTE: Enable if IRQ line is available (requires to solder jumper) -config KSCAN_FT5336_INTERRUPT +config INPUT_FT5336_INTERRUPT default n -endif # KSCAN +endif # INPUT if LVGL @@ -31,6 +31,9 @@ endchoice config KSCAN default y +config INPUT + default y + config LV_Z_POINTER_KSCAN default y diff --git a/boards/shields/adafruit_2_8_tft_touch_v2/dts/adafruit_2_8_tft_touch_v2.dtsi b/boards/shields/adafruit_2_8_tft_touch_v2/dts/adafruit_2_8_tft_touch_v2.dtsi index be7a9cf0be03..e273d39c32bb 100644 --- a/boards/shields/adafruit_2_8_tft_touch_v2/dts/adafruit_2_8_tft_touch_v2.dtsi +++ b/boards/shields/adafruit_2_8_tft_touch_v2/dts/adafruit_2_8_tft_touch_v2.dtsi @@ -9,7 +9,7 @@ / { chosen { zephyr,display = &ili9340; - zephyr,keyboard-scan = &touch_controller; + zephyr,keyboard-scan = &kscan_input; }; }; @@ -49,10 +49,14 @@ }; &arduino_i2c { - touch_controller: ft5336@38 { + ft5336@38 { compatible = "focaltech,ft5336"; reg = <0x38>; /* Uncomment if IRQ line is available (requires to solder jumper) */ /* int-gpios = <&arduino_header 13 GPIO_ACTIVE_LOW>; */ /* D7 */ + + kscan_input: kscan-input { + compatible = "zephyr,kscan-input"; + }; }; }; diff --git a/boards/shields/buydisplay_2_8_tft_touch_arduino/Kconfig.defconfig b/boards/shields/buydisplay_2_8_tft_touch_arduino/Kconfig.defconfig index 0c6d6de99f49..7e299c6b3726 100644 --- a/boards/shields/buydisplay_2_8_tft_touch_arduino/Kconfig.defconfig +++ b/boards/shields/buydisplay_2_8_tft_touch_arduino/Kconfig.defconfig @@ -5,13 +5,13 @@ if SHIELD_BUYDISPLAY_2_8_TFT_TOUCH_ARDUINO if DISPLAY -if KSCAN +if INPUT # NOTE: Enable if IRQ line is available (requires to solder jumper) -config KSCAN_FT5336_INTERRUPT +config INPUT_FT5336_INTERRUPT default n -endif # KSCAN +endif # INPUT if LVGL @@ -31,6 +31,9 @@ config LV_COLOR_16_SWAP config KSCAN default y +config INPUT + default y + config LV_Z_POINTER_KSCAN default y diff --git a/boards/shields/buydisplay_2_8_tft_touch_arduino/buydisplay_2_8_tft_touch_arduino.overlay b/boards/shields/buydisplay_2_8_tft_touch_arduino/buydisplay_2_8_tft_touch_arduino.overlay index c5ed64893888..1cfd478f05f5 100644 --- a/boards/shields/buydisplay_2_8_tft_touch_arduino/buydisplay_2_8_tft_touch_arduino.overlay +++ b/boards/shields/buydisplay_2_8_tft_touch_arduino/buydisplay_2_8_tft_touch_arduino.overlay @@ -9,6 +9,7 @@ / { chosen { zephyr,display = &ili9340_buydisplay_2_8_tft_touch_arduino; + zephyr,keyboard-scan = &kscan_input; }; }; @@ -36,10 +37,14 @@ }; &arduino_i2c { - ft5336_buydisplay_2_8_tft_touch_arduino: ft5336@38 { + ft5336@38 { compatible = "focaltech,ft5336"; reg = <0x38>; /* Uncomment if IRQ line is available (requires to solder jumper) */ /* int-gpios = <&arduino_header 11 GPIO_ACTIVE_LOW>; */ /* D5 */ + + kscan_input: kscan-input { + compatible = "zephyr,kscan-input"; + }; }; }; diff --git a/boards/shields/buydisplay_3_5_tft_touch_arduino/Kconfig.defconfig b/boards/shields/buydisplay_3_5_tft_touch_arduino/Kconfig.defconfig index 18627f430425..b2556e6aa107 100644 --- a/boards/shields/buydisplay_3_5_tft_touch_arduino/Kconfig.defconfig +++ b/boards/shields/buydisplay_3_5_tft_touch_arduino/Kconfig.defconfig @@ -5,13 +5,13 @@ if SHIELD_BUYDISPLAY_3_5_TFT_TOUCH_ARDUINO if DISPLAY -if KSCAN +if INPUT # NOTE: Enable if IRQ line is available (requires to solder jumper) -config KSCAN_FT5336_INTERRUPT +config INPUT_FT5336_INTERRUPT default n -endif # KSCAN +endif # INPUT if LVGL @@ -28,6 +28,9 @@ endchoice config KSCAN default y +config INPUT + default y + config LV_Z_POINTER_KSCAN default y diff --git a/boards/shields/buydisplay_3_5_tft_touch_arduino/buydisplay_3_5_tft_touch_arduino.overlay b/boards/shields/buydisplay_3_5_tft_touch_arduino/buydisplay_3_5_tft_touch_arduino.overlay index 8147d5ecc929..8f63c485160d 100644 --- a/boards/shields/buydisplay_3_5_tft_touch_arduino/buydisplay_3_5_tft_touch_arduino.overlay +++ b/boards/shields/buydisplay_3_5_tft_touch_arduino/buydisplay_3_5_tft_touch_arduino.overlay @@ -9,6 +9,7 @@ / { chosen { zephyr,display = &ili9488_buydisplay_3_5_tft_touch_arduino; + zephyr,keyboard-scan = &kscan_input; }; }; @@ -35,10 +36,14 @@ }; &arduino_i2c { - ft5336_buydisplay_3_5_tft_touch_arduino: ft5336@38 { + ft5336@38 { compatible = "focaltech,ft5336"; reg = <0x38>; /* Uncomment if IRQ line is available (requires to solder jumper) */ /* int-gpios = <&arduino_header 11 GPIO_ACTIVE_LOW>; */ /* D5 */ + + kscan_input: kscan-input { + compatible = "zephyr,kscan-input"; + }; }; }; diff --git a/boards/shields/npm1300_ek/Kconfig.defconfig b/boards/shields/npm1300_ek/Kconfig.defconfig new file mode 100644 index 000000000000..9c9b0573e2bd --- /dev/null +++ b/boards/shields/npm1300_ek/Kconfig.defconfig @@ -0,0 +1,12 @@ +# Copyright (c) 2023 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +if SHIELD_NPM1300_EK + +config REGULATOR + default y + +config GPIO + default y + +endif # SHIELD_NPM1300_EK diff --git a/boards/shields/npm1300_ek/Kconfig.shield b/boards/shields/npm1300_ek/Kconfig.shield new file mode 100644 index 000000000000..177588683fe3 --- /dev/null +++ b/boards/shields/npm1300_ek/Kconfig.shield @@ -0,0 +1,5 @@ +# Copyright (c) 2023 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +config SHIELD_NPM1300_EK + def_bool $(shields_list_contains,npm1300_ek) diff --git a/boards/shields/npm1300_ek/doc/index.rst b/boards/shields/npm1300_ek/doc/index.rst new file mode 100644 index 000000000000..44ca20fc820a --- /dev/null +++ b/boards/shields/npm1300_ek/doc/index.rst @@ -0,0 +1,31 @@ +.. _npm1300_ek: + +nPM1300 EK +########## + +Overview +******** + +The nPM1300 EK lets you test different functions and features of the nPM1300 +Power Management Integrated Circuit (PMIC). + +Requirements +************ + +The nPM1300 EK board is not designed to fit straight into an Arduino connector. +However, the Zephyr shield is designed expecting it to be connected to the +Arduino shield connectors. For example, the I2C lines need to be connected to +the ``arduino_i2c`` bus. This allows to use the shield with any host board that +supports the Arduino connector. + +Usage +***** + +The shield can be used in any application by setting ``SHIELD`` to +``npm1300_ek``. You can check :ref:`npm1300_ek_sample` for a comprehensive +sample. + +References +********** + +TBC diff --git a/boards/shields/npm1300_ek/npm1300_ek.overlay b/boards/shields/npm1300_ek/npm1300_ek.overlay new file mode 100644 index 000000000000..455a4b925ab1 --- /dev/null +++ b/boards/shields/npm1300_ek/npm1300_ek.overlay @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2023 Nordic Semiconductor ASA + * SPDX-License-Identifier: Apache-2.0 + */ + +&arduino_i2c { + npm1300_ek_pmic: pmic@6b { + compatible = "nordic,npm1300"; + reg = <0x6b>; + + npm1300_ek_gpio: gpio-controller { + compatible = "nordic,npm1300-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <5>; + }; + + npm1300_ek_regulators: regulators { + compatible = "nordic,npm1300-regulator"; + + /* limits are set to min/max allowed values */ + npm1300_ek_buck1: BUCK1 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + + npm1300_ek_buck2: BUCK2 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <3300000>; + regulator-init-microvolt = <3300000>; + retention-microvolt = <2500000>; + enable-gpios = <&npm1300_ek_gpio 1 GPIO_ACTIVE_LOW>; + retention-gpios = <&npm1300_ek_gpio 2 GPIO_ACTIVE_HIGH>; + pwm-gpios = <&npm1300_ek_gpio 2 GPIO_ACTIVE_LOW>; + }; + + npm1300_ek_ldo1: LDO1 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <3300000>; + enable-gpios = <&npm1300_ek_gpio 2 GPIO_ACTIVE_LOW>; + }; + + npm1300_ek_ldo2: LDO2 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <3300000>; + enable-gpios = <&npm1300_ek_gpio 2 GPIO_ACTIVE_LOW>; + }; + }; + }; +}; diff --git a/boards/shields/st_b_lcd40_dsi1_mb1166/Kconfig.defconfig b/boards/shields/st_b_lcd40_dsi1_mb1166/Kconfig.defconfig new file mode 100644 index 000000000000..1989a2444a77 --- /dev/null +++ b/boards/shields/st_b_lcd40_dsi1_mb1166/Kconfig.defconfig @@ -0,0 +1,12 @@ +# Copyright (c) 2023 bytes at work AG +# SPDX-License-Identifier: Apache-2.0 + +if SHIELD_ST_B_LCD40_DSI1_MB1166 + +config DISPLAY + default y + +config GPIO + default y + +endif # SHIELD_ST_B_LCD40_DSI1_MB1166 diff --git a/boards/shields/st_b_lcd40_dsi1_mb1166/Kconfig.shield b/boards/shields/st_b_lcd40_dsi1_mb1166/Kconfig.shield new file mode 100644 index 000000000000..c46fa19b33cd --- /dev/null +++ b/boards/shields/st_b_lcd40_dsi1_mb1166/Kconfig.shield @@ -0,0 +1,5 @@ +# Copyright (c) 2023 bytes at work AG +# SPDX-License-Identifier: Apache-2.0 + +config SHIELD_ST_B_LCD40_DSI1_MB1166 + def_bool $(shields_list_contains,st_b_lcd40_dsi1_mb1166) diff --git a/boards/shields/st_b_lcd40_dsi1_mb1166/boards/stm32h747i_disco_m7.conf b/boards/shields/st_b_lcd40_dsi1_mb1166/boards/stm32h747i_disco_m7.conf new file mode 100644 index 000000000000..09ba121ded8a --- /dev/null +++ b/boards/shields/st_b_lcd40_dsi1_mb1166/boards/stm32h747i_disco_m7.conf @@ -0,0 +1,8 @@ +# Copyright (c) 2023 bytes at work AG +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_MEMC=y +CONFIG_STM32_LTDC_RGB888=y +CONFIG_HEAP_MEM_POOL_SIZE=65536 +# Initialize after LTDC +CONFIG_DISPLAY_OTM8009A_INIT_PRIORITY=86 diff --git a/boards/shields/st_b_lcd40_dsi1_mb1166/boards/stm32h747i_disco_m7.overlay b/boards/shields/st_b_lcd40_dsi1_mb1166/boards/stm32h747i_disco_m7.overlay new file mode 100644 index 000000000000..aba168ad33a6 --- /dev/null +++ b/boards/shields/st_b_lcd40_dsi1_mb1166/boards/stm32h747i_disco_m7.overlay @@ -0,0 +1,68 @@ +/* + * Copyright (c) 2023 bytes at work AG + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + chosen { + zephyr,display = <dc; + }; +}; + +<dc { + status = "okay"; + ext-sdram = <&sdram2>; + + /* orisetech, otm8009a */ + width = <800>; + height = <480>; + hsync-pol = ; + vsync-pol = ; + de-pol = ; + pclk-pol = ; + hsync-duration = <2>; + vsync-duration = <1>; + hbp-duration = <34>; + vbp-duration = <15>; + hfp-duration = <34>; + vfp-duration = <16>; + + def-back-color-red = <0>; + def-back-color-green = <0>; + def-back-color-blue = <0>; +}; + +/* ltdc uses pll3_r as pixel clock */ +&pll3 { + status = "okay"; + clocks = <&clk_hse>; + div-m = <5>; + mul-n = <132>; + div-p = <2>; + div-q = <2>; + div-r = <24>; /* 27.5 MHz */ +}; + +&mipi_dsi { + status = "okay"; + + /* DSI HOST dedicated PLL + * F_VCO = CLK_IN / pll-idf * 2 * pll-ndiv + * PHI = F_VCO / 2 / (1 << pll-odf) = lane_byte_clk + * = 25 MHz / 5 * 2 * 100 / 2 / (1<<0) / 8 = 62.5 MHz + */ + pll-ndiv = <100>; + pll-idf = <5>; + pll-odf = <0>; + + vs-active-high; + hs-active-high; + de-active-high; +}; + +&otm8009a { + data-lanes = <2>; + pixel-format = ; + rotation = <90>; +}; diff --git a/boards/shields/st_b_lcd40_dsi1_mb1166/doc/connectors.jpg b/boards/shields/st_b_lcd40_dsi1_mb1166/doc/connectors.jpg new file mode 100644 index 000000000000..0cf217a19ae7 Binary files /dev/null and b/boards/shields/st_b_lcd40_dsi1_mb1166/doc/connectors.jpg differ diff --git a/boards/shields/st_b_lcd40_dsi1_mb1166/doc/image.jpg b/boards/shields/st_b_lcd40_dsi1_mb1166/doc/image.jpg new file mode 100644 index 000000000000..e9082b917c7f Binary files /dev/null and b/boards/shields/st_b_lcd40_dsi1_mb1166/doc/image.jpg differ diff --git a/boards/shields/st_b_lcd40_dsi1_mb1166/doc/index.rst b/boards/shields/st_b_lcd40_dsi1_mb1166/doc/index.rst new file mode 100644 index 000000000000..407f8c6efdaa --- /dev/null +++ b/boards/shields/st_b_lcd40_dsi1_mb1166/doc/index.rst @@ -0,0 +1,118 @@ +.. _st_b_lcd40_dsi1_mb1166_shield: + +ST B-LCD40-DSI1 +############### + +Overview +******** + +The B-LCD40-DSI1 shield provides a 4-inch WVGA TFT LCD with MIPI DSI interface +and capacitive touch screen. + + +.. figure:: image.jpg + :alt: B-LCD40-DSI1 MB1166 Image + :align: center + + B-LCD40-DSI1 MB1166 Image + +.. figure:: connectors.jpg + :alt: B-LCD40-DSI1 MB1166 Connector + :align: center + + B-LCD40-DSI1 MB1166 Connector + ++------+--------------+------------+-------+--------------+-----------------+ +| CN1 | Description | Interface | CN1 | Description | Interface | +| odd | | | even | | | ++======+==============+============+=======+==============+=================+ +| 1 | GND | - | 2 | - | - | ++------+--------------+------------+-------+--------------+-----------------+ +| 3 | DSI_CK_P | DSI | 4 | TOUCH_INT | Interrupt out | ++------+--------------+------------+-------+--------------+-----------------+ +| 5 | DSI_CK_N | DSI | 6 | - | - | ++------+--------------+------------+-------+--------------+-----------------+ +| 7 | GND | - | 8 | - | - | ++------+--------------+------------+-------+--------------+-----------------+ +| 9 | DSI_D0_P | DSI | 10 | - | - | ++------+--------------+------------+-------+--------------+-----------------+ +| 11 | DSI_D0_N | DSI | 12 | - | - | ++------+--------------+------------+-------+--------------+-----------------+ +| 13 | GND | - | 14 | - | - | ++------+--------------+------------+-------+--------------+-----------------+ +| 15 | DSI_D1_P | DSI | 16 | - | - | ++------+--------------+------------+-------+--------------+-----------------+ +| 17 | DSI_D1_N | DSI | 18 | - | - | ++------+--------------+------------+-------+--------------+-----------------+ +| 19 | GND | - | 20 | - | - | ++------+--------------+------------+-------+--------------+-----------------+ +| 21 | BLVDD(+5V) | - | 22 | - | - | ++------+--------------+------------+-------+--------------+-----------------+ +| 23 | BLVDD(+5V) | - | 24 | - | - | ++------+--------------+------------+-------+--------------+-----------------+ +| 25 | - | - | 26 | - | - | ++------+--------------+------------+-------+--------------+-----------------+ +| 27 | BLGND | - | 28 | - | - | ++------+--------------+------------+-------+--------------+-----------------+ +| 29 | BLGND | - | 30 | - | - | ++------+--------------+------------+-------+--------------+-----------------+ +| 31 | - | - | 32 | - | - | ++------+--------------+------------+-------+--------------+-----------------+ +| 33 | - | - | 34 | - | - | ++------+--------------+------------+-------+--------------+-----------------+ +| 35 | - | - | 36 | VDD | - | +| | | | | (2.8V-3.3V) | | ++------+--------------+------------+-------+--------------+-----------------+ +| 37 | - | - | 38 | - | - | ++------+--------------+------------+-------+--------------+-----------------+ +| 39 | - | - | 40 | I2C_SDA | I2C | ++------+--------------+------------+-------+--------------+-----------------+ +| 41 | - | - | 42 | - | - | ++------+--------------+------------+-------+--------------+-----------------+ +| 43 | - | - | 44 | I2C_SCL | I2C | ++------+--------------+------------+-------+--------------+-----------------+ +| 45 | - | - | 46 | - | - | ++------+--------------+------------+-------+--------------+-----------------+ +| 47 | - | - | 48 | - | - | ++------+--------------+------------+-------+--------------+-----------------+ +| 49 | DSI_TE | DSI | 50 | - | - | ++------+--------------+------------+-------+--------------+-----------------+ +| 51 | - | - | 52 | - | - | ++------+--------------+------------+-------+--------------+-----------------+ +| 53 | BL_CTRL | GPIO | 54 | - | - | ++------+--------------+------------+-------+--------------+-----------------+ +| 55 | - | - | 56 | - | - | ++------+--------------+------------+-------+--------------+-----------------+ +| 57 | RESET | GPIO | 58 | - | - | ++------+--------------+------------+-------+--------------+-----------------+ +| 59 | - | - | 60 | - | - | ++------+--------------+------------+-------+--------------+-----------------+ + + +Requirements +************ + +Your board needs to have a ``mipi_dsi`` device tree label to work with this shield. + +Usage +***** + +The shield can be used in any application by setting ``SHIELD`` to +``st_b_lcd40_dsi1_mb1166`` and adding the necessary device tree properties. + +Set ``-DSHIELD="st_b_lcd40_dsi1_mb1166"`` when you invoke ``west build``. For example: + +.. zephyr-app-commands:: + :zephyr-app: samples/drivers/display + :board: stm32h747i_disco_m7 + :shield: st_b_lcd40_dsi1_mb1166 + :goals: build + +References +********** + +- `Product page `_ + +- `Databrief `_ + +- `User manual `_ diff --git a/boards/shields/st_b_lcd40_dsi1_mb1166/st_b_lcd40_dsi1_mb1166.overlay b/boards/shields/st_b_lcd40_dsi1_mb1166/st_b_lcd40_dsi1_mb1166.overlay new file mode 100644 index 000000000000..96469ab58de9 --- /dev/null +++ b/boards/shields/st_b_lcd40_dsi1_mb1166/st_b_lcd40_dsi1_mb1166.overlay @@ -0,0 +1,17 @@ +/* + * Copyright (c) 2023 bytes at work AG + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&mipi_dsi { + otm8009a: otm8009a@0 { + status = "okay"; + compatible = "orisetech,otm8009a"; + reg = <0x0>; + height = <800>; + width = <480>; + reset-gpios = <&dsi_lcd_qsh_030 57 GPIO_ACTIVE_HIGH>; + bl-gpios = <&dsi_lcd_qsh_030 53 GPIO_ACTIVE_HIGH>; + }; +}; diff --git a/boards/shields/ti_bp_bassensorsmkii/Kconfig.shield b/boards/shields/ti_bp_bassensorsmkii/Kconfig.shield new file mode 100644 index 000000000000..dd329aa314f8 --- /dev/null +++ b/boards/shields/ti_bp_bassensorsmkii/Kconfig.shield @@ -0,0 +1,5 @@ +# Copyright (c) 2023 Intel Corporation +# SPDX-License-Identifier: Apache-2.0 + +config SHIELD_TI_BP_BASSENSORSMKII + def_bool $(shields_list_contains,ti_bp_bassensorsmkii) diff --git a/boards/shields/ti_bp_bassensorsmkii/doc/index.rst b/boards/shields/ti_bp_bassensorsmkii/doc/index.rst new file mode 100644 index 000000000000..c0b51dd4f82c --- /dev/null +++ b/boards/shields/ti_bp_bassensorsmkii/doc/index.rst @@ -0,0 +1,34 @@ +.. _ti_bp_bassensorsmkii: + +TI Building Automation Sensors MKII: Building Automation Multi sensor shield +############################################################################ + +Overview +******** +The BP-BASSENSORSMKII is a motion MEMS and environmental sensor expansion board +using the TI BoosterPack shield layout. + +More information about the board can be found at the +`TI BP-BASSENSORSMKII website`_. + +Hardware Description +******************** + +BP-BASSENSORSMKII provides the following key features: + + - BMI160 6 axis IMU + - BMM150 connected to BMI160 for sensor hub use + - TI OP3001 Ambient Light sensors + - TI DR5055 Hall Effect Sensor + - TI HDC2080 Temperature and Humidity Sensor + - TI TMP117 ultra-high accuracy temperature sensor with breakout + - TI LaunchPad support + - RoHS compliant + + +References +********** + +.. target-notes:: +.. _TI BP-BASSENSORSMKII website: + https://www.ti.com/tool/BP-BASSENSORSMKII diff --git a/boards/shields/ti_bp_bassensorsmkii/ti_bp_bassensorsmkii.overlay b/boards/shields/ti_bp_bassensorsmkii/ti_bp_bassensorsmkii.overlay new file mode 100644 index 000000000000..fa4f11bbc740 --- /dev/null +++ b/boards/shields/ti_bp_bassensorsmkii/ti_bp_bassensorsmkii.overlay @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2023 Intel Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + aliases { + accel0 = &bmi160_ti_bp_bassensorsmkii; + gyro0 = &bmi160_ti_bp_bassensorsmkii; + optical0 = &opt3001_ti_bp_bassensorsmkii; + }; +}; + +&arduino_i2c { + bmi160_ti_bp_bassensorsmkii: bmi160@69 { + compatible = "bosch,bmi160"; + reg = <0x69>; + int-gpios = <&arduino_header 8 GPIO_ACTIVE_HIGH>; + }; + + opt3001_ti_bp_bassensorsmkii: opt3001@44 { + compatible = "ti,opt3001"; + reg = <0x44>; + }; +}; diff --git a/boards/shields/x_nucleo_iks02a1/boards/nucleo_f411re.defconfig b/boards/shields/x_nucleo_iks02a1/boards/nucleo_f411re.defconfig deleted file mode 100644 index e0578796c150..000000000000 --- a/boards/shields/x_nucleo_iks02a1/boards/nucleo_f411re.defconfig +++ /dev/null @@ -1,45 +0,0 @@ -# Copyright (c) 2020 STMicroelectronics -# -# SPDX-License-Identifier: Apache-2.0 - -if BOARD_NUCLEO_F411RE - -if I2S - -# The I2S should be configured in such a way it generates a 2MHz -# clock to the MP34DT05 microphone. -# -# The input clock to I2S block is I2SClk. This clock is generated -# by the PLLI2S from either HSI or HSE osci using this formula: -# -# Fin = HSE or HSI osci -# Fvco = Fin x (PLLN/PLLM) -# I2SClk = Fvco / PLLR -# -# For example, if Fin is HSE at 8MHz and PLLM=8, PLLN=192, PLLR=3, -# the resulting I2SCLk is 64MHz. On the contrary if HSI at 16MHz is -# used the resulting I2SClk frequency would be 128MHz. -# The shield user is invited to verify which osci is configured on -# Nucleo F441RE board defconfig file and calculate the final frequency. -# -# The I2S block then uses I2SDIV and I2SODD register fields to further -# divide I2SClk. These parameters are automatically calculated by -# I2S driver, in order to obtain the requested output @2MHz, so -# having a I2SClk in input at 64MHz or 128MHz does not make a any -# difference. - -config I2S_STM32_USE_PLLI2S_ENABLE - default y - -config I2S_STM32_PLLI2S_PLLM - default 8 - -config I2S_STM32_PLLI2S_PLLN - default 192 - -config I2S_STM32_PLLI2S_PLLR - default 3 - -endif # I2S - -endif # BOARD_NUCLEO_F411RE diff --git a/boards/shields/x_nucleo_iks02a1/boards/nucleo_f411re.overlay b/boards/shields/x_nucleo_iks02a1/boards/nucleo_f411re.overlay index 3e9da59abcde..1591debc9374 100644 --- a/boards/shields/x_nucleo_iks02a1/boards/nucleo_f411re.overlay +++ b/boards/shields/x_nucleo_iks02a1/boards/nucleo_f411re.overlay @@ -4,6 +4,12 @@ * SPDX-License-Identifier: Apache-2.0 */ +&plli2s { + mul-n = <192>; + div-r = <3>; + status = "okay"; +}; + &dma2 { status = "okay"; }; diff --git a/boards/x86/ehl_crb/ehl_crb.yaml b/boards/x86/ehl_crb/ehl_crb.yaml index 4a34a4857752..f9e0e7c871dd 100644 --- a/boards/x86/ehl_crb/ehl_crb.yaml +++ b/boards/x86/ehl_crb/ehl_crb.yaml @@ -8,6 +8,7 @@ toolchain: ram: 2048 supported: - gpio + - smbus testing: ignore_tags: - net diff --git a/boards/x86/qemu_x86/qemu_x86_64.dts b/boards/x86/qemu_x86/qemu_x86_64.dts index 92522ab8a4ea..83bf2c7fd0f2 100644 --- a/boards/x86/qemu_x86/qemu_x86_64.dts +++ b/boards/x86/qemu_x86/qemu_x86_64.dts @@ -4,3 +4,17 @@ */ #include "qemu_x86.dts" + +&pcie0 { + smbus0: smbus0 { + compatible = "intel,pch-smbus"; + #address-cells = <1>; + #size-cells = <0>; + vendor-id = <0x8086>; + device-id = <0x2930>; + interrupts = ; + interrupt-parent = <&intc>; + + status = "okay"; + }; +}; diff --git a/boards/x86/rpl_crb/rpl_crb.dts b/boards/x86/rpl_crb/rpl_crb.dts index 2558a399e2b6..59d0baf52e79 100644 --- a/boards/x86/rpl_crb/rpl_crb.dts +++ b/boards/x86/rpl_crb/rpl_crb.dts @@ -20,4 +20,8 @@ zephyr,console = &uart_ec_0; zephyr,shell-uart = &uart_ec_0; }; + + aliases { + watchdog0 = &tco_wdt; + }; }; diff --git a/boards/x86/rpl_crb/rpl_crb.yaml b/boards/x86/rpl_crb/rpl_crb.yaml index b48d3829ca29..129c071320de 100644 --- a/boards/x86/rpl_crb/rpl_crb.yaml +++ b/boards/x86/rpl_crb/rpl_crb.yaml @@ -5,6 +5,9 @@ arch: x86 toolchain: - zephyr ram: 2048 +supported: + - smbus + - watchdog testing: ignore_tags: - net diff --git a/boards/x86/rpl_crb/rpl_crb_defconfig b/boards/x86/rpl_crb/rpl_crb_defconfig index 11060f54fd51..d5b40368fa46 100644 --- a/boards/x86/rpl_crb/rpl_crb_defconfig +++ b/boards/x86/rpl_crb/rpl_crb_defconfig @@ -7,6 +7,7 @@ CONFIG_LOAPIC=y CONFIG_CONSOLE=y CONFIG_SERIAL=y CONFIG_UART_NS16550=y +CONFIG_UART_NS16550_VARIANT_NS16750=y CONFIG_UART_CONSOLE=y CONFIG_X2APIC=y CONFIG_SMP=y diff --git a/boards/xtensa/esp32/Kconfig.defconfig b/boards/xtensa/esp32/Kconfig.defconfig index 2e6bad1caeb9..c2880e62d490 100644 --- a/boards/xtensa/esp32/Kconfig.defconfig +++ b/boards/xtensa/esp32/Kconfig.defconfig @@ -12,7 +12,7 @@ config ENTROPY_GENERATOR config HEAP_MEM_POOL_SIZE default 98304 if WIFI - default 16384 if BT + default 40960 if BT default 4096 choice BT_HCI_BUS_TYPE diff --git a/boards/xtensa/esp32_ethernet_kit/Kconfig.defconfig b/boards/xtensa/esp32_ethernet_kit/Kconfig.defconfig index f01138d4e0b2..aed4adc50a84 100644 --- a/boards/xtensa/esp32_ethernet_kit/Kconfig.defconfig +++ b/boards/xtensa/esp32_ethernet_kit/Kconfig.defconfig @@ -19,7 +19,7 @@ config ENTROPY_GENERATOR config HEAP_MEM_POOL_SIZE default 98304 if WIFI - default 16384 if BT + default 40960 if BT default 4096 choice BT_HCI_BUS_TYPE diff --git a/boards/xtensa/esp32_ethernet_kit/board_init.c b/boards/xtensa/esp32_ethernet_kit/board_init.c index 230e22d4341e..b3856fea87b4 100644 --- a/boards/xtensa/esp32_ethernet_kit/board_init.c +++ b/boards/xtensa/esp32_ethernet_kit/board_init.c @@ -8,9 +8,8 @@ #define IP101GRI_RESET_N_PIN 5 -static int board_esp32_ethernet_kit_init(const struct device *dev) +static int board_esp32_ethernet_kit_init(void) { - ARG_UNUSED(dev); const struct device *gpio = DEVICE_DT_GET(DT_NODELABEL(gpio0)); if (!device_is_ready(gpio)) { diff --git a/boards/xtensa/esp32_net/Kconfig.defconfig b/boards/xtensa/esp32_net/Kconfig.defconfig index 1160bf88abff..928a4c06de9c 100644 --- a/boards/xtensa/esp32_net/Kconfig.defconfig +++ b/boards/xtensa/esp32_net/Kconfig.defconfig @@ -12,7 +12,7 @@ config ENTROPY_GENERATOR config HEAP_MEM_POOL_SIZE default 98304 if WIFI - default 16384 if BT + default 40960 if BT default 4096 choice BT_HCI_BUS_TYPE diff --git a/boards/xtensa/esp32s2_franzininho/Kconfig.defconfig b/boards/xtensa/esp32s2_franzininho/Kconfig.defconfig index 75fa938598f7..94937f824dc5 100644 --- a/boards/xtensa/esp32s2_franzininho/Kconfig.defconfig +++ b/boards/xtensa/esp32s2_franzininho/Kconfig.defconfig @@ -12,9 +12,4 @@ config ENTROPY_GENERATOR config HEAP_MEM_POOL_SIZE default 98304 if WIFI - default 16384 if BT default 4096 - -choice BT_HCI_BUS_TYPE - default BT_ESP32 if BT -endchoice diff --git a/boards/xtensa/esp32s2_saola/Kconfig.defconfig b/boards/xtensa/esp32s2_saola/Kconfig.defconfig index a6dd10503173..077b2bde4ac7 100644 --- a/boards/xtensa/esp32s2_saola/Kconfig.defconfig +++ b/boards/xtensa/esp32s2_saola/Kconfig.defconfig @@ -11,10 +11,5 @@ config ENTROPY_GENERATOR default y config HEAP_MEM_POOL_SIZE - default 98304 if WIFI - default 16384 if BT + default 32768 if WIFI default 4096 - -choice BT_HCI_BUS_TYPE - default BT_ESP32 if BT -endchoice diff --git a/boards/xtensa/esp32s3_devkitm/Kconfig.defconfig b/boards/xtensa/esp32s3_devkitm/Kconfig.defconfig index b4e160532cd5..9bfcc1bf9991 100644 --- a/boards/xtensa/esp32s3_devkitm/Kconfig.defconfig +++ b/boards/xtensa/esp32s3_devkitm/Kconfig.defconfig @@ -6,3 +6,14 @@ config BOARD default "esp32s3_devkitm" depends on BOARD_ESP32S3_DEVKITM + +config ENTROPY_GENERATOR + default y + +config HEAP_MEM_POOL_SIZE + default 40960 if BT + default 4096 + +choice BT_HCI_BUS_TYPE + default BT_ESP32 if BT +endchoice diff --git a/boards/xtensa/esp32s3_devkitm/doc/index.rst b/boards/xtensa/esp32s3_devkitm/doc/index.rst index 5d41114d16ca..7cb726bdc3df 100644 --- a/boards/xtensa/esp32s3_devkitm/doc/index.rst +++ b/boards/xtensa/esp32s3_devkitm/doc/index.rst @@ -90,6 +90,20 @@ Current Zephyr's ESP32-S3-DevKitM board supports the following features: +------------+------------+-------------------------------------+ | USB-JTAG | on-chip | hardware interface | +------------+------------+-------------------------------------+ +| SPI Master | on-chip | spi | ++------------+------------+-------------------------------------+ +| Timers | on-chip | counter | ++------------+------------+-------------------------------------+ +| Watchdog | on-chip | watchdog | ++------------+------------+-------------------------------------+ +| TRNG | on-chip | entropy | ++------------+------------+-------------------------------------+ +| LEDC | on-chip | pwm | ++------------+------------+-------------------------------------+ +| MCPWM | on-chip | pwm | ++------------+------------+-------------------------------------+ +| PCNT | on-chip | qdec | ++------------+------------+-------------------------------------+ Prerequisites ------------- diff --git a/boards/xtensa/esp32s3_devkitm/esp32s3_devkitm-pinctrl.dtsi b/boards/xtensa/esp32s3_devkitm/esp32s3_devkitm-pinctrl.dtsi index e07a3a0e7e53..eab6da9eb5f2 100644 --- a/boards/xtensa/esp32s3_devkitm/esp32s3_devkitm-pinctrl.dtsi +++ b/boards/xtensa/esp32s3_devkitm/esp32s3_devkitm-pinctrl.dtsi @@ -38,4 +38,28 @@ output-high; }; }; + + spim2_default: spim2_default { + group1 { + pinmux = , + , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + spim3_default: spim3_default { + group1 { + pinmux = , + , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; }; diff --git a/boards/xtensa/esp32s3_devkitm/esp32s3_devkitm.dts b/boards/xtensa/esp32s3_devkitm/esp32s3_devkitm.dts index 6bd3583ea57b..cc7cbf0e2c58 100644 --- a/boards/xtensa/esp32s3_devkitm/esp32s3_devkitm.dts +++ b/boards/xtensa/esp32s3_devkitm/esp32s3_devkitm.dts @@ -14,6 +14,7 @@ aliases { i2c-0 = &i2c0; + watchdog0 = &wdt0; }; chosen { @@ -72,6 +73,46 @@ pinctrl-names = "default"; }; +&spi2 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim2_default>; + pinctrl-names = "default"; +}; + +&spi3 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim3_default>; + pinctrl-names = "default"; +}; + +&timer0 { + status = "disabled"; +}; + +&timer1 { + status = "disabled"; +}; + +&timer2 { + status = "disabled"; +}; + +&timer3 { + status = "disabled"; +}; + +&wdt0 { + status = "okay"; +}; + +&trng0 { + status = "okay"; +}; + &flash0 { status = "okay"; partitions { diff --git a/boards/xtensa/esp32s3_devkitm/esp32s3_devkitm.yaml b/boards/xtensa/esp32s3_devkitm/esp32s3_devkitm.yaml index f93155836def..8f4d5c793057 100644 --- a/boards/xtensa/esp32s3_devkitm/esp32s3_devkitm.yaml +++ b/boards/xtensa/esp32s3_devkitm/esp32s3_devkitm.yaml @@ -3,11 +3,16 @@ name: ESP32-S3 DevKitM type: mcu arch: xtensa toolchain: - - espressif + - zephyr supported: - gpio - uart - i2c + - spi + - counter + - watchdog + - entropy + - pwm testing: ignore_tags: - net diff --git a/boards/xtensa/esp_wrover_kit/Kconfig.defconfig b/boards/xtensa/esp_wrover_kit/Kconfig.defconfig index e7808253dabf..65efe16093d7 100644 --- a/boards/xtensa/esp_wrover_kit/Kconfig.defconfig +++ b/boards/xtensa/esp_wrover_kit/Kconfig.defconfig @@ -9,7 +9,7 @@ config BOARD config HEAP_MEM_POOL_SIZE default 98304 if WIFI - default 16384 if BT + default 40960 if BT default 4096 choice BT_HCI_BUS_TYPE diff --git a/boards/xtensa/esp_wrover_kit/board_init.c b/boards/xtensa/esp_wrover_kit/board_init.c index c27924740cd4..981799d739f5 100644 --- a/boards/xtensa/esp_wrover_kit/board_init.c +++ b/boards/xtensa/esp_wrover_kit/board_init.c @@ -11,9 +11,8 @@ #define LED_B_PIN DT_GPIO_PIN(DT_ALIAS(led0), gpios) #define BL_PIN 5 -static int board_esp_wrover_kit_init(const struct device *dev) +static int board_esp_wrover_kit_init(void) { - ARG_UNUSED(dev); const struct device *gpio; gpio = DEVICE_DT_GET(DT_NODELABEL(gpio0)); diff --git a/boards/xtensa/heltec_wifi_lora32_v2/Kconfig.defconfig b/boards/xtensa/heltec_wifi_lora32_v2/Kconfig.defconfig index 16f56dacaed6..d8e0ba31dba5 100644 --- a/boards/xtensa/heltec_wifi_lora32_v2/Kconfig.defconfig +++ b/boards/xtensa/heltec_wifi_lora32_v2/Kconfig.defconfig @@ -12,7 +12,7 @@ config ENTROPY_GENERATOR config HEAP_MEM_POOL_SIZE default 98304 if WIFI - default 16384 if BT + default 40960 if BT default 4096 choice BT_HCI_BUS_TYPE diff --git a/boards/xtensa/heltec_wifi_lora32_v2/board_init.c b/boards/xtensa/heltec_wifi_lora32_v2/board_init.c index a32196e5b714..8e914cf58fcd 100644 --- a/boards/xtensa/heltec_wifi_lora32_v2/board_init.c +++ b/boards/xtensa/heltec_wifi_lora32_v2/board_init.c @@ -9,9 +9,8 @@ #define VEXT_PIN DT_GPIO_PIN(DT_NODELABEL(vext), gpios) #define OLED_RST DT_GPIO_PIN(DT_NODELABEL(oledrst), gpios) -static int board_heltec_wifi_lora32_v2_init(const struct device *dev) +static int board_heltec_wifi_lora32_v2_init(void) { - ARG_UNUSED(dev); const struct device *gpio; gpio = DEVICE_DT_GET(DT_NODELABEL(gpio0)); diff --git a/boards/xtensa/index.rst b/boards/xtensa/index.rst index 9bfc2e2384dc..dd09c5df5b4f 100644 --- a/boards/xtensa/index.rst +++ b/boards/xtensa/index.rst @@ -7,4 +7,4 @@ XTENSA Boards :maxdepth: 1 :glob: - **/* + **/index diff --git a/boards/xtensa/intel_adsp_ace15_mtpm/board.cmake b/boards/xtensa/intel_adsp_ace15_mtpm/board.cmake index 1864e23b1fd4..0948dfc49efa 100644 --- a/boards/xtensa/intel_adsp_ace15_mtpm/board.cmake +++ b/boards/xtensa/intel_adsp_ace15_mtpm/board.cmake @@ -3,3 +3,5 @@ # SPDX-License-Identifier: Apache-2.0 board_set_rimage_target(mtl) + +set(RIMAGE_SIGN_KEY "otc_private_key_3k.pem" CACHE STRING "default in ace15_mtpm/board.cmake") diff --git a/boards/xtensa/intel_adsp_ace15_mtpm/doc/index.rst b/boards/xtensa/intel_adsp_ace15_mtpm/doc/index.rst new file mode 100644 index 000000000000..d31783cd944a --- /dev/null +++ b/boards/xtensa/intel_adsp_ace15_mtpm/doc/index.rst @@ -0,0 +1,35 @@ +.. _intel_adsp_ace15: + +Intel ADSP ACE 1.5 +################## + +Overview +******** + +This board configuration is used to run Zephyr on the Intel ACE 1.5 Audio DSP. +This configuration is present, for example, on Intel Meteor Lake microprocessors. +Refer to :ref:`intel_adsp_generic` for more details on Intel ADSP ACE and CAVS. + +System requirements +******************* + +Xtensa Toolchain +---------------- + +If you choose to build with the Xtensa toolchain instead of the Zephyr SDK, set +the following environment variables specific to the board in addition to the +Xtensa toolchain environment variables listed in :ref:`intel_adsp_generic`. + +.. code-block:: shell + + export ZEPHYR_TOOLCHAIN_VARIANT=xt-clang + export TOOLCHAIN_VER=RI-2021.7-linux + export XTENSA_CORE=ace10_LX7HiFi4 + +For older versions of the toolchain, set the toolchain variant to ``xcc``. + +Programming and Debugging +************************* + +Refer to :ref:`intel_adsp_generic` for generic instructions on programming and +debugging applicable to all CAVS and ACE platforms. diff --git a/boards/xtensa/intel_adsp_ace20_lnl/Kconfig.board b/boards/xtensa/intel_adsp_ace20_lnl/Kconfig.board new file mode 100644 index 000000000000..26994dfb6c5f --- /dev/null +++ b/boards/xtensa/intel_adsp_ace20_lnl/Kconfig.board @@ -0,0 +1,8 @@ +# Xtensa board configuration + +# Copyright (c) 2022 Intel Corporation +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_INTEL_ADSP_ACE20_LNL + bool "Intel ADSP ACE 2.0 Lunar Lake PCH" + depends on SOC_SERIES_INTEL_ACE diff --git a/boards/xtensa/intel_adsp_ace20_lnl/Kconfig.defconfig b/boards/xtensa/intel_adsp_ace20_lnl/Kconfig.defconfig new file mode 100644 index 000000000000..756481eba01f --- /dev/null +++ b/boards/xtensa/intel_adsp_ace20_lnl/Kconfig.defconfig @@ -0,0 +1,10 @@ +# Copyright (c) 2022 Intel Corporation +# +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_INTEL_ADSP_ACE20_LNL + +config BOARD + default "intel_adsp_ace20_lnl" + +endif # BOARD_INTEL_ADSP_ACE20_LNL diff --git a/boards/xtensa/intel_adsp_ace20_lnl/board.cmake b/boards/xtensa/intel_adsp_ace20_lnl/board.cmake new file mode 100644 index 000000000000..04d679fba023 --- /dev/null +++ b/boards/xtensa/intel_adsp_ace20_lnl/board.cmake @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: Apache-2.0 + +set(SUPPORTED_EMU_PLATFORMS acesim) + +board_set_rimage_target(lnl) + +set(RIMAGE_SIGN_KEY "otc_private_key_3k.pem" CACHE STRING "default in ace20_lnl/board.cmake") diff --git a/boards/xtensa/intel_adsp_ace20_lnl/intel_adsp_ace20_lnl.dts b/boards/xtensa/intel_adsp_ace20_lnl/intel_adsp_ace20_lnl.dts new file mode 100644 index 000000000000..0a68f1864242 --- /dev/null +++ b/boards/xtensa/intel_adsp_ace20_lnl/intel_adsp_ace20_lnl.dts @@ -0,0 +1,19 @@ +/* + * Copyright (c) 2022 Intel Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include + +/ { + model = "intel_adsp_ace20_lnl"; + compatible = "intel"; + + chosen { + zephyr,sram = &sram0; + zephyr,console = &mem_window3; + }; +}; diff --git a/boards/xtensa/intel_adsp_ace20_lnl/intel_adsp_ace20_lnl.yaml b/boards/xtensa/intel_adsp_ace20_lnl/intel_adsp_ace20_lnl.yaml new file mode 100644 index 000000000000..cec6609aa722 --- /dev/null +++ b/boards/xtensa/intel_adsp_ace20_lnl/intel_adsp_ace20_lnl.yaml @@ -0,0 +1,14 @@ +identifier: intel_adsp_ace20_lnl +name: ACE 2.0 LNL Audio DSP +type: mcu +arch: xtensa +toolchain: + - xcc + - xt-clang +supported: + - dma +testing: + ignore_tags: + - net + - bluetooth + - mcumgr diff --git a/boards/xtensa/intel_adsp_ace20_lnl/intel_adsp_ace20_lnl_defconfig b/boards/xtensa/intel_adsp_ace20_lnl/intel_adsp_ace20_lnl_defconfig new file mode 100644 index 000000000000..760715a855a4 --- /dev/null +++ b/boards/xtensa/intel_adsp_ace20_lnl/intel_adsp_ace20_lnl_defconfig @@ -0,0 +1,14 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_MAIN_STACK_SIZE=2048 + +CONFIG_SOC_SERIES_INTEL_ACE=y +CONFIG_SOC_INTEL_ACE20_LNL=y +CONFIG_BOARD_INTEL_ADSP_ACE20_LNL=y + +CONFIG_GEN_ISR_TABLES=y +CONFIG_GEN_IRQ_VECTOR_TABLE=n + +CONFIG_BUILD_OUTPUT_BIN=n +CONFIG_MM_DRV=y +CONFIG_MM_DRV_INTEL_ADSP_MTL_TLB=y diff --git a/boards/xtensa/intel_adsp_cavs15/Kconfig.board b/boards/xtensa/intel_adsp_cavs15/Kconfig.board deleted file mode 100644 index 01888a693b86..000000000000 --- a/boards/xtensa/intel_adsp_cavs15/Kconfig.board +++ /dev/null @@ -1,8 +0,0 @@ -# Xtensa board configuration - -# Copyright (c) 2019 Intel Corporation -# SPDX-License-Identifier: Apache-2.0 - -config BOARD_INTEL_ADSP_CAVS15 - bool "Intel ADSP CAVS 1.5" - depends on SOC_SERIES_INTEL_ADSP_CAVS diff --git a/boards/xtensa/intel_adsp_cavs15/Kconfig.defconfig b/boards/xtensa/intel_adsp_cavs15/Kconfig.defconfig deleted file mode 100644 index 69a86b1674bf..000000000000 --- a/boards/xtensa/intel_adsp_cavs15/Kconfig.defconfig +++ /dev/null @@ -1,38 +0,0 @@ -# Copyright (c) 2019 Intel Corporation -# -# SPDX-License-Identifier: Apache-2.0 - -if BOARD_INTEL_ADSP_CAVS15 - -config BOARD - default "intel_adsp_cavs15" - -config CAVS_ICTL_0_OFFSET - default 6 -config CAVS_ICTL_1_OFFSET - default 10 -config CAVS_ICTL_2_OFFSET - default 13 -config CAVS_ICTL_3_OFFSET - default 16 - -config 2ND_LVL_INTR_00_OFFSET - default CAVS_ICTL_0_OFFSET -config 2ND_LVL_INTR_01_OFFSET - default CAVS_ICTL_1_OFFSET -config 2ND_LVL_INTR_02_OFFSET - default CAVS_ICTL_2_OFFSET -config 2ND_LVL_INTR_03_OFFSET - default CAVS_ICTL_3_OFFSET - -config MAX_IRQ_PER_AGGREGATOR - default 32 -config NUM_2ND_LEVEL_AGGREGATORS - default 4 -config 2ND_LVL_ISR_TBL_OFFSET - default 21 - -config CAVS_ISR_TBL_OFFSET - default 2ND_LVL_ISR_TBL_OFFSET - -endif # BOARD_INTEL_ADSP_CAVS15 diff --git a/boards/xtensa/intel_adsp_cavs15/board.cmake b/boards/xtensa/intel_adsp_cavs15/board.cmake deleted file mode 100644 index 017594ef60ff..000000000000 --- a/boards/xtensa/intel_adsp_cavs15/board.cmake +++ /dev/null @@ -1,14 +0,0 @@ -# SPDX-License-Identifier: Apache-2.0 - -if($ENV{CAVS_OLD_FLASHER}) - board_set_flasher_ifnset(misc-flasher) - board_finalize_runner_args(misc-flasher) -endif() - -board_set_flasher_ifnset(intel_adsp) - -set(RIMAGE_SIGN_KEY otc_private_key.pem) - -board_set_rimage_target(apl) - -include(${ZEPHYR_BASE}/boards/common/intel_adsp.board.cmake) diff --git a/boards/xtensa/intel_adsp_cavs15/doc/index.rst b/boards/xtensa/intel_adsp_cavs15/doc/index.rst deleted file mode 100644 index b0ed42e091b6..000000000000 --- a/boards/xtensa/intel_adsp_cavs15/doc/index.rst +++ /dev/null @@ -1,156 +0,0 @@ -.. _Up_Squared_Audio_DSP: - -Up Squared Audio DSP -#################### - -System Requirements -******************* - -Prerequisites -============= - -The Zephyr SDK 0.11 or higher is required. - -Since firmware binary signing for Audio DSP is mandatory on Intel products -form Skylake onwards the signing tool and key are needed. - -``up_squared`` board is running Linux with `SOF Diagnostic Driver`_ built and -loaded. - -Signing tool ------------- - -rimage is Audio DSP firmware image creation and signing tool. The tool is used -by `Sound Open Firmware`_ to generate binary firmware signed images. - -For the building instructions refer to `rimage Build Instructions`_. - -Signing keys ------------- - -The key used is Intel Open Source Technology Center (OTC) community key. -It can be freely used by anyone and intended for firmware developers. -Please download and store private key from the location: -https://github.com/thesofproject/sof/blob/master/keys/otc_private_key.pem - -For more information about keys refer to `rimage keys`_. - -Setup up_squared board ----------------------- - -To setup Linux on ``up_squared`` board refer to -`Getting Started with Ubuntu Core on an UP Squared Board`_. - -After installing Linux build and install `SOF Diagnostic Driver`_. - -Programming and Debugging -************************* - -Build Zephyr application -======================== - -Applications can be build in the usual way (see :ref:`build_an_application` -for more details). The only additional step required is signing. For example, -for building ``hello_world`` application following steps are needed. - -#. Building Zephyr application ``hello_world`` - - .. zephyr-app-commands:: - :zephyr-app: samples/hello_world - :board: intel_adsp_cavs15 - :goals: build - -#. Sign and create firmware image - - .. code-block:: console - - west sign -t rimage -- -k - -Loading image to Audio DSP -========================== - -`SOF Diagnostic Driver`_ provide interface for firmware loading. Python tools -in the board support directory use the interface to load firmware to ``ADSP``. - -Assume that the up_squared board's host name is ``cavs15`` (It also can be an -ip address), and the user account is ``user``. Then copy the python tool to the -``up_squared`` board from your build environment:: - - $ scp boards/xtensa/intel_adsp/tools/cavstool.py user@cavs15: - $ scp boards/xtensa/intel_adsp/tools/remote-fw-service.py user@cavs15: - - -Note that the ``/dev/hda`` device file created by the diagnostic driver must -be readable and writable by the process. So we simply by running the -loader script as root: - -.. code-block:: console - - cavs15$ sudo ./remote-fw-service.py - -Cavstool_server.py is a daemon which accepts a firmware image from a remote host -and loads it into the ADSP. After successful firmware download, the daemon also -sends any log messages or output back to the client. - -Running and Debugging -===================== - -While the python script is running on ``up_squared`` board, you can start load -image and run the application by: - -.. code-block:: console - - west flash --remote-host cavs15 - -or - -.. code-block:: console - - west flash --remote-host 192.168.x.x --pty - -Then you can see the log message immediately: - -.. code-block:: console - - Hello World! intel_adsp_cavs15 - - -Integration Testing With Twister -================================ - -The ADSP hardware also has integration for testing using the twister -tool. The ``cavstool_client.py`` script can be used as the -``--device-serial-pty`` handler, and the west flash script should take -a path to the same key file used above. - -.. code-block:: console - - ./scripts/twister --device-testing -p intel_adsp_cavs15 \ - --device-serial-pty $ZEPHYR_BASE/soc/xtensa/intel_adsp/tools/cavstool_client.py,myboard.local,-l \ - --west-flash "--remote-host=myboard.local" - -And if you install the SOF software stack in rather than the default path, -you also can specify the location of the rimage tool, signing key and the -toml config, for example: - -.. code-block:: console - - ./scripts/twister --device-testing -p intel_adsp_cavs15 \ - --device-serial-pty $ZEPHYR_BASE/soc/xtensa/intel_adsp/tools/cavstool_client.py,myboard.local,-l \ - --west-flash "--remote-host=myboard.local,\ - --rimage-tool=/path/to/rimage_tool,\ - --key=/path/to/otc_private_key.pem,\ - --config-dir=/path/to/config_dir" - - -.. target-notes:: - -.. _Getting Started with Ubuntu Core on an UP Squared Board: https://software.intel.com/en-us/articles/getting-started-with-ubuntu-core-on-an-up-squared-board - -.. _SOF Diagnostic Driver: https://github.com/thesofproject/sof-diagnostic-driver - -.. _Sound Open Firmware: https://github.com/thesofproject/sof - -.. _rimage Build Instructions: https://github.com/thesofproject/rimage#building - -.. _rimage keys: https://github.com/thesofproject/sof/tree/master/rimage/keys diff --git a/boards/xtensa/intel_adsp_cavs15/intel_adsp_cavs15.dts b/boards/xtensa/intel_adsp_cavs15/intel_adsp_cavs15.dts deleted file mode 100644 index 25426f6916fc..000000000000 --- a/boards/xtensa/intel_adsp_cavs15/intel_adsp_cavs15.dts +++ /dev/null @@ -1,19 +0,0 @@ -/* - * Copyright (c) 2019 Intel Corporation - * - * SPDX-License-Identifier: Apache-2.0 - */ - -/dts-v1/; - -#include - -/ { - model = "intel_adsp_cavs15"; - compatible = "intel"; - - chosen { - zephyr,sram = &sram0; - zephyr,console = &mem_window3; - }; -}; diff --git a/boards/xtensa/intel_adsp_cavs15/intel_adsp_cavs15.yaml b/boards/xtensa/intel_adsp_cavs15/intel_adsp_cavs15.yaml deleted file mode 100644 index 7f71b6b2c7ac..000000000000 --- a/boards/xtensa/intel_adsp_cavs15/intel_adsp_cavs15.yaml +++ /dev/null @@ -1,11 +0,0 @@ -identifier: intel_adsp_cavs15 -name: cAVS 1.5 Audio DSP (converged Audio Voice and Speech) -type: mcu -arch: xtensa -toolchain: - - xcc - - zephyr -testing: - ignore_tags: - - net - - bluetooth diff --git a/boards/xtensa/intel_adsp_cavs15/intel_adsp_cavs15_defconfig b/boards/xtensa/intel_adsp_cavs15/intel_adsp_cavs15_defconfig deleted file mode 100644 index f297c280a9a6..000000000000 --- a/boards/xtensa/intel_adsp_cavs15/intel_adsp_cavs15_defconfig +++ /dev/null @@ -1,20 +0,0 @@ -# SPDX-License-Identifier: Apache-2.0 - -CONFIG_MAIN_STACK_SIZE=2048 - -CONFIG_SOC_INTEL_CAVS_V15=y -CONFIG_SOC_SERIES_INTEL_ADSP_CAVS=y -CONFIG_BOARD_INTEL_ADSP_CAVS15=y - -CONFIG_GEN_ISR_TABLES=y -CONFIG_GEN_IRQ_VECTOR_TABLE=n - -CONFIG_XTENSA_RESET_VECTOR=y - -CONFIG_XTENSA_USE_CORE_CRT1=y - -CONFIG_MULTI_LEVEL_INTERRUPTS=y -CONFIG_2ND_LEVEL_INTERRUPTS=y - -CONFIG_BUILD_OUTPUT_BIN=n -CONFIG_CLEANUP_INTERMEDIATE_FILES=y diff --git a/boards/xtensa/intel_adsp_cavs15/pre_dt_board.cmake b/boards/xtensa/intel_adsp_cavs15/pre_dt_board.cmake deleted file mode 100644 index 7a471ca8758f..000000000000 --- a/boards/xtensa/intel_adsp_cavs15/pre_dt_board.cmake +++ /dev/null @@ -1,6 +0,0 @@ -# Copyright (c) 2022 Intel Corporation -# SPDX-License-Identifier: Apache-2.0 - -# Suppress "unique_unit_address_if_enabled" to handle the following overlaps: -# - dmic0: dmic0@10000 & dmic1: dmic1@10000 -list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled") diff --git a/boards/xtensa/intel_adsp_cavs18/Kconfig.board b/boards/xtensa/intel_adsp_cavs18/Kconfig.board deleted file mode 100644 index 07b6bdcea7fa..000000000000 --- a/boards/xtensa/intel_adsp_cavs18/Kconfig.board +++ /dev/null @@ -1,8 +0,0 @@ -# Xtensa board configuration - -# Copyright (c) 2020 Intel Corporation -# SPDX-License-Identifier: Apache-2.0 - -config BOARD_INTEL_ADSP_CAVS18 - bool "Intel ADSP CAVS 1.8" - depends on SOC_SERIES_INTEL_ADSP_CAVS diff --git a/boards/xtensa/intel_adsp_cavs18/Kconfig.defconfig b/boards/xtensa/intel_adsp_cavs18/Kconfig.defconfig deleted file mode 100644 index 07790005c879..000000000000 --- a/boards/xtensa/intel_adsp_cavs18/Kconfig.defconfig +++ /dev/null @@ -1,38 +0,0 @@ -# Copyright (c) 2020 Intel Corporation -# -# SPDX-License-Identifier: Apache-2.0 - -if BOARD_INTEL_ADSP_CAVS18 - -config BOARD - default "intel_adsp_cavs18" - -config CAVS_ICTL_0_OFFSET - default 6 -config CAVS_ICTL_1_OFFSET - default 10 -config CAVS_ICTL_2_OFFSET - default 13 -config CAVS_ICTL_3_OFFSET - default 16 - -config 2ND_LVL_INTR_00_OFFSET - default CAVS_ICTL_0_OFFSET -config 2ND_LVL_INTR_01_OFFSET - default CAVS_ICTL_1_OFFSET -config 2ND_LVL_INTR_02_OFFSET - default CAVS_ICTL_2_OFFSET -config 2ND_LVL_INTR_03_OFFSET - default CAVS_ICTL_3_OFFSET - -config MAX_IRQ_PER_AGGREGATOR - default 32 -config NUM_2ND_LEVEL_AGGREGATORS - default 4 -config 2ND_LVL_ISR_TBL_OFFSET - default 21 - -config CAVS_ISR_TBL_OFFSET - default 2ND_LVL_ISR_TBL_OFFSET - -endif # BOARD_INTEL_ADSP_CAVS18 diff --git a/boards/xtensa/intel_adsp_cavs18/board.cmake b/boards/xtensa/intel_adsp_cavs18/board.cmake deleted file mode 100644 index 40e55b04cada..000000000000 --- a/boards/xtensa/intel_adsp_cavs18/board.cmake +++ /dev/null @@ -1,14 +0,0 @@ -# SPDX-License-Identifier: Apache-2.0 - -if($ENV{CAVS_OLD_FLASHER}) - board_set_flasher_ifnset(misc-flasher) - board_finalize_runner_args(misc-flasher) -endif() - -board_set_flasher_ifnset(intel_adsp) - -set(RIMAGE_SIGN_KEY otc_private_key.pem) - -board_set_rimage_target(cnl) - -include(${ZEPHYR_BASE}/boards/common/intel_adsp.board.cmake) diff --git a/boards/xtensa/intel_adsp_cavs18/doc/generic_intel_adsp.rst b/boards/xtensa/intel_adsp_cavs18/doc/generic_intel_adsp.rst deleted file mode 100644 index a8493b10edd5..000000000000 --- a/boards/xtensa/intel_adsp_cavs18/doc/generic_intel_adsp.rst +++ /dev/null @@ -1,307 +0,0 @@ -.. _Intel_Adsp_Generic_Running_Guide: - -Intel Adsp Generic Running Guide -################################ - -This documentation describes how to run the intel_adsp_cavs boards. Including: - -- intel_adsp_cavs15 - -- intel_adsp_cavs18 - -- intel_adsp_cavs20 - -- intel_adsp_cavs25 - - -Set up the environment -********************** - -1. Copy following two tools to the $HOME directory of the target machine (DUT): - -- soc/xtensa/intel_adsp/tools/cavstool.py - (The firmware loader) - -- soc/xtensa/intel_adsp/tools/remote-fw-service.py - (The remote service provider) - - You can use scp command to copy them to DUT, Ex. - -.. code-block:: console - - $scp boards/xtensa/intel_adsp/tools/cavstool.py user@myboard:~ - $scp boards/xtensa/intel_adsp/tools/remote-fw-service.py user@myboard:~ - -2. In your build machine, install the rimage tool, the signed key and - the toml config file. Please refer to please refer: - - - https://github.com/thesofproject/rimage. - - -How Remote Service works -************************ - -The CAVS remote service runs on the target board and interacts with -west. Two services working on the server: - -- Run Sevice - Run Service (or Request Service) works as a flasher. It will receive and - download the firmware to the intel_adsp_cavs boards then starts the Zephyr - Application. It starts at port 10000 by default. - -- Log Service - Log Service redirect the remote target board's /dev/tty console. It will - output Zephyr's log message to user via network. It starts at port 9999 - by default. - -The --remote-host parameter specify the network address which Run Service -provided, and the --pty parameter specifies the network address of log -output service. - - -Build and run the tests -*********************** - -1. In the remote target machine, starting the service by: - -.. code-block:: console - - sudo ./remote-fw-service.py - -2. Build the application. Take hello world as an example: - -.. code-block:: console - - west build -b intel_adsp_cavs15 samples/hello_world - -3. Run the test by: - -.. code-block:: console - - west flash --remote-host {host}:{port} \ - --pty {host}:{port} - -Ex. - -.. code-block:: console - - west flash --remote-host 192.168.0.1 --pty - - # with specifying the port - west flash --remote-host 192.168.0.1:12345 \ - --pty 192.168.0.1:54321 - - -Now you can see the outout log in your terminal. - - -If you don't want to use the default location of rimage tools, you can -also specify the rimage tool, config and key by: - -.. code-block:: console - - west flash --remote-host {host}:{port} \ - --pty {host}:{port} \ - --rimage-tool [path to the rimage tool] \ - --config-dir [path to dir of .toml config file] \ - --key [path to signing key] - - -The cavstool server will listen to the available network interfaces on -port 9999 and 10000 by default. In some case you might need to specify -it only listen on a dedicate IP address, or change the default ports -using, you can do it with following parameters: - -.. code-block:: console - - # with specifying the port - sudo ./remote-fw-service.py --log-port 54321 --req-port 12345 - - # can be simplified with - sudo ./remote-fw-service -p 54321 -r 12345 - - # with specifying a IP address - sudo ./remote-fw-service -s 192.168.0.2 - - # with specifying the IP address with a log port - sudo ./remote-fw-service -s 192.168.0.2:54321 - - # with specifying the IP, log and request port - sudo ./remote-fw-service -s 192.168.0.2:54321 -r 12345 - - # Also works in this way - sudo ./remote-fw-service -s 192.168.0.2 -p 54321 -r 12345 - - -Run by twister -************** - -For running by twister, the --remote-host parameter needs to be added into -the content of the --west-flash parameter. Assume the IP address of your CAVS -boarad is 192.168.1.2, the port of the Request Service is 12345, the port of -the Log Service is 54321, this is an example of the twister command: - -.. code-block:: console - - twister -p intel_adsp_cavs25 --device-testing \ - --device-serial-pty="$ZEPHYR_BASE/soc/xtensa/intel_adsp/tools/cavstool_client.py,-s,192.168.1.2:54321,-l" \ - --west-flash="--remote-host=192.168.1.4:12345" - - -Like we run tests by west, if you don't want to use the default location of -SOF tools, you can also specify the rimage tool, config and key by: - -.. code-block:: console - - twister -p intel_adsp_cavs15 --device-testing \ - --device-serial-pty="$ZEPHYR_BASE/soc/xtensa/intel_adsp/tools/cavstool_client.py,-s,192.168.1.2:54321,-l" \ - --west-flash="--remote-host=192.168.1.2:12345,\ - --rimage-tool=$HOME/sof/rimage/rimage,\ - --config-dir=$HOME/sof/rimage/config/,\ - --key=$HOME/sof/keys/otc_private_key.pem" \ - -T tests/kernel/semaphore/semaphore/ -vv - - -Note that there should be no space between the arguments in --west-flash, -it use comma to separate the parameters. - - -Run one or multiple boards -************************** - -In the above example, there are many parameters need to be keying in when -running by twister. You can reduce it is by writing a hardware map file. -Ruuning twister with the hardware map file also support you running tests -on single/multiple ADSP boards parallelly. - -Let see how to use a hardware map file by twister to run a single board, -this is the content of the hardware map file cavs.map: - -.. code-block:: console - - - connected: true - id: None - platform: intel_adsp_cavs25 - product: None - runner: intel_adsp - serial_pty: "/home/user/zephyrproject/zephyr/soc/xtensa/intel_adsp/tools/cavstool_client.py,-s,192.168.1.4,-l" - runner_params: - - --remote-host=192.168.1.4 - - -If you need to specify the port using, you can write the hardware map file -like following example. Assume you have a log port of 54321 and a req port -12345: - -.. code-block:: console - - - connected: true - id: None - platform: intel_adsp_cavs25 - product: None - runner: intel_adsp - serial_pty: "/home/user/zephyrproject/zephyr/soc/xtensa/intel_adsp/tools/cavstool_client.py,-s,192.168.1.4,--log-port,54321,-l" - runner_params: - - --remote-host=192.168.1.4 - - --tool-opt=--req-port - - --tool-opt=12345 - - -And another simplified form of the port specifying is to use {host}:{port} -for the --remote-host of the runner params and -s of the serial-pty, Ex. - -.. code-block:: console - - - connected: true - id: None - platform: intel_adsp_cavs25 - product: None - runner: intel_adsp - serial_pty: "/home/user/zephyrproject/zephyr/soc/xtensa/intel_adsp/tools/cavstool_client.py,-s,192.168.1.4:54321,-l" - runner_params: - - --remote-host=192.168.1.4:12345 - - -Then you can run twister with fewer parameters: - -.. code-block:: console - - twister --hardware-map ./cavs.map --device-testing -T samples/hello_world -vv - - -And below example of the hardware map file shows you how to run tests in -mulitple boards: - -.. code-block:: console - - - connected: true - id: None - platform: intel_adsp_cavs15 - product: None - runner: intel_adsp - serial_pty: "/home/user/zephyrproject/zephyr/soc/xtensa/intel_adsp/tools/cavstool_client.py,-s,192.168.1.2,-l" - runner_params: - - --remote-host=192.168.1.2 - - - connected: true - id: None - platform: intel_adsp_cavs18 - product: None - runner: intel_adsp - serial_pty: "/home/user/zephyrproject/zephyr/soc/xtensa/intel_adsp/tools/cavstool_client.py,-s,192.168.1.3,-l" - runner_params: - - --remote-host=192.168.1.3 - - - connected: true - id: None - platform: intel_adsp_cavs25 - product: None - runner: intel_adsp - serial_pty: "/home/user/zephyrproject/zephyr/soc/xtensa/intel_adsp/tools/cavstool_client.py,-s,192.168.1.4,-l" - runner_params: - - --remote-host=192.168.1.4 - -If you don't want to run certain platform in this file, just make -the "connected" field from "true" to "false", it will be skip. - -Again, if you don't use the default location of the SOF tools, you -can remove the --rimage-tool, --config-dir and --key in the extra_params -field. For example: - -.. code-block:: console - - - connected: true - id: None - platform: intel_adsp_cavs25 - product: None - runner: intel_adsp - serial_pty: "/home/user/zephyrproject/zephyr/soc/xtensa/intel_adsp/tools/cavstool_client.py,-s,192.168.1.4,-l" - runner_params: - - --remote-host=192.168.1.4 - - --rimage-tool=/home/user/sof/rimage/rimage - - --config-dir=/home/user/sof/rimage/config/ - - --key=/home/user/sof/keys/otc_private_key_3k.pem - - -To run multiple boards does also work when specifying the ports. - - -Passing extra parameter to tools -******************************** - -wwe can pass parameters to run/require service by the --tool-opt -option. This is for possible extending in the future. For example: - -.. code-block:: console - - west flash --remote-host=192.168.0.1 --pty=192.168.0.1 \ - --tool-opt=--arg='white space' --tool-opt=-r --tool-opt=12345 - -That means our optional parameters will be parsed as: - -.. code-block:: console - - ['--arg=white space', '-r', '12345'] - -Then cavs request service tool can get them. diff --git a/boards/xtensa/intel_adsp_cavs18/intel_adsp_cavs18.dts b/boards/xtensa/intel_adsp_cavs18/intel_adsp_cavs18.dts deleted file mode 100644 index bc10080c7cb5..000000000000 --- a/boards/xtensa/intel_adsp_cavs18/intel_adsp_cavs18.dts +++ /dev/null @@ -1,19 +0,0 @@ -/* - * Copyright (c) 2020 Intel Corporation - * - * SPDX-License-Identifier: Apache-2.0 - */ - -/dts-v1/; - -#include - -/ { - model = "intel_adsp_cavs18"; - compatible = "intel"; - - chosen { - zephyr,sram = &sram0; - zephyr,console = &mem_window3; - }; -}; diff --git a/boards/xtensa/intel_adsp_cavs18/intel_adsp_cavs18.yaml b/boards/xtensa/intel_adsp_cavs18/intel_adsp_cavs18.yaml deleted file mode 100644 index 1a71593b3f59..000000000000 --- a/boards/xtensa/intel_adsp_cavs18/intel_adsp_cavs18.yaml +++ /dev/null @@ -1,11 +0,0 @@ -identifier: intel_adsp_cavs18 -name: cAVS 1.8 Audio DSP (converged Audio Voice and Speech) -type: mcu -arch: xtensa -toolchain: - - xcc - - zephyr -testing: - ignore_tags: - - net - - bluetooth diff --git a/boards/xtensa/intel_adsp_cavs18/intel_adsp_cavs18_defconfig b/boards/xtensa/intel_adsp_cavs18/intel_adsp_cavs18_defconfig deleted file mode 100644 index 4162fc810b86..000000000000 --- a/boards/xtensa/intel_adsp_cavs18/intel_adsp_cavs18_defconfig +++ /dev/null @@ -1,20 +0,0 @@ -# SPDX-License-Identifier: Apache-2.0 - -CONFIG_MAIN_STACK_SIZE=2048 - -CONFIG_SOC_INTEL_CAVS_V18=y -CONFIG_BOARD_INTEL_ADSP_CAVS18=y -CONFIG_SOC_SERIES_INTEL_ADSP_CAVS=y - -CONFIG_GEN_ISR_TABLES=y -CONFIG_GEN_IRQ_VECTOR_TABLE=n - -CONFIG_XTENSA_RESET_VECTOR=y - -CONFIG_XTENSA_USE_CORE_CRT1=y - -CONFIG_MULTI_LEVEL_INTERRUPTS=y -CONFIG_2ND_LEVEL_INTERRUPTS=y - -CONFIG_BUILD_OUTPUT_BIN=n -CONFIG_CLEANUP_INTERMEDIATE_FILES=y diff --git a/boards/xtensa/intel_adsp_cavs20/Kconfig.board b/boards/xtensa/intel_adsp_cavs20/Kconfig.board deleted file mode 100644 index db1cf9e7648f..000000000000 --- a/boards/xtensa/intel_adsp_cavs20/Kconfig.board +++ /dev/null @@ -1,12 +0,0 @@ -# Xtensa board configuration - -# Copyright (c) 2020,2022 Intel Corporation -# SPDX-License-Identifier: Apache-2.0 - -config BOARD_INTEL_ADSP_CAVS20 - bool "Intel ADSP CAVS 2.0 for Ice Lake" - depends on SOC_SERIES_INTEL_ADSP_CAVS - -config BOARD_INTEL_ADSP_CAVS20_JSL - bool "Intel ADSP CAVS 2.0 for Jasper Lake" - depends on SOC_SERIES_INTEL_ADSP_CAVS diff --git a/boards/xtensa/intel_adsp_cavs20/Kconfig.defconfig b/boards/xtensa/intel_adsp_cavs20/Kconfig.defconfig deleted file mode 100644 index 6333bee5f353..000000000000 --- a/boards/xtensa/intel_adsp_cavs20/Kconfig.defconfig +++ /dev/null @@ -1,39 +0,0 @@ -# Copyright (c) 2020,2022 Intel Corporation -# -# SPDX-License-Identifier: Apache-2.0 - -if BOARD_INTEL_ADSP_CAVS20 || BOARD_INTEL_ADSP_CAVS20_JSL - -config BOARD - default "intel_adsp_cavs20" if BOARD_INTEL_ADSP_CAVS20 - default "intel_adsp_cavs20_jsl" if BOARD_INTEL_ADSP_CAVS20_JSL - -config CAVS_ICTL_0_OFFSET - default 6 -config CAVS_ICTL_1_OFFSET - default 10 -config CAVS_ICTL_2_OFFSET - default 13 -config CAVS_ICTL_3_OFFSET - default 16 - -config 2ND_LVL_INTR_00_OFFSET - default CAVS_ICTL_0_OFFSET -config 2ND_LVL_INTR_01_OFFSET - default CAVS_ICTL_1_OFFSET -config 2ND_LVL_INTR_02_OFFSET - default CAVS_ICTL_2_OFFSET -config 2ND_LVL_INTR_03_OFFSET - default CAVS_ICTL_3_OFFSET - -config MAX_IRQ_PER_AGGREGATOR - default 32 -config NUM_2ND_LEVEL_AGGREGATORS - default 4 -config 2ND_LVL_ISR_TBL_OFFSET - default 21 - -config CAVS_ISR_TBL_OFFSET - default 2ND_LVL_ISR_TBL_OFFSET - -endif # BOARD_INTEL_ADSP_CAVS20 || BOARD_INTEL_ADSP_CAVS20_JSL diff --git a/boards/xtensa/intel_adsp_cavs20/board.cmake b/boards/xtensa/intel_adsp_cavs20/board.cmake deleted file mode 100644 index 60cead48c2f6..000000000000 --- a/boards/xtensa/intel_adsp_cavs20/board.cmake +++ /dev/null @@ -1,20 +0,0 @@ -# SPDX-License-Identifier: Apache-2.0 - -if($ENV{CAVS_OLD_FLASHER}) - board_set_flasher_ifnset(misc-flasher) - board_finalize_runner_args(misc-flasher) -endif() - -board_set_flasher_ifnset(intel_adsp) - -set(RIMAGE_SIGN_KEY otc_private_key.pem) - -if(CONFIG_BOARD_INTEL_ADSP_CAVS20) -board_set_rimage_target(icl) -endif() - -if(CONFIG_BOARD_INTEL_ADSP_CAVS20_JSL) -board_set_rimage_target(jsl) -endif() - -include(${ZEPHYR_BASE}/boards/common/intel_adsp.board.cmake) diff --git a/boards/xtensa/intel_adsp_cavs20/intel_adsp_cavs20.dts b/boards/xtensa/intel_adsp_cavs20/intel_adsp_cavs20.dts deleted file mode 100644 index da7bd5375c6a..000000000000 --- a/boards/xtensa/intel_adsp_cavs20/intel_adsp_cavs20.dts +++ /dev/null @@ -1,19 +0,0 @@ -/* - * Copyright (c) 2020 Intel Corporation - * - * SPDX-License-Identifier: Apache-2.0 - */ - -/dts-v1/; - -#include - -/ { - model = "intel_adsp_cavs20"; - compatible = "intel"; - - chosen { - zephyr,sram = &sram0; - zephyr,console = &mem_window3; - }; -}; diff --git a/boards/xtensa/intel_adsp_cavs20/intel_adsp_cavs20.yaml b/boards/xtensa/intel_adsp_cavs20/intel_adsp_cavs20.yaml deleted file mode 100644 index f1926df6687b..000000000000 --- a/boards/xtensa/intel_adsp_cavs20/intel_adsp_cavs20.yaml +++ /dev/null @@ -1,11 +0,0 @@ -identifier: intel_adsp_cavs20 -name: cAVS 2.0 Audio DSP (converged Audio Voice and Speech) -type: mcu -arch: xtensa -toolchain: - - xcc - - zephyr -testing: - ignore_tags: - - net - - bluetooth diff --git a/boards/xtensa/intel_adsp_cavs20/intel_adsp_cavs20_defconfig b/boards/xtensa/intel_adsp_cavs20/intel_adsp_cavs20_defconfig deleted file mode 100644 index c7b81a44ce2a..000000000000 --- a/boards/xtensa/intel_adsp_cavs20/intel_adsp_cavs20_defconfig +++ /dev/null @@ -1,20 +0,0 @@ -# SPDX-License-Identifier: Apache-2.0 - -CONFIG_MAIN_STACK_SIZE=2048 - -CONFIG_SOC_INTEL_CAVS_V20=y -CONFIG_BOARD_INTEL_ADSP_CAVS20=y -CONFIG_SOC_SERIES_INTEL_ADSP_CAVS=y - -CONFIG_GEN_ISR_TABLES=y -CONFIG_GEN_IRQ_VECTOR_TABLE=n - -CONFIG_XTENSA_RESET_VECTOR=y - -CONFIG_XTENSA_USE_CORE_CRT1=y - -CONFIG_MULTI_LEVEL_INTERRUPTS=y -CONFIG_2ND_LEVEL_INTERRUPTS=y - -CONFIG_BUILD_OUTPUT_BIN=n -CONFIG_CLEANUP_INTERMEDIATE_FILES=y diff --git a/boards/xtensa/intel_adsp_cavs20/intel_adsp_cavs20_jsl.dts b/boards/xtensa/intel_adsp_cavs20/intel_adsp_cavs20_jsl.dts deleted file mode 100644 index fb3fd820f052..000000000000 --- a/boards/xtensa/intel_adsp_cavs20/intel_adsp_cavs20_jsl.dts +++ /dev/null @@ -1,19 +0,0 @@ -/* - * Copyright (c) 2020 Intel Corporation - * - * SPDX-License-Identifier: Apache-2.0 - */ - -/dts-v1/; - -#include - -/ { - model = "intel_adsp_cavs20_jsl"; - compatible = "intel"; - - chosen { - zephyr,sram = &sram0; - zephyr,console = &mem_window3; - }; -}; diff --git a/boards/xtensa/intel_adsp_cavs20/intel_adsp_cavs20_jsl.yaml b/boards/xtensa/intel_adsp_cavs20/intel_adsp_cavs20_jsl.yaml deleted file mode 100644 index b458abec9568..000000000000 --- a/boards/xtensa/intel_adsp_cavs20/intel_adsp_cavs20_jsl.yaml +++ /dev/null @@ -1,11 +0,0 @@ -identifier: intel_adsp_cavs20_jsl -name: cAVS 2.0 Audio DSP for Intel Jasper Lake (converged Audio Voice and Speech) -type: mcu -arch: xtensa -toolchain: - - xcc - - zephyr -testing: - ignore_tags: - - net - - bluetooth diff --git a/boards/xtensa/intel_adsp_cavs20/intel_adsp_cavs20_jsl_defconfig b/boards/xtensa/intel_adsp_cavs20/intel_adsp_cavs20_jsl_defconfig deleted file mode 100644 index fc1aba94ded0..000000000000 --- a/boards/xtensa/intel_adsp_cavs20/intel_adsp_cavs20_jsl_defconfig +++ /dev/null @@ -1,21 +0,0 @@ -# SPDX-License-Identifier: Apache-2.0 - -CONFIG_MAIN_STACK_SIZE=2048 - -CONFIG_SOC_INTEL_CAVS_V20=y -CONFIG_BOARD_INTEL_ADSP_CAVS20_JSL=y -CONFIG_SOC_SERIES_INTEL_ADSP_CAVS=y - - -CONFIG_GEN_ISR_TABLES=y -CONFIG_GEN_IRQ_VECTOR_TABLE=n - -CONFIG_XTENSA_RESET_VECTOR=y - -CONFIG_XTENSA_USE_CORE_CRT1=y - -CONFIG_MULTI_LEVEL_INTERRUPTS=y -CONFIG_2ND_LEVEL_INTERRUPTS=y - -CONFIG_BUILD_OUTPUT_BIN=n -CONFIG_CLEANUP_INTERMEDIATE_FILES=y diff --git a/boards/xtensa/intel_adsp_cavs25/board.cmake b/boards/xtensa/intel_adsp_cavs25/board.cmake index 0cde704d84fe..8d7f36e07bd2 100644 --- a/boards/xtensa/intel_adsp_cavs25/board.cmake +++ b/boards/xtensa/intel_adsp_cavs25/board.cmake @@ -7,7 +7,7 @@ endif() board_set_flasher_ifnset(intel_adsp) -set(RIMAGE_SIGN_KEY otc_private_key_3k.pem) +set(RIMAGE_SIGN_KEY "otc_private_key_3k.pem" CACHE STRING "default in cavs25/board.cmake") if(CONFIG_BOARD_INTEL_ADSP_CAVS25) board_set_rimage_target(tgl) diff --git a/boards/xtensa/intel_adsp_cavs25/doc/chromebooks_adsp.rst b/boards/xtensa/intel_adsp_cavs25/doc/chromebooks_adsp.rst new file mode 100644 index 000000000000..867df7b83897 --- /dev/null +++ b/boards/xtensa/intel_adsp_cavs25/doc/chromebooks_adsp.rst @@ -0,0 +1,417 @@ +:orphan: + +.. _zephyr-audio-dsp-development-on-chromebooks: + +Zephyr Audio DSP Development on Chromebooks +########################################### + +The Audio DSP on Intel Chromebooks is configured to use the SOF +"Community" key for firmware signing, and can therefore accept +arbitrary user-developed firmware like Zephyr applications (of which +SOF is one), including the Zephyr samples and test suite. + +Initial TGL Chromebook Setup +**************************** + +(These instructions were written specifically to the Asus Flip CX5 +device code named "delbin". But they should be reasonably applicable +to any recent Intel device.) + +Power the device on and connect it to a wireless network. It will +likely want to download a firmware update (mine did). Let this finish +first, to ensure you have two working OS images. + +Enable Developer Mode +===================== + +Power the device off (menu in lower right, or hold the power button +on the side) + +Hold Esc + Refresh (the arrow-in-a-circle "reload" key above "3") and +hit the power key to enter recovery mode. Note: the touchscreen and +pad don't work in recovery mode, use the arrow keys to navigate. + +Select "Advanced Options", then "Enable Developer Mode" and confirm +that you really mean it. Select "Boot from Internal Storage" at the +bootloader screen. You will see this screen every time the machine +boots now, telling you that the boot is unverified. + +Wait while the device does the required data wipe. My device takes +about 15 minutes to completely write the stateful partition. On +reboot, select "Boot from Internal Storage" again and set it up +(again) with Google account. + +Make a Recovery Drive +===================== + +You will at some point wreck your device and need a recovery stick. +Install the Chromebook Recovery Utility from the Google Web Store and +make one. + +You can actually do this on any machine (and any OS) with Chrome +installed, but it's easiest on the Chromebook because it knows its +device ID (for example "DELBIN-XHVI D4B-H4D-G4G-Q9A-A9P" for the Asus +Tiger Lake board). Note that recovery, when it happens, will not +affect developer mode or firmware settings but it **will wipe out the +root filesystem and /usr/local customizations you have made**. So +plan on a strategy that can tolerate data loss on the device you're +messing with! + +Make the root filesystem writable +================================= + +For security, ChromeOS signs and cryptographically verifies (using +Linux's dm-verity feature) all access to the read-only root +filesystem. Mucking with the rootfs (for example, to install modules +for a custom kernel) requires that the dm-verity layer be turned off: + +First open a terminal with Ctrl-Alt-T. Then at the "crosh> " prompt +issue the "shell" command to get a shell running as the "chronos" +user. Finally (in developer mode) a simple "sudo su -" will get you a +root prompt. + +.. code-block:: console + + crosh> shell + chronos@localhost / $ sudo su - + localhost ~ # + +Now you need to turn of signature verification in the bootloader +(because obviously we'll be breaking whatever signature existed). +Note that signature verification is something done by the ROM +bootloader, not the OS, and this setting is a (developer-mode-only) +directive to that code: + +.. code-block:: console + + cros# crossystem dev_boot_signed_only=0 + +(*Note: for clarity, commands in this document entered at the ChromeOS +core shell will be prefixed with a hostname of cros.*) + +Next you disable the validation step: + +.. code-block:: console + + cros# /usr/share/vboot/bin/make_dev_ssd.sh --remove_rootfs_verification + +**THIS COMMAND WILL FAIL**, give you an error that you are changing +the setting for the entire running system, and suggest an alternative +"--partitions X" argument to use that modifies only the currently used +partition. Run that modified command, then reboot. + +After rebooting, you will notice that your chromebook boots with the +raw storage device (e.g. /dev/nvme0n1p5) mounted as root and not the +"dm-0" verity device, and that the rootfs is read-write. + +Note: What this command actually does is modify the command line of +the installed kernel image (it saves a backup in +/mnt/stateful_partition/cros_sign_backups) so that it specifies +"root=" and not "root=dm-0". It does seem to leave the other +verity configuration in place though, it just doesn't try to mount the +resulting (now-invalid!) partition. + +Metanote: The astute will note that we're probably going to throw this +kernel out, and that we could probably have just edited the command +line of the new kernel instead of flashing and rebooting into this +modified one. But that's too many balls to juggle at once for me. + +Enable ChromeOS SSH +=================== + +Once you are booted with a writable partition, you can turn on the +built-in ssh server with: + +.. code-block:: console + + cros# /usr/libexec/debugd/helpers/dev_features_ssh + +By default neither the "chronos" user nor root accounts have +passwords, so unless you want to type a ssh key in by hand, you +probably want to set a password for the first login (before you run +ssh-copy-id, of course): + +.. code-block:: console + + cros# passwd + +Now ssh into the chromebook and add your key to +``.ssh/authorized_keys`` as you do for any Linux system. + +Install Crouton +*************** + +The Zephyr integration tools require a proper Linux environment and +won't run on ChromeOS's minimal distro. So we need to install a Linux +personality. **DO NOT** bother installing the "Linux Development +Environment" (Crostini) from the ChromeOS Developer settings. This +personality runs inside a VM, where our tools need access to the real +kernel running on the real hardware. Instead install Crouton +(https://github.com/dnschneid/crouton), which is a community +chroot-based personality that preserves access to the real hardware +sysfs and /dev filesystem. These instructions install the "cli-extra" +package list, there are X11-enabled ones available too if you prefer +to work on the device screen directly. See the project page, etc... + +At a root shell, grab the installer and run it (note: /usr/local is +the only writable filesystem without noexec, you must place the binary +there for it to run!): + +.. code-block:: console + + cros# mkdir -p /usr/local/bin + cros# curl -L https://github.com/dnschneid/crouton/raw/master/installer/crouton \ + > /usr/local/bin/crouton + cros# chmod 755 /usr/local/bin/crouton + cros# crouton -r focal -t cli-extra + +Start the Crouton chroot environment: + +.. code-block:: console + + cros# startcli + +Now you are typing commands into the Ubuntu environment. Enable +inbound ssh on Crouton, but on a port other than 22 (which is used for +the native ChromeOS ssh server). I'm using 222 here (which is easy to +remember, and not a registered port in /etc/services): + +.. code-block:: console + + crouton# apt install iptables openssh-server + crouton# echo "Port 222" >> /etc/ssh/sshd_config + crouton# mkdir /run/sshd + crouton# iptables -I INPUT -p tcp --dport 222 -j ACCEPT + crouton# /usr/sbin/sshd + +(*As above: note that we have introduced a hostname of "crouton" to +refer to the separate Linux personality.*) + +NOTE: the mkdir, iptables and sshd commands need to be run every time +the chroot is restarted. You can put them in /etc/rc.local for +convenience. Crouton doesn't run systemd (because it can't -- it +doesn't own the system!) so Ubuntu services like openssh-server don't +know how to start themselves. + +Building and Installing a Custom Kernel +*************************************** + +On your build host, grab a copy of the ChromeOS kernel tree. The +shipping device is using a 5.4 kernel, but the 5.10 tree works for me +and seems to have been backporting upstream drivers such that its main +hardware is all quite recent (5-6 weeks behind mainline or so). We +place it in the home directory here for simplicity: + +.. code-block:: console + + dev$ cd $HOME + dev$ git clone https://chromium.googlesource.com/chromiumos/third_party/kernel + dev$ cd kernel + dev$ git checkout chromeos-5.10 + +(*Once again, we are typing into a different shell. We introduce the +hostname "dev" here to represent the development machine on which you +are building kernels and Zephyr apps. It is possible to do this on the +chromebook directly, but not advisable. Remember the discussion above +about requiring a drive wipe on system recovery!*) + +Note: you probably have an existing Linux tree somewhere already. If +you do it's much faster to add this as a remote there and just fetch +the deltas -- ChromeOS tracks upstream closely. + +Now you need a .config file. The Chromebook kernel ships with the +"configs" module built which exposes this in the running kernel. You +just have to load the module and read the file. + +.. code-block:: console + + dev$ cd /path/to/kernel + dev$ ssh root@cros modprobe configs + dev$ ssh root@cros zcat /proc/config.gz > .config + +You will need to set some custom configuration variables differently +from ChromeOS defaults (you can edit .config directly, or use +menuconfig, etc...): + ++ ``CONFIG_HUGETLBFS=y`` - The Zephyr loader tool requires this ++ ``CONFIG_EXTRA_FIRMWARE_DIR=n`` - This refers to a build directory + in Google's build environment that we will not have. ++ ``CONFIG_SECURITY_LOADPIN=n`` - Pins modules such that they will + only load from one filesystem. Annoying restriction for custom + kernels. ++ ``CONFIG_MODVERSIONS=n`` - Allow modules to be built and installed + from modified "dirty" build trees. + +Now build your kernel just as you would any other: + +.. code-block:: console + + dev$ make olddefconfig # Or otherwise update .config + dev$ make bzImage modules # Probably want -j for parallel build + +The modules you can copy directly to the (now writable) rootfs on the +device. Note that this filesystem has very limited space (it's +intended to be read only), so the INSTALL_MOD_STRIP=1 is absolutely +required, and you may find you need to regularly prune modules from +older kernels to make space: + +.. code-block:: console + + dev$ make INSTALL_MOD_PATH=mods INSTALL_MOD_STRIP=1 modules_install + dev$ (cd mods/lib/modules; tar cf - .) | ssh root@cros '(cd /lib/modules; tar xfv -)' + +Pack and Install ChromeOS Kernel Image +====================================== + +The kernel bzImage file itself needs to be signed and packaged into a +ChromeOS vboot package and written directly to the kernel partition. +Thankfully the tools to do this are shipped in Debian/Ubuntu +repositories already: + +.. code-block:: console + + $ sudo apt install vboot-utils vboot-kernel-utils + +Find the current kernel partition on the device. You can get this by +comparing the "kernel_guid" command line parameter (passed by the +bootloader) with the partition table of the boot drive, for example: + +.. code-block:: console + + dev$ KPART=`ssh root@cros 'fdisk -l -o UUID,Device /dev/nvme0n1 | \ + grep -i $(sed "s/.*kern_guid=//" /proc/cmdline \ + | sed "s/ .*//") \ + | sed "s/.* //"'` + dev$ echo $KPART + /dev/nvme0n1p4 + +Extract the command line from that image into a local file: + +.. code-block:: console + + dev$ ssh root@cros vbutil_kernel --verify /dev/$KPART | tail -1 > cmdline.txt + +Now you can pack a new kernel image using the vboot tooling. Most of +these arguments are boilerplate and always the same. The keys are +there because the boot requires a valid signature, even though as +configured it won't use it. Note the cannot-actually-be-empty dummy +file passed as a "bootloader", which is a holdover from previous ROM +variants which needed an EFI stub. + +.. code-block:: console + + dev$ echo dummy > dummy.efi + dev$ vbutil_kernel --pack kernel.img --config cmdline.txt \ + --vmlinuz arch/x86_64/boot/bzImage \ + --keyblock /usr/share/vboot/devkeys/kernel.keyblock \ + --signprivate /usr/share/vboot/devkeys/kernel_data_key.vbprivk \ + --version 1 --bootloader dummy.efi --arch x86_64 + +You can verify this image if you like with "vbutil_kernel --verify". + +Now just copy up the file and write it to the partition on the device: + +.. code-block:: console + + $ scp kernel.img root@cros:/tmp + $ ssh root@cros dd if=/tmp/kernel.img of=/dev/nvme0n1p4 + +Now reboot, and if all goes well you will find yourself running in +your new kernel. + +Wifi Firmware Fixup +=================== + +On the Tiger Lake Chromebook, the /lib/firmware tree is a bit stale +relative to the current 5.10 kernel. The iwlwifi driver requests a +firmware file that doesn't exist, leading to a device with no network. +It's a simple problem, but a catastrophic drawback if uncorrected. It +seems to be sufficient just to link the older version to the new name. +(It would probably be better to copy the proper version from +/lib/firmware from a recent kernel.org checkout.): + +.. code-block:: console + + cros# cd /lib/firmware + cros# ln -s iwlwifi-QuZ-a0-hr-b0-62.ucode iwlwifi-QuZ-a0-hr-b0-64.ucode + +Build and Run a Zephyr Application +********************************** + +Finally, with your new kernel booted, you are ready to run Zephyr +code. + +Build rimage Signing Tool +========================= + +First download and build a copy of the Sound Open Firmware "rimage" +tool (these instructions put it in your home directory for clarity, +but anywhere is acceptable): + +.. code-block:: console + + dev$ cd $HOME + dev$ git clone https://github.com/thesofproject/rimage + dev$ cd rimage/ + dev$ git submodule init + dev$ git submodule update + dev$ cmake . + dev$ make + +Copy Integration Scripting to Chromebook +======================================== + +There is a python scripts needed on the device, to be run inside +the Crouton environment installed above. Copy them: + +.. code-block:: console + + dev$ scp soc/xtensa/intel_adsp/tools/cavstool.py user@crouton: + +Then start the service in the Crouton environment: + +.. code-block:: console + + crouton$ sudo ./cavstool.py user@crouton: + + +Build and Sign Zephyr App +========================= + +Zephyr applications build conventionally for this platform, and are +signed with "west flash" with just a few extra arguments. Note that +the key in use for the Tiger Lake DSP is the "3k" key from SOF, not +the original that is used with older hardware. The output artifact is +a "zephyr.ri" file to be copied to the device. + +.. code-block:: console + + dev$ west build -b intel_adsp_cavs25 samples/hello_world + dev$ west sign --tool-data=~/rimage/config -t ~/rimage/rimage -- \ + -k $ZEPHYR_BASE/../modules/audio/sof/keys/otc_private_key_3k.pem + +Run it! +======= + +The loader script takes the signed rimage file as its argument. Once +it reports success, the application begins running immediately and its +console output (in the SOF shared memory trace buffer) can be read by +the logging script. + +.. code-block:: console + + dev$ west flash --remote-host crouton + Hello World! intel_adsp_cavs25 + +Misc References +*************** + +Upstream documentation from which these instructions were drawn: + +This page has the best reference for the boot process: + +http://www.chromium.org/chromium-os/chromiumos-design-docs/disk-format + +This is great too, with an eye toward booting things other than ChromeOS: + +https://www.chromium.org/chromium-os/developer-information-for-chrome-os-devices/custom-firmware diff --git a/boards/xtensa/intel_adsp_cavs25/doc/index.rst b/boards/xtensa/intel_adsp_cavs25/doc/index.rst index 31a121054bb0..437560562e09 100644 --- a/boards/xtensa/intel_adsp_cavs25/doc/index.rst +++ b/boards/xtensa/intel_adsp_cavs25/doc/index.rst @@ -1,415 +1,34 @@ -.. _zephyr-audio-dsp-development-on-chromebooks: +.. _intel_adsp_cavs25: -Zephyr Audio DSP Development on Chromebooks -########################################### +Intel ADSP CAVS 2.5 +################### -The Audio DSP on Intel Chromebooks is configured to use the SOF -"Community" key for firmware signing, and can therefore accept -arbitrary user-developed firmware like Zephyr applications (of which -SOF is one), including the Zephyr samples and test suite. +Overview +******** -Initial TGL Chromebook Setup -**************************** +This board configuration is used to run Zephyr on the Intel CAVS 2.5 Audio DSP. +This configuration is present, for example, on Intel `Tiger Lake`_ microprocessors. +Refer to :ref:`intel_adsp_generic` for more details on Intel ADSP ACE and CAVS. -(These instructions were written specifically to the Asus Flip CX5 -device code named "delbin". But they should be reasonably applicable -to any recent Intel device.) +System requirements +******************* -Power the device on and connect it to a wireless network. It will -likely want to download a firmware update (mine did). Let this finish -first, to ensure you have two working OS images. +Xtensa Toolchain +---------------- -Enable Developer Mode -===================== +If you choose to build with the Xtensa toolchain instead of the Zephyr SDK, set +the following environment variables specific to the board in addition to the +Xtensa toolchain environment variables listed in :ref:`intel_adsp_generic`. -Power the device off (menu in lower right, or hold the power button -on the side) +.. code-block:: shell -Hold Esc + Refresh (the arrow-in-a-circle "reload" key above "3") and -hit the power key to enter recovery mode. Note: the touchscreen and -pad don't work in recovery mode, use the arrow keys to navigate. + export TOOLCHAIN_VER=RG-2017.8-linux + export XTENSA_CORE=cavs2x_LX6HiFi3_2017_8 -Select "Advanced Options", then "Enable Developer Mode" and confirm -that you really mean it. Select "Boot from Internal Storage" at the -bootloader screen. You will see this screen every time the machine -boots now, telling you that the boot is unverified. +Programming and Debugging +************************* -Wait while the device does the required data wipe. My device takes -about 15 minutes to completely write the stateful partition. On -reboot, select "Boot from Internal Storage" again and set it up -(again) with Google account. +Refer to :ref:`intel_adsp_generic` for generic instructions on programming and +debugging applicable to all CAVS and ACE platforms. -Make a Recovery Drive -===================== - -You will at some point wreck your device and need a recovery stick. -Install the Chromebook Recovery Utility from the Google Web Store and -make one. - -You can actually do this on any machine (and any OS) with Chrome -installed, but it's easiest on the Chromebook because it knows its -device ID (for example "DELBIN-XHVI D4B-H4D-G4G-Q9A-A9P" for the Asus -Tiger Lake board). Note that recovery, when it happens, will not -affect developer mode or firmware settings but it **will wipe out the -root filesystem and /usr/local customizations you have made**. So -plan on a strategy that can tolerate data loss on the device you're -messing with! - -Make the root filesystem writable -================================= - -For security, ChromeOS signs and cryptographically verifies (using -Linux's dm-verity feature) all access to the read-only root -filesystem. Mucking with the rootfs (for example, to install modules -for a custom kernel) requires that the dm-verity layer be turned off: - -First open a terminal with Ctrl-Alt-T. Then at the "crosh> " prompt -issue the "shell" command to get a shell running as the "chronos" -user. Finally (in developer mode) a simple "sudo su -" will get you a -root prompt. - -.. code-block:: console - - crosh> shell - chronos@localhost / $ sudo su - - localhost ~ # - -Now you need to turn of signature verification in the bootloader -(because obviously we'll be breaking whatever signature existed). -Note that signature verification is something done by the ROM -bootloader, not the OS, and this setting is a (developer-mode-only) -directive to that code: - -.. code-block:: console - - cros# crossystem dev_boot_signed_only=0 - -(*Note: for clarity, commands in this document entered at the ChromeOS -core shell will be prefixed with a hostname of cros.*) - -Next you disable the validation step: - -.. code-block:: console - - cros# /usr/share/vboot/bin/make_dev_ssd.sh --remove_rootfs_verification - -**THIS COMMAND WILL FAIL**, give you an error that you are changing -the setting for the entire running system, and suggest an alternative -"--partitions X" argument to use that modifies only the currently used -partition. Run that modified command, then reboot. - -After rebooting, you will notice that your chromebook boots with the -raw storage device (e.g. /dev/nvme0n1p5) mounted as root and not the -"dm-0" verity device, and that the rootfs is read-write. - -Note: What this command actually does is modify the command line of -the installed kernel image (it saves a backup in -/mnt/stateful_partition/cros_sign_backups) so that it specifies -"root=" and not "root=dm-0". It does seem to leave the other -verity configuration in place though, it just doesn't try to mount the -resulting (now-invalid!) partition. - -Metanote: The astute will note that we're probably going to throw this -kernel out, and that we could probably have just edited the command -line of the new kernel instead of flashing and rebooting into this -modified one. But that's too many balls to juggle at once for me. - -Enable ChromeOS SSH -=================== - -Once you are booted with a writable partition, you can turn on the -built-in ssh server with: - -.. code-block:: console - - cros# /usr/libexec/debugd/helpers/dev_features_ssh - -By default neither the "chronos" user nor root accounts have -passwords, so unless you want to type a ssh key in by hand, you -probably want to set a password for the first login (before you run -ssh-copy-id, of course): - -.. code-block:: console - - cros# passwd - -Now ssh into the chromebook and add your key to -``.ssh/authorized_keys`` as you do for any Linux system. - -Install Crouton -*************** - -The Zephyr integration tools require a proper Linux environment and -won't run on ChromeOS's minimal distro. So we need to install a Linux -personality. **DO NOT** bother installing the "Linux Development -Environment" (Crostini) from the ChromeOS Developer settings. This -personality runs inside a VM, where our tools need access to the real -kernel running on the real hardware. Instead install Crouton -(https://github.com/dnschneid/crouton), which is a community -chroot-based personality that preserves access to the real hardware -sysfs and /dev filesystem. These instructions install the "cli-extra" -package list, there are X11-enabled ones available too if you prefer -to work on the device screen directly. See the project page, etc... - -At a root shell, grab the installer and run it (note: /usr/local is -the only writable filesystem without noexec, you must place the binary -there for it to run!): - -.. code-block:: console - - cros# mkdir -p /usr/local/bin - cros# curl -L https://github.com/dnschneid/crouton/raw/master/installer/crouton \ - > /usr/local/bin/crouton - cros# chmod 755 /usr/local/bin/crouton - cros# crouton -r focal -t cli-extra - -Start the Crouton chroot environment: - -.. code-block:: console - - cros# startcli - -Now you are typing commands into the Ubuntu environment. Enable -inbound ssh on Crouton, but on a port other than 22 (which is used for -the native ChromeOS ssh server). I'm using 222 here (which is easy to -remember, and not a registered port in /etc/services): - -.. code-block:: console - - crouton# apt install iptables openssh-server - crouton# echo "Port 222" >> /etc/ssh/sshd_config - crouton# mkdir /run/sshd - crouton# iptables -I INPUT -p tcp --dport 222 -j ACCEPT - crouton# /usr/sbin/sshd - -(*As above: note that we have introduced a hostname of "crouton" to -refer to the separate Linux personality.*) - -NOTE: the mkdir, iptables and sshd commands need to be run every time -the chroot is restarted. You can put them in /etc/rc.local for -convenience. Crouton doesn't run systemd (because it can't -- it -doesn't own the system!) so Ubuntu services like openssh-server don't -know how to start themselves. - -Building and Installing a Custom Kernel -*************************************** - -On your build host, grab a copy of the ChromeOS kernel tree. The -shipping device is using a 5.4 kernel, but the 5.10 tree works for me -and seems to have been backporting upstream drivers such that its main -hardware is all quite recent (5-6 weeks behind mainline or so). We -place it in the home directory here for simplicity: - -.. code-block:: console - - dev$ cd $HOME - dev$ git clone https://chromium.googlesource.com/chromiumos/third_party/kernel - dev$ cd kernel - dev$ git checkout chromeos-5.10 - -(*Once again, we are typing into a different shell. We introduce the -hostname "dev" here to represent the development machine on which you -are building kernels and Zephyr apps. It is possible to do this on the -chromebook directly, but not advisable. Remember the discussion above -about requiring a drive wipe on system recovery!*) - -Note: you probably have an existing Linux tree somewhere already. If -you do it's much faster to add this as a remote there and just fetch -the deltas -- ChromeOS tracks upstream closely. - -Now you need a .config file. The Chromebook kernel ships with the -"configs" module built which exposes this in the running kernel. You -just have to load the module and read the file. - -.. code-block:: console - - dev$ cd /path/to/kernel - dev$ ssh root@cros modprobe configs - dev$ ssh root@cros zcat /proc/config.gz > .config - -You will need to set some custom configuration variables differently -from ChromeOS defaults (you can edit .config directly, or use -menuconfig, etc...): - -+ ``CONFIG_HUGETLBFS=y`` - The Zephyr loader tool requires this -+ ``CONFIG_EXTRA_FIRMWARE_DIR=n`` - This refers to a build directory - in Google's build environment that we will not have. -+ ``CONFIG_SECURITY_LOADPIN=n`` - Pins modules such that they will - only load from one filesystem. Annoying restriction for custom - kernels. -+ ``CONFIG_MODVERSIONS=n`` - Allow modules to be built and installed - from modified "dirty" build trees. - -Now build your kernel just as you would any other: - -.. code-block:: console - - dev$ make olddefconfig # Or otherwise update .config - dev$ make bzImage modules # Probably want -j for parallel build - -The modules you can copy directly to the (now writable) rootfs on the -device. Note that this filesystem has very limited space (it's -intended to be read only), so the INSTALL_MOD_STRIP=1 is absolutely -required, and you may find you need to regularly prune modules from -older kernels to make space: - -.. code-block:: console - - dev$ make INSTALL_MOD_PATH=mods INSTALL_MOD_STRIP=1 modules_install - dev$ (cd mods/lib/modules; tar cf - .) | ssh root@cros '(cd /lib/modules; tar xfv -)' - -Pack and Install ChromeOS Kernel Image -====================================== - -The kernel bzImage file itself needs to be signed and packaged into a -ChromeOS vboot package and written directly to the kernel partition. -Thankfully the tools to do this are shipped in Debian/Ubuntu -repositories already: - -.. code-block:: console - - $ sudo apt install vboot-utils vboot-kernel-utils - -Find the current kernel partition on the device. You can get this by -comparing the "kernel_guid" command line parameter (passed by the -bootloader) with the partition table of the boot drive, for example: - -.. code-block:: console - - dev$ KPART=`ssh root@cros 'fdisk -l -o UUID,Device /dev/nvme0n1 | \ - grep -i $(sed "s/.*kern_guid=//" /proc/cmdline \ - | sed "s/ .*//") \ - | sed "s/.* //"'` - dev$ echo $KPART - /dev/nvme0n1p4 - -Extract the command line from that image into a local file: - -.. code-block:: console - - dev$ ssh root@cros vbutil_kernel --verify /dev/$KPART | tail -1 > cmdline.txt - -Now you can pack a new kernel image using the vboot tooling. Most of -these arguments are boilerplate and always the same. The keys are -there because the boot requires a valid signature, even though as -configured it won't use it. Note the cannot-actually-be-empty dummy -file passed as a "bootloader", which is a holdover from previous ROM -variants which needed an EFI stub. - -.. code-block:: console - - dev$ echo dummy > dummy.efi - dev$ vbutil_kernel --pack kernel.img --config cmdline.txt \ - --vmlinuz arch/x86_64/boot/bzImage \ - --keyblock /usr/share/vboot/devkeys/kernel.keyblock \ - --signprivate /usr/share/vboot/devkeys/kernel_data_key.vbprivk \ - --version 1 --bootloader dummy.efi --arch x86_64 - -You can verify this image if you like with "vbutil_kernel --verify". - -Now just copy up the file and write it to the partition on the device: - -.. code-block:: console - - $ scp kernel.img root@cros:/tmp - $ ssh root@cros dd if=/tmp/kernel.img of=/dev/nvme0n1p4 - -Now reboot, and if all goes well you will find yourself running in -your new kernel. - -Wifi Firmware Fixup -=================== - -On the Tiger Lake Chromebook, the /lib/firmware tree is a bit stale -relative to the current 5.10 kernel. The iwlwifi driver requests a -firmware file that doesn't exist, leading to a device with no network. -It's a simple problem, but a catastrophic drawback if uncorrected. It -seems to be sufficient just to link the older version to the new name. -(It would probably be better to copy the proper version from -/lib/firmware from a recent kernel.org checkout.): - -.. code-block:: console - - cros# cd /lib/firmware - cros# ln -s iwlwifi-QuZ-a0-hr-b0-62.ucode iwlwifi-QuZ-a0-hr-b0-64.ucode - -Build and Run a Zephyr Application -********************************** - -Finally, with your new kernel booted, you are ready to run Zephyr -code. - -Build rimage Signing Tool -========================= - -First download and build a copy of the Sound Open Firmware "rimage" -tool (these instructions put it in your home directory for clarity, -but anywhere is acceptable): - -.. code-block:: console - - dev$ cd $HOME - dev$ git clone https://github.com/thesofproject/rimage - dev$ cd rimage/ - dev$ git submodule init - dev$ git submodule update - dev$ cmake . - dev$ make - -Copy Integration Scripting to Chromebook -======================================== - -There is a python scripts needed on the device, to be run inside -the Crouton environment installed above. Copy them: - -.. code-block:: console - - dev$ scp boards/xtensa/intel_adsp_cavs15/tools/cavstool.py user@crouton: - -Then start the service in the Crouton environment: - -.. code-block:: console - - crouton$ sudo ./cavstool.py user@crouton: - - -Build and Sign Zephyr App -========================= - -Zephyr applications build conventionally for this platform, and are -signed with "west flash" with just a few extra arguments. Note that -the key in use for the Tiger Lake DSP is the "3k" key from SOF, not -the original that is used with older hardware. The output artifact is -a "zephyr.ri" file to be copied to the device. - -.. code-block:: console - - dev$ west build -b intel_adsp_cavs25 samples/hello_world - dev$ west sign --tool-data=~/rimage/config -t ~/rimage/rimage -- \ - -k $ZEPHYR_BASE/../modules/audio/sof/keys/otc_private_key_3k.pem - -Run it! -======= - -The loader script takes the signed rimage file as its argument. Once -it reports success, the application begins running immediately and its -console output (in the SOF shared memory trace buffer) can be read by -the logging script. - -.. code-block:: console - - dev$ west flash --remote-host crouton - Hello World! intel_adsp_cavs25 - -Misc References -*************** - -Upstream documentation from which these instructions were drawn: - -This page has the best reference for the boot process: - -http://www.chromium.org/chromium-os/chromiumos-design-docs/disk-format - -This is great too, with an eye toward booting things other than ChromeOS: - -https://www.chromium.org/chromium-os/developer-information-for-chrome-os-devices/custom-firmware +.. _Tiger Lake: https://www.intel.com/content/www/us/en/products/platforms/details/tiger-lake-h.html diff --git a/boards/xtensa/intel_adsp_cavs25/doc/intel_adsp_generic.rst b/boards/xtensa/intel_adsp_cavs25/doc/intel_adsp_generic.rst new file mode 100644 index 000000000000..50850574ae14 --- /dev/null +++ b/boards/xtensa/intel_adsp_cavs25/doc/intel_adsp_generic.rst @@ -0,0 +1,340 @@ +:orphan: + +.. _intel_adsp_generic: + +Intel ADSP CAVS and ACE +####################### + +Intel's Audio and Digital Signal Processing (ADSP) hardware offerings +include the Converged Audio Video Sensing (CAVS) series and its successor, +the Audio and Context Engine (ACE). These Xtensa-based ADSPs can be integrated +into a variety of Intel products. The below table lists (some of) the Intel +microprocessor(s) that each version of the Intel ADSP is compatible with. + ++----------+-----------------------------+ +| ADSP | Microprocessor | ++==========+=============================+ +| CAVS 1.5 | Apollo Lake | ++----------+-----------------------------+ +| CAVS 1.8 | Whiskey Lake | ++----------+-----------------------------+ +| CAVS 2.5 | Tiger Lake | ++----------+-----------------------------+ +| ACE 1.5 | Meteor Lake | ++----------+-----------------------------+ + +Intel open-sources firmware for its ADSP hardware under the Sound Open Firmware +(`SOF`_) project. SOF can be built with either Zephyr or Cadence's proprietary +Xtensa OS (XTOS) and run on a variety of Intel and non-Intel platforms. + +In general, the Intel `UP2`_ and `UP Xtreme`_ product lines are the publicly +available reference boards for Zephyr's Intel ADSP support. This guide uses the +`UP Xtreme i11-0001 series`_ (:ref:`intel_adsp_cavs25`) board as an example. +However, the instructions are generic and will work on other boards unless +otherwise stated. You will be referred to the documentation for your specific +board in these cases. + +System requirements +******************* + +Setting Up Target Board +----------------------- + +You can only flash Zephyr to the ADSP by using Zephyr's Python tool in a Linux +host running on the board's main CPU. It is possible (and recommended) for users +to build the binary locally on their development machine and flash remotely, +but the board itself must be capable of running the Python script that receives +the binary sent over the network by West and flashes it. You should install a +version of Linux that supports or comes with the current version of Python that +Zephyr requires. Consider using Ubuntu 20.04, which comes with Python 3.8 +installed. + +Note that if you plan to use SOF on your board, you will need to build and +install the modified Linux SOF kernel instead of the default kernel. It is +recommended you follow the `SOF instructions`_ to build and run SOF on Zephyr. + +UP2 and UP Xtreme users can refer to the `UP Community wiki`_ for help installing a +Linux operating system on their board. + +Signing Tool +------------ + +As firmware binary signing is mandatory on Intel products from Skylake onwards, +you will also need to set up the SOF rimage signing tool and key. + +.. code-block:: shell + + cd zephyrproject/modules/audio/sof/ + git clone https://github.com/thesofproject/rimage --recurse-submodules + cd rimage + +Follow the instructions in the :file:`README.md` to build and install the tool +globally on your system. You should be able to invoke the binary from the +command line with the name "rimage". For example: + +.. code-block:: shell + + which rimage + /usr/local/bin/rimage + +If you are unable to install it, you can also pass the path to the tool binary +as an argument to ``west flash``, though this is not recommended. + +Xtensa Toolchain (Optional) +--------------------------- + +The Zephyr SDK provides GCC-based toolchains necessary to build Zephyr for +the CAVS and ACE boards. However, users seeking greater levels of optimization +may desire to build with the proprietary Xtensa toolchain distributed by +`Cadence`_ instead. The following instructions assume you have purchased and +installed the toolchain(s) and core(s) for your board following their +instructions. + +First, make sure to set ``XTENSAD_LICENSE_FILE`` as instructed by Cadence. +Next, set the following environment variables: + +.. code-block:: shell + + export XTENSA_TOOLCHAIN_PATH=$HOME/xtensa/XtDevTools/install/tools + export XTENSA_BUILDS_DIR=$XTENSA_TOOLCHAIN_PATH/../builds + export ZEPHYR_TOOLCHAIN_VARIANT=xcc + export TOOLCHAIN_VER=RG-2017.8-linux + export XTENSA_CORE=cavs2x_LX6HiFi3_2017_8 + +The bottom three variables are specific to each version of CAVS / ACE; refer to +your board's documentation for their values. + +Programming and Debugging +************************* + +Building +-------- + +Build as usual. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: intel_adsp_cavs25 + :goals: build + +Signing +------- + +West automatically signs the binary as the first step of flashing, but if you +need to sign the binary yourself without flashing, you can invoke the west sign +command directly. Read the output of a ``west flash`` command to find the +``west sign`` invocation. You can copy and modify it for your own purposes. + +As mentioned previously, if you're unable to install the rimage tool +globally, you can pass it the path to the tool binary as an argument to +``west flash`` if the flash target exists for your board. To see a list +of all arguments to the Intel ADSP runner, run the following after you have +built the binary. There are multiple arguments related to signing, including a +key argument. + +.. code-block:: console + + west flash --context + +Remote Flashing to CAVS-based ADSP +---------------------------------- + +As mentioned previously, the recommended way to run and monitor the output of +Zephyr on CAVS boards is remotely. The Linux host on the main CPU may freeze up +and need to be restarted if a flash or runtime error occurs on the ADSP. From +this point onward, we will refer to the board as the "remote host" and your +development machine as the "local host". + +Copy the below scripts to the CAVS board. +:zephyr_file:`soc/xtensa/intel_adsp/tools/remote-fw-service.py` will receive +the binary sent over the network by West and invoke +:zephyr_file:`soc/xtensa/intel_adsp/tools/cavstool.py` (referred to as the +"CAVS tool"), which performs the flash and captures the log. Start +:file:`remote-fw-service.py`. + +.. code-block:: console + + scp -r $ZEPHYR_BASE/soc/xtensa/intel_adsp/tools/cavstool.py username@remotehostname + scp -r $ZEPHYR_BASE/soc/xtensa/intel_adsp/tools/remote-fw-service.py username@remotehostname + ssh username@remotehostname + sudo ./remote-fw-service.py + +:file:`remote-fw-service.py` uses ports 9999 and 10000 on the remote host to +communicate. It forwards logs collected by :file:`cavstool.py` on port 9999 +(referred to as its "log port") and services requests on port 10000 +(its "requests port"). When you run West or Twister on your local host, +it sends requests using the :zephyr_file:`soc/xtensa/intel_adsp/tools/cavstool_client.py` +script (referred to as "CAVS tool client"). It also uses ports 9999 and 10000 on +your local host, so be sure those ports are free. + +Flashing with West is simple. + +.. code-block:: console + + west flash --remote-host remotehostname --pty remotehostname + +Running tests with Twister is slightly more complicated. + +.. code-block:: console + + twister -p intel_adsp_cavs25 --device-testing --device-serial-pty="$ZEPHYR_BASE/soc/xtensa/intel_adsp/tools/cavstool_client.py,-s,remotehostname,-l" --west-flash="--remote-host=remotehostname" -T samples/hello_world + +If your network is set up such that the TCP connection from +:file:`cavstool_client.py` to :file:`remote-fw-service.py` is forwarded through +an intermediate host, you may need to tell :file:`cavstool_client.py` to connect +to different ports as well as a different hostname. You can do this by appending +the port numbers to the intermediate host name. + +.. code-block:: console + + west flash --remote-host intermediatehost:reqport --pty remotehostname:logport + twister -p intel_adsp_cavs25 --device-testing --device-serial-pty="$ZEPHYR_BASE/soc/xtensa/intel_adsp/tools/cavstool_client.py,-s,remotehostname:logport,-l" --west-flash="--remote-host=remotehostname:reqport" -T samples/hello_world + +You can also save this information to a hardware map file and pass that to +Twister. + +.. code-block:: console + + twister -p intel_adsp_cavs25 --hardware-map cavs.map --device-testing -T samples/hello_world + +Here's a sample ``cavs.map``: + +.. code-block:: console + + - connected: true + id: None + platform: intel_adsp_cavs25 + product: None + runner: intel_adsp + serial_pty: "/home/zephyrus/zephyrproject/zephyr/soc/xtensa/intel_adsp/tools/cavstool_client.py,-s,remotehostname:logport,-l" + runner_params: + - --remote-host=remotehostname:reqport + +Any of the arguments you would pass to Twister or West, you can pass with the +hardware map. As mentioned previously, you can see the Intel ADSP runner +arguments by passing the ``--context`` flag while flashing with West. + +Refer to :ref:`twister_script` for more information on hardware maps. + +Local Flashing to CAVS-based ADSP +--------------------------------- + +You can also directly flash the signed binary with the CAVS tool on the board. +This may be useful for debugging. + +.. code-block:: console + + sudo ./cavstool.py zephyr.ri + +You should see the following at the end of the log if you are successful: + +.. code-block:: console + + ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx ***** + Hello World! intel_adsp_cavs25 + +Flashing to ACE-based ADSP +-------------------------- + +Flashing is not yet supported for platforms with ACE-based ADSP, as these +platforms are not yet publicly available. + +Debugging +--------- + +As Zephyr doesn't (yet) support GDB for the Intel ADSP platforms, users are +recommended to take advantage of Zephyr's built-in :ref:`coredump` and +:ref:`logging_api` features. + +Troubleshooting +*************** + +You can pass verbose flags directly to the Intel ADSP scripts: + +.. code-block:: console + + sudo ./remote-fw-service.py -v + sudo ./cavstool.py zephyr.ri -v + +To see a list of their arguments: + +.. code-block:: console + + sudo ./remote-fw-service.py --help + sudo ./cavstool.py --help + +If flashing fails at ``west sign`` with errors related to unparsed keys, try +reinstalling the latest version of the signing tool. For example: + +.. code-block:: shell + + error: 1 unparsed keys left in 'adsp' + error: 1 unparsed arrays left in 'adsp' + +If you get an "Address already in use" error when starting +:file:`remote-fw-service.py` on the board, you may have another instance of the +script running. Kill it. + +.. code-block:: console + + $ sudo netstat -peanut | grep 9999 + tcp 0 0 0.0.0.0:9999 0.0.0.0:* LISTEN 0 289788 14795/python3 + $ sudo kill 14795 + +If West or Twister successfully sign and establish TCP connections +with :file:`remote-fw-service.py` but hang with no output afterwards, +there are two possibilities: either :file:`remote-fw-service.py` failed +to communicate, or :file:`cavstool.py` failed to flash. Log into +the remote host and check the output of :file:`remote-fw-service.py`. + +If a message about "incorrect communication" appears, you mixed up the port +numbers for logging and requests in your command or hardware map. Switch them +and try again. + +.. code-block:: shell + + ERROR:remote-fw:incorrect monitor communication! + +If a "load failed" message appears, that means the flash failed. Examine the +log of ``west flash`` and carefully check that the arguments to ``west sign`` +are correct. + +.. code-block:: console + + WARNING:cavs-fw:Load failed? FW_STATUS = 0x81000012 + INFO:cavs-fw:cAVS firmware load complete + -- + +Sometimes a flash failure or network miscommunication corrupts the state of +the ADSP or :file:`remote-fw-service.py`. If you are unable to identify a +cause of repeated failures, try restarting the scripts and / or power cycling +your board to reset the state. + +Users - particularly, users of the Xtensa toolchain - should also consider +clearing their Zephyr cache, as caching issues can occur from time to time. +Delete the cache as well as any applicable build directories and start from +scratch. You can try using the "pristine" option of West first, if you like. + +.. code-block:: console + + rm -rf build twister-out* + rm -rf ~/.ccache ~/.cache/zephyr + +Xtensa toolchain users can get more detailed logs from the license server by +exporting ``FLEXLM_DIAGNOSTICS=3``. + +.. _SOF: https://thesofproject.github.io/latest/index.html + +.. _Chromebooks: https://www.hp.com/us-en/shop/pdp/hp-chromebook-x360-14c-cc0047nr + +.. _UP2: https://up-board.org/upsquared/specifications/ + +.. _UP Xtreme: https://up-board.org/up-xtreme/ + +.. _UP Xtreme i11-0001 series: https://up-shop.org/up-xtreme-i11-boards-0001-series.html + +.. _SOF instructions: https://thesofproject.github.io/latest/getting_started/build-guide/build-with-zephyr.html + +.. _UP Community wiki: https://github.com/up-board/up-community/wiki/Ubuntu + +.. _Cadence: https://www.cadence.com/en_US/home/tools/ip/tensilica-ip.html diff --git a/boards/xtensa/m5stickc_plus/Kconfig.defconfig b/boards/xtensa/m5stickc_plus/Kconfig.defconfig index f07a92a253cc..2fdc31f40082 100644 --- a/boards/xtensa/m5stickc_plus/Kconfig.defconfig +++ b/boards/xtensa/m5stickc_plus/Kconfig.defconfig @@ -12,7 +12,7 @@ config ENTROPY_GENERATOR config HEAP_MEM_POOL_SIZE default 98304 if WIFI - default 16384 if BT + default 40960 if BT default 4096 choice BT_HCI_BUS_TYPE diff --git a/boards/xtensa/m5stickc_plus/board.cmake b/boards/xtensa/m5stickc_plus/board.cmake index 2f04d1fe8861..91b3caa2c75d 100644 --- a/boards/xtensa/m5stickc_plus/board.cmake +++ b/boards/xtensa/m5stickc_plus/board.cmake @@ -7,3 +7,6 @@ find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake) include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) + +# the default ESP32 baud rate is not supported +board_runner_args(esp32 "--esp-baud-rate=1500000") diff --git a/boards/xtensa/m5stickc_plus/doc/index.rst b/boards/xtensa/m5stickc_plus/doc/index.rst index 73da8730a1bb..7f747eb9b23a 100644 --- a/boards/xtensa/m5stickc_plus/doc/index.rst +++ b/boards/xtensa/m5stickc_plus/doc/index.rst @@ -104,7 +104,7 @@ application. :board: m5stickc_plus :goals: flash -The baud rate of 921600bps is set by default. If experiencing issues when flashing, +The default baud rate for the M5StickC PLUS is set to 1500000bps. If experiencing issues when flashing, try using different values by using ``--esp-baud-rate `` option during ``west flash`` (e.g. ``west flash --esp-baud-rate 115200``). diff --git a/boards/xtensa/odroid_go/Kconfig.defconfig b/boards/xtensa/odroid_go/Kconfig.defconfig index 2c313d769b00..7193624673e0 100644 --- a/boards/xtensa/odroid_go/Kconfig.defconfig +++ b/boards/xtensa/odroid_go/Kconfig.defconfig @@ -18,7 +18,7 @@ config ENTROPY_GENERATOR config HEAP_MEM_POOL_SIZE default 98304 if WIFI - default 16384 if BT + default 40960 if BT default 4096 choice BT_HCI_BUS_TYPE diff --git a/boards/xtensa/odroid_go/board_init.c b/boards/xtensa/odroid_go/board_init.c index c6d2f54a2875..db3c1afeba36 100644 --- a/boards/xtensa/odroid_go/board_init.c +++ b/boards/xtensa/odroid_go/board_init.c @@ -8,9 +8,8 @@ #define LED_B_PIN DT_GPIO_PIN(DT_ALIAS(led0), gpios) -static int board_odroid_go_init(const struct device *dev) +static int board_odroid_go_init(void) { - ARG_UNUSED(dev); const struct device *gpio; gpio = DEVICE_DT_GET(DT_NODELABEL(gpio0)); diff --git a/boards/xtensa/olimex_esp32_evb/Kconfig.defconfig b/boards/xtensa/olimex_esp32_evb/Kconfig.defconfig index eda48addc3ad..8e788f6a3938 100644 --- a/boards/xtensa/olimex_esp32_evb/Kconfig.defconfig +++ b/boards/xtensa/olimex_esp32_evb/Kconfig.defconfig @@ -13,7 +13,7 @@ config ENTROPY_GENERATOR config HEAP_MEM_POOL_SIZE default 98304 if WIFI - default 16384 if BT + default 40960 if BT default 4096 choice BT_HCI_BUS_TYPE diff --git a/cmake/compiler/arcmwdt/compiler_flags.cmake b/cmake/compiler/arcmwdt/compiler_flags.cmake index a4f1a13afff8..2b85dadf5a7e 100644 --- a/cmake/compiler/arcmwdt/compiler_flags.cmake +++ b/cmake/compiler/arcmwdt/compiler_flags.cmake @@ -28,7 +28,6 @@ set_compiler_property(PROPERTY warning_base -Wformat -Wformat-security -Wno-format-zero-length - -Wno-main-return-type -Wno-unaligned-pointer-conversion -Wno-incompatible-pointer-types-discards-qualifiers -Wno-typedef-redefinition diff --git a/cmake/compiler/armclang/target.cmake b/cmake/compiler/armclang/target.cmake index 54ddefda0485..a43197461212 100644 --- a/cmake/compiler/armclang/target.cmake +++ b/cmake/compiler/armclang/target.cmake @@ -38,6 +38,8 @@ else() elseif(CONFIG_FP_HARDABI) list(APPEND TOOLCHAIN_C_FLAGS -mfloat-abi=hard) endif() + else() + list(APPEND TOOLCHAIN_C_FLAGS -mfloat-abi=soft) endif() endif() diff --git a/cmake/compiler/clang/compiler_flags.cmake b/cmake/compiler/clang/compiler_flags.cmake index 8b6dd088741d..7a3fbdc1c3a8 100644 --- a/cmake/compiler/clang/compiler_flags.cmake +++ b/cmake/compiler/clang/compiler_flags.cmake @@ -20,6 +20,9 @@ set_property(TARGET compiler PROPERTY coverage --coverage -fno-inline) # clang flag for colourful diagnostic messages set_compiler_property(PROPERTY diagnostic -fcolor-diagnostics) +# clang flag to save temporary object files +set_compiler_property(PROPERTY save_temps -save-temps) + ####################################################### # This section covers flags related to warning levels # ####################################################### @@ -30,8 +33,6 @@ check_set_compiler_property(PROPERTY warning_base -Wformat -Wformat-security -Wno-format-zero-length - -Wno-main - -Wno-main-return-type -Wno-unused-but-set-variable -Wno-typedef-redefinition -Wno-deprecated-non-prototype diff --git a/cmake/compiler/clang/target.cmake b/cmake/compiler/clang/target.cmake index fe98499b2f8b..536c0209ee18 100644 --- a/cmake/compiler/clang/target.cmake +++ b/cmake/compiler/clang/target.cmake @@ -49,9 +49,9 @@ if(NOT "${ARCH}" STREQUAL "posix") if(CONFIG_X86) if(CONFIG_64BIT) - string(APPEND TOOLCHAIN_C_FLAGS "-m64") + list(APPEND TOOLCHAIN_C_FLAGS "-m64") else() - string(APPEND TOOLCHAIN_C_FLAGS "-m32") + list(APPEND TOOLCHAIN_C_FLAGS "-m32") endif() endif() diff --git a/cmake/compiler/compiler_flags_template.cmake b/cmake/compiler/compiler_flags_template.cmake index e03fb6152a63..4614866b2ce0 100644 --- a/cmake/compiler/compiler_flags_template.cmake +++ b/cmake/compiler/compiler_flags_template.cmake @@ -103,6 +103,9 @@ set_compiler_property(PROPERTY freestanding) # Flag to include debugging symbol in compilation set_compiler_property(PROPERTY debug) +# Flags to save temporary object files +set_compiler_property(PROPERTY save_temps) + set_compiler_property(PROPERTY no_common) # Flags for imacros. The specific header must be appended by user. diff --git a/cmake/compiler/gcc/compiler_flags.cmake b/cmake/compiler/gcc/compiler_flags.cmake index 0066ee231a13..96f87fcff059 100644 --- a/cmake/compiler/gcc/compiler_flags.cmake +++ b/cmake/compiler/gcc/compiler_flags.cmake @@ -30,7 +30,6 @@ check_set_compiler_property(PROPERTY warning_base -Wall "SHELL:-Wformat -Wformat-security" "SHELL:-Wformat -Wno-format-zero-length" - -Wno-main ) check_set_compiler_property(APPEND PROPERTY warning_base -Wno-pointer-sign) @@ -180,6 +179,9 @@ check_set_compiler_property(PROPERTY freestanding -ffreestanding) # Flag to enable debugging set_compiler_property(PROPERTY debug -g) +# Flags to save temporary object files +set_compiler_property(PROPERTY save_temps -save-temps=obj) + # GCC 11 by default emits DWARF version 5 which cannot be parsed by # pyelftools. Can be removed once pyelftools supports v5. check_set_compiler_property(APPEND PROPERTY debug -gdwarf-4) diff --git a/cmake/compiler/icx/target.cmake b/cmake/compiler/icx/target.cmake index 028d9a21e8fb..b72af1600aca 100644 --- a/cmake/compiler/icx/target.cmake +++ b/cmake/compiler/icx/target.cmake @@ -40,9 +40,9 @@ foreach(isystem_include_dir ${NOSTDINC}) endforeach() if(CONFIG_64BIT) - string(APPEND TOOLCHAIN_C_FLAGS "-m64") + list(APPEND TOOLCHAIN_C_FLAGS "-m64") else() - string(APPEND TOOLCHAIN_C_FLAGS "-m32") + list(APPEND TOOLCHAIN_C_FLAGS "-m32") endif() @@ -67,3 +67,7 @@ string(REPLACE ";" " " CMAKE_REQUIRED_FLAGS "${CMAKE_REQUIRED_FLAGS}") macro(toolchain_cc_nostdinc) zephyr_compile_options( -nostdinc) endmacro() + +if(CONFIG_CPP) + list(APPEND TOOLCHAIN_C_FLAGS "-no-intel-lib=libirc") +endif() diff --git a/cmake/emu/armfvp.cmake b/cmake/emu/armfvp.cmake index 536faf6d7829..f5f1cc62a470 100644 --- a/cmake/emu/armfvp.cmake +++ b/cmake/emu/armfvp.cmake @@ -60,6 +60,13 @@ else() ) endif() +if(CONFIG_ETH_SMSC91X) + set(ARMFVP_FLAGS ${ARMFVP_FLAGS} + -C bp.smsc_91c111.enabled=1 + -C bp.hostbridge.userNetworking=1 + ) +endif() + # Use flags passed in from the environment set(env_fvp $ENV{ARMFVP_EXTRA_FLAGS}) separate_arguments(env_fvp) diff --git a/cmake/emu/qemu.cmake b/cmake/emu/qemu.cmake index 804760d557ee..a3a8a94515b5 100644 --- a/cmake/emu/qemu.cmake +++ b/cmake/emu/qemu.cmake @@ -63,6 +63,10 @@ if(QEMU_PTY) elseif(QEMU_PIPE) # Redirect console to a pipe, used for running automated tests. list(APPEND QEMU_FLAGS -chardev pipe,id=con,mux=on,path=${QEMU_PIPE}) + # Create the pipe file before passing the path to QEMU. + foreach(target ${qemu_targets}) + list(APPEND PRE_QEMU_COMMANDS_FOR_${target} COMMAND ${CMAKE_COMMAND} -E touch ${QEMU_PIPE}) + endforeach() else() # Redirect console to stdio, used for manual debugging. list(APPEND QEMU_FLAGS -chardev stdio,id=con,mux=on) @@ -348,6 +352,37 @@ if(CONFIG_IVSHMEM) endif() endif() +if(CONFIG_NVME) + if(qemu_alternate_path) + find_program( + QEMU_IMG + PATHS ${qemu_alternate_path} + NO_DEFAULT_PATH + NAMES qemu-img + ) + else() + find_program( + QEMU_IMG + qemu-img + ) + endif() + + list(APPEND QEMU_EXTRA_FLAGS + -drive file=${ZEPHYR_BINARY_DIR}/nvme_disk.img,if=none,id=nvm1 + -device nvme,serial=deadbeef,drive=nvm1 + ) + + add_custom_target(qemu_nvme_disk + COMMAND + ${QEMU_IMG} + create + ${ZEPHYR_BINARY_DIR}/nvme_disk.img + 1M + ) +else() + add_custom_target(qemu_nvme_disk) +endif() + if(NOT QEMU_PIPE) set(QEMU_PIPE_COMMENT "\nTo exit from QEMU enter: 'CTRL+a, x'\n") endif() @@ -404,6 +439,6 @@ foreach(target ${qemu_targets}) USES_TERMINAL ) if(DEFINED QEMU_KERNEL_FILE) - add_dependencies(${target} qemu_kernel_target) + add_dependencies(${target} qemu_nvme_disk qemu_kernel_target) endif() endforeach() diff --git a/cmake/linker/ld/linker_flags.cmake b/cmake/linker/ld/linker_flags.cmake index 0b16f2b09418..18100b6eff21 100644 --- a/cmake/linker/ld/linker_flags.cmake +++ b/cmake/linker/ld/linker_flags.cmake @@ -1,5 +1,15 @@ check_set_linker_property(TARGET linker PROPERTY memusage "${LINKERFLAGPREFIX},--print-memory-usage") +# -no-pie is not supported until binutils 2.37. +# If -no-pie is passed to old binutils <= 2.36, it is parsed +# as separate arguments -n and -o, which results in output file +# called "-pie". +if("${GNULD_VERSION_STRING}" VERSION_GREATER_EQUAL 2.37) + set_property(TARGET linker PROPERTY no_position_independent "${LINKERFLAGPREFIX},-no-pie") +else() + set_property(TARGET linker PROPERTY no_position_independent) +endif() + # Some linker flags might not be purely ld specific, but a combination of # linker and compiler, such as: # --coverage for clang diff --git a/cmake/linker/ld/target.cmake b/cmake/linker/ld/target.cmake index 03c490c68d7b..68263dc1a383 100644 --- a/cmake/linker/ld/target.cmake +++ b/cmake/linker/ld/target.cmake @@ -1,21 +1,13 @@ # SPDX-License-Identifier: Apache-2.0 set_property(TARGET linker PROPERTY devices_start_symbol "__device_start") -if(DEFINED TOOLCHAIN_HOME) - # When Toolchain home is defined, then we are cross-compiling, so only look - # for linker in that path, else we are using host tools. - set(LD_SEARCH_PATH PATHS ${TOOLCHAIN_HOME} NO_DEFAULT_PATH) -endif() - -find_program(CMAKE_LINKER ${CROSS_COMPILE}ld.bfd ${LD_SEARCH_PATH}) -if(NOT CMAKE_LINKER) - find_program(CMAKE_LINKER ${CROSS_COMPILE}ld ${LD_SEARCH_PATH}) -endif() +find_package(GnuLd REQUIRED) +set(CMAKE_LINKER ${GNULD_LINKER}) set_ifndef(LINKERFLAGPREFIX -Wl) if(NOT "${ZEPHYR_TOOLCHAIN_VARIANT}" STREQUAL "host") - if(CONFIG_CPP_EXCEPTIONS) + if(CONFIG_CPP_EXCEPTIONS AND LIBGCC_DIR) # When building with C++ Exceptions, it is important that crtbegin and crtend # are linked at specific locations. # The location is so important that we cannot let this be controlled by normal @@ -121,7 +113,8 @@ function(toolchain_ld_link_elf) ${ARGN} # input args to parse ) - if(${CMAKE_LINKER} STREQUAL "${CROSS_COMPILE}ld.bfd") + if((${CMAKE_LINKER} STREQUAL "${CROSS_COMPILE}ld.bfd") OR + ${GNULD_LINKER_IS_BFD}) # ld.bfd was found so let's explicitly use that for linking, see #32237 set(use_linker "-fuse-ld=bfd") endif() diff --git a/cmake/linker/ld/target_base.cmake b/cmake/linker/ld/target_base.cmake index ac8054abbf69..455f834ac905 100644 --- a/cmake/linker/ld/target_base.cmake +++ b/cmake/linker/ld/target_base.cmake @@ -11,7 +11,6 @@ macro(toolchain_ld_base) # TOOLCHAIN_LD_FLAGS comes from compiler/gcc/target.cmake # LINKERFLAGPREFIX comes from linker/ld/target.cmake zephyr_ld_options( - -no-pie ${TOOLCHAIN_LD_FLAGS} ) @@ -34,4 +33,20 @@ macro(toolchain_ld_base) ) endif() + if (CONFIG_LLVM_USE_LD) + zephyr_link_libraries( + --config ${ZEPHYR_BASE}/cmake/toolchain/llvm/clang.cfg + ) + endif() + + if(CONFIG_CPP AND (CMAKE_C_COMPILER_ID STREQUAL "Clang")) + # GNU ld complains when used with llvm/clang: + # error: section: init_array is not contiguous with other relro sections + # + # So do not create RELRO program header. + zephyr_link_libraries( + -Wl,-z,norelro + ) + endif() + endmacro() diff --git a/cmake/linker/linker_flags_template.cmake b/cmake/linker/linker_flags_template.cmake index 7e0118ddcb30..df6ccfc01872 100644 --- a/cmake/linker/linker_flags_template.cmake +++ b/cmake/linker/linker_flags_template.cmake @@ -12,3 +12,7 @@ check_set_linker_property(TARGET linker PROPERTY memusage) # Extra warnings options for twister run set_property(TARGET linker PROPERTY warnings_as_errors) + +# Linker flag for disabling position independent binaries, +# such as, "-no-pie" for LD, and "--no-pie" for LLD. +set_property(TARGET linker PROPERTY no_position_independent) diff --git a/cmake/linker/lld/linker_flags.cmake b/cmake/linker/lld/linker_flags.cmake index 43b96baeba55..f9e8cca246a8 100644 --- a/cmake/linker/lld/linker_flags.cmake +++ b/cmake/linker/lld/linker_flags.cmake @@ -3,3 +3,5 @@ # Since lld is a drop in replacement for ld, we can just use ld's flags include(${ZEPHYR_BASE}/cmake/linker/ld/${COMPILER}/linker_flags.cmake OPTIONAL) + +set_property(TARGET linker PROPERTY no_position_independent "${LINKERFLAGPREFIX},--no-pie") diff --git a/cmake/linker/lld/target.cmake b/cmake/linker/lld/target.cmake index dedae2f71c6f..dbaf1b27c7d1 100644 --- a/cmake/linker/lld/target.cmake +++ b/cmake/linker/lld/target.cmake @@ -1,7 +1,8 @@ # SPDX-License-Identifier: Apache-2.0 set_property(TARGET linker PROPERTY devices_start_symbol "__device_start") -find_program(CMAKE_LINKER ld.lld ) +find_package(LlvmLld REQUIRED) +set(CMAKE_LINKER ${LLVMLLD_LINKER}) set_ifndef(LINKERFLAGPREFIX -Wl) diff --git a/cmake/linker/lld/target_base.cmake b/cmake/linker/lld/target_base.cmake index d504dfaa8cf6..372c14829ed9 100644 --- a/cmake/linker/lld/target_base.cmake +++ b/cmake/linker/lld/target_base.cmake @@ -11,7 +11,6 @@ macro(toolchain_ld_base) # TOOLCHAIN_LD_FLAGS comes from compiler/clang/target.cmake # LINKERFLAGPREFIX comes from linker/lld/target.cmake zephyr_ld_options( - -no-pie ${TOOLCHAIN_LD_FLAGS} ) @@ -32,4 +31,17 @@ macro(toolchain_ld_base) ) endif() + if(CONFIG_CPP) + # LLVM lld complains: + # error: section: init_array is not contiguous with other relro sections + # + # So do not create RELRO program header. + zephyr_link_libraries( + -Wl,-z,norelro + ) + endif() + + zephyr_link_libraries( + --config ${ZEPHYR_BASE}/cmake/toolchain/llvm/clang.cfg + ) endmacro() diff --git a/cmake/linker_script/common/common-ram.cmake b/cmake/linker_script/common/common-ram.cmake index 03c7960105ef..fbabd703fbf7 100644 --- a/cmake/linker_script/common/common-ram.cmake +++ b/cmake/linker_script/common/common-ram.cmake @@ -35,8 +35,6 @@ zephyr_linker_section_configure(SECTION initshell zephyr_linker_section(NAME log_dynamic GROUP DATA_REGION NOINPUT) zephyr_linker_section_configure(SECTION log_dynamic KEEP INPUT ".log_dynamic_*") -zephyr_iterable_section(NAME _static_thread_data GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN 4) - if(CONFIG_USERSPACE) # All kernel objects within are assumed to be either completely # initialized at build time, or initialized automatically at runtime @@ -57,6 +55,7 @@ zephyr_iterable_section(NAME k_pipe GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SU zephyr_iterable_section(NAME k_sem GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN 4) zephyr_iterable_section(NAME k_queue GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN 4) zephyr_iterable_section(NAME k_condvar GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN 4) +zephyr_iterable_section(NAME k_event GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN 4) zephyr_linker_section(NAME _net_buf_pool_area GROUP DATA_REGION NOINPUT ${XIP_ALIGN_WITH_INPUT} SUBALIGN 4) zephyr_linker_section_configure(SECTION _net_buf_pool_area @@ -117,3 +116,36 @@ if(CONFIG_ZTEST_NEW_API) zephyr_iterable_section(NAME ztest_test_rule GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN 4) zephyr_iterable_section(NAME ztest_expected_result_entry GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN 4) endif() + +if(CONFIG_ZBUS) + zephyr_iterable_section(NAME zbus_channel GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN 4) + zephyr_iterable_section(NAME zbus_observer GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN 4) +endif() + +if(CONFIG_UVB) + zephyr_iterable_section(NAME uvb_node GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN 4) +endif() + +if(CONFIG_BT_MESH_ADV_EXT) + zephyr_iterable_section(NAME bt_mesh_ext_adv GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN 4) +endif() + +if(CONFIG_LOG) + zephyr_iterable_section(NAME log_mpsc_pbuf GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN 4) + zephyr_iterable_section(NAME log_msg_ptr GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN 4) +endif() + +if(CONFIG_PCIE) + zephyr_iterable_section(NAME pcie_dev GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN 4) +endif() + +if(CONFIG_USB_DEVICE_STACK OR CONFIG_USB_DEVICE_STACK_NEXT) + zephyr_iterable_section(NAME usb_cfg_data GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN 4) + zephyr_iterable_section(NAME usbd_contex GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN 4) + zephyr_iterable_section(NAME usbd_class_node GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN 4) +endif() + +if(CONFIG_USB_HOST_STACK) + zephyr_iterable_section(NAME usbh_contex GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN 4) + zephyr_iterable_section(NAME usbh_class_data GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN 4) +endif() diff --git a/cmake/linker_script/common/common-rom.cmake b/cmake/linker_script/common/common-rom.cmake index fc882b7824d4..2e260c48a6f3 100644 --- a/cmake/linker_script/common/common-rom.cmake +++ b/cmake/linker_script/common/common-rom.cmake @@ -153,8 +153,7 @@ endif() zephyr_iterable_section(NAME k_p4wq_initparam KVMA RAM_REGION GROUP RODATA_REGION SUBALIGN 4) if(CONFIG_EMUL) - zephyr_linker_section(NAME emulators_section GROUP RODATA_REGION ${XIP_ALIGN_WITH_INPUT}) - zephyr_linker_section_configure(SECTION emulators_section INPUT ".emulators" KEEP SORT NAME) + zephyr_iterable_section(NAME emul KVMA RAM_REGION GROUP RODATA_REGION SUBALIGN 4) endif() if(CONFIG_DNS_SD) @@ -172,9 +171,6 @@ zephyr_linker_section_configure(SECTION log_strings INPUT ".log_strings*" KEEP S zephyr_linker_section(NAME log_const KVMA RAM_REGION GROUP RODATA_REGION NOINPUT ${XIP_ALIGN_WITH_INPUT}) zephyr_linker_section_configure(SECTION log_const INPUT ".log_const_*" KEEP SORT NAME) -zephyr_linker_section(NAME log_backends KVMA RAM_REGION GROUP RODATA_REGION NOINPUT ${XIP_ALIGN_WITH_INPUT}) -zephyr_linker_section_configure(SECTION log_backends INPUT ".log_backends.*" KEEP) - zephyr_iterable_section(NAME shell KVMA RAM_REGION GROUP RODATA_REGION SUBALIGN 4) zephyr_linker_section(NAME shell_root_cmds KVMA RAM_REGION GROUP RODATA_REGION NOINPUT ${XIP_ALIGN_WITH_INPUT}) @@ -191,3 +187,26 @@ zephyr_linker_section_configure(SECTION zephyr_dbg_info INPUT ".zephyr_dbg_info" zephyr_linker_section(NAME device_handles KVMA RAM_REGION GROUP RODATA_REGION NOINPUT ${XIP_ALIGN_WITH_INPUT} ENDALIGN 16) zephyr_linker_section_configure(SECTION device_handles INPUT .__device_handles_pass1* KEEP SORT NAME PASS LINKER_DEVICE_HANDLES_PASS1) zephyr_linker_section_configure(SECTION device_handles INPUT .__device_handles_pass2* KEEP SORT NAME PASS NOT LINKER_DEVICE_HANDLES_PASS1) + +zephyr_iterable_section(NAME _static_thread_data KVMA RAM_REGION GROUP RODATA_REGION SUBALIGN 4) + +if (CONFIG_BT_IAS) + zephyr_iterable_section(NAME bt_ias_cb KVMA RAM_REGION GROUP RODATA_REGION SUBALIGN 4) +endif() + +if (CONFIG_LOG) + zephyr_iterable_section(NAME log_link KVMA RAM_REGION GROUP RODATA_REGION SUBALIGN 4) + zephyr_iterable_section(NAME log_backend KVMA RAM_REGION GROUP RODATA_REGION SUBALIGN 4) +endif() + +if (CONFIG_HTTP_SERVER) + zephyr_iterable_section(NAME http_service_desc KVMA RAM_REGION GROUP RODATA_REGION SUBALIGN 4) +endif() + +if(CONFIG_INPUT) + zephyr_iterable_section(NAME input_listener KVMA RAM_REGION GROUP RODATA_REGION SUBALIGN 4) +endif() + +if(CONFIG_USBD_MSC_CLASS) + zephyr_iterable_section(NAME usbd_msc_lun KVMA RAM_REGION GROUP RODATA_REGION SUBALIGN 4) +endif() diff --git a/cmake/mcuboot.cmake b/cmake/mcuboot.cmake index 4f9b9bcca2b9..a6c18cc1a295 100644 --- a/cmake/mcuboot.cmake +++ b/cmake/mcuboot.cmake @@ -71,7 +71,9 @@ function(zephyr_mcuboot_tasks) endif() # Basic 'west sign' command and output format independent arguments. - set(west_sign ${WEST} sign --quiet --tool imgtool + separate_arguments(west_sign_extra UNIX_COMMAND ${CONFIG_MCUBOOT_CMAKE_WEST_SIGN_PARAMS}) + set(west_sign ${WEST} sign ${west_sign_extra} + --tool imgtool --tool-path "${imgtool_path}" --build-dir "${APPLICATION_BINARY_DIR}") diff --git a/cmake/modules/FindDeprecated.cmake b/cmake/modules/FindDeprecated.cmake index 6296c1701a83..2e6905070120 100644 --- a/cmake/modules/FindDeprecated.cmake +++ b/cmake/modules/FindDeprecated.cmake @@ -105,6 +105,13 @@ if("SOURCES" IN_LIST Deprecated_FIND_COMPONENTS) endif() endif() +if("PRJ_BOARD" IN_LIST Deprecated_FIND_COMPONENTS) + # This code was deprecated after Zephyr v3.3.0 + list(REMOVE_ITEM Deprecated_FIND_COMPONENTS PRJ_BOARD) + message(DEPRECATION "'prj_.conf' files are deprecated and should be " + "replaced with board Kconfig fragments instead.") +endif() + if(NOT "${Deprecated_FIND_COMPONENTS}" STREQUAL "") message(STATUS "The following deprecated component(s) could not be found: " "${Deprecated_FIND_COMPONENTS}") diff --git a/cmake/modules/FindGnuLd.cmake b/cmake/modules/FindGnuLd.cmake new file mode 100644 index 000000000000..9d4377b7e742 --- /dev/null +++ b/cmake/modules/FindGnuLd.cmake @@ -0,0 +1,98 @@ +# SPDX-License-Identifier: Apache-2.0 +# +# Copyright (c) 2022, Nordic Semiconductor ASA +# Copyright (c) 2023, Intel Corporation + +# FindGnuLd module for locating GNU ld (linker from binutils). +# +# The module defines the following variables: +# +# 'GNULD_LINKER' +# Path to GNU ld linker +# Set to 'GNULD_LINKER-NOTFOUND' if ld was not found. +# +# 'GnuLd_FOUND', 'GNULD_FOUND' +# True if GNU ld was found. +# +# 'GNULD_VERSION_STRING' +# The version of GNU ld. +# +# 'GNULD_LINKER_IS_BFD' +# True if linker is ld.bfd (or compatible) +# +# Note that this will use CROSS_COMPILE, if defined, +# as a prefix to the linker executable. + +# GNULD_LINKER exists on repeated builds or defined manually... +if(EXISTS "${GNULD_LINKER}") + if(NOT DEFINED GNULD_LINKER_IS_BFD) + # ... issue warning if GNULD_LINKER_IS_BFD is not already set. + message( + WARNING + "GNULD_LINKER specified directly in cache, but GNULD_LINKER_IS_BFD is not " + "defined. Assuming GNULD_LINKER_IS_BFD as OFF, please set GNULD_LINKER_IS_BFD " + "to correct value in cache to silence this warning" + ) + set(GNULD_LINKER_IS_BFD OFF) + endif() + + # Since GNULD_LINKER already exists, there is no need to find it again (below). + return() +endif() + +# See if the compiler has a preferred linker +execute_process(COMMAND ${CMAKE_C_COMPILER} --print-prog-name=ld.bfd + OUTPUT_VARIABLE GNULD_LINKER + OUTPUT_STRIP_TRAILING_WHITESPACE) + +if(EXISTS "${GNULD_LINKER}") + set(GNULD_LINKER_IS_BFD ON CACHE BOOL "Linker BFD compatibility (compiler reported)" FORCE) +else() + # Need to clear it or else find_program() won't replace the value. + set(GNULD_LINKER) + + if(DEFINED TOOLCHAIN_HOME) + # Search for linker under TOOLCHAIN_HOME if it is defined + # to limit which linker to use, or else we would be using + # host tools. + set(LD_SEARCH_PATH PATHS ${TOOLCHAIN_HOME} NO_DEFAULT_PATH) + endif() + + find_program(GNULD_LINKER ${CROSS_COMPILE}ld.bfd ${LD_SEARCH_PATH}) + if(GNULD_LINKER) + set(GNULD_LINKER_IS_BFD ON CACHE BOOL "Linker BFD compatibility (inferred from binary)" FORCE) + else() + find_program(GNULD_LINKER ${CROSS_COMPILE}ld ${LD_SEARCH_PATH}) + set(GNULD_LINKER_IS_BFD OFF CACHE BOOL "Linker BFD compatibility (inferred from binary)" FORCE) + endif() +endif() + +if(GNULD_LINKER) + # Parse the 'ld.bfd --version' output to find the installed version. + execute_process( + COMMAND + ${GNULD_LINKER} --version + OUTPUT_VARIABLE gnuld_version_output + ERROR_VARIABLE gnuld_error_output + RESULT_VARIABLE gnuld_status + ) + + set(GNULD_VERSION_STRING) + if(${gnuld_status} EQUAL 0) + # Extract GNU ld version. Different distros have their + # own version scheme so we need to account for that. + # Examples: + # - "GNU ld (GNU Binutils for Ubuntu) 2.34" + # - "GNU ld (Zephyr SDK 0.15.2) 2.38" + # - "GNU ld (Gentoo 2.39 p5) 2.39.0" + string(REGEX MATCH + "GNU ld \\(.+\\) ([0-9]+[.][0-9]+[.]?[0-9]*).*" + out_var ${gnuld_version_output}) + set(GNULD_VERSION_STRING ${CMAKE_MATCH_1}) + endif() +endif() + +find_package_handle_standard_args(GnuLd + REQUIRED_VARS GNULD_LINKER + VERSION_VAR GNULD_VERSION_STRING +) diff --git a/cmake/modules/FindLlvmLld.cmake b/cmake/modules/FindLlvmLld.cmake new file mode 100644 index 000000000000..ab7fe1f695b8 --- /dev/null +++ b/cmake/modules/FindLlvmLld.cmake @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: Apache-2.0 +# +# Copyright (c) 2022, Nordic Semiconductor ASA +# Copyright (c) 2023, Intel Corporation + +# FindGnuLd module for locating LLVM lld linker. +# +# The module defines the following variables: +# +# 'LLVMLLD_LINKER' +# Path to LLVM lld linker +# Set to 'LLVMLLD_LINKER-NOTFOUND' if ld was not found. +# +# 'LlvmLld_FOUND', 'LLVMLLD_FOUND' +# True if LLVM lld was found. +# +# 'LLVMLLD_VERSION_STRING' +# The version of LLVM lld. + +# See if the compiler has a preferred linker +execute_process(COMMAND ${CMAKE_C_COMPILER} --print-prog-name=ld.lld + OUTPUT_VARIABLE LLVMLLD_LINKER + OUTPUT_STRIP_TRAILING_WHITESPACE) + +if(NOT EXISTS "${LLVMLLD_LINKER}") + # Need to clear it or else find_program() won't replace the value. + set(LLVMLLD_LINKER) + + if(DEFINED TOOLCHAIN_HOME) + # Search for linker under TOOLCHAIN_HOME if it is defined + # to limit which linker to use, or else we would be using + # host tools. + set(LLD_SEARCH_PATH PATHS ${TOOLCHAIN_HOME} NO_DEFAULT_PATH) + endif() + + # Note that, although there is lld, it cannot be used directly + # as it would complain about it not being a generic linker, + # and asks you to use ld.lld instead. So do not search for lld. + find_program(LLVMLLD_LINKER ld.lld ${LLD_SEARCH_PATH}) +endif() + +if(LLVMLLD_LINKER) + # Parse the 'ld.lld --version' output to find the installed version. + execute_process( + COMMAND + ${LLVMLLD_LINKER} --version + OUTPUT_VARIABLE llvmlld_version_output + ERROR_VARIABLE llvmlld_error_output + RESULT_VARIABLE llvmlld_status + ) + + set(LLVMLLD_VERSION_STRING) + if(${llvmlld_status} EQUAL 0) + # Extract GNU ld version. Different distros have their + # own version scheme so we need to account for that. + # Examples: + # - "GNU ld (GNU Binutils for Ubuntu) 2.34" + # - "GNU ld (Zephyr SDK 0.15.2) 2.38" + # - "GNU ld (Gentoo 2.39 p5) 2.39.0" + string(REGEX MATCH + "LLD ([0-9]+[.][0-9]+[.]?[0-9]*).*" + out_var ${llvmlld_version_output}) + set(LLVMLLD_VERSION_STRING ${CMAKE_MATCH_1}) + endif() +endif() + +find_package_handle_standard_args(LlvmLld + REQUIRED_VARS LLVMLLD_LINKER + VERSION_VAR LLVMLLD_VERSION_STRING +) diff --git a/cmake/modules/configuration_files.cmake b/cmake/modules/configuration_files.cmake index 39a7760dd536..e5db53fd0880 100644 --- a/cmake/modules/configuration_files.cmake +++ b/cmake/modules/configuration_files.cmake @@ -67,10 +67,13 @@ elseif(CACHED_CONF_FILE) set(CONF_FILE ${CACHED_CONF_FILE}) elseif(EXISTS ${APPLICATION_CONFIG_DIR}/prj_${BOARD}.conf) set(CONF_FILE ${APPLICATION_CONFIG_DIR}/prj_${BOARD}.conf) - + find_package(Deprecated COMPONENTS PRJ_BOARD) elseif(EXISTS ${APPLICATION_CONFIG_DIR}/prj.conf) set(CONF_FILE ${APPLICATION_CONFIG_DIR}/prj.conf) set(CONF_FILE_INCLUDE_FRAGMENTS true) +else() + message(FATAL_ERROR "No prj.conf file was found in the ${APPLICATION_CONFIG_DIR} folder, " + "please read the Zephyr documentation on application development.") endif() if(CONF_FILE_INCLUDE_FRAGMENTS) diff --git a/cmake/modules/dts.cmake b/cmake/modules/dts.cmake index 09886800a4a3..42413ceca73d 100644 --- a/cmake/modules/dts.cmake +++ b/cmake/modules/dts.cmake @@ -5,6 +5,7 @@ include_guard(GLOBAL) include(extensions) include(python) include(boards) +include(pre_dt) find_package(HostTools) find_package(Dtc 1.4.6) @@ -38,14 +39,53 @@ find_package(Dtc 1.4.6) # files in scripts/dts to make all this work. We also optionally will # run the dtc tool if it is found, in order to catch any additional # warnings or errors it generates. - -# We will place some generated include files in here. -set(BINARY_DIR_INCLUDE ${PROJECT_BINARY_DIR}/include) -set(BINARY_DIR_INCLUDE_GENERATED ${BINARY_DIR_INCLUDE}/generated) -# Unconditionally create it, even if we don't have DTS support. This -# is a historical artifact, and users expect this directory to exist -# to put their own generated content inside. -file(MAKE_DIRECTORY ${BINARY_DIR_INCLUDE_GENERATED}) +# +# Outcome: +# +# 1. The following has happened: +# +# - The pre_dt module has been included; refer to its outcome +# section for more information on the consequences +# - DTS_SOURCE: set to the path to the devicetree file which +# was used, if one was provided or found +# - ${BINARY_DIR_INCLUDE_GENERATED}/devicetree_generated.h exists +# +# 2. The following has happened if a devicetree was found and +# no errors occurred: +# +# - CACHED_DTS_ROOT_BINDINGS is set in the cache to the +# value of DTS_ROOT_BINDINGS +# - DTS_ROOT_BINDINGS is set to a ;-list of locations where DT +# bindings were found +# - ${PROJECT_BINARY_DIR}/zephyr.dts exists +# - ${PROJECT_BINARY_DIR}/edt.pickle exists +# - ${KCONFIG_BINARY_DIR}/Kconfig.dts exists +# - the build system will be regenerated if any devicetree files +# used in this build change, including transitive includes +# - the devicetree extensions in the extensions.cmake module +# will be ready for use in other CMake list files that run +# after this module +# +# Required variables: +# - BINARY_DIR_INCLUDE_GENERATED: where to put generated include files +# - KCONFIG_BINARY_DIR: where to put generated Kconfig files +# +# Optional variables: +# - BOARD: board name to use when looking for DTS_SOURCE +# - BOARD_DIR: board directory to use when looking for DTS_SOURCE +# - BOARD_REVISION_STRING: used when looking for a board revision's +# devicetree overlay file in BOARD_DIR +# - EXTRA_DTC_FLAGS: list of extra command line options to pass to +# dtc when using it to check for additional errors and warnings; +# invalid flags are automatically filtered out of the list +# - DTS_EXTRA_CPPFLAGS: extra command line options to pass to the +# C preprocessor when generating the devicetree from DTS_SOURCE +# - DTS_SOURCE: the devicetree source file to use may be pre-set +# with this variable; otherwise, it defaults to +# ${BOARD_DIR}/${BOARD.dts} +# +# Variables set by this module and not mentioned above are for internal +# use only, and may be removed, renamed, or re-purposed without prior notice. # The directory containing devicetree related scripts. set(DT_SCRIPTS ${ZEPHYR_BASE}/scripts/dts) @@ -59,8 +99,6 @@ set(EDT_PICKLE ${PROJECT_BINARY_DIR}/edt.pickle) set(ZEPHYR_DTS ${PROJECT_BINARY_DIR}/zephyr.dts) # The generated C header needed by set(DEVICETREE_GENERATED_H ${BINARY_DIR_INCLUDE_GENERATED}/devicetree_generated.h) -# Legacy; ignore this. -set(DEVICE_EXTERN_H ${BINARY_DIR_INCLUDE_GENERATED}/device_extern.h) # Generated build system internals. set(DTS_POST_CPP ${PROJECT_BINARY_DIR}/zephyr.dts.pre) set(DTS_DEPS ${PROJECT_BINARY_DIR}/zephyr.dts.d) @@ -81,9 +119,6 @@ set(DTS_CMAKE ${PROJECT_BINARY_DIR}/dts.cmake) # modules. set(VENDOR_PREFIXES dts/bindings/vendor-prefixes.txt) -# The C preprocessor to use. -set_ifndef(CMAKE_DTS_PREPROCESSOR ${CMAKE_C_COMPILER}) - # # Halt execution early if there is no devicetree. # @@ -103,43 +138,6 @@ else() return() endif() -# -# Finalize the value of DTS_ROOT, so we know where all our -# DTS files, bindings, and vendor prefixes are. -# - -# Convert relative paths to absolute paths relative to the application -# source directory. -zephyr_file(APPLICATION_ROOT DTS_ROOT) - -# DTS_ROOT always includes the application directory, the board -# directory, shield directories, and ZEPHYR_BASE. -list(APPEND - DTS_ROOT - ${APPLICATION_SOURCE_DIR} - ${BOARD_DIR} - ${SHIELD_DIRS} - ${ZEPHYR_BASE} - ) - -# Convert the directories in DTS_ROOT to absolute paths without -# symlinks. -# -# DTS directories can come from multiple places. Some places, like a -# user's CMakeLists.txt can preserve symbolic links. Others, like -# scripts/zephyr_module.py --settings-out resolve them. -unset(real_dts_root) -foreach(dts_dir ${DTS_ROOT}) - file(REAL_PATH ${dts_dir} real_dts_dir) - list(APPEND real_dts_root ${real_dts_dir}) -endforeach() -set(DTS_ROOT ${real_dts_root}) - -# Finally, de-duplicate the list. -list(REMOVE_DUPLICATES - DTS_ROOT - ) - # # Find all the DTS files we need to concatenate and preprocess, as # well as all the devicetree bindings and vendor prefixes associated @@ -152,13 +150,8 @@ set(dts_files ) if(DTC_OVERLAY_FILE) - # Convert from space-separated files into file list - string(CONFIGURE "${DTC_OVERLAY_FILE}" DTC_OVERLAY_FILE_EXPANDED) - string(REPLACE " " ";" DTC_OVERLAY_FILE_RAW_LIST "${DTC_OVERLAY_FILE_EXPANDED}") - foreach(file ${DTC_OVERLAY_FILE_RAW_LIST}) - file(TO_CMAKE_PATH "${file}" cmake_path_file) - list(APPEND DTC_OVERLAY_FILE_AS_LIST ${cmake_path_file}) - endforeach() + zephyr_list(TRANSFORM DTC_OVERLAY_FILE NORMALIZE_PATHS + OUTPUT_VARIABLE DTC_OVERLAY_FILE_AS_LIST) list(APPEND dts_files ${DTC_OVERLAY_FILE_AS_LIST} @@ -166,11 +159,7 @@ if(DTC_OVERLAY_FILE) endif() set(i 0) -unset(DTC_INCLUDE_FLAG_FOR_DTS) foreach(dts_file ${dts_files}) - list(APPEND DTC_INCLUDE_FLAG_FOR_DTS - -include ${dts_file}) - if(i EQUAL 0) message(STATUS "Found BOARD.dts: ${dts_file}") else() @@ -180,25 +169,8 @@ foreach(dts_file ${dts_files}) math(EXPR i "${i}+1") endforeach() -unset(DTS_ROOT_SYSTEM_INCLUDE_DIRS) unset(DTS_ROOT_BINDINGS) foreach(dts_root ${DTS_ROOT}) - foreach(dts_root_path - include - include/zephyr - dts/common - dts/${ARCH} - dts - ) - get_filename_component(full_path ${dts_root}/${dts_root_path} REALPATH) - if(EXISTS ${full_path}) - list(APPEND - DTS_ROOT_SYSTEM_INCLUDE_DIRS - -isystem ${full_path} - ) - endif() - endforeach() - set(bindings_path ${dts_root}/dts/bindings) if(EXISTS ${bindings_path}) list(APPEND @@ -227,29 +199,21 @@ set(CACHED_DTS_ROOT_BINDINGS ${DTS_ROOT_BINDINGS} CACHE INTERNAL # regeneration of devicetree_generated.h on every configure. How # challenging is this? Can we cache the dts dependencies? -# Run the preprocessor on the DTS input files. We are leaving -# linemarker directives enabled on purpose. This tells dtlib where -# each line actually came from, which improves error reporting. -execute_process( - COMMAND ${CMAKE_DTS_PREPROCESSOR} - -x assembler-with-cpp - -nostdinc - ${DTS_ROOT_SYSTEM_INCLUDE_DIRS} - ${DTC_INCLUDE_FLAG_FOR_DTS} # include the DTS source and overlays - ${NOSYSDEF_CFLAG} - -D__DTS__ - ${DTS_EXTRA_CPPFLAGS} - -E # Stop after preprocessing - -MD # Generate a dependency file as a side-effect - -MF ${DTS_DEPS} - -o ${DTS_POST_CPP} - ${ZEPHYR_BASE}/misc/empty_file.c +# Run the preprocessor on the DTS input files. +if(DEFINED CMAKE_DTS_PREPROCESSOR) + set(dts_preprocessor ${CMAKE_DTS_PREPROCESSOR}) +else() + set(dts_preprocessor ${CMAKE_C_COMPILER}) +endif() +zephyr_dt_preprocess( + CPP ${dts_preprocessor} + SOURCE_FILES ${dts_files} + OUT_FILE ${DTS_POST_CPP} + DEPS_FILE ${DTS_DEPS} + EXTRA_CPPFLAGS ${DTS_EXTRA_CPPFLAGS} + INCLUDE_DIRECTORIES ${DTS_ROOT_SYSTEM_INCLUDE_DIRS} WORKING_DIRECTORY ${APPLICATION_SOURCE_DIR} - RESULT_VARIABLE ret ) -if(NOT "${ret}" STREQUAL "0") - message(FATAL_ERROR "command failed with return code: ${ret}") -endif() # # Make sure we re-run CMake if any devicetree sources or transitive @@ -298,8 +262,6 @@ if(NOT "${ret}" STREQUAL "0") else() zephyr_file_copy(${ZEPHYR_DTS}.new ${ZEPHYR_DTS} ONLY_IF_DIFFERENT) zephyr_file_copy(${DEVICETREE_GENERATED_H}.new ${DEVICETREE_GENERATED_H} ONLY_IF_DIFFERENT) - file(WRITE ${DEVICE_EXTERN_H} -"#error The contents of this file are now implemented directly in zephyr/device.h.") file(REMOVE ${ZEPHYR_DTS}.new ${DEVICETREE_GENERATED_H}.new) message(STATUS "Generated zephyr.dts: ${ZEPHYR_DTS}") message(STATUS "Generated devicetree_generated.h: ${DEVICETREE_GENERATED_H}") diff --git a/cmake/modules/extensions.cmake b/cmake/modules/extensions.cmake index e8ec63e3472a..33951317c1e1 100644 --- a/cmake/modules/extensions.cmake +++ b/cmake/modules/extensions.cmake @@ -30,8 +30,10 @@ include(CheckCXXCompilerFlag) # 4. Devicetree extensions # 4.1 dt_* # 4.2. *_if_dt_node +# 4.3 zephyr_dt_* # 5. Zephyr linker functions # 5.1. zephyr_linker* +# 6 Function helper macros ######################################################## # 1. Zephyr-aware extensions @@ -110,6 +112,10 @@ function(zephyr_link_libraries) target_link_libraries(zephyr_interface INTERFACE ${ARGV}) endfunction() +function(zephyr_libc_link_libraries) + set_property(TARGET zephyr_interface APPEND PROPERTY LIBC_LINK_LIBRARIES ${ARGV}) +endfunction() + # See this file section 3.1. target_cc_option function(zephyr_cc_option) foreach(arg ${ARGV}) @@ -2409,6 +2415,57 @@ function(zephyr_string) set(${return_arg} ${work_string} PARENT_SCOPE) endfunction() +# Usage: +# zephyr_list(TRANSFORM +# [OUTPUT_VARIABLE : This currently must be NORMALIZE_PATHS. This action +# converts the argument list to a ;-list with +# CMake path names, after passing its contents through +# a configure_file() transformation. The input list +# may be whitespace- or semicolon-separated. +# +# OUTPUT_VARIABLE: the result is normally stored in place, but +# an alternative variable to store the result +# can be provided with this. +function(zephyr_list transform list_var action) + # Parse arguments. + if(NOT "${transform}" STREQUAL "TRANSFORM") + message(FATAL_ERROR "the first argument must be TRANSFORM") + endif() + if(NOT "${action}" STREQUAL "NORMALIZE_PATHS") + message(FATAL_ERROR "the third argument must be NORMALIZE_PATHS") + endif() + set(single_args OUTPUT_VARIABLE) + cmake_parse_arguments(ZEPHYR_LIST "" "${single_args}" "" ${ARGN}) + if(DEFINED ZEPHYR_LIST_OUTPUT_VARIABLE) + set(out_var ${ZEPHYR_LIST_OUTPUT_VARIABLE}) + else() + set(out_var ${list_var}) + endif() + set(input ${${list_var}}) + + # Perform the transformation. + set(ret) + string(CONFIGURE "${input}" input_expanded) + string(REPLACE " " ";" input_raw_list "${input_expanded}") + foreach(file ${input_raw_list}) + file(TO_CMAKE_PATH "${file}" cmake_path_file) + list(APPEND ret ${cmake_path_file}) + endforeach() + + set(${out_var} ${ret} PARENT_SCOPE) +endfunction() + # Usage: # zephyr_get() # zephyr_get( SYSBUILD [LOCAL|GLOBAL]) @@ -3426,7 +3483,108 @@ function(target_sources_if_dt_node path target scope item) endfunction() ######################################################## -# 5. Zephyr linker function +# 4.3 zephyr_dt_* +# +# The following methods are common code for dealing +# with devicetree related files in CMake. +# +# Note that functions related to accessing the +# *contents* of the devicetree belong in section 4.1. +# This section is just for DT file processing at +# configuration time. +######################################################## + +# Usage: +# zephyr_dt_preprocess(CPP [] +# SOURCE_FILES +# OUT_FILE +# [DEPS_FILE ] +# [EXTRA_CPPFLAGS ] +# [INCLUDE_DIRECTORIES ] +# [WORKING_DIRECTORY ] +# +# Preprocess one or more devicetree source files. The preprocessor +# symbol __DTS__ will be defined. If the preprocessor command fails, a +# fatal error occurs. +# +# Mandatory arguments: +# +# CPP []: path to C preprocessor, followed by any +# additional arguments +# +# SOURCE_FILES : The source files to run the preprocessor on. +# These will, in effect, be concatenated in order +# and used as the preprocessor input. +# +# OUT_FILE : Where to store the preprocessor output. +# +# Optional arguments: +# +# DEPS_FILE : If set, generate a dependency file here. +# +# EXTRA_CPPFLAGS : Additional flags to pass the preprocessor. +# +# INCLUDE_DIRECTORIES : Additional #include file directories. +# +# WORKING_DIRECTORY : where to run the preprocessor. +function(zephyr_dt_preprocess) + set(req_single_args "OUT_FILE") + set(single_args "DEPS_FILE;WORKING_DIRECTORY") + set(req_multi_args "CPP;SOURCE_FILES") + set(multi_args "EXTRA_CPPFLAGS;INCLUDE_DIRECTORIES") + cmake_parse_arguments(DT_PREPROCESS "" "${req_single_args};${single_args}" "${req_multi_args};${multi_args}" ${ARGN}) + + foreach(arg ${req_single_args} ${req_multi_args}) + if(NOT DEFINED DT_PREPROCESS_${arg}) + message(FATAL_ERROR "dt_preprocess() missing required argument: ${arg}") + endif() + endforeach() + + set(include_opts) + foreach(dir ${DT_PREPROCESS_INCLUDE_DIRECTORIES}) + list(APPEND include_opts -isystem ${dir}) + endforeach() + + set(source_opts) + foreach(file ${DT_PREPROCESS_SOURCE_FILES}) + list(APPEND source_opts -include ${file}) + endforeach() + + set(deps_opts) + if(DEFINED DT_PREPROCESS_DEPS_FILE) + list(APPEND deps_opts -MD -MF ${DT_PREPROCESS_DEPS_FILE}) + endif() + + set(workdir_opts) + if(DEFINED DT_PREPROCESS_WORKING_DIRECTORY) + list(APPEND workdir_opts WORKING_DIRECTORY ${DT_PREPROCESS_WORKING_DIRECTORY}) + endif() + + # We are leaving linemarker directives enabled on purpose. This tells + # dtlib where each line actually came from, which improves error + # reporting. + set(preprocess_cmd ${DT_PREPROCESS_CPP} + -x assembler-with-cpp + -nostdinc + ${include_opts} + ${source_opts} + ${NOSYSDEF_CFLAG} + -D__DTS__ + ${DT_PREPROCESS_EXTRA_CPPFLAGS} + -E # Stop after preprocessing + ${deps_opts} + -o ${DT_PREPROCESS_OUT_FILE} + ${ZEPHYR_BASE}/misc/empty_file.c + ${workdir_opts}) + + execute_process(COMMAND ${preprocess_cmd} RESULT_VARIABLE ret) + if(NOT "${ret}" STREQUAL "0") + message(FATAL_ERROR "failed to preprocess devicetree files (error code ${ret}): ${DT_PREPROCESS_SOURCE_FILES}") + endif() +endfunction() + +######################################################## +# 5. Zephyr linker functions ######################################################## # 5.1. zephyr_linker* # @@ -4194,3 +4352,106 @@ macro(zephyr_linker_arg_val_list list arguments) endif() endforeach() endmacro() + +######################################################## +# 6. Function helper macros +######################################################## +# +# Set of CMake macros to facilitate argument processing when defining functions. +# + +# +# Helper macro for verifying that at least one of the required arguments has +# been provided by the caller. +# +# A FATAL_ERROR will be raised if not one of the required arguments has been +# passed by the caller. +# +# Usage: +# zephyr_check_arguments_required( [ ...]) +# +macro(zephyr_check_arguments_required function prefix) + set(check_defined DEFINED) + zephyr_check_flags_required(${function} ${prefix} ${ARGN}) + set(check_defined) +endmacro() + +# +# Helper macro for verifying that at least one of the required flags has +# been provided by the caller. +# +# A FATAL_ERROR will be raised if not one of the required arguments has been +# passed by the caller. +# +# Usage: +# zephyr_check_flags_required( [ ...]) +# +macro(zephyr_check_flags_required function prefix) + set(required_found FALSE) + foreach(required ${ARGN}) + if(${check_defined} ${prefix}_${required}) + set(required_found TRUE) + endif() + endforeach() + + if(NOT required_found) + message(FATAL_ERROR "${function}(...) missing a required argument: ${ARGN}") + endif() +endmacro() + +# +# Helper macro for verifying that all the required arguments have been +# provided by the caller. +# +# A FATAL_ERROR will be raised if one of the required arguments is missing. +# +# Usage: +# zephyr_check_arguments_required_all( [ ...]) +# +macro(zephyr_check_arguments_required_all function prefix) + foreach(required ${ARGN}) + if(NOT DEFINED ${prefix}_${required}) + message(FATAL_ERROR "${function}(...) missing a required argument: ${required}") + endif() + endforeach() +endmacro() + +# +# Helper macro for verifying that none of the mutual exclusive arguments are +# provided together. +# +# A FATAL_ERROR will be raised if any of the arguments are given together. +# +# Usage: +# zephyr_check_arguments_exclusive( [ ...]) +# +macro(zephyr_check_arguments_exclusive function prefix) + set(check_defined DEFINED) + zephyr_check_flags_exclusive(${function} ${prefix} ${ARGN}) + set(check_defined) +endmacro() + +# +# Helper macro for verifying that none of the mutual exclusive flags are +# provided together. +# +# A FATAL_ERROR will be raised if any of the flags are given together. +# +# Usage: +# zephyr_check_flags_exclusive( [ ...]) +# +macro(zephyr_check_flags_exclusive function prefix) + set(args_defined) + foreach(arg ${ARGN}) + if(${check_defined} ${prefix}_${arg}) + list(APPEND args_defined ${arg}) + endif() + endforeach() + list(LENGTH args_defined exclusive_length) + if(exclusive_length GREATER 1) + list(POP_FRONT args_defined argument) + message(FATAL_ERROR "${function}(${argument} ...) cannot be used with " + "argument: ${args_defined}" + ) + endif() +endmacro() diff --git a/cmake/modules/generated_file_directories.cmake b/cmake/modules/generated_file_directories.cmake new file mode 100644 index 000000000000..aac3b39a6f9b --- /dev/null +++ b/cmake/modules/generated_file_directories.cmake @@ -0,0 +1,24 @@ +# SPDX-License-Identifier: Apache-2.0 + +include_guard(GLOBAL) + +# This file creates locations in the build directory +# for placing generated files. +# +# Outcome: +# - BINARY_DIR_INCLUDE is set to ${PROJECT_BINARY_DIR}/include +# - BINARY_DIR_INCLUDE_GENERATED is set to ${BINARY_DIR_INCLUDE}/generated +# - BINARY_DIR_INCLUDE_GENERATED is a directory +# +# Required variables: +# None +# +# Optional variables: +# None +# +# Optional environment variables: +# None + +set(BINARY_DIR_INCLUDE ${PROJECT_BINARY_DIR}/include/generated) +set(BINARY_DIR_INCLUDE_GENERATED ${PROJECT_BINARY_DIR}/include/generated) +file(MAKE_DIRECTORY ${BINARY_DIR_INCLUDE_GENERATED}) diff --git a/cmake/modules/pre_dt.cmake b/cmake/modules/pre_dt.cmake new file mode 100644 index 000000000000..b19fd7f7fb57 --- /dev/null +++ b/cmake/modules/pre_dt.cmake @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: Apache-2.0 +# +# Copyright (c) 2021, 2023 Nordic Semiconductor ASA + +include_guard(GLOBAL) +include(extensions) + +# Finalize the value of DTS_ROOT, so we know where all our +# DTS files, bindings, and vendor prefixes are. +# +# Outcome: +# The following variables will be defined when this CMake module completes: +# +# - CMAKE_DTS_PREPROCESSOR: the path to the preprocessor to use +# for devicetree files +# - DTS_ROOT: a deduplicated list of places where devicetree +# implementation files (like bindings, vendor prefixes, etc.) are +# found +# - DTS_ROOT_SYSTEM_INCLUDE_DIRS: set to "PATH1 PATH2 ...", +# with one path per potential location where C preprocessor #includes +# may be found for devicetree files +# +# Required variables: +# None. +# +# Optional variables: +# - APPLICATION_SOURCE_DIR: path to app (added to DTS_ROOT) +# - BOARD_DIR: directory containing the board definition (added to DTS_ROOT) +# - DTS_ROOT: initial contents may be populated here +# - ZEPHYR_BASE: path to zephyr repository (added to DTS_ROOT) +# - SHIELD_DIRS: paths to shield definitions (added to DTS_ROOT) + +# Using a function avoids polluting the parent scope unnecessarily. +function(pre_dt_module_run) + # Convert relative paths to absolute paths relative to the application + # source directory. + zephyr_file(APPLICATION_ROOT DTS_ROOT) + + # DTS_ROOT always includes the application directory, the board + # directory, shield directories, and ZEPHYR_BASE. + list(APPEND + DTS_ROOT + ${APPLICATION_SOURCE_DIR} + ${BOARD_DIR} + ${SHIELD_DIRS} + ${ZEPHYR_BASE} + ) + + # Convert the directories in DTS_ROOT to absolute paths without + # symlinks. + # + # DTS directories can come from multiple places. Some places, like a + # user's CMakeLists.txt can preserve symbolic links. Others, like + # scripts/zephyr_module.py --settings-out resolve them. + unset(real_dts_root) + foreach(dts_dir ${DTS_ROOT}) + file(REAL_PATH ${dts_dir} real_dts_dir) + list(APPEND real_dts_root ${real_dts_dir}) + endforeach() + set(DTS_ROOT ${real_dts_root}) + + # Finalize DTS_ROOT. + list(REMOVE_DUPLICATES DTS_ROOT) + + # Finalize DTS_ROOT_SYSTEM_INCLUDE_DIRS. + set(DTS_ROOT_SYSTEM_INCLUDE_DIRS) + foreach(dts_root ${DTS_ROOT}) + foreach(dts_root_path + include + include/zephyr + dts/common + dts/${ARCH} + dts + ) + get_filename_component(full_path ${dts_root}/${dts_root_path} REALPATH) + if(EXISTS ${full_path}) + list(APPEND DTS_ROOT_SYSTEM_INCLUDE_DIRS ${full_path}) + endif() + endforeach() + endforeach() + + # Set output variables. + set(DTS_ROOT ${DTS_ROOT} PARENT_SCOPE) + set(DTS_ROOT_SYSTEM_INCLUDE_DIRS ${DTS_ROOT_SYSTEM_INCLUDE_DIRS} PARENT_SCOPE) +endfunction() + +pre_dt_module_run() diff --git a/cmake/modules/snippets.cmake b/cmake/modules/snippets.cmake new file mode 100644 index 000000000000..c3929c86b430 --- /dev/null +++ b/cmake/modules/snippets.cmake @@ -0,0 +1,125 @@ +# SPDX-License-Identifier: Apache-2.0 +# +# Copyright (c) 2021, Nordic Semiconductor ASA + +# Snippets support +# +# This module: +# +# - searches for snippets in zephyr and any modules +# - validates the SNIPPET input variable, if any +# +# If SNIPPET contains a snippet name that is not found, an error +# will be raised, and the list of valid snippets will be printed. +# +# Outcome: +# The following variables will be defined when this module completes: +# +# - SNIPPET_AS_LIST: CMake list of snippet names, created from the +# SNIPPET variable +# - SNIPPET_ROOT: CMake list of snippet roots, deduplicated and with +# ZEPHYR_BASE appended at the end +# +# The following variables may be updated when this module completes: +# - DTC_OVERLAY_FILE +# - OVERLAY_CONFIG +# +# The following targets will be defined when this CMake module completes: +# - snippets: when invoked, a list of valid snippets will be printed +# +# Optional variables: +# - SNIPPET_ROOT: input CMake list of snippet roots (directories containing +# additional snippet implementations); this should not include ZEPHYR_BASE, +# as that will be added by this module + +include_guard(GLOBAL) + +include(extensions) + +# Warn the user if SNIPPET changes later. Such changes are ignored. +zephyr_check_cache(SNIPPET WATCH) + +# Putting the body into a function prevents us from polluting the +# parent scope. We'll set our outcome variables in the parent scope of +# the function to ensure the outcome of the module. +function(zephyr_process_snippets) + set(snippets_py ${ZEPHYR_BASE}/scripts/snippets.py) + set(snippets_generated ${CMAKE_BINARY_DIR}/zephyr/snippets_generated.cmake) + + # Set SNIPPET_AS_LIST, removing snippets_generated.cmake if we are + # running cmake again and snippets are no longer requested. + if (NOT DEFINED SNIPPET) + set(SNIPPET_AS_LIST "" PARENT_SCOPE) + file(REMOVE ${snippets_generated}) + else() + string(REPLACE " " ";" SNIPPET_AS_LIST "${SNIPPET}") + set(SNIPPET_AS_LIST "${SNIPPET_AS_LIST}" PARENT_SCOPE) + endif() + + # Set SNIPPET_ROOT. + list(APPEND SNIPPET_ROOT ${APPLICATION_SOURCE_DIR}) + list(APPEND SNIPPET_ROOT ${ZEPHYR_BASE}) + unset(real_snippet_root) + foreach(snippet_dir ${SNIPPET_ROOT}) + # The user might have put a symbolic link in here, for example. + file(REAL_PATH ${snippet_dir} real_snippet_dir) + list(APPEND real_snippet_root ${real_snippet_dir}) + endforeach() + set(SNIPPET_ROOT ${real_snippet_root}) + list(REMOVE_DUPLICATES SNIPPET_ROOT) + set(SNIPPET_ROOT "${SNIPPET_ROOT}" PARENT_SCOPE) + + # Generate and include snippets_generated.cmake. + # The Python script is responsible for checking for unknown + # snippets. + set(snippet_root_args) + foreach(root IN LISTS SNIPPET_ROOT) + list(APPEND snippet_root_args --snippet-root "${root}") + endforeach() + set(requested_snippet_args) + foreach(snippet_name ${SNIPPET_AS_LIST}) + list(APPEND requested_snippet_args --snippet "${snippet_name}") + endforeach() + execute_process(COMMAND ${PYTHON_EXECUTABLE} + ${snippets_py} + ${snippet_root_args} + ${requested_snippet_args} + --cmake-out ${snippets_generated} + OUTPUT_VARIABLE output + ERROR_VARIABLE output + RESULT_VARIABLE ret) + if(${ret}) + message(FATAL_ERROR "${output}") + endif() + include(${snippets_generated}) + + # Propagate include()d build system settings to the caller. + set(DTC_OVERLAY_FILE ${DTC_OVERLAY_FILE} PARENT_SCOPE) + set(OVERLAY_CONFIG ${OVERLAY_CONFIG} PARENT_SCOPE) + + # Create the 'snippets' target. Each snippet is printed in a + # separate command because build system files are not fond of + # newlines. + list(TRANSFORM SNIPPET_NAMES PREPEND "COMMAND;${CMAKE_COMMAND};-E;echo;" + OUTPUT_VARIABLE snippets_target_cmd) + add_custom_target(snippets ${snippets_target_cmd} USES_TERMINAL) + + # If snippets were requested, print messages for each one. + if(SNIPPET_AS_LIST) + # Print the requested snippets. + set(snippet_names "Snippet(s):") + foreach(snippet IN LISTS SNIPPET_AS_LIST) + string(APPEND snippet_names " ${snippet}") + endforeach() + message(STATUS "${snippet_names}") + endif() + + # Re-run cmake if any files we depend on changed. + set_property(DIRECTORY APPEND PROPERTY + CMAKE_CONFIGURE_DEPENDS + ${snippets_py} + ${SNIPPET_PATHS} # generated variable + ) +endfunction() + +zephyr_process_snippets() diff --git a/cmake/modules/version.cmake b/cmake/modules/version.cmake index 666adc3e4bd5..0969a269e6b9 100644 --- a/cmake/modules/version.cmake +++ b/cmake/modules/version.cmake @@ -34,6 +34,7 @@ include(${ZEPHYR_BASE}/cmake/hex.cmake) file(READ ${ZEPHYR_BASE}/VERSION ver) +set_property(DIRECTORY APPEND PROPERTY CMAKE_CONFIGURE_DEPENDS ${ZEPHYR_BASE}/VERSION) string(REGEX MATCH "VERSION_MAJOR = ([0-9]*)" _ ${ver}) set(PROJECT_VERSION_MAJOR ${CMAKE_MATCH_1}) diff --git a/cmake/modules/west.cmake b/cmake/modules/west.cmake index c3e40e76791a..89d836e71819 100644 --- a/cmake/modules/west.cmake +++ b/cmake/modules/west.cmake @@ -62,7 +62,7 @@ else() # We can import west from PYTHON_EXECUTABLE and have its version. # Make sure its version matches the minimum required one. - set(MIN_WEST_VERSION 0.7.1) + set_ifndef(MIN_WEST_VERSION 0.7.1) if(${west_version} VERSION_LESS ${MIN_WEST_VERSION}) message(FATAL_ERROR "The detected west version, ${west_version}, is unsupported.\n\ The minimum supported version is ${MIN_WEST_VERSION}.\n\ diff --git a/cmake/modules/zephyr_default.cmake b/cmake/modules/zephyr_default.cmake index 908d03fceb97..8d651e0b8fee 100644 --- a/cmake/modules/zephyr_default.cmake +++ b/cmake/modules/zephyr_default.cmake @@ -81,8 +81,10 @@ list(APPEND zephyr_cmake_modules zephyr_module) list(APPEND zephyr_cmake_modules boards) list(APPEND zephyr_cmake_modules shields) +list(APPEND zephyr_cmake_modules snippets) list(APPEND zephyr_cmake_modules arch) list(APPEND zephyr_cmake_modules configuration_files) +list(APPEND zephyr_cmake_modules generated_file_directories) # Include board specific device-tree flags before parsing. set(pre_dt_board "\${BOARD_DIR}/pre_dt_board.cmake" OPTIONAL) diff --git a/cmake/modules/zephyr_module.cmake b/cmake/modules/zephyr_module.cmake index 6d36972264e4..05d13cf5f246 100644 --- a/cmake/modules/zephyr_module.cmake +++ b/cmake/modules/zephyr_module.cmake @@ -42,11 +42,14 @@ if(ZEPHYR_EXTRA_MODULES) endif() file(MAKE_DIRECTORY ${KCONFIG_BINARY_DIR}) -set(KCONFIG_MODULES_FILE ${KCONFIG_BINARY_DIR}/Kconfig.modules) -set(ZEPHYR_SETTINGS_FILE ${CMAKE_BINARY_DIR}/zephyr_settings.txt) +set(kconfig_modules_file ${KCONFIG_BINARY_DIR}/Kconfig.modules) +set(kconfig_sysbuild_file ${KCONFIG_BINARY_DIR}/Kconfig.sysbuild.modules) +set(cmake_modules_file ${CMAKE_BINARY_DIR}/zephyr_modules.txt) +set(cmake_sysbuild_file ${CMAKE_BINARY_DIR}/sysbuild_modules.txt) +set(zephyr_settings_file ${CMAKE_BINARY_DIR}/zephyr_settings.txt) if(WEST) - set(WEST_ARG "--zephyr-base" ${ZEPHYR_BASE}) + set(west_arg "--zephyr-base" ${ZEPHYR_BASE}) endif() if(WEST OR ZEPHYR_MODULES) @@ -55,12 +58,14 @@ if(WEST OR ZEPHYR_MODULES) execute_process( COMMAND ${PYTHON_EXECUTABLE} ${ZEPHYR_BASE}/scripts/zephyr_module.py - ${WEST_ARG} + ${west_arg} ${ZEPHYR_MODULES_ARG} ${ZEPHYR_EXTRA_MODULES_ARG} - --kconfig-out ${KCONFIG_MODULES_FILE} - --cmake-out ${CMAKE_BINARY_DIR}/zephyr_modules.txt - --settings-out ${ZEPHYR_SETTINGS_FILE} + --kconfig-out ${kconfig_modules_file} + --cmake-out ${cmake_modules_file} + --sysbuild-kconfig-out ${kconfig_sysbuild_file} + --sysbuild-cmake-out ${cmake_sysbuild_file} + --settings-out ${zephyr_settings_file} WORKING_DIRECTORY ${ZEPHYR_BASE} ERROR_VARIABLE zephyr_module_error_text @@ -72,9 +77,9 @@ if(WEST OR ZEPHYR_MODULES) message(FATAL_ERROR "${zephyr_module_error_text}") endif() - if(EXISTS ${ZEPHYR_SETTINGS_FILE}) - file(STRINGS ${ZEPHYR_SETTINGS_FILE} ZEPHYR_SETTINGS_TXT ENCODING UTF-8 REGEX "^[^#]") - foreach(setting ${ZEPHYR_SETTINGS_TXT}) + if(EXISTS ${zephyr_settings_file}) + file(STRINGS ${zephyr_settings_file} zephyr_settings_txt ENCODING UTF-8 REGEX "^[^#]") + foreach(setting ${zephyr_settings_txt}) # Match : for each line of file, each corresponding to # a setting. The use of quotes is required due to CMake not supporting # lazy regexes (it supports greedy only). @@ -87,55 +92,90 @@ if(WEST OR ZEPHYR_MODULES) # Append ZEPHYR_BASE as a default ext root at lowest priority list(APPEND MODULE_EXT_ROOT ${ZEPHYR_BASE}) - if(EXISTS ${CMAKE_BINARY_DIR}/zephyr_modules.txt) - file(STRINGS ${CMAKE_BINARY_DIR}/zephyr_modules.txt ZEPHYR_MODULES_TXT - ENCODING UTF-8) + if(EXISTS ${cmake_modules_file}) + file(STRINGS ${cmake_modules_file} zephyr_modules_txt ENCODING UTF-8) + endif() - set(ZEPHYR_MODULE_NAMES) - foreach(module ${ZEPHYR_MODULES_TXT}) - # Match "":"" for each line of file, each corresponding to - # one module. The use of quotes is required due to CMake not supporting - # lazy regexes (it supports greedy only). - string(REGEX REPLACE "\"(.*)\":\".*\":\".*\"" "\\1" module_name ${module}) - list(APPEND ZEPHYR_MODULE_NAMES ${module_name}) - endforeach() + set(ZEPHYR_MODULE_NAMES) + foreach(module ${zephyr_modules_txt}) + # Match "":"" for each line of file, each corresponding to + # one module. The use of quotes is required due to CMake not supporting + # lazy regexes (it supports greedy only). + string(REGEX REPLACE "\"(.*)\":\".*\":\".*\"" "\\1" module_name ${module}) + list(APPEND ZEPHYR_MODULE_NAMES ${module_name}) + endforeach() + + if(EXISTS ${cmake_sysbuild_file}) + file(STRINGS ${cmake_sysbuild_file} sysbuild_modules_txt ENCODING UTF-8) endif() + set(SYSBUILD_MODULE_NAMES) + foreach(module ${sysbuild_modules_txt}) + # Match "":"" for each line of file, each corresponding to + # one module. The use of quotes is required due to CMake not supporting + # lazy regexes (it supports greedy only). + string(REGEX REPLACE "\"(.*)\":\".*\":\".*\"" "\\1" module_name ${module}) + list(APPEND SYSBUILD_MODULE_NAMES ${module_name}) + endforeach() + # MODULE_EXT_ROOT is process order which means Zephyr module roots processed # later wins. therefore we reverse the list before processing. list(REVERSE MODULE_EXT_ROOT) foreach(root ${MODULE_EXT_ROOT}) - if(NOT EXISTS ${root}) - message(FATAL_ERROR "No `modules.cmake` found in module root `${root}`.") + set(module_cmake_file_path modules/modules.cmake) + if(NOT EXISTS ${root}/${module_cmake_file_path}) + message(FATAL_ERROR "No `${module_cmake_file_path}` found in module root `${root}`.") endif() - include(${root}/modules/modules.cmake) + include(${root}/${module_cmake_file_path}) endforeach() - if(DEFINED ZEPHYR_MODULES_TXT) - foreach(module ${ZEPHYR_MODULES_TXT}) - # Match "":"" for each line of file, each corresponding to - # one Zephyr module. The use of quotes is required due to CMake not - # supporting lazy regexes (it supports greedy only). - string(CONFIGURE ${module} module) - string(REGEX REPLACE "\"(.*)\":\".*\":\".*\"" "\\1" module_name ${module}) - string(REGEX REPLACE "\".*\":\"(.*)\":\".*\"" "\\1" module_path ${module}) - string(REGEX REPLACE "\".*\":\".*\":\"(.*)\"" "\\1" cmake_path ${module}) - - zephyr_string(SANITIZE TOUPPER MODULE_NAME_UPPER ${module_name}) - if(NOT ${MODULE_NAME_UPPER} STREQUAL CURRENT) - set(ZEPHYR_${MODULE_NAME_UPPER}_MODULE_DIR ${module_path}) - set(ZEPHYR_${MODULE_NAME_UPPER}_CMAKE_DIR ${cmake_path}) - else() - message(FATAL_ERROR "Found Zephyr module named: ${module_name}\n\ + foreach(module ${zephyr_modules_txt}) + # Match "":"" for each line of file, each corresponding to + # one Zephyr module. The use of quotes is required due to CMake not + # supporting lazy regexes (it supports greedy only). + string(CONFIGURE ${module} module) + string(REGEX REPLACE "\"(.*)\":\".*\":\".*\"" "\\1" module_name ${module}) + string(REGEX REPLACE "\".*\":\"(.*)\":\".*\"" "\\1" module_path ${module}) + string(REGEX REPLACE "\".*\":\".*\":\"(.*)\"" "\\1" cmake_path ${module}) + + zephyr_string(SANITIZE TOUPPER MODULE_NAME_UPPER ${module_name}) + if(NOT ${MODULE_NAME_UPPER} STREQUAL CURRENT) + set(ZEPHYR_${MODULE_NAME_UPPER}_MODULE_DIR ${module_path}) + set(ZEPHYR_${MODULE_NAME_UPPER}_CMAKE_DIR ${cmake_path}) + else() + message(FATAL_ERROR "Found Zephyr module named: ${module_name}\n\ ${MODULE_NAME_UPPER} is a restricted name for Zephyr modules as it is used for \ \${ZEPHYR_${MODULE_NAME_UPPER}_MODULE_DIR} CMake variable.") - endif() - endforeach() - endif() + endif() + endforeach() + + foreach(module ${sysbuild_modules_txt}) + # Match "":"" for each line of file, each corresponding to + # one Zephyr module. The use of quotes is required due to CMake not + # supporting lazy regexes (it supports greedy only). + string(CONFIGURE ${module} module) + string(REGEX REPLACE "\"(.*)\":\".*\":\".*\"" "\\1" module_name ${module}) + string(REGEX REPLACE "\".*\":\"(.*)\":\".*\"" "\\1" module_path ${module}) + string(REGEX REPLACE "\".*\":\".*\":\"(.*)\"" "\\1" cmake_path ${module}) + + zephyr_string(SANITIZE TOUPPER MODULE_NAME_UPPER ${module_name}) + if(NOT ${MODULE_NAME_UPPER} STREQUAL CURRENT) + set(SYSBUILD_${MODULE_NAME_UPPER}_MODULE_DIR ${module_path}) + set(SYSBUILD_${MODULE_NAME_UPPER}_CMAKE_DIR ${cmake_path}) + else() + message(FATAL_ERROR "Found Zephyr module named: ${module_name}\n\ +${MODULE_NAME_UPPER} is a restricted name for Zephyr modules as it is used for \ +\${SYSBUILD_${MODULE_NAME_UPPER}_MODULE_DIR} CMake variable.") + endif() + endforeach() else() - file(WRITE ${KCONFIG_MODULES_FILE} + file(WRITE ${kconfig_modules_file} + "# No west and no Zephyr modules\n" + ) + + file(WRITE ${kconfig_sysbuild_file} "# No west and no Zephyr modules\n" ) diff --git a/cmake/package_helper.cmake b/cmake/package_helper.cmake index 36741bbc9506..5f48185a57b5 100644 --- a/cmake/package_helper.cmake +++ b/cmake/package_helper.cmake @@ -42,7 +42,7 @@ # find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) # the 'foo.overlay' must be specified using '-DOVERLAY_CONFIG=foo.overlay' -cmake_minimum_required(VERSION 3.20.0) +cmake_minimum_required(VERSION 3.20.5) # add_custom_target and set_target_properties are not supported in script mode. # However, several Zephyr CMake modules create custom target for user convenience diff --git a/cmake/toolchain/arcmwdt/generic.cmake b/cmake/toolchain/arcmwdt/generic.cmake index 6dec614d1cb0..f7e98d89129f 100644 --- a/cmake/toolchain/arcmwdt/generic.cmake +++ b/cmake/toolchain/arcmwdt/generic.cmake @@ -1,6 +1,16 @@ # SPDX-License-Identifier: Apache-2.0 zephyr_get(ARCMWDT_TOOLCHAIN_PATH) + +if(NOT DEFINED ARCMWDT_TOOLCHAIN_PATH AND DEFINED ENV{METAWARE_ROOT}) + message(WARNING "ARCMWDT_TOOLCHAIN_PATH is not set, use default toolchain from METAWARE_ROOT") + set(METAWARE_ROOT $ENV{METAWARE_ROOT}) + if(NOT EXISTS ${METAWARE_ROOT}) + message(FATAL_ERROR "Nothing found at METAWARE_ROOT: '${METAWARE_ROOT}'") + endif() + cmake_path(GET METAWARE_ROOT PARENT_PATH ARCMWDT_TOOLCHAIN_PATH) +endif() + assert(ARCMWDT_TOOLCHAIN_PATH "ARCMWDT_TOOLCHAIN_PATH is not set") if(NOT EXISTS ${ARCMWDT_TOOLCHAIN_PATH}) diff --git a/cmake/toolchain/armclang/Kconfig b/cmake/toolchain/armclang/Kconfig index c2df1e1024aa..72ae8149eeeb 100644 --- a/cmake/toolchain/armclang/Kconfig +++ b/cmake/toolchain/armclang/Kconfig @@ -15,6 +15,7 @@ choice LIBC_IMPLEMENTATION config ARMCLANG_STD_LIBC bool "ARM Compiler C library" + select COMMON_LIBC_TIME if POSIX_CLOCK help Use the full Arm Compiler runtime libraries. A reduced Zephyr minimal libc will be used for library functionality diff --git a/cmake/toolchain/llvm/Kconfig b/cmake/toolchain/llvm/Kconfig new file mode 100644 index 000000000000..b16d02739391 --- /dev/null +++ b/cmake/toolchain/llvm/Kconfig @@ -0,0 +1,19 @@ +# Copyright (c) 2023 Intel Corporation +# SPDX-License-Identifier: Apache-2.0 + +choice LLVM_LINKER + prompt "LLVM Linker" + depends on "${ZEPHYR_TOOLCHAIN_VARIANT}" = "llvm" + default LLVM_USE_LD + +config LLVM_USE_LD + bool "GNU ld" + help + Use binutils ld linker with llvm/clang. + +config LLVM_USE_LLD + bool "LLVM lld" + help + Use LLVM built-in lld linker with llvm/clang. + +endchoice diff --git a/cmake/toolchain/llvm/clang.cfg b/cmake/toolchain/llvm/clang.cfg new file mode 100644 index 000000000000..e707e0c34b77 --- /dev/null +++ b/cmake/toolchain/llvm/clang.cfg @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: Apache-2.0 + +# Tell clang to give us the actual path to libgcc.a +# when using --print-libgcc-file-name. Or else it may +# decide to return path to libclang_rt.* if its default +# is to use that library. Since we do -lgcc by default, +# better tell clang to give us the correct path to libgcc.a. +--rtlib=libgcc diff --git a/cmake/toolchain/llvm/generic.cmake b/cmake/toolchain/llvm/generic.cmake index 3cdf6d51ca5b..f0a8cf453552 100644 --- a/cmake/toolchain/llvm/generic.cmake +++ b/cmake/toolchain/llvm/generic.cmake @@ -1,5 +1,9 @@ # SPDX-License-Identifier: Apache-2.0 +# Purpose of the generic.cmake is to define a generic C compiler which can be +# used for devicetree pre-processing and other pre-processing tasks which must +# be performed before the target can be determined. + # Todo: deprecate CLANG_ROOT_DIR set_ifndef(LLVM_TOOLCHAIN_PATH "$ENV{CLANG_ROOT_DIR}") zephyr_get(LLVM_TOOLCHAIN_PATH) @@ -11,28 +15,11 @@ endif() set(LLVM_TOOLCHAIN_PATH ${CLANG_ROOT_DIR} CACHE PATH "clang install directory") set(COMPILER clang) -if(CONFIG_LLVM_USE_LD) - set(LINKER ld) -else() - set(LINKER lld) -endif() set(BINTOOLS llvm) -if("${ARCH}" STREQUAL "arm") - set(triple arm-none-eabi) - set(CMAKE_EXE_LINKER_FLAGS_INIT "--specs=nosys.specs") -elseif("${ARCH}" STREQUAL "x86") - if(CONFIG_64BIT) - set(triple x86_64-pc-none-elf) - else() - set(triple i686-pc-none-elf) - endif() -endif() - -set(CMAKE_C_COMPILER_TARGET ${triple}) -set(CMAKE_ASM_COMPILER_TARGET ${triple}) -set(CMAKE_CXX_COMPILER_TARGET ${triple}) - set(TOOLCHAIN_HAS_NEWLIB OFF CACHE BOOL "True if toolchain supports newlib") +list(APPEND TOOLCHAIN_C_FLAGS --config ${ZEPHYR_BASE}/cmake/toolchain/llvm/clang.cfg) +list(APPEND TOOLCHAIN_LD_FLAGS --config ${ZEPHYR_BASE}/cmake/toolchain/llvm/clang.cfg) + message(STATUS "Found toolchain: host (clang/ld)") diff --git a/cmake/toolchain/llvm/target.cmake b/cmake/toolchain/llvm/target.cmake index b970dc3e7d8b..0d180304c8ee 100644 --- a/cmake/toolchain/llvm/target.cmake +++ b/cmake/toolchain/llvm/target.cmake @@ -1,3 +1,26 @@ # SPDX-License-Identifier: Apache-2.0 -# Intentionally left blank. +if(CONFIG_LLVM_USE_LD) + set(LINKER ld) +elseif(CONFIG_LLVM_USE_LLD) + set(LINKER lld) +endif() + +if("${ARCH}" STREQUAL "arm") + set(triple arm-none-eabi) + set(CMAKE_EXE_LINKER_FLAGS_INIT "--specs=nosys.specs") +elseif("${ARCH}" STREQUAL "x86") + if(CONFIG_64BIT) + set(triple x86_64-pc-none-elf) + else() + set(triple i686-pc-none-elf) + endif() +endif() + +if(DEFINED triple) + set(CMAKE_C_COMPILER_TARGET ${triple}) + set(CMAKE_ASM_COMPILER_TARGET ${triple}) + set(CMAKE_CXX_COMPILER_TARGET ${triple}) + + unset(triple) +endif() diff --git a/doc/CMakeLists.txt b/doc/CMakeLists.txt index 6b55729ffbd4..7c03af46d8c0 100644 --- a/doc/CMakeLists.txt +++ b/doc/CMakeLists.txt @@ -3,6 +3,7 @@ cmake_minimum_required(VERSION 3.20.0) project(Zephyr-Kernel-Doc LANGUAGES) +set(MIN_WEST_VERSION 1.0.0) find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE} .. COMPONENTS doc) file(TO_CMAKE_PATH "${ZEPHYR_BASE}" ZEPHYR_BASE) diff --git a/doc/_scripts/redirects.py b/doc/_scripts/redirects.py index 61d4666df0c2..ac9cb6f33bf9 100644 --- a/doc/_scripts/redirects.py +++ b/doc/_scripts/redirects.py @@ -19,6 +19,9 @@ ('development_process/issues', 'project/issues'), ('development_process/proposals', 'project/proposals'), ('getting_started/index', 'develop/getting_started/index'), + ('getting_started/toolchain_3rd_party_x_compilers', 'develop/toolchains/index'), + ('getting_started/toolchain_custom_cmake', 'develop/toolchains/custom_cmake'), + ('getting_started/toolchain_other_x_compilers', 'develop/toolchains/other_x_compilers'), ('guides/arch/arm_cortex_m', 'hardware/arch/arm_cortex_m'), ('guides/arch/index', 'hardware/arch/index'), ('guides/arch/x86', 'hardware/arch/x86'), diff --git a/doc/build/dts/troubleshooting.rst b/doc/build/dts/troubleshooting.rst index 4997b158a838..faf6600ccc19 100644 --- a/doc/build/dts/troubleshooting.rst +++ b/doc/build/dts/troubleshooting.rst @@ -82,13 +82,13 @@ And if you're trying to **set** that property in a devicetree overlay: Look at the preprocessor output ******************************* -To save preprocessor output when using GCC-based toolchains, add -``-save-temps=obj`` to the ``EXTRA_CFLAGS`` CMake variable. For example, to -build :ref:`hello_world` with west with this option set, use: +To save preprocessor output files, enable the +:kconfig:option:`CONFIG_COMPILER_SAVE_TEMPS` option. For example, to build +:ref:`hello_world` with west with this option set, use: .. code-block:: sh - west build -b BOARD samples/hello_world -- -DEXTRA_CFLAGS=-save-temps=obj + west build -b BOARD samples/hello_world -- -DCONFIG_COMPILER_SAVE_TEMPS=y This will create a preprocessor output file named :file:`foo.c.i` in the build directory for each source file :file:`foo.c`. diff --git a/doc/build/index.rst b/doc/build/index.rst index dc0c6bceffd0..75be277c7219 100644 --- a/doc/build/index.rst +++ b/doc/build/index.rst @@ -11,5 +11,6 @@ Build and Configuration Systems cmake/index.rst dts/index kconfig/index.rst + snippets/index.rst zephyr_cmake_package.rst sysbuild/index.rst diff --git a/doc/build/kconfig/setting.rst b/doc/build/kconfig/setting.rst index c9e121bf247c..048aea25fa1b 100644 --- a/doc/build/kconfig/setting.rst +++ b/doc/build/kconfig/setting.rst @@ -132,8 +132,10 @@ settings from three sources: 3. The application configuration -The application configuration can come from the sources below. By default, -:file:`prj.conf` is used. +The application configuration can come from the sources below (each file is +known as a Kconfig fragment, which are then merged to get the final +configuration used for a particular build). By default, :file:`prj.conf` is +used. 1. If ``CONF_FILE`` is set, the configuration file(s) specified in it are merged and used as the application configuration. ``CONF_FILE`` can be set @@ -163,8 +165,8 @@ The application configuration can come from the sources below. By default, configuration directory, the result of merging it with :file:`prj.conf` and :file:`boards/.conf` is used. -6. Otherwise, :file:`prj.conf` is used if it exists in the application - configuration directory +6. Otherwise, :file:`prj.conf` is used from the application configuration + directory. If it does not exist then a fatal error will be emitted. All configuration files will be taken from the application's configuration directory except for files with an absolute path that are given with the diff --git a/doc/build/snippets/design.rst b/doc/build/snippets/design.rst new file mode 100644 index 000000000000..03d80f597ec0 --- /dev/null +++ b/doc/build/snippets/design.rst @@ -0,0 +1,37 @@ +Snippets Design +############### + +This page documents design goals for the snippets feature. +Further information can be found in `Issue #51834`_. + +.. _Issue #51834: https://github.com/zephyrproject-rtos/zephyr/issues/51834 + +- **extensible**: for example, it is possible to add board support for an + existing built-in snippet without modifying the zephyr repository + +- **composable**: it is possible to use multiple snippets at once, for example + using: + + .. code-block:: console + + west build -S -S ... + +- **able to combine multiple types of configuration**: snippets make it possible + to store multiple different types of build system settings in one place, and + apply them all together + +- **specializable**: for example, it is possible to customize a snippet's + behavior for a particular board, or board revision + +- **future-proof and backwards-compatible**: arbitrary future changes to the + snippets feature will be possible without breaking backwards compatibility + for older snippets + +- **applicable to purely "software" changes**: unlike the shields feature, + snippets do not assume the presence of a "daughterboard", "shield", "hat", or + any other type of external assembly which is connected to the main board + +- **DRY** (don't repeat yourself): snippets allow you to skip unnecessary + repetition; for example, you can apply the same board-specific configuration + to boards ``foo`` and ``bar`` by specifying ``/(foo|bar)/`` as a regular + expression for the settings, which will then apply to both boards diff --git a/doc/build/snippets/index.rst b/doc/build/snippets/index.rst new file mode 100644 index 000000000000..53db2b8f1989 --- /dev/null +++ b/doc/build/snippets/index.rst @@ -0,0 +1,25 @@ +.. _snippets: + +Snippets +######## + +Snippets are a way to save build system settings in one place, and then use +those settings when you build any Zephyr application. This lets you save common +configuration separately when it applies to multiple different applications. + +Some example use cases for snippets are: + +- changing your board's console backend from a "real" UART to a USB CDC-ACM UART +- enabling frequently-used debugging options +- applying interrelated configuration settings to your "main" CPU and a + co-processor core on an AMP SoC + +The following pages document this feature. + +.. toctree:: + :maxdepth: 1 + + using.rst + /snippets/index.rst + writing.rst + design.rst diff --git a/doc/build/snippets/using.rst b/doc/build/snippets/using.rst new file mode 100644 index 000000000000..608e2924302e --- /dev/null +++ b/doc/build/snippets/using.rst @@ -0,0 +1,39 @@ +.. _using-snippets: + +Using Snippets +############## + +.. tip:: + + See :ref:`built-in-snippets` for a list of snippets that are provided by + Zephyr. + +Snippets have names. You use snippets by giving their names to the build +system. + +With west build +*************** + +To use a snippet named ``foo`` when building an application ``app``: + +.. code-block:: console + + west build -S foo app + +To use multiple snippets: + +.. code-block:: console + + west build -S snippet1 -S snippet2 [...] app + +With cmake +********** + +If you are running CMake directly instead of using ``west build``, use the +``SNIPPET`` variable. This is a whitespace- or semicolon-separated list of +snippet names you want to use. For example: + +.. code-block:: console + + cmake -Sapp -Bbuild -DSNIPPET="snippet1;snippet2" [...] + cmake --build build diff --git a/doc/build/snippets/writing.rst b/doc/build/snippets/writing.rst new file mode 100644 index 000000000000..66101e8e2b63 --- /dev/null +++ b/doc/build/snippets/writing.rst @@ -0,0 +1,188 @@ +Writing Snippets +################ + +.. contents:: + :local: + +Basics +****** + +Snippets are defined using YAML files named :file:`snippet.yml`. + +A :file:`snippet.yml` file contains the name of the snippet, along with +additional build system settings, like this: + +.. code-block:: yaml + + name: snippet-name + # ... build system settings go here ... + +Build system settings go in other keys in the file as described later on in +this page. + +You can combine settings whenever they appear under the same keys. For example, +you can combine a snippet-specific devicetree overlay and a ``.conf`` file like +this: + +.. code-block:: yaml + + name: foo + append: + DTC_OVERLAY_FILE: foo.overlay + OVERLAY_CONFIG: foo.conf + +Namespacing +*********** + +When writing devicetree overlays in a snippet, use ``snippet_`` or +``snippet-`` as a namespace prefix when choosing names for node labels, +node names, etc. This avoids namespace conflicts. + +For example, if your snippet is named ``foo-bar``, write your devicetree +overlays like this: + +.. code-block:: DTS + + chosen { + zephyr,baz = &snippet_foo_bar_dev; + }; + + snippet_foo_bar_dev: device@12345678 { + /* ... */ + }; + +Where snippets are located +************************** + +The build system looks for snippets in these places: + +#. In directories configured by the :makevar:`SNIPPET_ROOT` CMake variable. + This always includes the zephyr repository (so + :zephyr_file:`zephyr/snippets` is always a source of snippets) and the + application source directory (so :file:`/snippets` is also). + + Additional directories can be added manually at CMake time. + + The variable is a whitespace- or semicolon-separated list of directories + which may contain snippet definitions. + + For each directory in the list, the build system looks for + :file:`snippet.yml` files underneath a subdirectory named :file:`snippets/`, + if one exists. + + For example, if :makevar:`SNIPPET_ROOT` is set to ``/foo;/bar``, the build + system will look for :file:`snippet.yml` files underneath the following + subdirectories: + + - :file:`/foo/snippets/` + - :file:`/bar/snippets/` + + The :file:`snippet.yml` files can be nested anywhere underneath these + locations. + +#. In any :ref:`module ` whose :file:`module.yml` file provides a + ``snippet_root`` setting. + + For example, in a zephyr module named ``baz``, you can add this to your + :file:`module.yml` file: + + .. code-block:: yaml + + settings: + snippet_root: . + + And then any :file:`snippet.yml` files in ``baz/snippets`` will + automatically be discovered by the build system, just as if + the path to ``baz`` had appeared in :makevar:`SNIPPET_ROOT`. + +Processing order +**************** + +The order that snippets are processed is currently not defined. +Therefore, you should write your :file:`snippet.yml` file so that +it is not dependent on other snippets. + +.. _snippets-devicetree-overlays: + +Devicetree overlays (``.overlay``) +********************************** + +This :file:`snippet.yml` adds :file:`foo.overlay` to the build: + +.. code-block:: yaml + + name: foo + append: + DTC_OVERLAY_FILE: foo.overlay + +The path to :file:`foo.overlay` is relative to the directory containing +:file:`snippet.yml`. + +.. _snippets-conf-files: + +``.conf`` files +*************** + +This :file:`snippet.yml` adds :file:`foo.conf` to the build: + +.. code-block:: yaml + + name: foo + append: + OVERLAY_CONFIG: foo.conf + +The path to :file:`foo.conf` is relative to the directory containing +:file:`snippet.yml`. + +Board-specific settings +*********************** + +You can write settings that only apply to some boards. + +The settings described here are applied in **addition** to snippet settings +that apply to all boards. (This is similar, for example, to the way that an +application with both :file:`prj.conf` and :file:`boards/foo.conf` files will +use both ``.conf`` files in the build when building for board ``foo``, instead +of just :file:`boards/foo.conf`) + +By name +======= + +.. code-block:: yaml + + name: ... + boards: + bar: # settings for board "bar" go here + append: + DTC_OVERLAY_FILE: bar.overlay + baz: # settings for board "baz" go here + append: + DTC_OVERLAY_FILE: baz.overlay + +The above example uses :file:`bar.overlay` when building for board ``bar``, and +:file:`baz.overlay` when building for ``baz``. + +By regular expression +===================== + +You can enclose the board name in slashes (``/``) to match the name against a +regular expression in the `CMake syntax`_. The regular expression must match +the entire board name. + +.. _CMake syntax: + https://cmake.org/cmake/help/latest/command/string.html#regex-specification + +For example: + +.. code-block:: yaml + + name: foo + boards: + /my_vendor_.*/: + append: + DTC_OVERLAY_FILE: my_vendor.overlay + +The above example uses devicetree overlay :file:`my_vendor.overlay` when +building for either board ``my_vendor_board1`` or ``my_vendor_board2``. It +would not use the overlay when building for either ``another_vendor_board`` or +``x_my_vendor_board``. diff --git a/doc/build/sysbuild/index.rst b/doc/build/sysbuild/index.rst index 4548d05bbccb..30df8f0baca4 100644 --- a/doc/build/sysbuild/index.rst +++ b/doc/build/sysbuild/index.rst @@ -562,3 +562,18 @@ debug the application. .. _MCUboot with Zephyr: https://mcuboot.com/documentation/readme-zephyr/ .. _ExternalProject: https://cmake.org/cmake/help/latest/module/ExternalProject.html + +Extending sysbuild +****************** + +Sysbuild can be extended by other modules to give it additional functionality +or include other configuration or images, an example could be to add support +for another bootloader or external signing method. + +Modules can be extended by adding custom CMake or Kconfig files as normal +:ref:`modules ` do, this will cause the files to be included in +each image that is part of a project. Alternatively, there are +:ref:`sysbuild-specific module extension ` files +which can be used to include CMake and Kconfig files for the overall sysbuild +image itself, this is where e.g. a custom image for a particular board or SoC +can be added. diff --git a/doc/conf.py b/doc/conf.py index 4229a782327a..aeccbd204b07 100644 --- a/doc/conf.py +++ b/doc/conf.py @@ -269,6 +269,7 @@ vcs_link_prefixes = { "samples/.*": "", "boards/.*": "", + "snippets/.*": "", ".*": "doc", } vcs_link_exclude = [ @@ -290,6 +291,8 @@ (ZEPHYR_BASE, "boards/**/doc"), (ZEPHYR_BASE, "samples/**/*.rst"), (ZEPHYR_BASE, "samples/**/doc"), + (ZEPHYR_BASE, "snippets/**/*.rst"), + (ZEPHYR_BASE, "snippets/**/doc"), ] external_content_keep = [ "reference/kconfig/*", diff --git a/doc/connectivity/bluetooth/api/cap.rst b/doc/connectivity/bluetooth/api/cap.rst new file mode 100644 index 000000000000..2d6e5d4d6d6b --- /dev/null +++ b/doc/connectivity/bluetooth/api/cap.rst @@ -0,0 +1,10 @@ +.. _bluetooth_cap: + +Commmon Audio Profile +##################### + + +API Reference +************* + +.. doxygengroup:: bt_cap diff --git a/doc/connectivity/bluetooth/api/connection_mgmt.rst b/doc/connectivity/bluetooth/api/connection_mgmt.rst index fa6dfc24d07e..3a3d8d02a827 100644 --- a/doc/connectivity/bluetooth/api/connection_mgmt.rst +++ b/doc/connectivity/bluetooth/api/connection_mgmt.rst @@ -22,7 +22,7 @@ define callbacks for connection & disconnection events, as well as other events related to a connection such as a change in the security level or the connection parameters. When acting as a central the application will also get hold of the connection object through the return value of the -:c:func:`bt_conn_create_le` API. +:c:func:`bt_conn_le_create` API. API Reference ************* diff --git a/doc/connectivity/bluetooth/api/index.rst b/doc/connectivity/bluetooth/api/index.rst index bc3e8c61e7de..80713940ed04 100644 --- a/doc/connectivity/bluetooth/api/index.rst +++ b/doc/connectivity/bluetooth/api/index.rst @@ -9,6 +9,7 @@ Bluetooth APIs att.rst audio.rst bap.rst + cap.rst connection_mgmt.rst controller.rst coordinated_sets.rst @@ -31,6 +32,7 @@ Bluetooth APIs shell/bap.rst shell/bap_broadcast_assistant.rst shell/bap_scan_delegator.rst + shell/cap.rst shell/ccp.rst shell/csip.rst shell/iso.rst diff --git a/doc/connectivity/bluetooth/api/mesh/models.rst b/doc/connectivity/bluetooth/api/mesh/models.rst index 4bdfef5d05b3..85453a788082 100644 --- a/doc/connectivity/bluetooth/api/mesh/models.rst +++ b/doc/connectivity/bluetooth/api/mesh/models.rst @@ -20,16 +20,19 @@ used by network administrators to configure and diagnose mesh nodes. priv_beacon_cli op_agg_cli op_agg_srv + rpr_cli + rpr_srv + srpl + od Model specification models ************************** -In addition to the foundation models defined in the Bluetooth mesh specification, the Bluetooth Mesh Model Specification defines several models, some of which are implemented in Zephyr: +In addition to the foundation models defined in the Bluetooth mesh specification, the Bluetooth Mesh +Model Specification defines several models, some of which are implemented in Zephyr: .. toctree:: :maxdepth: 1 blob dfu - srpl - od diff --git a/doc/connectivity/bluetooth/api/mesh/rpr_cli.rst b/doc/connectivity/bluetooth/api/mesh/rpr_cli.rst new file mode 100644 index 000000000000..38cb8849f9e5 --- /dev/null +++ b/doc/connectivity/bluetooth/api/mesh/rpr_cli.rst @@ -0,0 +1,132 @@ +.. _bluetooth_mesh_models_rpr_cli: + +Remote Provisioning Client +########################## + +The Remote Provisioning Client model is a foundation model defined by the Bluetooth +mesh specification. It is enabled with the +:kconfig:option:`CONFIG_BT_MESH_RPR_CLI` option. + +The Remote Provisioning Client model is introduced in the Bluetooth Mesh Protocol +Specification version 1.1. +This model provides functionality to remotely provision devices into a mesh network, and perform Node Provisioning Protocol Interface procedures by interacting with mesh nodes that support the :ref:`bluetooth_mesh_models_rpr_srv` model. + +The Remote Provisioning Client model communicates with a Remote Provisioning Server model +using the device key of the node containing the target Remote Provisioning Server model instance. + +If present, the Remote Provisioning Client model must be instantiated on the primary +element. + +Scanning +******** + +The scanning procedure is used to scan for unprovisioned devices located nearby the Remote Provisioning Server. The Remote Provisioning Client starts a scan procedure by using the :c:func:`bt_mesh_rpr_scan_start` call: + +.. code-block:: C + + static void rpr_scan_report(struct bt_mesh_rpr_cli *cli, + const struct bt_mesh_rpr_node *srv, + struct bt_mesh_rpr_unprov *unprov, + struct net_buf_simple *adv_data) + { + + } + + struct bt_mesh_rpr_cli rpr_cli = { + .scan_report = rpr_scan_report, + }; + + const struct bt_mesh_rpr_node srv = { + .addr = 0x0004, + .net_idx = 0, + .ttl = BT_MESH_TTL_DEFAULT, + }; + + struct bt_mesh_rpr_scan_status status; + uint8_t *uuid = NULL; + uint8_t timeout = 10; + uint8_t max_devs = 3; + + bt_mesh_rpr_scan_start(&rpr_cli, &srv, uuid, timeout, max_devs, &status); + +The above example shows pseudo code for starting a scan procedure on the target Remote Provisioning Server node. This +procedure will start a ten-second, multiple-device scanning where the generated scan report will contain +a maximum of three unprovisioned devices. If the UUID argument was specified, the same procedure would +only scan for the device with the corresponding UUID. After the procedure completes, the +server sends the scan report that will be handled in the client's :c:member:`bt_mesh_rpr_cli.scan_report` callback. + +Additionally, the Remote Provisioning Client model also supports extended scanning with the +:c:func:`bt_mesh_rpr_scan_start_ext` call. Extended scanning supplements regular scanning by allowing the +Remote Provisioning Server to report additional data for a specific device. The Remote Provisioning Server will use active scanning to request +a scan response from the unprovisioned device if it is supported by the unprovisioned device. + +Provisioning +************ + +The Remote Provisioning Client starts a provisioning procedure by using the :c:func:`bt_mesh_provision_remote` call: + +.. code-block:: C + + struct bt_mesh_rpr_cli rpr_cli; + + const struct bt_mesh_rpr_node srv = { + .addr = 0x0004, + .net_idx = 0, + .ttl = BT_MESH_TTL_DEFAULT, + }; + + uint8_t uuid[16] = { 0xaa }; + uint16_t addr = 0x0006; + uint16_t net_idx = 0; + + bt_mesh_provision_remote(&rpr_cli, &srv, uuid, net_idx, addr); + +The above example shows pseudo code for remotely provisioning a device through a Remote Provisioning Server node. This +procedure will attempt to provision the device with the corresponding UUID, and assign the address 0x0006 +to its primary element using the network key located at index zero. + +.. note:: + During the remote provisioning, the same :c:struct:`bt_mesh_prov` callbacks are triggered as for ordinary + provisioning. See section :ref:`bluetooth_mesh_provisioning` for further details. + +Re-provisioning +*************** + +In addition to scanning and provisioning functionality, the Remote Provisioning Client also provides means to +reconfigure node addresses, device keys and Composition Data on devices that support the +:ref:`bluetooth_mesh_models_rpr_srv` model. This is provided through the Node Provisioning Protocol Interface +(NPPI) which supports the following three procedures: + +* Device Key Refresh procedure: Used to change the device key of the Target node without a need to reconfigure the node. +* Node Address Refresh procedure: Used to change the node’s device key and unicast address. +* Node Composition Refresh procedure: Used to change the device key of the node, and to add or delete models or features of the node. + +The three NPPI procedures can be initiated with the :c:func:`bt_mesh_reprovision_remote` call: + +.. code-block:: C + + struct bt_mesh_rpr_cli rpr_cli; + struct bt_mesh_rpr_node srv = { + .addr = 0x0006, + .net_idx = 0, + .ttl = BT_MESH_TTL_DEFAULT, + }; + + bool composition_changed = false; + uint16_t new_addr = 0x0009; + + bt_mesh_reprovision_remote(&rpr_cli, &srv, new_addr, composition_changed); + +The above example shows pseudo code for triggering a Node Address Refresh procedure on the Target node. +The specific procedure is not chosen directly, but rather through the other parameters that are inputted. +In the example we can see that the current unicast address of the Target is 0x0006, while the new address is +set to 0x0009. If the two addresses were the same, and the ``composition_changed`` flag was set to true, this code +would instead trigger a Node Composition Refresh procedure. If the two addresses were the same, and +the ``composition_changed`` flag was set to false, this code would trigger a Device Key Refresh procedure. + +API reference +************* + +.. doxygengroup:: bt_mesh_rpr_cli + :project: Zephyr + :members: diff --git a/doc/connectivity/bluetooth/api/mesh/rpr_srv.rst b/doc/connectivity/bluetooth/api/mesh/rpr_srv.rst new file mode 100644 index 000000000000..f958ef31bd93 --- /dev/null +++ b/doc/connectivity/bluetooth/api/mesh/rpr_srv.rst @@ -0,0 +1,30 @@ +.. _bluetooth_mesh_models_rpr_srv: + +Remote Provisioning Server +########################## + +The Remote Provisioning Server model is a foundation model defined by the Bluetooth +mesh specification. It is enabled with the +:kconfig:option:`CONFIG_BT_MESH_RPR_SRV` option. + +The Remote Provisioning Server model is introduced in the Bluetooth Mesh Protocol +Specification version 1.1, and is used to support the functionality of remotely +provisioning devices into a mesh network. + +The Remote Provisioning Server does not have an API of its own, but relies on a +:ref:`bluetooth_mesh_models_rpr_cli` to control it. The Remote Provisioning Server +model only accepts messages encrypted with the node's device key. + +If present, the Remote Provisioning Server model must be instantiated on the primary +element. + +Note that after refreshing the device key, node address or Composition Data through a Node Provisioning Protocol +Interface (NPPI) procedure, the :c:member:`bt_mesh_prov.reprovisioned` callback is triggered. See section +:ref:`bluetooth_mesh_models_rpr_cli` for further details. + +API reference +************* + +.. doxygengroup:: bt_mesh_rpr_srv + :project: Zephyr + :members: diff --git a/doc/connectivity/bluetooth/api/mesh/shell.rst b/doc/connectivity/bluetooth/api/mesh/shell.rst index cd7454592fd9..e1d1ec0f31d1 100644 --- a/doc/connectivity/bluetooth/api/mesh/shell.rst +++ b/doc/connectivity/bluetooth/api/mesh/shell.rst @@ -41,9 +41,9 @@ Since all mesh nodes use the same values for the default network key, this can b Once the mesh node is part of a network, its transmission parameters can be controlled by the general configuration commands: -* To set the destination address, call ``mesh target dst ``. -* To set the network key index, call ``mesh target net ``. -* To set the application key index, call ``mesh target app ``. +* To set the destination address, call ``mesh target dst ``. +* To set the network key index, call ``mesh target net ``. +* To set the application key index, call ``mesh target app ``. By default, the transmission parameters are set to send messages to the provisioned address and network key. @@ -104,13 +104,13 @@ The Bluetooth mesh shell commands are parsed with a variety of formats: - For raw byte arrays, like UUIDs, key values and message payloads, the parameters should be formatted as an unbroken string of hexadecimal values without any prefix. - ``deadbeef01234`` * - Booleans - - Boolean values are denoted in the API documentation as ````. + - Boolean values are denoted in the API documentation as ````. - ``on``, ``off``, ``enabled``, ``disabled``, ``1``, ``0`` Commands ******** -The Bluetooth mesh shell implements a large set of commands. Some of the commands accept parameters, which are mentioned in brackets after the command name. For example, ``mesh lpn set ``. Mandatory parameters are marked with angle brackets (e.g. ````), and optional parameters are marked with square brackets (e.g. ``[destination address]``). +The Bluetooth mesh shell implements a large set of commands. Some of the commands accept parameters, which are mentioned in brackets after the command name. For example, ``mesh lpn set ``. Mandatory parameters are marked with angle brackets (e.g. ````), and optional parameters are marked with square brackets (e.g. ``[DstAddr]``). The Bluetooth mesh shell commands are divided into the following groups: @@ -139,38 +139,38 @@ Target The target commands enables the user to monitor and set the target destination address, network index and application index for the shell. These parameters are used by several commands, like provisioning, Configuration Client, etc. -``mesh target dst [destination address]`` ------------------------------------------ +``mesh target dst [DstAddr]`` +----------------------------- Get or set the message destination address. The destination address determines where mesh packets are sent with the shell, but has no effect on modules outside the shell's control. - * ``destination address``: If present, sets the new 16-bit mesh destination address. If omitted, the current destination address is printed. + * ``DstAddr``: If present, sets the new 16-bit mesh destination address. If omitted, the current destination address is printed. -``mesh target net [NetIdx]`` ----------------------------- +``mesh target net [NetKeyIdx]`` +------------------------------- Get or set the message network index. The network index determines which network key is used to encrypt mesh packets that are sent with the shell, but has no effect on modules outside the shell's control. The network key must already be added to the device, either through provisioning or by a Configuration Client. - * ``NetIdx``: If present, sets the new network index. If omitted, the current network index is printed. + * ``NetKeyIdx``: If present, sets the new network index. If omitted, the current network index is printed. -``mesh target app [AppIdx]`` ----------------------------- +``mesh target app [AppKeyIdx]`` +------------------------------- Get or set the message application index. The application index determines which application key is used to encrypt mesh packets that are sent with the shell, but has no effect on modules outside the shell's control. The application key must already be added to the device by a Configuration Client, and must be bound to the current network index. - * ``AppIdx``: If present, sets the new application index. If omitted, the current application index is printed. + * ``AppKeyIdx``: If present, sets the new application index. If omitted, the current application index is printed. Low Power Node ============== -``mesh lpn set `` ---------------------------------- +``mesh lpn set `` +------------------------------- Enable or disable Low Power operation. Once enabled, the device will turn off its radio and start polling for friend nodes. - * ``value``: Sets whether Low Power operation is enabled. + * ``Val``: Sets whether Low Power operation is enabled. ``mesh lpn poll`` ----------------- @@ -180,12 +180,12 @@ Low Power Node Testing ======= -``mesh test net-send `` +``mesh test net-send `` ----------------------------------- Send a raw mesh message with the current destination address, network and application index. The message opcode must be encoded manually. - * ``hex string`` Raw hexadecimal representation of the message to send. + * ``HexString`` Raw hexadecimal representation of the message to send. ``mesh test iv-update`` ----------------------- @@ -193,12 +193,12 @@ Testing Force an IV update. -``mesh test iv-update-test `` ---------------------------------------------- +``mesh test iv-update-test `` +------------------------------------------- Set the IV update test mode. In test mode, the IV update timing requirements are bypassed. - * ``value``: Enable or disable the IV update test mode. + * ``Val``: Enable or disable the IV update test mode. ``mesh test rpl-clear`` @@ -213,53 +213,53 @@ Testing Health Server Test ------------------ -``mesh test health-srv add-fault `` -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +``mesh test health-srv add-fault `` +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Register a new Health Server Fault for the Linux Foundation Company ID. - * ``Fault ID``: ID of the fault to register (``0x0001`` to ``0xFFFF``) + * ``FaultID``: ID of the fault to register (``0x0001`` to ``0xFFFF``) -``mesh test health-srv del-fault [Fault ID]`` -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +``mesh test health-srv del-fault [FaultID]`` +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Remove registered Health Server faults for the Linux Foundation Company ID. - * ``Fault ID``: If present, the given fault ID will be deleted. If omitted, all registered faults will be cleared. + * ``FaultID``: If present, the given fault ID will be deleted. If omitted, all registered faults will be cleared. Provisioning ============ To allow a device to broadcast connectable unprovisioned beacons, the :kconfig:option:`CONFIG_BT_MESH_PROV_DEVICE` configuration option must be enabled, along with the :kconfig:option:`CONFIG_BT_MESH_PB_GATT` option. -``mesh prov pb-gatt `` +``mesh prov pb-gatt `` ------------------------------------ Start or stop advertising a connectable unprovisioned beacon. The connectable unprovisioned beacon allows the mesh node to be discovered by nearby GATT based provisioners, and provisioned through the GATT bearer. - * ``val``: Enable or disable provisioning with GATT + * ``Val``: Enable or disable provisioning with GATT To allow a device to broadcast unprovisioned beacons, the :kconfig:option:`CONFIG_BT_MESH_PROV_DEVICE` configuration option must be enabled, along with the :kconfig:option:`CONFIG_BT_MESH_PB_ADV` option. -``mesh prov pb-adv `` +``mesh prov pb-adv `` ----------------------------------- Start or stop advertising the unprovisioned beacon. The unprovisioned beacon allows the mesh node to be discovered by nearby advertising-based provisioners, and provisioned through the advertising bearer. - * ``val``: Enable or disable provisioning with advertiser + * ``Val``: Enable or disable provisioning with advertiser To allow a device to provision devices, the :kconfig:option:`CONFIG_BT_MESH_PROVISIONER` and :kconfig:option:`CONFIG_BT_MESH_PB_ADV` configuration options must be enabled. -``mesh prov remote-adv [AuthType]`` +``mesh prov remote-adv [AuthType]`` ----------------------------------------------------------------------------------- - Provision a nearby device into the mesh. The mesh node starts scanning for unprovisioned beacons with the given UUID. Once found, the unprovisioned device will be added to the mesh network with the given unicast address, and given the network key indicated by ``NetKeyIndex``. + Provision a nearby device into the mesh. The mesh node starts scanning for unprovisioned beacons with the given UUID. Once found, the unprovisioned device will be added to the mesh network with the given unicast address, and given the network key indicated by ``NetKeyIdx``. - * ``UUID``: UUID of the unprovisioned device. - * ``NetKeyIndex``: Index of the network key to pass to the device. - * ``addr``: First unicast address to assign to the unprovisioned device. The device will occupy as many addresses as it has elements, and all must be available. - * ``AttentionDuration``: The duration in seconds the unprovisioned device will identify itself for, if supported. See :ref:`bluetooth_mesh_models_health_srv_attention` for details. + * ``UUID``: UUID of the unprovisioned device. Providing a hex-string shorter than 16 bytes will populate the N most significant bytes of the array and zero-pad the rest. + * ``NetKeyIdx``: Index of the network key to pass to the device. + * ``Addr``: First unicast address to assign to the unprovisioned device. The device will occupy as many addresses as it has elements, and all must be available. + * ``AttDur``: The duration in seconds the unprovisioned device will identify itself for, if supported. See :ref:`bluetooth_mesh_models_health_srv_attention` for details. * ``AuthType``: If present, the OOB authentication type used for provisioning. * ``no``: No OOB (default). @@ -269,67 +269,67 @@ To allow a device to provision devices, the :kconfig:option:`CONFIG_BT_MESH_PROV To allow a device to provision devices over GATT, the :kconfig:option:`CONFIG_BT_MESH_PROVISIONER` and :kconfig:option:`CONFIG_BT_MESH_PB_GATT_CLIENT` configuration options must be enabled. -``mesh prov remote-gatt `` +``mesh prov remote-gatt `` ------------------------------------------------------------------------- - Provision a nearby device into the mesh. The mesh node starts scanning for connectable advertising for PB-GATT with the given UUID. Once found, the unprovisioned device will be added to the mesh network with the given unicast address, and given the network key indicated by ``NetKeyIndex``. + Provision a nearby device into the mesh. The mesh node starts scanning for connectable advertising for PB-GATT with the given UUID. Once found, the unprovisioned device will be added to the mesh network with the given unicast address, and given the network key indicated by ``NetKeyIdx``. - * ``UUID``: UUID of the unprovisioned device. - * ``NetKeyIndex``: Index of the network key to pass to the device. - * ``addr``: First unicast address to assign to the unprovisioned device. The device will occupy as many addresses as it has elements, and all must be available. - * ``AttentionDuration``: The duration in seconds the unprovisioned device will identify itself for, if supported. See :ref:`bluetooth_mesh_models_health_srv_attention` for details. + * ``UUID``: UUID of the unprovisioned device. Providing a hex-string shorter than 16 bytes will populate the N most significant bytes of the array and zero-pad the rest. + * ``NetKeyIdx``: Index of the network key to pass to the device. + * ``Addr``: First unicast address to assign to the unprovisioned device. The device will occupy as many addresses as it has elements, and all must be available. + * ``AttDur``: The duration in seconds the unprovisioned device will identify itself for, if supported. See :ref:`bluetooth_mesh_models_health_srv_attention` for details. -``mesh prov uuid [UUID: 1-16 hex values]`` ------------------------------------------- +``mesh prov uuid [UUID(1-16 hex)]`` +----------------------------------- Get or set the mesh node's UUID, used in the unprovisioned beacons. - * ``UUID``: If present, new 128-bit UUID value. Any missing bytes will be zero. If omitted, the current UUID will be printed. To enable this command, the :kconfig:option:`BT_MESH_SHELL_PROV_CTX_INSTANCE` option must be enabled. + * ``UUID``: If present, new 128-bit UUID value. Providing a hex-string shorter than 16 bytes will populate the N most significant bytes of the array and zero-pad the rest. If omitted, the current UUID will be printed. To enable this command, the :kconfig:option:`BT_MESH_SHELL_PROV_CTX_INSTANCE` option must be enabled. -``mesh prov input-num `` +``mesh prov input-num `` -------------------------------- Input a numeric OOB authentication value. Only valid when prompted by the shell during provisioning. The input number must match the number presented by the other participant in the provisioning. - * ``number``: Decimal authentication number. + * ``Number``: Decimal authentication number. -``mesh prov input-str `` +``mesh prov input-str `` -------------------------------- Input an alphanumeric OOB authentication value. Only valid when prompted by the shell during provisioning. The input string must match the string presented by the other participant in the provisioning. - * ``string``: Unquoted alphanumeric authentication string. + * ``String``: Unquoted alphanumeric authentication string. -``mesh prov static-oob [val: 1-16 hex values]`` ------------------------------------------------ +``mesh prov static-oob [Val(1-16 hex)]`` +---------------------------------------- Set or clear the static OOB authentication value. The static OOB authentication value must be set before provisioning starts to have any effect. The static OOB value must be same on both participants in the provisioning. To enable this command, the :kconfig:option:`BT_MESH_SHELL_PROV_CTX_INSTANCE` option must be enabled. - * ``val``: If present, indicates the new hexadecimal value of the static OOB. If omitted, the static OOB value is cleared. + * ``Val``: If present, indicates the new hexadecimal value of the static OOB. Providing a hex-string shorter than 16 bytes will populate the N most significant bytes of the array and zero-pad the rest. If omitted, the static OOB value is cleared. -``mesh prov local [IVIndex]`` --------------------------------------------------- +``mesh prov local [IVI]`` +-------------------------------------------- Provision the mesh node itself. If the Configuration database is enabled, the network key must be created. Otherwise, the default key value is used. - * ``NetKeyIndex``: Index of the network key to provision. - * ``addr``: First unicast address to assign to the device. The device will occupy as many addresses as it has elements, and all must be available. - * ``IVindex``: Indicates the current network IV index. Defaults to 0 if omitted. + * ``NetKeyIdx``: Index of the network key to provision. + * ``Addr``: First unicast address to assign to the device. The device will occupy as many addresses as it has elements, and all must be available. + * ``IVI``: Indicates the current network IV index. Defaults to 0 if omitted. -``mesh prov beacon-listen `` +``mesh prov beacon-listen `` ------------------------------------------ Enable or disable printing of incoming unprovisioned beacons. Allows a provisioner device to detect nearby unprovisioned devices and provision them. To enable this command, the :kconfig:option:`BT_MESH_SHELL_PROV_CTX_INSTANCE` option must be enabled. - * ``val``: Whether to enable the unprovisioned beacon printing. + * ``Val``: Whether to enable the unprovisioned beacon printing. ``mesh prov remote-pub-key `` --------------------------------------- +------------------------------------- Provide Device public key. * ``PubKey`` - Device public key in big-endian. @@ -339,6 +339,7 @@ To allow a device to provision devices over GATT, the :kconfig:option:`CONFIG_BT From the provisioner device, instruct the unprovisioned device to use the specified Input OOB authentication action. * ``Action`` - Input action. Allowed values: + * ``0`` - No input action. * ``1`` - Push action set. * ``2`` - Twist action set. @@ -351,6 +352,7 @@ To allow a device to provision devices over GATT, the :kconfig:option:`CONFIG_BT From the provisioner device, instruct the unprovisioned device to use the specified Output OOB authentication action. * ``Action`` - Output action. Allowed values: + * ``0`` - No output action. * ``1`` - Blink action set. * ``2`` - Vibrate action set. @@ -358,14 +360,14 @@ To allow a device to provision devices over GATT, the :kconfig:option:`CONFIG_BT * ``8`` - Display String action set. * ``Size`` - Authentication size. -``mesh prov auth-method static `` ----------------------------------------- +``mesh prov auth-method static `` +------------------------------------------------ From the provisioner device, instruct the unprovisioned device to use static OOB authentication, and use the given static authentication value when provisioning. - * ``Value`` - Static OOB value. + * ``Val`` - Static OOB value. Providing a hex-string shorter than 16 bytes will populate the N most significant bytes of the array and zero-pad the rest. -``mesh prov auth-method none `` --------------------------------------- +``mesh prov auth-method none`` +------------------------------ From the provisioner device, don't use any authentication when provisioning new devices. This is the default behavior. Proxy @@ -380,28 +382,28 @@ The Proxy Server module is an optional mesh subsystem that can be enabled throug The Proxy Client module is an optional mesh subsystem that can be enabled through the :kconfig:option:`CONFIG_BT_MESH_PROXY_CLIENT` configuration option. -``mesh proxy connect `` ------------------------------------- +``mesh proxy connect `` +---------------------------------- Auto-Connect a nearby proxy server into the mesh. - * ``NetKeyIndex``: Index of the network key to connect. + * ``NetKeyIdx``: Index of the network key to connect. -``mesh proxy disconnect `` ---------------------------------------- +``mesh proxy disconnect `` +------------------------------------- Disconnect the existing proxy connection. - * ``NetKeyIndex``: Index of the network key to disconnect. + * ``NetKeyIdx``: Index of the network key to disconnect. -``mesh proxy solicit `` ------------------------------------- +``mesh proxy solicit `` +---------------------------------- Begin Proxy Solicitation of a subnet. Support of this feature can be enabled through the :kconfig:option:`CONFIG_BT_MESH_PROXY_SOLICITATION` configuration option. - * ``NetKeyIndex``: Index of the network key to send Solicitation PDUs to. + * ``NetKeyIdx``: Index of the network key to send Solicitation PDUs to. .. _bluetooth_mesh_shell_cfg_cli: @@ -442,116 +444,116 @@ The Configuration Client uses general message parameters set by ``mesh target ds Reset the target device. -``mesh models cfg timeout [timeout in seconds]`` -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +``mesh models cfg timeout [Timeout(s)]`` +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Get and set the Config Client model timeout used during message sending. - * ``timeout in seconds``: If present, set the Config Client model timeout in seconds. If omitted, the current timeout is printed. + * ``Timeout``: If present, set the Config Client model timeout in seconds. If omitted, the current timeout is printed. -``mesh models cfg get-comp [page]`` +``mesh models cfg get-comp [Page]`` ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Read a composition data page. The full composition data page will be printed. If the target does not have the given page, it will return the last page before it. - * ``page``: The composition data page to request. Defaults to 0 if omitted. + * ``Page``: The composition data page to request. Defaults to 0 if omitted. -``mesh models cfg beacon [val: off, on]`` +``mesh models cfg beacon [Val(off, on)]`` ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Get or set the network beacon transmission. - * ``val``: If present, enables or disables sending of the network beacon. If omitted, the current network beacon state is printed. + * ``Val``: If present, enables or disables sending of the network beacon. If omitted, the current network beacon state is printed. -``mesh models cfg ttl [ttl: 0x00, 0x02-0x7f]`` -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +``mesh models cfg ttl [TTL]`` +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Get or set the default TTL value. - * ``ttl``: If present, sets the new default TTL value. If omitted, the current default TTL value is printed. + * ``TTL``: If present, sets the new default TTL value. Leagal TTL values are 0x00 and 0x02-0x7f. If omitted, the current default TTL value is printed. -``mesh models cfg friend [val: off, on]`` +``mesh models cfg friend [Val(off, on)]`` ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Get or set the Friend feature. - * ``val``: If present, enables or disables the Friend feature. If omitted, the current Friend feature state is printed: + * ``Val``: If present, enables or disables the Friend feature. If omitted, the current Friend feature state is printed: * ``0x00``: The feature is supported, but disabled. * ``0x01``: The feature is enabled. * ``0x02``: The feature is not supported. -``mesh models cfg gatt-proxy [val: off, on]`` +``mesh models cfg gatt-proxy [Val(off, on)]`` ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Get or set the GATT Proxy feature. - * ``val``: If present, enables or disables the GATT Proxy feature. If omitted, the current GATT Proxy feature state is printed: + * ``Val``: If present, enables or disables the GATT Proxy feature. If omitted, the current GATT Proxy feature state is printed: * ``0x00``: The feature is supported, but disabled. * ``0x01``: The feature is enabled. * ``0x02``: The feature is not supported. -``mesh models cfg relay [ [ [interval: 10-320]]]`` -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +``mesh models cfg relay [ [ [Int(ms)]]]`` +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Get or set the Relay feature and its parameters. - * ``val``: If present, enables or disables the Relay feature. If omitted, the current Relay feature state is printed: + * ``Val``: If present, enables or disables the Relay feature. If omitted, the current Relay feature state is printed: * ``0x00``: The feature is supported, but disabled. * ``0x01``: The feature is enabled. * ``0x02``: The feature is not supported. - * ``count``: Sets the new relay retransmit count if ``val`` is ``on``. Ignored if ``val`` is ``off``. Defaults to ``2`` if omitted. - * ``interval``: Sets the new relay retransmit interval in milliseconds if ``val`` is ``on``. Ignored if ``val`` is ``off``. Defaults to ``20`` if omitted. + * ``Count``: Sets the new relay retransmit count if ``val`` is ``on``. Ignored if ``val`` is ``off``. Legal retransmit count is 0-7. Defaults to ``2`` if omitted. + * ``Int``: Sets the new relay retransmit interval in milliseconds if ``val`` is ``on``. Legal interval range is 10-320 milliseconds. Ignored if ``val`` is ``off``. Defaults to ``20`` if omitted. -``mesh models cfg node-id [Identity]`` -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +``mesh models cfg node-id [Identity]`` +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Get or Set of current Node Identity state of a subnet. - * ``NetKeyIndex``: The network key index to Get/Set. + * ``NetKeyIdx``: The network key index to Get/Set. * ``Identity``: If present, sets the identity of Node Identity state. -``mesh models cfg polltimeout-get `` -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +``mesh models cfg polltimeout-get `` +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Get current value of the PollTimeout timer of the LPN within a Friend node. - * ``addr`` Address of Low Power node. + * ``LPNAddr`` Address of Low Power node. -``mesh models cfg net-transmit-param [ ]`` -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +``mesh models cfg net-transmit-param [ ]`` +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Get or set the network transmit parameters. - * ``count``: Sets the number of additional network transmits for every sent message. - * ``interval``: Sets the new network retransmit interval in milliseconds. + * ``Count``: Sets the number of additional network transmits for every sent message. Legal retransmit count is 0-7. + * ``Int``: Sets the new network retransmit interval in milliseconds. Legal interval range is 10-320 milliseconds. -``mesh models cfg netkey add [val]`` -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +``mesh models cfg netkey add [Key(1-16 hex)]`` +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Add a network key to the target node. Adds the key to the Configuration Database if enabled. - * ``NetKeyIndex``: The network key index to add. - * ``val``: If present, sets the key value as a 128-bit hexadecimal value. Any missing bytes will be zero. Only valid if the key does not already exist in the Configuration Database. If omitted, the default key value is used. + * ``NetKeyIdx``: The network key index to add. + * ``Key``: If present, sets the key value as a 128-bit hexadecimal value. Providing a hex-string shorter than 16 bytes will populate the N most significant bytes of the array and zero-pad the rest. Only valid if the key does not already exist in the Configuration Database. If omitted, the default key value is used. -``mesh models cfg netkey upd [val]`` -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +``mesh models cfg netkey upd [Key(1-16 hex)]`` +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Update a network key to the target node. - * ``NetKeyIndex``: The network key index to updated. - * ``val``: If present, sets the key value as a 128-bit hexadecimal value. Any missing bytes will be zero. If omitted, the default key value is used. + * ``NetKeyIdx``: The network key index to updated. + * ``Key``: If present, sets the key value as a 128-bit hexadecimal value. Providing a hex-string shorter than 16 bytes will populate the N most significant bytes of the array and zero-pad the rest. If omitted, the default key value is used. ``mesh models cfg netkey get`` ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ @@ -559,201 +561,213 @@ The Configuration Client uses general message parameters set by ``mesh target ds Get a list of known network key indexes. -``mesh models cfg netkey del `` -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +``mesh models cfg netkey del `` +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Delete a network key from the target node. - * ``NetKeyIndex``: The network key index to delete. + * ``NetKeyIdx``: The network key index to delete. -``mesh models cfg appkey add [val]`` -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +``mesh models cfg appkey add [Key(1-16 hex)]`` +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Add an application key to the target node. Adds the key to the Configuration Database if enabled. - * ``NetKeyIndex``: The network key index the application key is bound to. - * ``AppKeyIndex``: The application key index to add. - * ``val``: If present, sets the key value as a 128-bit hexadecimal value. Any missing bytes will be zero. Only valid if the key does not already exist in the Configuration Database. If omitted, the default key value is used. + * ``NetKeyIdx``: The network key index the application key is bound to. + * ``AppKeyIdx``: The application key index to add. + * ``Key``: If present, sets the key value as a 128-bit hexadecimal value. Providing a hex-string shorter than 16 bytes will populate the N most significant bytes of the array and zero-pad the rest. Only valid if the key does not already exist in the Configuration Database. If omitted, the default key value is used. -``mesh models cfg appkey upd [val]`` -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +``mesh models cfg appkey upd [Key(1-16 hex)]`` +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Update an application key to the target node. - * ``NetKeyIndex``: The network key index the application key is bound to. - * ``AppKeyIndex``: The application key index to update. - * ``val``: If present, sets the key value as a 128-bit hexadecimal value. Any missing bytes will be zero. If omitted, the default key value is used. + * ``NetKeyIdx``: The network key index the application key is bound to. + * ``AppKeyIdx``: The application key index to update. + * ``Key``: If present, sets the key value as a 128-bit hexadecimal value. Providing a hex-string shorter than 16 bytes will populate the N most significant bytes of the array and zero-pad the rest. If omitted, the default key value is used. -``mesh models cfg appkey get `` -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +``mesh models cfg appkey get `` +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Get a list of known application key indexes bound to the given network key index. - * ``NetKeyIndex``: Network key indexes to get a list of application key indexes from. + * ``NetKeyIdx``: Network key indexes to get a list of application key indexes from. -``mesh models cfg appkey del `` -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +``mesh models cfg appkey del `` +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Delete an application key from the target node. - * ``NetKeyIndex``: The network key index the application key is bound to. - * ``AppKeyIndex``: The application key index to delete. + * ``NetKeyIdx``: The network key index the application key is bound to. + * ``AppKeyIdx``: The application key index to delete. -``mesh models cfg model app-bind [Company ID]`` -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +``mesh models cfg model app-bind [CID]`` +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Bind an application key to a model. Models can only encrypt and decrypt messages sent with application keys they are bound to. - * ``addr``: Address of the element the model is on. - * ``AppIndex``: The application key to bind to the model. - * ``Model ID``: The model ID of the model to bind the key to. - * ``Company ID``: If present, determines the Company ID of the model. If omitted, the model is a Bluetooth SIG defined model. + * ``Addr``: Address of the element the model is on. + * ``AppKeyIdx``: The application key to bind to the model. + * ``MID``: The model ID of the model to bind the key to. + * ``CID``: If present, determines the Company ID of the model. If omitted, the model is a Bluetooth SIG defined model. - -``mesh models cfg model app-unbind [Company ID]`` -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +``mesh models cfg model app-unbind [CID]`` +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Unbind an application key from a model. - * ``addr``: Address of the element the model is on. - * ``AppIndex``: The application key to unbind from the model. - * ``Model ID``: The model ID of the model to unbind the key from. - * ``Company ID``: If present, determines the Company ID of the model. If omitted, the model is a Bluetooth SIG defined model. + * ``Addr``: Address of the element the model is on. + * ``AppKeyIdx``: The application key to unbind from the model. + * ``MID``: The model ID of the model to unbind the key from. + * ``CID``: If present, determines the Company ID of the model. If omitted, the model is a Bluetooth SIG defined model. -``mesh models cfg model app-get [Company ID]`` -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +``mesh models cfg model app-get [CID]`` +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Get a list of application keys bound to a model. - * ``elem addr``: Address of the element the model is on. - * ``Model ID``: The model ID of the model to get the bound keys of. - * ``Company ID``: If present, determines the Company ID of the model. If omitted, the model is a Bluetooth SIG defined model. + * ``ElemAddr``: Address of the element the model is on. + * ``MID``: The model ID of the model to get the bound keys of. + * ``CID``: If present, determines the Company ID of the model. If omitted, the model is a Bluetooth SIG defined model. -``mesh models cfg model pub [cid] [ ]`` -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +``mesh models cfg model pub [CID] [ ]`` +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ - Get or set the publication parameters of a model. If all publication parameters are included, they become the new publication parameters of the model. If all publication parameters are omitted, print the current publication parameters of the model. + Get or set the publication parameters of a model. If all publication parameters are included, they become the new publication parameters of the model. + If all publication parameters are omitted, print the current publication parameters of the model. - * ``addr``: Address of the element the model is on. - * ``Model ID``: The model ID of the model to get the bound keys of. - * ``cid``: If present, determines the Company ID of the model. If omitted, the model is a Bluetooth SIG defined model. + * ``Addr``: Address of the element the model is on. + * ``MID``: The model ID of the model to get the bound keys of. + * ``CID``: If present, determines the Company ID of the model. If omitted, the model is a Bluetooth SIG defined model. Publication parameters: * ``PubAddr``: The destination address to publish to. - * ``AppKeyIndex``: The application key index to publish with. - * ``cred``: Whether to publish with Friendship credentials when acting as a Low Power Node. - * ``ttl``: TTL value to publish with (``0x00`` to ``0x07f``). - * ``period``: Encoded publication period, or 0 to disable periodic publication. - * ``count``: Number of retransmission for each published message (``0`` to ``7``). - * ``interval`` The interval between each retransmission, in milliseconds. Must be a multiple of 50. - -``mesh models cfg model pub-va [cid]`` -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + * ``AppKeyIdx``: The application key index to publish with. + * ``Cred``: Whether to publish with Friendship credentials when acting as a Low Power Node. + * ``TTL``: TTL value to publish with (``0x00`` to ``0x07f``). + * ``PerRes``: Resolution of the publication period steps: + + * ``0x00``: The Step Resolution is 100 milliseconds + * ``0x01``: The Step Resolution is 1 second + * ``0x02``: The Step Resolution is 10 seconds + * ``0x03``: The Step Resolution is 10 minutes + * ``PerSteps``: Number of publication period steps, or 0 to disable periodic publication. + * ``Count``: Number of retransmission for each published message (``0`` to ``7``). + * ``Int`` The interval between each retransmission, in milliseconds. Must be a multiple of 50. + +``mesh models cfg model pub-va [CID]`` +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Set the publication parameters of a model. - * ``addr``: Address of the element the model is on. - * ``Model ID``: The model ID of the model to get the bound keys of. - * ``cid``: If present, determines the Company ID of the model. If omitted, the model is a Bluetooth SIG defined model. + * ``Addr``: Address of the element the model is on. + * ``MID``: The model ID of the model to get the bound keys of. + * ``CID``: If present, determines the Company ID of the model. If omitted, the model is a Bluetooth SIG defined model. Publication parameters: - * ``UUID``: The destination virtual address to publish to. - * ``AppKeyIndex``: The application key index to publish with. - * ``cred``: Whether to publish with Friendship credentials when acting as a Low Power Node. - * ``ttl``: TTL value to publish with (``0x00`` to ``0x07f``). - * ``period``: Encoded publication period, or 0 to disable periodic publication. - * ``count``: Number of retransmission for each published message (``0`` to ``7``). - * ``interval`` The interval between each retransmission, in milliseconds. Must be a multiple of 50. + * ``UUID``: The destination virtual address to publish to. Providing a hex-string shorter than 16 bytes will populate the N most significant bytes of the array and zero-pad the rest. + * ``AppKeyIdx``: The application key index to publish with. + * ``Cred``: Whether to publish with Friendship credentials when acting as a Low Power Node. + * ``TTL``: TTL value to publish with (``0x00`` to ``0x07f``). + * ``PerRes``: Resolution of the publication period steps: + * ``0x00``: The Step Resolution is 100 milliseconds + * ``0x01``: The Step Resolution is 1 second + * ``0x02``: The Step Resolution is 10 seconds + * ``0x03``: The Step Resolution is 10 minutes + * ``PerSteps``: Number of publication period steps, or 0 to disable periodic publication. + * ``Count``: Number of retransmission for each published message (``0`` to ``7``). + * ``Int`` The interval between each retransmission, in milliseconds. Must be a multiple of 50. -``mesh models cfg model sub-add [Company ID]`` -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +``mesh models cfg model sub-add [CID]`` +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Subscription the model to a group address. Models only receive messages sent to their unicast address or a group or virtual address they subscribe to. Models may subscribe to multiple group and virtual addresses. - * ``elem addr``: Address of the element the model is on. - * ``sub addr``: 16-bit group address the model should subscribe to (``0xc000`` to ``0xFEFF``). - * ``Model ID``: The model ID of the model to add the subscription to. - * ``Company ID``: If present, determines the Company ID of the model. If omitted, the model is a Bluetooth SIG defined model. + * ``ElemAddr``: Address of the element the model is on. + * ``SubAddr``: 16-bit group address the model should subscribe to (``0xc000`` to ``0xFEFF``). + * ``MID``: The model ID of the model to add the subscription to. + * ``CID``: If present, determines the Company ID of the model. If omitted, the model is a Bluetooth SIG defined model. -``mesh models cfg model sub-del [Company ID]`` -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +``mesh models cfg model sub-del [CID]`` +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Unsubscribe a model from a group address. - * ``elem addr``: Address of the element the model is on. - * ``sub addr``: 16-bit group address the model should remove from its subscription list (``0xc000`` to ``0xFEFF``). - * ``Model ID``: The model ID of the model to add the subscription to. - * ``Company ID``: If present, determines the Company ID of the model. If omitted, the model is a Bluetooth SIG defined model. + * ``ElemAddr``: Address of the element the model is on. + * ``SubAddr``: 16-bit group address the model should remove from its subscription list (``0xc000`` to ``0xFEFF``). + * ``MID``: The model ID of the model to add the subscription to. + * ``CID``: If present, determines the Company ID of the model. If omitted, the model is a Bluetooth SIG defined model. -``mesh models cfg model sub-add-va