From 5d74f783326042a6b34356e7fb0d2e05d6fecbc0 Mon Sep 17 00:00:00 2001 From: Lucas Tamborrino Date: Thu, 30 Jan 2025 08:50:07 -0300 Subject: [PATCH 0001/2553] drivers: gpio: Add LP GPIO Add LP GPIO support for LP Core Signed-off-by: Lucas Tamborrino --- .../esp32c6_devkitc_lpcore_defconfig | 1 + drivers/gpio/CMakeLists.txt | 1 + drivers/gpio/Kconfig.esp32 | 9 +- drivers/gpio/gpio_esp32_lp.c | 208 ++++++++++++++++++ dts/bindings/gpio/espressif,esp32-lpgpio.yaml | 19 ++ .../espressif/esp32c6/esp32c6_lpcore.dtsi | 7 + west.yml | 2 +- 7 files changed, 245 insertions(+), 2 deletions(-) create mode 100644 drivers/gpio/gpio_esp32_lp.c create mode 100644 dts/bindings/gpio/espressif,esp32-lpgpio.yaml diff --git a/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_lpcore_defconfig b/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_lpcore_defconfig index 42ee26028f9..04974098f6c 100644 --- a/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_lpcore_defconfig +++ b/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_lpcore_defconfig @@ -17,3 +17,4 @@ CONFIG_CBPRINTF_NANO=y # Build CONFIG_SIZE_OPTIMIZATIONS=y +CONFIG_BUSYWAIT_CPU_LOOPS_PER_USEC=4 diff --git a/drivers/gpio/CMakeLists.txt b/drivers/gpio/CMakeLists.txt index 1eaae60d621..195ce116e82 100644 --- a/drivers/gpio/CMakeLists.txt +++ b/drivers/gpio/CMakeLists.txt @@ -117,6 +117,7 @@ zephyr_library_sources_ifdef(CONFIG_GPIO_XEC_V2 gpio_mchp_xec_v2.c) zephyr_library_sources_ifdef(CONFIG_GPIO_XLNX_AXI gpio_xlnx_axi.c) zephyr_library_sources_ifdef(CONFIG_GPIO_XLNX_PS gpio_xlnx_ps.c gpio_xlnx_ps_bank.c) zephyr_library_sources_ifdef(CONFIG_GPIO_XMC4XXX gpio_xmc4xxx.c) +zephyr_library_sources_ifdef(CONFIG_LPGPIO_ESP32 gpio_esp32_lp.c) # zephyr-keep-sorted-stop # zephyr-keep-sorted-start diff --git a/drivers/gpio/Kconfig.esp32 b/drivers/gpio/Kconfig.esp32 index b04f6cd5e0a..3ed9039bd50 100644 --- a/drivers/gpio/Kconfig.esp32 +++ b/drivers/gpio/Kconfig.esp32 @@ -6,6 +6,13 @@ config GPIO_ESP32 bool "ESP32 GPIO" default y - depends on DT_HAS_ESPRESSIF_ESP32_GPIO_ENABLED + depends on DT_HAS_ESPRESSIF_ESP32_GPIO_ENABLED && !SOC_ESP32C6_LPCORE + help + Enables the ESP32 GPIO driver + +config LPGPIO_ESP32 + bool "ESP32 Low Power GPIO" + default y + depends on DT_HAS_ESPRESSIF_ESP32_GPIO_ENABLED && SOC_ESP32C6_LPCORE help Enables the ESP32 GPIO driver diff --git a/drivers/gpio/gpio_esp32_lp.c b/drivers/gpio/gpio_esp32_lp.c new file mode 100644 index 00000000000..188471c9e6b --- /dev/null +++ b/drivers/gpio/gpio_esp32_lp.c @@ -0,0 +1,208 @@ +/* + * Copyright (c) 2025 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#define DT_DRV_COMPAT espressif_esp32_lpgpio + +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include + +#include +LOG_MODULE_REGISTER(gpio_esp32, CONFIG_LOG_DEFAULT_LEVEL); + +struct gpio_esp32_lp_config { + struct gpio_driver_config drv_cfg; + lp_io_dev_t *const lp_io_dev; +}; + +struct gpio_esp32_lp_data { + struct gpio_driver_data common; + sys_slist_t cb; +}; + +void ulp_lp_core_lp_io_intr_handler(void) +{ + uint32_t intr_status = rtcio_ll_get_interrupt_status(); + const struct device *dev = DEVICE_DT_GET(DT_NODELABEL(lp_gpio)); + struct gpio_esp32_lp_data *data = dev->data; + + rtcio_ll_clear_interrupt_status(); + gpio_fire_callbacks(&data->cb, dev, intr_status); +} + +bool lp_gpio_is_valid(uint32_t pin) +{ + return rtc_io_num_map[pin] >= 0; +} + +static int gpio_esp32_lp_configure(const struct device *dev, gpio_pin_t pin, gpio_flags_t flags) +{ + if (!lp_gpio_is_valid(pin)) { + LOG_ERR("Selected LP IO pin is not valid."); + return -EINVAL; + } + + rtcio_hal_function_select(pin, RTCIO_FUNC_RTC); + + if (flags & GPIO_OUTPUT) { + rtcio_hal_set_direction(pin, RTC_GPIO_MODE_OUTPUT_ONLY); + if (flags & GPIO_OUTPUT_INIT_HIGH) { + rtcio_hal_set_level(pin, 1); + } else if (flags & GPIO_OUTPUT_INIT_LOW) { + rtcio_hal_set_level(pin, 0); + } + } else if (flags & GPIO_INPUT) { + rtcio_hal_set_direction(pin, RTC_GPIO_MODE_INPUT_ONLY); + } + + return 0; +} + +static int gpio_esp32_lp_port_get_raw(const struct device *port, uint32_t *value) +{ + const struct gpio_esp32_lp_config *const cfg = port->config; + + *value = cfg->lp_io_dev->in.val; + + return 0; +} + +static int gpio_esp32_lp_port_set_masked_raw(const struct device *port, uint32_t mask, + uint32_t value) +{ + const struct gpio_esp32_lp_config *const cfg = port->config; + + cfg->lp_io_dev->out_data.val = (cfg->lp_io_dev->out_data.val & ~mask) | (mask & value); + return 0; +} + +static int gpio_esp32_lp_port_set_bits_raw(const struct device *port, uint32_t pins) +{ + const struct gpio_esp32_lp_config *const cfg = port->config; + + cfg->lp_io_dev->out_data_w1ts.val = pins; + return 0; +} + +static int gpio_esp32_lp_port_clear_bits_raw(const struct device *port, uint32_t pins) +{ + const struct gpio_esp32_lp_config *const cfg = port->config; + + cfg->lp_io_dev->out_data_w1tc.val = pins; + return 0; +} + +static int gpio_esp32_lp_port_toggle_bits(const struct device *port, uint32_t pins) +{ + const struct gpio_esp32_lp_config *const cfg = port->config; + + cfg->lp_io_dev->out_data.val ^= pins; + return 0; +} + +static int lp_gpio_convert_int_type(enum gpio_int_mode mode, enum gpio_int_trig trig) +{ + if (mode == GPIO_INT_MODE_DISABLED) { + return RTCIO_INTR_DISABLE; + } + + if (mode == GPIO_INT_MODE_LEVEL) { + switch (trig) { + case GPIO_INT_TRIG_LOW: + return RTCIO_INTR_LOW_LEVEL; + case GPIO_INT_TRIG_HIGH: + return RTCIO_INTR_HIGH_LEVEL; + default: + return -EINVAL; + } + } else { /* edge interrupts */ + switch (trig) { + case GPIO_INT_TRIG_HIGH: + return RTCIO_INTR_POSEDGE; + case GPIO_INT_TRIG_LOW: + return RTCIO_INTR_NEGEDGE; + case GPIO_INT_TRIG_BOTH: + return RTCIO_INTR_ANYEDGE; + default: + return -EINVAL; + } + } + + /* Any other type of interrupt triggering is invalid. */ + return -EINVAL; +} + +static int gpio_esp32_lp_pin_interrupt_configure(const struct device *dev, gpio_pin_t pin, + enum gpio_int_mode mode, enum gpio_int_trig trig) +{ + int intr_trig_mode = lp_gpio_convert_int_type(mode, trig); + + if (!lp_gpio_is_valid(pin)) { + LOG_ERR("Selected LP IO pin is not valid."); + return -EINVAL; + } + + rtcio_ll_clear_interrupt_status(); + ulp_lp_core_intr_enable(); + + rtcio_ll_intr_enable(pin, intr_trig_mode); + + return 0; +} + +static int gpio_esp32_lp_manage_callback(const struct device *dev, struct gpio_callback *callback, + bool set) +{ + struct gpio_esp32_lp_data *data = dev->data; + + return gpio_manage_callback(&data->cb, callback, set); +} + +static uint32_t gpio_esp32_lp_get_pending_int(const struct device *dev) +{ + ARG_UNUSED(dev); + + return rtcio_ll_get_interrupt_status(); +} + +static int gpio_esp32_lp_init(const struct device *dev) +{ + return 0; +} + +static DEVICE_API(gpio, gpio_esp32_lp_driver_api) = { + .pin_configure = gpio_esp32_lp_configure, + .port_get_raw = gpio_esp32_lp_port_get_raw, + .port_set_masked_raw = gpio_esp32_lp_port_set_masked_raw, + .port_set_bits_raw = gpio_esp32_lp_port_set_bits_raw, + .port_clear_bits_raw = gpio_esp32_lp_port_clear_bits_raw, + .port_toggle_bits = gpio_esp32_lp_port_toggle_bits, + .pin_interrupt_configure = gpio_esp32_lp_pin_interrupt_configure, + .manage_callback = gpio_esp32_lp_manage_callback, + .get_pending_int = gpio_esp32_lp_get_pending_int +}; + +static struct gpio_esp32_lp_data gpio_esp32_lp_data_0; +static struct gpio_esp32_lp_config gpio_esp32_lp_cfg = { + .drv_cfg = { + .port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_NODE(DT_NODELABEL(lp_gpio)), + }, + .lp_io_dev = (lp_io_dev_t *)DT_REG_ADDR(DT_NODELABEL(lp_gpio)), +}; + +DEVICE_DT_DEFINE(DT_NODELABEL(lp_gpio), gpio_esp32_lp_init, NULL, &gpio_esp32_lp_data_0, + &gpio_esp32_lp_cfg, PRE_KERNEL_1, CONFIG_GPIO_INIT_PRIORITY, + &gpio_esp32_lp_driver_api); diff --git a/dts/bindings/gpio/espressif,esp32-lpgpio.yaml b/dts/bindings/gpio/espressif,esp32-lpgpio.yaml new file mode 100644 index 00000000000..70c00023e2d --- /dev/null +++ b/dts/bindings/gpio/espressif,esp32-lpgpio.yaml @@ -0,0 +1,19 @@ +# Copyright (c) 2025 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +description: ESP32 Low Power GPIO controller for LP Core + +compatible: "espressif,esp32-lpgpio" + +include: [gpio-controller.yaml, base.yaml] + +properties: + reg: + required: true + + "#gpio-cells": + const: 2 + +gpio-cells: + - pin + - flags diff --git a/dts/riscv/espressif/esp32c6/esp32c6_lpcore.dtsi b/dts/riscv/espressif/esp32c6/esp32c6_lpcore.dtsi index 319bc571805..ed33ded7837 100644 --- a/dts/riscv/espressif/esp32c6/esp32c6_lpcore.dtsi +++ b/dts/riscv/espressif/esp32c6/esp32c6_lpcore.dtsi @@ -66,5 +66,12 @@ status = "disabled"; }; + lp_gpio: gpio@600b2000 { + compatible = "espressif,esp32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x600b2000 DT_SIZE_K(4)>; + ngpios = <8>; + }; }; }; diff --git a/west.yml b/west.yml index 47512a0b5b8..10ab107abb6 100644 --- a/west.yml +++ b/west.yml @@ -167,7 +167,7 @@ manifest: groups: - hal - name: hal_espressif - revision: dbc28ad4c1bdcdb25e79ca225cb5528a75d8dc91 + revision: c811e7e58ecb2574a4ae6a1c777015185cdaf199 path: modules/hal/espressif west-commands: west/west-commands.yml groups: From 89721463022e9eb0ad02c712ad2f975b57594b44 Mon Sep 17 00:00:00 2001 From: Vignesh Pandian Date: Mon, 24 Mar 2025 10:00:13 +0530 Subject: [PATCH 0002/2553] west: fix for context with sysbuild show `west flash --context` with sysbuild Signed-off-by: Vignesh Pandian --- scripts/west_commands/run_common.py | 117 ++++++++++++++++++++-------- 1 file changed, 83 insertions(+), 34 deletions(-) diff --git a/scripts/west_commands/run_common.py b/scripts/west_commands/run_common.py index b13ca502eb6..29b87a162d7 100644 --- a/scripts/west_commands/run_common.py +++ b/scripts/west_commands/run_common.py @@ -1,5 +1,6 @@ # Copyright (c) 2018 Open Source Foundries Limited. # Copyright (c) 2023 Nordic Semiconductor ASA +# Copyright (c) 2025 Aerlync Labs Inc. # # SPDX-License-Identifier: Apache-2.0 @@ -181,6 +182,34 @@ def add_parser_common(command, parser_adder=None, parser=None): return parser +def is_sysbuild(build_dir): + # Check if the build directory is part of a sysbuild (multi-image build). + domains_yaml_path = path.join(build_dir, "domains.yaml") + return path.exists(domains_yaml_path) + +def get_domains_to_process(build_dir, args, domain_file=None, get_all_domain=False): + try: + domains = load_domains(build_dir) + except Exception as e: + log.die(f"Failed to load domains: {e}") + + if domain_file is None: + if getattr(args, "domain", None) is None and get_all_domain: + # This option for getting all available domains in the case of --context + # So default domain will be used. + return domains.get_domains() + if getattr(args, "domain", None) is None: + # No domains are passed down and no domains specified by the user. + # So default domain will be used. + return [domains.get_default_domain()] + else: + # No domains are passed down, but user has specified domains to use. + # Get the user specified domains. + return domains.get_domains(args.domain) + else: + # Use domains from domain file with flash order + return domains.get_domains(args.domain, default_flash_order=True) + def do_run_common(command, user_args, user_runner_args, domain_file=None): # This is the main routine for all the "west flash", "west debug", # etc. commands. @@ -218,18 +247,7 @@ def do_run_common(command, user_args, user_runner_args, domain_file=None): if not user_args.skip_rebuild: rebuild(command, build_dir, user_args) - if domain_file is None: - if user_args.domain is None: - # No domains are passed down and no domains specified by the user. - # So default domain will be used. - domains = [load_domains(build_dir).get_default_domain()] - else: - # No domains are passed down, but user has specified domains to use. - # Get the user specified domains. - domains = load_domains(build_dir).get_domains(user_args.domain) - else: - domains = load_domains(build_dir).get_domains(user_args.domain, - default_flash_order=True) + domains = get_domains_to_process(build_dir, user_args) if len(domains) > 1: if len(user_runner_args) > 0: @@ -693,40 +711,71 @@ def dump_traceback(): def dump_context(command, args, unknown_args): build_dir = get_build_dir(args, die_if_none=False) + get_all_domain = False + if build_dir is None: log.wrn('no --build-dir given or found; output will be limited') - runners_yaml = None - else: - build_conf = BuildConfiguration(build_dir) - board = build_conf.get('CONFIG_BOARD_TARGET') - yaml_path = runners_yaml_path(build_dir, board) - runners_yaml = load_runners_yaml(yaml_path) + dump_context_no_config(command, None) + return + + if is_sysbuild(build_dir): + get_all_domain = True # Re-build unless asked not to, to make sure the output is up to date. if build_dir and not args.skip_rebuild: rebuild(command, build_dir, args) + domains = get_domains_to_process(build_dir, args, None, get_all_domain) + + if len(domains) > 1 and not getattr(args, "domain", None): + log.inf("Multiple domains available:") + for i, domain in enumerate(domains, 1): + log.inf(f"{INDENT}{i}. {domain.name} (build_dir: {domain.build_dir})") + + while True: + try: + choice = input(f"Select domain (1-{len(domains)}): ") + choice = int(choice) + if 1 <= choice <= len(domains): + domains = [domains[choice-1]] + break + log.wrn(f"Please enter a number between 1 and {len(domains)}") + except ValueError: + log.wrn("Please enter a valid number") + except EOFError: + log.die("Input cancelled, exiting") + + selected_build_dir = domains[0].build_dir + + if not path.exists(selected_build_dir): + log.die(f"Build directory does not exist: {selected_build_dir}") + + build_conf = BuildConfiguration(selected_build_dir) + + board = build_conf.get('CONFIG_BOARD_TARGET') + if not board: + log.die("CONFIG_BOARD_TARGET not found in build configuration.") + + yaml_path = runners_yaml_path(selected_build_dir, board) + if not path.exists(yaml_path): + log.die(f"runners.yaml not found in: {yaml_path}") + + runners_yaml = load_runners_yaml(yaml_path) + + # Dump runner info + log.inf(f'build configuration:', colorize=True) + log.inf(f'{INDENT}build directory: {build_dir}') + log.inf(f'{INDENT}board: {board}') + log.inf(f'{INDENT}runners.yaml: {yaml_path}') if args.runner: try: cls = get_runner_cls(args.runner) + dump_runner_context(command, cls, runners_yaml) except ValueError: - log.die(f'invalid runner name {args.runner}; choices: ' + - ', '.join(cls.name() for cls in - ZephyrBinaryRunner.get_runners())) + available_runners = ", ".join(cls.name() for cls in ZephyrBinaryRunner.get_runners()) + log.die(f"Invalid runner name {args.runner}; choices: {available_runners}") else: - cls = None - - if runners_yaml is None: - dump_context_no_config(command, cls) - else: - log.inf(f'build configuration:', colorize=True) - log.inf(f'{INDENT}build directory: {build_dir}') - log.inf(f'{INDENT}board: {board}') - log.inf(f'{INDENT}runners.yaml: {yaml_path}') - if cls: - dump_runner_context(command, cls, runners_yaml) - else: - dump_all_runner_context(command, runners_yaml, board, build_dir) + dump_all_runner_context(command, runners_yaml, board, selected_build_dir) def dump_context_no_config(command, cls): if not cls: From fce576bfcf1fdfbab96537a8bf30bd6c404d8186 Mon Sep 17 00:00:00 2001 From: Andre Heinemans Date: Tue, 8 Apr 2025 09:30:03 +0200 Subject: [PATCH 0003/2553] lib: open-amp: fix OPENAMP_COPY_RSC_TABLE dependancy The config item OPENAMP_COPY_RSC_TABLE is only applicable when OPENAMP_RSC_TABLE is enabled Signed-off-by: Andre Heinemans --- lib/open-amp/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/lib/open-amp/Kconfig b/lib/open-amp/Kconfig index b27c8c21644..50cc33adf0e 100644 --- a/lib/open-amp/Kconfig +++ b/lib/open-amp/Kconfig @@ -37,6 +37,7 @@ config OPENAMP_RSC_TABLE_IPM_TX_ID config OPENAMP_COPY_RSC_TABLE bool "Copy resource table section" + depends on OPENAMP_RSC_TABLE help The .resource_table section must be placed in a specific location known by both this core and the remote core. If this is not taken From 4aad818ec20ada802092ba7ca69d9d4a7886cc3e Mon Sep 17 00:00:00 2001 From: Troels Nilsson Date: Thu, 10 Apr 2025 12:56:15 +0200 Subject: [PATCH 0004/2553] Bluetooth: Controller: Fix window widening for parameter update When applying the connection parameter update, the window widening for the previous connection interval was not applied since that is normally done in LLL Fixed by applying the window widening in ull_conn_update_parameters() instead in this case Fixes EBQ test failure in LL/CON/PER/BV-10-C Signed-off-by: Troels Nilsson --- subsys/bluetooth/controller/ll_sw/ull_conn.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/subsys/bluetooth/controller/ll_sw/ull_conn.c b/subsys/bluetooth/controller/ll_sw/ull_conn.c index 1be21cfe420..39cfb1e9b3b 100644 --- a/subsys/bluetooth/controller/ll_sw/ull_conn.c +++ b/subsys/bluetooth/controller/ll_sw/ull_conn.c @@ -2362,6 +2362,14 @@ void ull_conn_update_parameters(struct ll_conn *conn, uint8_t is_cu_proc, uint8_ switch (lll->role) { #if defined(CONFIG_BT_PERIPHERAL) case BT_HCI_ROLE_PERIPHERAL: + /* Since LLL prepare doesn't get to run, accumulate window widening here */ + lll->periph.window_widening_prepare_us += lll->periph.window_widening_periodic_us * + (conn->llcp.prep.lazy + 1); + if (lll->periph.window_widening_prepare_us > lll->periph.window_widening_max_us) { + lll->periph.window_widening_prepare_us = + lll->periph.window_widening_max_us; + } + lll->periph.window_widening_prepare_us -= lll->periph.window_widening_periodic_us * instant_latency; From e37b68bfa4b62b7fc19c29eeec6521fd56e6cd30 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rados=C5=82aw=20Koppel?= Date: Mon, 14 Apr 2025 16:24:25 +0200 Subject: [PATCH 0005/2553] boards: nordic: Enable nfct on the supporting boards MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Enable NFCT device in dts of the boards that have NFC connector. Signed-off-by: Radosław Koppel --- boards/nordic/nrf21540dk/nrf21540dk_nrf52840.dts | 4 ++++ boards/nordic/nrf52833dk/nrf52833dk_nrf52833.dts | 4 ++++ boards/nordic/nrf52840dk/nrf52840dk_nrf52840.dts | 4 ++++ boards/nordic/nrf52dk/nrf52dk_nrf52832.dts | 4 ++++ .../nrf5340_audio_dk_nrf5340_cpuapp_common.dtsi | 4 ++++ boards/nordic/nrf5340dk/nrf5340_cpuapp_common.dtsi | 4 ++++ boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp.dts | 5 +++++ boards/nordic/nrf54l15dk/nrf54l_05_10_15_cpuapp_common.dtsi | 4 ++++ boards/nordic/nrf54l20pdk/nrf54l20_cpuapp_common.dtsi | 4 ++++ boards/nordic/nrf7002dk/nrf5340_cpuapp_common.dtsi | 4 ++++ boards/nordic/thingy52/thingy52_nrf52832.dts | 4 ++++ boards/nordic/thingy53/thingy53_nrf5340_common.dtsi | 4 ++++ 12 files changed, 49 insertions(+) diff --git a/boards/nordic/nrf21540dk/nrf21540dk_nrf52840.dts b/boards/nordic/nrf21540dk/nrf21540dk_nrf52840.dts index 51302293ba4..f4dc3058b2b 100644 --- a/boards/nordic/nrf21540dk/nrf21540dk_nrf52840.dts +++ b/boards/nordic/nrf21540dk/nrf21540dk_nrf52840.dts @@ -158,6 +158,10 @@ gpio-as-nreset; }; +&nfct { + status = "okay"; +}; + &gpiote { status = "okay"; }; diff --git a/boards/nordic/nrf52833dk/nrf52833dk_nrf52833.dts b/boards/nordic/nrf52833dk/nrf52833dk_nrf52833.dts index dcc19542e74..386fac62e1d 100644 --- a/boards/nordic/nrf52833dk/nrf52833dk_nrf52833.dts +++ b/boards/nordic/nrf52833dk/nrf52833dk_nrf52833.dts @@ -135,6 +135,10 @@ gpio-as-nreset; }; +&nfct { + status = "okay"; +}; + &gpiote { status = "okay"; }; diff --git a/boards/nordic/nrf52840dk/nrf52840dk_nrf52840.dts b/boards/nordic/nrf52840dk/nrf52840dk_nrf52840.dts index 0e61ee5654c..f19cd48bb40 100644 --- a/boards/nordic/nrf52840dk/nrf52840dk_nrf52840.dts +++ b/boards/nordic/nrf52840dk/nrf52840dk_nrf52840.dts @@ -153,6 +153,10 @@ status = "okay"; }; +&nfct { + status = "okay"; +}; + &gpio0 { status = "okay"; gpio-reserved-ranges = <0 2>, <6 1>, <8 3>, <17 7>; diff --git a/boards/nordic/nrf52dk/nrf52dk_nrf52832.dts b/boards/nordic/nrf52dk/nrf52dk_nrf52832.dts index 458f5918b32..d132db9f423 100644 --- a/boards/nordic/nrf52dk/nrf52dk_nrf52832.dts +++ b/boards/nordic/nrf52dk/nrf52dk_nrf52832.dts @@ -146,6 +146,10 @@ gpio-as-nreset; }; +&nfct { + status = "okay"; +}; + &gpiote { status = "okay"; }; diff --git a/boards/nordic/nrf5340_audio_dk/nrf5340_audio_dk_nrf5340_cpuapp_common.dtsi b/boards/nordic/nrf5340_audio_dk/nrf5340_audio_dk_nrf5340_cpuapp_common.dtsi index f29db4cfeb2..78a5020f31e 100644 --- a/boards/nordic/nrf5340_audio_dk/nrf5340_audio_dk_nrf5340_cpuapp_common.dtsi +++ b/boards/nordic/nrf5340_audio_dk/nrf5340_audio_dk_nrf5340_cpuapp_common.dtsi @@ -105,6 +105,10 @@ }; }; +&nfct { + status = "okay"; +}; + &gpiote { status = "okay"; }; diff --git a/boards/nordic/nrf5340dk/nrf5340_cpuapp_common.dtsi b/boards/nordic/nrf5340dk/nrf5340_cpuapp_common.dtsi index 71060ba1ba2..153e8e83458 100644 --- a/boards/nordic/nrf5340dk/nrf5340_cpuapp_common.dtsi +++ b/boards/nordic/nrf5340dk/nrf5340_cpuapp_common.dtsi @@ -74,6 +74,10 @@ status = "okay"; }; +&nfct { + status = "okay"; +}; + &gpiote { status = "okay"; }; diff --git a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp.dts b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp.dts index c9c6603950f..f7870a2b169 100644 --- a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp.dts +++ b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp.dts @@ -203,6 +203,11 @@ ipc0: &cpuapp_cpurad_ipc { source-memory = <&cpuflpr_code_partition>; }; +&nfct { + status = "okay"; + memory-regions = <&cpuapp_dma_region>; +}; + &gpiote130 { status = "okay"; owned-channels = <0 1 2 3 4 5 6 7>; diff --git a/boards/nordic/nrf54l15dk/nrf54l_05_10_15_cpuapp_common.dtsi b/boards/nordic/nrf54l15dk/nrf54l_05_10_15_cpuapp_common.dtsi index eade6178a6a..48a57eb15d5 100644 --- a/boards/nordic/nrf54l15dk/nrf54l_05_10_15_cpuapp_common.dtsi +++ b/boards/nordic/nrf54l15dk/nrf54l_05_10_15_cpuapp_common.dtsi @@ -56,6 +56,10 @@ status = "okay"; }; +&nfct { + status = "okay"; +}; + &gpio0 { status = "okay"; }; diff --git a/boards/nordic/nrf54l20pdk/nrf54l20_cpuapp_common.dtsi b/boards/nordic/nrf54l20pdk/nrf54l20_cpuapp_common.dtsi index 457694d4214..d3a2a731120 100644 --- a/boards/nordic/nrf54l20pdk/nrf54l20_cpuapp_common.dtsi +++ b/boards/nordic/nrf54l20pdk/nrf54l20_cpuapp_common.dtsi @@ -80,6 +80,10 @@ status = "okay"; }; +&nfct { + status = "okay"; +}; + &gpio0 { status = "okay"; }; diff --git a/boards/nordic/nrf7002dk/nrf5340_cpuapp_common.dtsi b/boards/nordic/nrf7002dk/nrf5340_cpuapp_common.dtsi index f0c0f082d99..7056652e573 100644 --- a/boards/nordic/nrf7002dk/nrf5340_cpuapp_common.dtsi +++ b/boards/nordic/nrf7002dk/nrf5340_cpuapp_common.dtsi @@ -143,6 +143,10 @@ status = "okay"; }; +&nfct { + status = "okay"; +}; + &gpiote { status = "okay"; }; diff --git a/boards/nordic/thingy52/thingy52_nrf52832.dts b/boards/nordic/thingy52/thingy52_nrf52832.dts index dea1e43fad5..9db5f67c486 100644 --- a/boards/nordic/thingy52/thingy52_nrf52832.dts +++ b/boards/nordic/thingy52/thingy52_nrf52832.dts @@ -113,6 +113,10 @@ status = "okay"; }; +&nfct { + status = "okay"; +}; + &gpiote { status = "okay"; }; diff --git a/boards/nordic/thingy53/thingy53_nrf5340_common.dtsi b/boards/nordic/thingy53/thingy53_nrf5340_common.dtsi index 72471a0c95e..e531b578323 100644 --- a/boards/nordic/thingy53/thingy53_nrf5340_common.dtsi +++ b/boards/nordic/thingy53/thingy53_nrf5340_common.dtsi @@ -187,6 +187,10 @@ }; }; +&nfct { + status = "okay"; +}; + &gpiote { status = "okay"; }; From c8bda86db63594792d0eb0518bc9df26e7aab1ef Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20Stasiak?= Date: Thu, 24 Apr 2025 12:15:03 +0200 Subject: [PATCH 0006/2553] tests: drivers: clock_control_api: move startup time to Kconfig MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Moved target dependent startup time from header file to Kconfig option to allow adding new targets with new .conf file rather that modyfing source of the test. Adjusted startup time for nRF54L09 and nRF54L20. Signed-off-by: Michał Stasiak --- .../drivers/clock_control/clock_control_api/Kconfig | 13 +++++++++++++ .../boards/nrf54l09pdk_nrf54l09_cpuapp.conf | 1 + .../boards/nrf54l20pdk_nrf54l20_cpuapp.conf | 1 + .../clock_control_api/src/nrf_device_subsys.h | 4 +--- 4 files changed, 16 insertions(+), 3 deletions(-) create mode 100644 tests/drivers/clock_control/clock_control_api/Kconfig create mode 100644 tests/drivers/clock_control/clock_control_api/boards/nrf54l09pdk_nrf54l09_cpuapp.conf create mode 100644 tests/drivers/clock_control/clock_control_api/boards/nrf54l20pdk_nrf54l20_cpuapp.conf diff --git a/tests/drivers/clock_control/clock_control_api/Kconfig b/tests/drivers/clock_control/clock_control_api/Kconfig new file mode 100644 index 00000000000..dc1e976d824 --- /dev/null +++ b/tests/drivers/clock_control/clock_control_api/Kconfig @@ -0,0 +1,13 @@ +# Copyright (c) 2025 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +config TEST_NRF_HF_STARTUP_TIME_US + int "Delay required for HF clock startup." + default 3000 if CONFIG_SOC_SERIES_NRF91X + default 500 + depends on SOC_FAMILY_NORDIC_NRF + help + Delay in microseconds required for high-frequency + clock startup. + +source "Kconfig.zephyr" diff --git a/tests/drivers/clock_control/clock_control_api/boards/nrf54l09pdk_nrf54l09_cpuapp.conf b/tests/drivers/clock_control/clock_control_api/boards/nrf54l09pdk_nrf54l09_cpuapp.conf new file mode 100644 index 00000000000..11d42321cbc --- /dev/null +++ b/tests/drivers/clock_control/clock_control_api/boards/nrf54l09pdk_nrf54l09_cpuapp.conf @@ -0,0 +1 @@ +CONFIG_TEST_NRF_HF_STARTUP_TIME_US=1000 diff --git a/tests/drivers/clock_control/clock_control_api/boards/nrf54l20pdk_nrf54l20_cpuapp.conf b/tests/drivers/clock_control/clock_control_api/boards/nrf54l20pdk_nrf54l20_cpuapp.conf new file mode 100644 index 00000000000..11d42321cbc --- /dev/null +++ b/tests/drivers/clock_control/clock_control_api/boards/nrf54l20pdk_nrf54l20_cpuapp.conf @@ -0,0 +1 @@ +CONFIG_TEST_NRF_HF_STARTUP_TIME_US=1000 diff --git a/tests/drivers/clock_control/clock_control_api/src/nrf_device_subsys.h b/tests/drivers/clock_control/clock_control_api/src/nrf_device_subsys.h index 6d660bda947..47a3060d630 100644 --- a/tests/drivers/clock_control/clock_control_api/src/nrf_device_subsys.h +++ b/tests/drivers/clock_control/clock_control_api/src/nrf_device_subsys.h @@ -10,9 +10,7 @@ static const struct device_subsys_data subsys_data[] = { { .subsys = CLOCK_CONTROL_NRF_SUBSYS_HF, - .startup_us = - IS_ENABLED(CONFIG_SOC_SERIES_NRF91X) ? - 3000 : 500 + .startup_us = CONFIG_TEST_NRF_HF_STARTUP_TIME_US }, #ifndef CONFIG_SOC_NRF52832 /* On nrf52832 LF clock cannot be stopped because it leads From c6d98acbbf9367b71dfff589d309e70404aee9a5 Mon Sep 17 00:00:00 2001 From: Ibe Van de Veire Date: Wed, 23 Apr 2025 14:09:44 +0200 Subject: [PATCH 0007/2553] net: lib: sockets: Increase socketpair mem pool size Increased the heap mempool size for the socketpairs. This way there will be enough memory available to allocate 2 * struct spair. Signed-off-by: Ibe Van de Veire --- subsys/net/lib/sockets/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/subsys/net/lib/sockets/Kconfig b/subsys/net/lib/sockets/Kconfig index 596adef4ab2..2b3c904c0d0 100644 --- a/subsys/net/lib/sockets/Kconfig +++ b/subsys/net/lib/sockets/Kconfig @@ -372,7 +372,7 @@ config HEAP_MEM_POOL_ADD_SIZE_SOCKETPAIR int default 9136 if WIFI_NM_HOSTAPD_AP default 6852 if WIFI_NM_WPA_SUPPLICANT - default 256 + default 296 endif # NET_SOCKETPAIR_HEAP From fb1d0785ae3bcc60282c94d31e253ae7f1b4360e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andrzej=20G=C5=82=C4=85bek?= Date: Wed, 23 Apr 2025 11:40:47 +0200 Subject: [PATCH 0008/2553] drivers: flash: nrf_qspi_nor: Prevent CPU hang when XIP is re-enabled MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a simple non-XIP transaction before deactivating the QSPI after a XIP transaction is performed. This prevents a CPU hang from occuring when another XIP transaction is attempted after the QSPI is activated again. Signed-off-by: Andrzej Głąbek --- drivers/flash/nrf_qspi_nor.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/flash/nrf_qspi_nor.c b/drivers/flash/nrf_qspi_nor.c index f60ca2d2c0e..12eeb3f4a3e 100644 --- a/drivers/flash/nrf_qspi_nor.c +++ b/drivers/flash/nrf_qspi_nor.c @@ -1359,6 +1359,18 @@ void z_impl_nrf_qspi_nor_xip_enable(const struct device *dev, bool enable) #endif if (enable) { (void)nrfx_qspi_activate(false); + } else { + /* It turns out that when the QSPI peripheral is deactivated + * after a XIP transaction, it cannot be later successfully + * reactivated and an attempt to perform another XIP transaction + * results in the CPU being hung; even a debug session cannot be + * started then and the SoC has to be recovered. + * As a workaround, at least until the cause of such behavior + * is fully clarified, perform a simple non-XIP transaction + * (a read of the status register) before deactivating the QSPI. + * This prevents the issue from occurring. + */ + (void)qspi_rdsr(dev, 1); } dev_data->xip_enabled = enable; From 500c67fa18c298953ef7d481f57fad85f32ef441 Mon Sep 17 00:00:00 2001 From: Emil Lindqvist Date: Thu, 27 Feb 2025 19:31:17 +0100 Subject: [PATCH 0009/2553] wifi: fix -Wignored-qualifiers warning Including wifi.h with -Wignored-qualifiers warning enabled gives a warning. Fix this warning Signed-off-by: Emil Lindqvist --- include/zephyr/net/wifi.h | 2 +- subsys/net/l2/wifi/wifi_mgmt.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/zephyr/net/wifi.h b/include/zephyr/net/wifi.h index 8b89ff57803..8f54750c498 100644 --- a/include/zephyr/net/wifi.h +++ b/include/zephyr/net/wifi.h @@ -295,7 +295,7 @@ enum wifi_frequency_bandwidths { WIFI_FREQ_BANDWIDTH_UNKNOWN }; -const char *const wifi_bandwidth_txt(enum wifi_frequency_bandwidths bandwidth); +const char *wifi_bandwidth_txt(enum wifi_frequency_bandwidths bandwidth); /** Max SSID length */ #define WIFI_SSID_MAX_LEN 32 diff --git a/subsys/net/l2/wifi/wifi_mgmt.c b/subsys/net/l2/wifi/wifi_mgmt.c index 95ff6b45f0c..378b1dd2ea2 100644 --- a/subsys/net/l2/wifi/wifi_mgmt.c +++ b/subsys/net/l2/wifi/wifi_mgmt.c @@ -143,7 +143,7 @@ const char *wifi_band_txt(enum wifi_frequency_bands band) } } -const char *const wifi_bandwidth_txt(enum wifi_frequency_bandwidths bandwidth) +const char *wifi_bandwidth_txt(enum wifi_frequency_bandwidths bandwidth) { switch (bandwidth) { case WIFI_FREQ_BANDWIDTH_20MHZ: From 780379e333c69b94341e899d2ebeb054f09731ec Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Fin=20Maa=C3=9F?= Date: Wed, 26 Mar 2025 17:08:58 +0100 Subject: [PATCH 0010/2553] drivers: nxp_enet: move phy_link_callback_set() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit move phy_link_callback_set() to the iface init, so we don't have to manually check the link state, as phy_link_callback_set() will also invoke the callback. Signed-off-by: Fin Maaß --- drivers/ethernet/eth_nxp_enet.c | 34 ++------------------------------- 1 file changed, 2 insertions(+), 32 deletions(-) diff --git a/drivers/ethernet/eth_nxp_enet.c b/drivers/ethernet/eth_nxp_enet.c index df5588a4b05..26d135f8fdc 100644 --- a/drivers/ethernet/eth_nxp_enet.c +++ b/drivers/ethernet/eth_nxp_enet.c @@ -525,10 +525,6 @@ static void nxp_enet_phy_cb(const struct device *phy, ENET_SetMII(data->base, speed, duplex); } - if (!data->iface) { - return; - } - LOG_INF("Link is %s", state->is_up ? "up" : "down"); if (!state->is_up) { @@ -544,8 +540,6 @@ static void eth_nxp_enet_iface_init(struct net_if *iface) const struct device *dev = net_if_get_device(iface); struct nxp_enet_mac_data *data = dev->data; const struct nxp_enet_mac_config *config = dev->config; - const struct device *phy_dev = config->phy_dev; - struct phy_link_state state; net_if_set_link_addr(iface, data->mac_addr, sizeof(data->mac_addr), @@ -562,37 +556,13 @@ static void eth_nxp_enet_iface_init(struct net_if *iface) ethernet_init(iface); net_if_carrier_off(iface); - /* In case the phy driver doesn't report a state change due to link being up - * before calling phy_configure, we should check the state ourself, and then do a - * pseudo-callback - */ - phy_get_link_state(phy_dev, &state); - - nxp_enet_phy_cb(phy_dev, &state, (void *)dev); + phy_link_callback_set(config->phy_dev, nxp_enet_phy_cb, (void *)dev); config->irq_config_func(); nxp_enet_driver_cb(config->mdio, NXP_ENET_MDIO, NXP_ENET_INTERRUPT_ENABLED, NULL); } -static int nxp_enet_phy_init(const struct device *dev) -{ - const struct nxp_enet_mac_config *config = dev->config; - int ret = 0; - - ret = nxp_enet_phy_configure(config->phy_dev, config->phy_mode); - if (ret) { - return ret; - } - - ret = phy_link_callback_set(config->phy_dev, nxp_enet_phy_cb, (void *)dev); - if (ret) { - return ret; - } - - return ret; -} - void nxp_enet_driver_cb(const struct device *dev, enum nxp_enet_driver dev_type, enum nxp_enet_callback_reason event, void *data) { @@ -818,7 +788,7 @@ static int eth_nxp_enet_init(const struct device *dev) ENET_ActiveRead(data->base); - err = nxp_enet_phy_init(dev); + err = nxp_enet_phy_configure(config->phy_dev, config->phy_mode); if (err) { return err; } From 3d344186fcb36b71bf4f5ded0188c6e070147ef6 Mon Sep 17 00:00:00 2001 From: Jordan Yates Date: Sun, 30 Mar 2025 22:26:52 +1000 Subject: [PATCH 0011/2553] serial: uart_native_pty_bottom: length parameter Add a length parameter to the poll in read function so that data can be read in larger chunks. Signed-off-by: Jordan Yates --- drivers/serial/uart_native_pty.c | 6 ++---- drivers/serial/uart_native_pty_bottom.c | 9 +++++---- drivers/serial/uart_native_pty_bottom.h | 2 +- 3 files changed, 8 insertions(+), 9 deletions(-) diff --git a/drivers/serial/uart_native_pty.c b/drivers/serial/uart_native_pty.c index c4da0450b25..89f5bb3b196 100644 --- a/drivers/serial/uart_native_pty.c +++ b/drivers/serial/uart_native_pty.c @@ -170,13 +170,11 @@ static int np_uart_stdin_poll_in(const struct device *dev, unsigned char *p_char return -1; } - rc = np_uart_stdin_poll_in_bottom(in_f, p_char); + rc = np_uart_stdin_poll_in_bottom(in_f, p_char, 1); if (rc == -2) { disconnected = true; - return -1; } - - return rc; + return rc == 1 ? 0 : -1; } /** diff --git a/drivers/serial/uart_native_pty_bottom.c b/drivers/serial/uart_native_pty_bottom.c index 0c5546cdeda..3ff7ca59479 100644 --- a/drivers/serial/uart_native_pty_bottom.c +++ b/drivers/serial/uart_native_pty_bottom.c @@ -32,12 +32,13 @@ * * @param in_f Input file descriptor * @param p_char Pointer to character. + * @param len Maximum number of characters to read. * - * @retval 0 If a character arrived and was stored in p_char + * @retval >0 Number of characters actually read * @retval -1 If no character was available to read * @retval -2 if the stdin is disconnected */ -int np_uart_stdin_poll_in_bottom(int in_f, unsigned char *p_char) +int np_uart_stdin_poll_in_bottom(int in_f, unsigned char *p_char, int len) { if (feof(stdin)) { /* @@ -64,12 +65,12 @@ int np_uart_stdin_poll_in_bottom(int in_f, unsigned char *p_char) ERROR("%s: Error on select ()\n", __func__); } - n = read(in_f, p_char, 1); + n = read(in_f, p_char, len); if ((n == -1) || (n == 0)) { return -1; } - return 0; + return n; } /** diff --git a/drivers/serial/uart_native_pty_bottom.h b/drivers/serial/uart_native_pty_bottom.h index 5cbf2783795..69af6d3fa8d 100644 --- a/drivers/serial/uart_native_pty_bottom.h +++ b/drivers/serial/uart_native_pty_bottom.h @@ -20,7 +20,7 @@ extern "C" { /* Note: None of these functions are public interfaces. But internal to the native ptty driver */ -int np_uart_stdin_poll_in_bottom(int in_f, unsigned char *p_char); +int np_uart_stdin_poll_in_bottom(int in_f, unsigned char *p_char, int len); int np_uart_slave_connected(int fd); int np_uart_open_pty(const char *uart_name, const char *auto_attach_cmd, bool do_auto_attach, bool wait_pts); From 5536e5b5cd34eb509b6f2d84ce3d7e4d703ff9dc Mon Sep 17 00:00:00 2001 From: Jordan Yates Date: Sun, 30 Mar 2025 21:36:17 +1000 Subject: [PATCH 0012/2553] serial: uart_native_pty: ASYNC TX support Add support for transmitting using the asynchronous API. The asynchronous portion is simulated through the system workqueue. Signed-off-by: Jordan Yates --- drivers/serial/Kconfig.native_pty | 1 + drivers/serial/uart_native_pty.c | 107 ++++++++++++++++++++++++++++++ 2 files changed, 108 insertions(+) diff --git a/drivers/serial/Kconfig.native_pty b/drivers/serial/Kconfig.native_pty index 5f98676d575..9420ce4e13f 100644 --- a/drivers/serial/Kconfig.native_pty +++ b/drivers/serial/Kconfig.native_pty @@ -6,6 +6,7 @@ config UART_NATIVE_PTY default y depends on (DT_HAS_ZEPHYR_NATIVE_PTY_UART_ENABLED || DT_HAS_ZEPHYR_NATIVE_POSIX_UART_ENABLED) select SERIAL_HAS_DRIVER + select SERIAL_SUPPORT_ASYNC help This enables a PTY based UART driver for the POSIX ARCH with up to 2 UARTs. For the first UART port, the driver can be configured diff --git a/drivers/serial/uart_native_pty.c b/drivers/serial/uart_native_pty.c index 89f5bb3b196..bbf349bf863 100644 --- a/drivers/serial/uart_native_pty.c +++ b/drivers/serial/uart_native_pty.c @@ -48,15 +48,38 @@ struct native_pty_status { char *auto_attach_cmd; /* If auto_attach, which command to launch the terminal emulator */ bool wait_pts; /* Hold writes to the uart/pts until a client is connected/ready */ bool cmd_request_stdinout; /* User requested to connect this UART to the stdin/out */ +#ifdef CONFIG_UART_ASYNC_API + struct { + const struct device *dev; + struct k_work_delayable tx_done; + uart_callback_t user_callback; + void *user_data; + const uint8_t *tx_buf; + size_t tx_len; + } async; +#endif /* CONFIG_UART_ASYNC_API */ }; static void np_uart_poll_out(const struct device *dev, unsigned char out_char); static int np_uart_poll_in(const struct device *dev, unsigned char *p_char); static int np_uart_init(const struct device *dev); +#ifdef CONFIG_UART_ASYNC_API +static void np_uart_tx_done_work(struct k_work *work); +static int np_uart_callback_set(const struct device *dev, uart_callback_t callback, + void *user_data); +static int np_uart_tx(const struct device *dev, const uint8_t *buf, size_t len, int32_t timeout); +static int np_uart_tx_abort(const struct device *dev); +#endif /* CONFIG_UART_ASYNC_API */ + static DEVICE_API(uart, np_uart_driver_api) = { .poll_out = np_uart_poll_out, .poll_in = np_uart_poll_in, +#ifdef CONFIG_UART_ASYNC_API + .callback_set = np_uart_callback_set, + .tx = np_uart_tx, + .tx_abort = np_uart_tx_abort, +#endif /* CONFIG_UART_ASYNC_API */ }; #define NATIVE_PTY_INSTANCE(inst) \ @@ -119,6 +142,11 @@ static int np_uart_init(const struct device *dev) d->out_fd = tty_fn; } +#ifdef CONFIG_UART_ASYNC_API + k_work_init_delayable(&d->async.tx_done, np_uart_tx_done_work); + d->async.dev = dev; +#endif + return 0; } @@ -207,6 +235,85 @@ static int np_uart_poll_in(const struct device *dev, unsigned char *p_char) } } +#ifdef CONFIG_UART_ASYNC_API + +static int np_uart_callback_set(const struct device *dev, uart_callback_t callback, void *user_data) +{ + struct native_pty_status *data = dev->data; + + data->async.user_callback = callback; + data->async.user_data = user_data; + + return 0; +} + +static void np_uart_tx_done_work(struct k_work *work) +{ + struct k_work_delayable *dwork = k_work_delayable_from_work(work); + struct native_pty_status *data = + CONTAINER_OF(dwork, struct native_pty_status, async.tx_done); + struct uart_event evt; + unsigned int key = irq_lock(); + + evt.type = UART_TX_DONE; + evt.data.tx.buf = data->async.tx_buf; + evt.data.tx.len = data->async.tx_len; + + (void)nsi_host_write(data->out_fd, evt.data.tx.buf, evt.data.tx.len); + + data->async.tx_buf = NULL; + + if (data->async.user_callback) { + data->async.user_callback(data->async.dev, &evt, data->async.user_data); + } + irq_unlock(key); +} + +static int np_uart_tx(const struct device *dev, const uint8_t *buf, size_t len, int32_t timeout) +{ + struct native_pty_status *data = dev->data; + + if (data->async.tx_buf) { + /* Port is busy */ + return -EBUSY; + } + data->async.tx_buf = buf; + data->async.tx_len = len; + + /* Run the callback on the next tick to give the caller time to use the return value */ + k_work_reschedule(&data->async.tx_done, K_TICKS(1)); + return 0; +} + +static int np_uart_tx_abort(const struct device *dev) +{ + struct native_pty_status *data = dev->data; + struct k_work_sync sync; + struct uart_event evt; + bool not_idle; + + /* Cancel the callback */ + not_idle = k_work_cancel_delayable_sync(&data->async.tx_done, &sync); + if (!not_idle) { + return -EFAULT; + } + + /* Generate TX_DONE event with number of bytes transmitted */ + evt.type = UART_TX_DONE; + evt.data.tx.buf = data->async.tx_buf; + evt.data.tx.len = 0; + if (data->async.user_callback) { + data->async.user_callback(data->async.dev, &evt, data->async.user_data); + } + + /* Reset state */ + data->async.tx_buf = NULL; + return 0; +} + +#endif /* CONFIG_UART_ASYNC_API */ + + #define NATIVE_PTY_SET_AUTO_ATTACH_CMD(inst, cmd) \ native_pty_status_##inst.auto_attach_cmd = cmd; #define NATIVE_PTY_SET_AUTO_ATTACH(inst, value) \ From 9bbc6d1579436ac43c3a9fd9f180e83d7e47acbc Mon Sep 17 00:00:00 2001 From: Jordan Yates Date: Wed, 16 Apr 2025 16:45:18 +1000 Subject: [PATCH 0013/2553] serial: uart_native_pty: ASYNC RX support Add support for transmitting using the asynchronous API. The asynchronous portion is simulated through a dedicated polling thread. Signed-off-by: Jordan Yates --- drivers/serial/uart_native_pty.c | 90 ++++++++++++++++++++++++++++++++ 1 file changed, 90 insertions(+) diff --git a/drivers/serial/uart_native_pty.c b/drivers/serial/uart_native_pty.c index bbf349bf863..84dacf5c253 100644 --- a/drivers/serial/uart_native_pty.c +++ b/drivers/serial/uart_native_pty.c @@ -56,6 +56,12 @@ struct native_pty_status { void *user_data; const uint8_t *tx_buf; size_t tx_len; + uint8_t *rx_buf; + size_t rx_len; + /* Instance-specific RX thread. */ + struct k_thread rx_thread; + /* Stack for RX thread */ + K_KERNEL_STACK_MEMBER(rx_stack, CONFIG_ARCH_POSIX_RECOMMENDED_STACK_SIZE); } async; #endif /* CONFIG_UART_ASYNC_API */ }; @@ -70,6 +76,9 @@ static int np_uart_callback_set(const struct device *dev, uart_callback_t callba void *user_data); static int np_uart_tx(const struct device *dev, const uint8_t *buf, size_t len, int32_t timeout); static int np_uart_tx_abort(const struct device *dev); +static int np_uart_rx_buf_rsp(const struct device *dev, uint8_t *buf, size_t len); +static int np_uart_rx_enable(const struct device *dev, uint8_t *buf, size_t len, int32_t timeout); +static int np_uart_rx_disable(const struct device *dev); #endif /* CONFIG_UART_ASYNC_API */ static DEVICE_API(uart, np_uart_driver_api) = { @@ -79,6 +88,9 @@ static DEVICE_API(uart, np_uart_driver_api) = { .callback_set = np_uart_callback_set, .tx = np_uart_tx, .tx_abort = np_uart_tx_abort, + .rx_buf_rsp = np_uart_rx_buf_rsp, + .rx_enable = np_uart_rx_enable, + .rx_disable = np_uart_rx_disable, #endif /* CONFIG_UART_ASYNC_API */ }; @@ -311,6 +323,84 @@ static int np_uart_tx_abort(const struct device *dev) return 0; } +/* + * Emulate async interrupts using a polling thread + */ +static void native_pty_uart_async_poll_function(void *arg1, void *arg2, void *arg3) +{ + const struct device *dev = arg1; + struct native_pty_status *data = dev->data; + struct uart_event evt; + int rc; + + ARG_UNUSED(arg2); + ARG_UNUSED(arg3); + + while (data->async.rx_len) { + rc = np_uart_stdin_poll_in_bottom(data->in_fd, data->async.rx_buf, + data->async.rx_len); + if (rc > 0) { + /* Data received */ + evt.type = UART_RX_RDY; + evt.data.rx.buf = data->async.rx_buf; + evt.data.rx.offset = 0; + evt.data.rx.len = rc; + /* User callback */ + if (data->async.user_callback) { + data->async.user_callback(data->async.dev, &evt, + data->async.user_data); + } + } + if ((data->async.rx_len != 0) && (rc < 0)) { + /* Sleep if RX not disabled and last read didn't result in any data */ + k_sleep(K_MSEC(10)); + } + } +} + +static int np_uart_rx_buf_rsp(const struct device *dev, uint8_t *buf, size_t len) +{ + /* Driver never requests additional buffers */ + return -ENOTSUP; +} + +static int np_uart_rx_enable(const struct device *dev, uint8_t *buf, size_t len, int32_t timeout) +{ + struct native_pty_status *data = dev->data; + + ARG_UNUSED(timeout); + + if (data->async.rx_buf != NULL) { + return -EBUSY; + } + + data->async.rx_buf = buf; + data->async.rx_len = len; + + /* Create a thread which will wait for data - replacement for IRQ */ + k_thread_create(&data->async.rx_thread, data->async.rx_stack, + K_KERNEL_STACK_SIZEOF(data->async.rx_stack), + native_pty_uart_async_poll_function, + (void *)dev, NULL, NULL, + K_HIGHEST_THREAD_PRIO, 0, K_NO_WAIT); + return 0; +} + +static int np_uart_rx_disable(const struct device *dev) +{ + struct native_pty_status *data = dev->data; + + if (data->async.rx_buf == NULL) { + return -EFAULT; + } + + data->async.rx_len = 0; + data->async.rx_buf = NULL; + + /* Wait for RX thread to terminate */ + return k_thread_join(&data->async.rx_thread, K_FOREVER); +} + #endif /* CONFIG_UART_ASYNC_API */ From bb0f19260a0d94b89b25d82aad1c485972dd6961 Mon Sep 17 00:00:00 2001 From: Jordan Yates Date: Wed, 16 Apr 2025 17:52:33 +1000 Subject: [PATCH 0014/2553] samples: uart: async_api: added Add a sample that utilises the ASYNC API to queue packets in bursts. Signed-off-by: Jordan Yates --- samples/drivers/uart/async_api/CMakeLists.txt | 8 ++ samples/drivers/uart/async_api/README.rst | 59 ++++++++ samples/drivers/uart/async_api/prj.conf | 5 + samples/drivers/uart/async_api/sample.yaml | 13 ++ samples/drivers/uart/async_api/src/main.c | 135 ++++++++++++++++++ 5 files changed, 220 insertions(+) create mode 100644 samples/drivers/uart/async_api/CMakeLists.txt create mode 100644 samples/drivers/uart/async_api/README.rst create mode 100644 samples/drivers/uart/async_api/prj.conf create mode 100644 samples/drivers/uart/async_api/sample.yaml create mode 100644 samples/drivers/uart/async_api/src/main.c diff --git a/samples/drivers/uart/async_api/CMakeLists.txt b/samples/drivers/uart/async_api/CMakeLists.txt new file mode 100644 index 00000000000..2f71c3f55c9 --- /dev/null +++ b/samples/drivers/uart/async_api/CMakeLists.txt @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: Apache-2.0 + +cmake_minimum_required(VERSION 3.20.0) + +find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +project(uart_async_api) + +target_sources(app PRIVATE src/main.c) diff --git a/samples/drivers/uart/async_api/README.rst b/samples/drivers/uart/async_api/README.rst new file mode 100644 index 00000000000..6b8ebf7f9f3 --- /dev/null +++ b/samples/drivers/uart/async_api/README.rst @@ -0,0 +1,59 @@ +.. zephyr:code-sample:: uart_async + :name: UART ASYNC API + :relevant-api: uart_interface + + Demonstrate the use of the asynchronous API + +Overview +******** + +This sample demonstrates how to use the UART serial driver asynchronous +API through a simple packet transmitter. + +Every 5 seconds, 1 to 4 data payloads are generated and queued for +transmission. Every other 5 second period, receiving is enabled through +the asynchronous API. + +By default, the UART peripheral that is normally used for the Zephyr shell +is used, so that almost every board should be supported. + +Building and Running +******************** + +Build and flash the sample as follows, changing ``nrf52840dk/nrf52840`` for +your board: + +.. zephyr-app-commands:: + :zephyr-app: samples/drivers/uart/async_api + :board: nrf52840dk/nrf52840 + :goals: build flash + :compact: + +Sample Output +============= + +.. code-block:: console + + Loop 0: Packet: 0 + Loop 0: Packet: 1 + Loop 0: Packet: 2 + [00:00:05.001,919] sample: Loop 0: Sending 3 packets + [00:00:05.002,008] sample: RX is now enabled + Loop 1: Packet: 0 + [00:00:10.002,086] sample: Loop 1: Sending 1 packets + [00:00:10.002,138] sample: RX is now disabled + Loop 2: Packet: 0 + Loop 2: Packet: 1 + [00:00:15.002,215] sample: Loop 2: Sending 2 packets + [00:00:15.002,293] sample: RX is now enabled + [00:00:15.009,010] sample: RX_RDY + 68 65 6c 6c 6f 0a |hello. + Loop 3: Packet: 0 + Loop 3: Packet: 1 + Loop 3: Packet: 2 + [00:00:20.002,343] sample: Loop 3: Sending 3 packets + [00:00:20.002,424] sample: RX is now disabled + +Note that because the UART transmissions are triggered directly, they will +appear in the serial logs **before** the ``LOG_INF`` message at the top of +the loop, since log writes are typically deferred by several seconds diff --git a/samples/drivers/uart/async_api/prj.conf b/samples/drivers/uart/async_api/prj.conf new file mode 100644 index 00000000000..ce46f814605 --- /dev/null +++ b/samples/drivers/uart/async_api/prj.conf @@ -0,0 +1,5 @@ +CONFIG_LOG=y +CONFIG_NET_BUF=y +CONFIG_SERIAL=y +CONFIG_UART_ASYNC_API=y +CONFIG_TEST_RANDOM_GENERATOR=y diff --git a/samples/drivers/uart/async_api/sample.yaml b/samples/drivers/uart/async_api/sample.yaml new file mode 100644 index 00000000000..4fc5566a84e --- /dev/null +++ b/samples/drivers/uart/async_api/sample.yaml @@ -0,0 +1,13 @@ +sample: + name: UART ASYNC API driver sample +tests: + sample.drivers.uart.async_api: + integration_platforms: + - nrf52840dk/nrf52840 + tags: + - serial + - uart + filter: CONFIG_SERIAL and + CONFIG_UART_ASYNC_API and + dt_chosen_enabled("zephyr,shell-uart") + harness: keyboard diff --git a/samples/drivers/uart/async_api/src/main.c b/samples/drivers/uart/async_api/src/main.c new file mode 100644 index 00000000000..29abf9c45d8 --- /dev/null +++ b/samples/drivers/uart/async_api/src/main.c @@ -0,0 +1,135 @@ +/* + * Copyright (c) 2025 Embeint Inc + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include +#include +#include + +/* change this to any other UART peripheral if desired */ +#define UART_DEVICE_NODE DT_CHOSEN(zephyr_shell_uart) + +/* Maximum number of packets to generate per iteration */ +#define LOOP_ITER_MAX_TX 4 +/* Maximum size of our TX packets */ +#define MAX_TX_LEN 32 +#define RX_CHUNK_LEN 32 + +/* Buffer pool for our TX payloads */ +NET_BUF_POOL_DEFINE(tx_pool, LOOP_ITER_MAX_TX, MAX_TX_LEN, 0, NULL); + +struct k_fifo tx_queue; +struct net_buf *tx_pending_buffer; +uint8_t async_rx_buffer[2][RX_CHUNK_LEN]; +volatile uint8_t async_rx_buffer_idx; + +static const struct device *const uart_dev = DEVICE_DT_GET(UART_DEVICE_NODE); + +LOG_MODULE_REGISTER(sample, LOG_LEVEL_INF); + +static void uart_callback(const struct device *dev, struct uart_event *evt, void *user_data) +{ + struct net_buf *buf; + int rc; + + LOG_DBG("EVENT: %d", evt->type); + + switch (evt->type) { + case UART_TX_DONE: + LOG_DBG("TX complete %p", tx_pending_buffer); + + /* Free TX buffer */ + net_buf_unref(tx_pending_buffer); + tx_pending_buffer = NULL; + + /* Handle any queued buffers */ + buf = k_fifo_get(&tx_queue, K_NO_WAIT); + if (buf != NULL) { + rc = uart_tx(dev, buf->data, buf->len, 0); + if (rc != 0) { + LOG_ERR("TX from ISR failed (%d)", rc); + net_buf_unref(buf); + } else { + tx_pending_buffer = buf; + } + } + break; + case UART_RX_BUF_REQUEST: + /* Return the next buffer index */ + LOG_DBG("Providing buffer index %d", async_rx_buffer_idx); + rc = uart_rx_buf_rsp(dev, async_rx_buffer[async_rx_buffer_idx], + sizeof(async_rx_buffer[0])); + __ASSERT_NO_MSG(rc == 0); + async_rx_buffer_idx = async_rx_buffer_idx ? 0 : 1; + break; + case UART_RX_BUF_RELEASED: + case UART_RX_DISABLED: + break; + case UART_RX_RDY: + LOG_HEXDUMP_INF(evt->data.rx.buf + evt->data.rx.offset, + evt->data.rx.len, "RX_RDY"); + break; + default: + LOG_WRN("Unhandled event %d", evt->type); + } +} + +int main(void) +{ + bool rx_enabled = false; + struct net_buf *tx_buf; + int loop_counter = 0; + uint8_t num_tx; + int tx_len; + int rc; + + /* Register the async interrupt handler */ + uart_callback_set(uart_dev, uart_callback, (void *)uart_dev); + + while (1) { + /* Wait a while until the next burst transmission */ + k_sleep(K_SECONDS(5)); + + /* Each loop, try to send a random number of packets */ + num_tx = (sys_rand32_get() % LOOP_ITER_MAX_TX) + 1; + LOG_INF("Loop %d: Sending %d packets", loop_counter, num_tx); + for (int i = 0; i < num_tx; i++) { + /* Allocate the data packet */ + tx_buf = net_buf_alloc(&tx_pool, K_FOREVER); + /* Populate it with data */ + tx_len = snprintk(tx_buf->data, net_buf_tailroom(tx_buf), + "Loop %d: Packet: %d\r\n", loop_counter, i); + net_buf_add(tx_buf, tx_len); + + /* Queue packet for transmission */ + rc = uart_tx(uart_dev, tx_buf->data, tx_buf->len, SYS_FOREVER_US); + if (rc == 0) { + /* Store the pending buffer */ + tx_pending_buffer = tx_buf; + } else if (rc == -EBUSY) { + /* Transmission is already in progress */ + LOG_DBG("Queuing buffer %p", tx_buf); + k_fifo_put(&tx_queue, tx_buf); + } else { + LOG_ERR("Unknown error (%d)", rc); + } + } + + /* Toggle the RX state */ + if (rx_enabled) { + uart_rx_disable(uart_dev); + } else { + async_rx_buffer_idx = 1; + uart_rx_enable(uart_dev, async_rx_buffer[0], RX_CHUNK_LEN, 100); + } + rx_enabled = !rx_enabled; + LOG_INF("RX is now %s", rx_enabled ? "enabled" : "disabled"); + + loop_counter += 1; + } +} From 9278de258eaa8f23348c084e0f7075d9459e6359 Mon Sep 17 00:00:00 2001 From: Mahesh Mahadevan Date: Wed, 9 Apr 2025 14:43:29 -0500 Subject: [PATCH 0015/2553] drivers: flash: flexspi: Fix XIP during flash write Commit 857e5793f1b15c5517ef85e0041fe248d39ac777 fix the flash_mcux_flexspi_nor.c driver to wait for the FlexSPI to be idle before performing write/erase operations. Add a similar check to these drivers that also use the FlexSPI NOR block. Signed-off-by: Mahesh Mahadevan --- drivers/flash/flash_mcux_flexspi_hyperflash.c | 8 ++++++++ drivers/flash/flash_mcux_flexspi_mx25um51345g.c | 8 ++++++++ 2 files changed, 16 insertions(+) diff --git a/drivers/flash/flash_mcux_flexspi_hyperflash.c b/drivers/flash/flash_mcux_flexspi_hyperflash.c index a44693ab2be..0515e67c983 100644 --- a/drivers/flash/flash_mcux_flexspi_hyperflash.c +++ b/drivers/flash/flash_mcux_flexspi_hyperflash.c @@ -431,6 +431,7 @@ static int flash_flexspi_hyperflash_write(const struct device *dev, off_t offset * code and data accessed must reside in ram. */ key = irq_lock(); + memc_flexspi_wait_bus_idle(&data->controller); } /* Clock FlexSPI at 84 MHZ (42MHz SCLK in DDR mode) */ @@ -448,6 +449,12 @@ static int flash_flexspi_hyperflash_write(const struct device *dev, off_t offset for (j = 0; j < i; j++) { hyperflash_write_buf[j] = src[j]; } + /* As memcpy could cause an XIP access, + * we need to wait for XIP prefetch to be finished again + */ + if (memc_flexspi_is_running_xip(&data->controller)) { + memc_flexspi_wait_bus_idle(&data->controller); + } #endif ret = flash_flexspi_hyperflash_write_enable(dev, offset); if (ret != 0) { @@ -527,6 +534,7 @@ static int flash_flexspi_hyperflash_erase(const struct device *dev, off_t offset * code and data accessed must reside in ram. */ key = irq_lock(); + memc_flexspi_wait_bus_idle(&data->controller); } for (i = 0; i < num_sectors; i++) { diff --git a/drivers/flash/flash_mcux_flexspi_mx25um51345g.c b/drivers/flash/flash_mcux_flexspi_mx25um51345g.c index 56d23d52e90..3bc8f9356a5 100644 --- a/drivers/flash/flash_mcux_flexspi_mx25um51345g.c +++ b/drivers/flash/flash_mcux_flexspi_mx25um51345g.c @@ -390,6 +390,7 @@ static int flash_flexspi_nor_write(const struct device *dev, off_t offset, * code and data accessed must reside in ram. */ key = irq_lock(); + memc_flexspi_wait_bus_idle(data->controller); } if (IS_ENABLED(CONFIG_FLASH_MCUX_FLEXSPI_MX25UM51345G_OPI_DTR)) { /* Check that write size and length are even */ @@ -406,6 +407,12 @@ static int flash_flexspi_nor_write(const struct device *dev, off_t offset, i = MIN(SPI_NOR_PAGE_SIZE - (offset % SPI_NOR_PAGE_SIZE), len); #ifdef CONFIG_FLASH_MCUX_FLEXSPI_NOR_WRITE_BUFFER memcpy(nor_write_buf, src, i); + /* As memcpy could cause an XIP access, + * we need to wait for XIP prefetch to be finished again + */ + if (memc_flexspi_is_running_xip(data->controller)) { + memc_flexspi_wait_bus_idle(data->controller); + } #endif flash_flexspi_nor_write_enable(dev, true); #ifdef CONFIG_FLASH_MCUX_FLEXSPI_NOR_WRITE_BUFFER @@ -461,6 +468,7 @@ static int flash_flexspi_nor_erase(const struct device *dev, off_t offset, * code and data accessed must reside in ram. */ key = irq_lock(); + memc_flexspi_wait_bus_idle(data->controller); } if ((offset == 0) && (size == data->config.flashSize * KB(1))) { From 513e45f60d38444b04c11b5154a3973a0db491c7 Mon Sep 17 00:00:00 2001 From: Hake Huang Date: Fri, 11 Apr 2025 14:48:31 +0800 Subject: [PATCH 0016/2553] tests: drivers: uart: simplify setting for NXP platforms simplify the test overlay for NXP platforms also add check for read_ptr to avoid build warning Signed-off-by: Hake Huang --- .../boards/frdm_mcxa153.overlay | 19 ---------- .../boards/frdm_mcxa166.overlay | 19 ---------- .../boards/frdm_mcxa276.overlay | 19 ---------- .../boards/frdm_mcxn236.overlay | 9 ----- .../boards/frdm_mcxn947_mcxn947_cpu0.overlay | 9 ----- .../frdm_mcxn947_mcxn947_cpu0_qspi.overlay | 9 ----- .../boards/mimxrt1010_evk.overlay | 6 ---- .../boards/mimxrt1020_evk.overlay | 7 ---- .../boards/mimxrt1024_evk.overlay | 6 ---- ...mxrt1050_evk_mimxrt1052_hyperflash.overlay | 7 ---- .../mimxrt1060_evk_mimxrt1062_qspi.overlay | 7 ---- .../mimxrt1060_evk_mimxrt1062_qspi_B.overlay | 7 ---- .../mimxrt1060_evk_mimxrt1062_qspi_C.overlay | 7 ---- .../boards/mimxrt1064_evk.overlay | 7 ---- .../mimxrt1160_evk_mimxrt1166_cm4.overlay | 7 ---- .../mimxrt1160_evk_mimxrt1166_cm7.overlay | 7 ---- .../mimxrt1170_evk_mimxrt1176_cm4.overlay | 7 ---- .../mimxrt1170_evk_mimxrt1176_cm7_A.overlay | 7 ---- .../mimxrt595_evk_mimxrt595s_cm33.overlay | 3 -- .../mimxrt685_evk_mimxrt685s_cm33.overlay | 3 -- .../uart_async_api/nxp/dut_flexcomm12.overlay | 11 ++++++ .../dut_flexcomm2.overlay} | 6 +++- .../nxp/dut_flexcomm2_lpuart2.overlay | 13 +++++++ .../uart_async_api/nxp/dut_flexcomm4.overlay | 11 ++++++ .../nxp/dut_lpc_flexcomm0.overlay | 15 ++++++++ .../dut_lpuart0_loopback.overlay} | 0 .../dut_lpuart1.overlay} | 4 ++- .../nxp/dut_lpuart2_loopback.overlay | 15 ++++++++ .../nxp/dut_lpuart3_loopback.overlay | 17 +++++++++ .../dut_lpuart4_loopback.overlay} | 5 ++- .../uart_async_api/nxp/enable_edma0.overlay | 8 +++++ .../uart/uart_async_api/src/test_uart_async.c | 8 +++-- .../drivers/uart/uart_async_api/testcase.yaml | 35 +++++++++++++++++++ 33 files changed, 142 insertions(+), 178 deletions(-) delete mode 100644 tests/drivers/uart/uart_async_api/boards/frdm_mcxa153.overlay delete mode 100644 tests/drivers/uart/uart_async_api/boards/frdm_mcxa166.overlay delete mode 100644 tests/drivers/uart/uart_async_api/boards/frdm_mcxa276.overlay delete mode 100644 tests/drivers/uart/uart_async_api/boards/frdm_mcxn236.overlay delete mode 100644 tests/drivers/uart/uart_async_api/boards/frdm_mcxn947_mcxn947_cpu0.overlay delete mode 100644 tests/drivers/uart/uart_async_api/boards/frdm_mcxn947_mcxn947_cpu0_qspi.overlay delete mode 100644 tests/drivers/uart/uart_async_api/boards/mimxrt1010_evk.overlay delete mode 100644 tests/drivers/uart/uart_async_api/boards/mimxrt1020_evk.overlay delete mode 100644 tests/drivers/uart/uart_async_api/boards/mimxrt1024_evk.overlay delete mode 100644 tests/drivers/uart/uart_async_api/boards/mimxrt1050_evk_mimxrt1052_hyperflash.overlay delete mode 100644 tests/drivers/uart/uart_async_api/boards/mimxrt1060_evk_mimxrt1062_qspi.overlay delete mode 100644 tests/drivers/uart/uart_async_api/boards/mimxrt1060_evk_mimxrt1062_qspi_B.overlay delete mode 100644 tests/drivers/uart/uart_async_api/boards/mimxrt1060_evk_mimxrt1062_qspi_C.overlay delete mode 100644 tests/drivers/uart/uart_async_api/boards/mimxrt1064_evk.overlay delete mode 100644 tests/drivers/uart/uart_async_api/boards/mimxrt1160_evk_mimxrt1166_cm4.overlay delete mode 100644 tests/drivers/uart/uart_async_api/boards/mimxrt1160_evk_mimxrt1166_cm7.overlay delete mode 100644 tests/drivers/uart/uart_async_api/boards/mimxrt1170_evk_mimxrt1176_cm4.overlay delete mode 100644 tests/drivers/uart/uart_async_api/boards/mimxrt1170_evk_mimxrt1176_cm7_A.overlay delete mode 100644 tests/drivers/uart/uart_async_api/boards/mimxrt595_evk_mimxrt595s_cm33.overlay delete mode 100644 tests/drivers/uart/uart_async_api/boards/mimxrt685_evk_mimxrt685s_cm33.overlay create mode 100644 tests/drivers/uart/uart_async_api/nxp/dut_flexcomm12.overlay rename tests/drivers/uart/uart_async_api/{boards/lpcxpresso55s69_lpc55s69_cpu0.overlay => nxp/dut_flexcomm2.overlay} (55%) create mode 100644 tests/drivers/uart/uart_async_api/nxp/dut_flexcomm2_lpuart2.overlay create mode 100644 tests/drivers/uart/uart_async_api/nxp/dut_flexcomm4.overlay create mode 100644 tests/drivers/uart/uart_async_api/nxp/dut_lpc_flexcomm0.overlay rename tests/drivers/uart/uart_async_api/{boards/frdm_k82f.overlay => nxp/dut_lpuart0_loopback.overlay} (100%) rename tests/drivers/uart/uart_async_api/{boards/frdm_mcxa156.overlay => nxp/dut_lpuart1.overlay} (59%) create mode 100644 tests/drivers/uart/uart_async_api/nxp/dut_lpuart2_loopback.overlay create mode 100644 tests/drivers/uart/uart_async_api/nxp/dut_lpuart3_loopback.overlay rename tests/drivers/uart/uart_async_api/{boards/mimxrt1015_evk.overlay => nxp/dut_lpuart4_loopback.overlay} (54%) create mode 100644 tests/drivers/uart/uart_async_api/nxp/enable_edma0.overlay diff --git a/tests/drivers/uart/uart_async_api/boards/frdm_mcxa153.overlay b/tests/drivers/uart/uart_async_api/boards/frdm_mcxa153.overlay deleted file mode 100644 index 063593ce5af..00000000000 --- a/tests/drivers/uart/uart_async_api/boards/frdm_mcxa153.overlay +++ /dev/null @@ -1,19 +0,0 @@ -/* - * Copyright 2025 NXP - * SPDX-License-Identifier: Apache-2.0 - */ - -/* - * Short J5.3(P3_14) and J5.4(P3_15) to loopback LPUART2 RX/TX for this test - * or test lpuart2 with "nxp,loopback" - */ -dut: &lpuart2 { - status = "okay"; - current-speed = <115200>; - pinctrl-0 = <&pinmux_lpuart2>; - pinctrl-names = "default"; -}; - -&edma0 { - status = "okay"; -}; diff --git a/tests/drivers/uart/uart_async_api/boards/frdm_mcxa166.overlay b/tests/drivers/uart/uart_async_api/boards/frdm_mcxa166.overlay deleted file mode 100644 index 401284b77b9..00000000000 --- a/tests/drivers/uart/uart_async_api/boards/frdm_mcxa166.overlay +++ /dev/null @@ -1,19 +0,0 @@ -/* - * Copyright 2025 NXP - * SPDX-License-Identifier: Apache-2.0 - */ - -/* - * Short J5.3 and J5.4 to loopback LPUART3 RX/TX for this test - * or test lpuart3 with "nxp,loopback" - */ -dut: &lpuart3 { - status = "okay"; - current-speed = <115200>; - pinctrl-0 = <&pinmux_lpuart3>; - pinctrl-names = "default"; -}; - -&edma0 { - status = "okay"; -}; diff --git a/tests/drivers/uart/uart_async_api/boards/frdm_mcxa276.overlay b/tests/drivers/uart/uart_async_api/boards/frdm_mcxa276.overlay deleted file mode 100644 index 401284b77b9..00000000000 --- a/tests/drivers/uart/uart_async_api/boards/frdm_mcxa276.overlay +++ /dev/null @@ -1,19 +0,0 @@ -/* - * Copyright 2025 NXP - * SPDX-License-Identifier: Apache-2.0 - */ - -/* - * Short J5.3 and J5.4 to loopback LPUART3 RX/TX for this test - * or test lpuart3 with "nxp,loopback" - */ -dut: &lpuart3 { - status = "okay"; - current-speed = <115200>; - pinctrl-0 = <&pinmux_lpuart3>; - pinctrl-names = "default"; -}; - -&edma0 { - status = "okay"; -}; diff --git a/tests/drivers/uart/uart_async_api/boards/frdm_mcxn236.overlay b/tests/drivers/uart/uart_async_api/boards/frdm_mcxn236.overlay deleted file mode 100644 index 910350c8c16..00000000000 --- a/tests/drivers/uart/uart_async_api/boards/frdm_mcxn236.overlay +++ /dev/null @@ -1,9 +0,0 @@ -/* - * Copyright 2024 NXP - * SPDX-License-Identifier: Apache-2.0 - */ - -/* - * To test this sample connect P4_2 to P4_3 - */ -dut: &flexcomm2_lpuart2 {}; diff --git a/tests/drivers/uart/uart_async_api/boards/frdm_mcxn947_mcxn947_cpu0.overlay b/tests/drivers/uart/uart_async_api/boards/frdm_mcxn947_mcxn947_cpu0.overlay deleted file mode 100644 index 910350c8c16..00000000000 --- a/tests/drivers/uart/uart_async_api/boards/frdm_mcxn947_mcxn947_cpu0.overlay +++ /dev/null @@ -1,9 +0,0 @@ -/* - * Copyright 2024 NXP - * SPDX-License-Identifier: Apache-2.0 - */ - -/* - * To test this sample connect P4_2 to P4_3 - */ -dut: &flexcomm2_lpuart2 {}; diff --git a/tests/drivers/uart/uart_async_api/boards/frdm_mcxn947_mcxn947_cpu0_qspi.overlay b/tests/drivers/uart/uart_async_api/boards/frdm_mcxn947_mcxn947_cpu0_qspi.overlay deleted file mode 100644 index 827b5eaf259..00000000000 --- a/tests/drivers/uart/uart_async_api/boards/frdm_mcxn947_mcxn947_cpu0_qspi.overlay +++ /dev/null @@ -1,9 +0,0 @@ -/* - * Copyright 2024 NXP - * SPDX-License-Identifier: Apache-2.0 - */ - -/* - * To test this sample connect P4_2(J1-4) to P4_3(J1-2) - */ -dut: &flexcomm2_lpuart2 {}; diff --git a/tests/drivers/uart/uart_async_api/boards/mimxrt1010_evk.overlay b/tests/drivers/uart/uart_async_api/boards/mimxrt1010_evk.overlay deleted file mode 100644 index 4dc4c119d90..00000000000 --- a/tests/drivers/uart/uart_async_api/boards/mimxrt1010_evk.overlay +++ /dev/null @@ -1,6 +0,0 @@ -/* SPDX-License-Identifier: Apache-2.0 */ - -dut: &lpuart4 { - status = "okay"; - current-speed = <115200>; -}; diff --git a/tests/drivers/uart/uart_async_api/boards/mimxrt1020_evk.overlay b/tests/drivers/uart/uart_async_api/boards/mimxrt1020_evk.overlay deleted file mode 100644 index 4f031193d15..00000000000 --- a/tests/drivers/uart/uart_async_api/boards/mimxrt1020_evk.overlay +++ /dev/null @@ -1,7 +0,0 @@ -/* SPDX-License-Identifier: Apache-2.0 */ - -dut: &lpuart2 { - status = "okay"; - current-speed = <115200>; - nxp,loopback; -}; diff --git a/tests/drivers/uart/uart_async_api/boards/mimxrt1024_evk.overlay b/tests/drivers/uart/uart_async_api/boards/mimxrt1024_evk.overlay deleted file mode 100644 index 3349704181a..00000000000 --- a/tests/drivers/uart/uart_async_api/boards/mimxrt1024_evk.overlay +++ /dev/null @@ -1,6 +0,0 @@ -/* SPDX-License-Identifier: Apache-2.0 */ - -dut: &lpuart2 { - status = "okay"; - current-speed = <115200>; -}; diff --git a/tests/drivers/uart/uart_async_api/boards/mimxrt1050_evk_mimxrt1052_hyperflash.overlay b/tests/drivers/uart/uart_async_api/boards/mimxrt1050_evk_mimxrt1052_hyperflash.overlay deleted file mode 100644 index 22ecfdfa712..00000000000 --- a/tests/drivers/uart/uart_async_api/boards/mimxrt1050_evk_mimxrt1052_hyperflash.overlay +++ /dev/null @@ -1,7 +0,0 @@ -/* SPDX-License-Identifier: Apache-2.0 */ - -dut: &lpuart3 { - status = "okay"; - current-speed = <115200>; - nxp,loopback; -}; diff --git a/tests/drivers/uart/uart_async_api/boards/mimxrt1060_evk_mimxrt1062_qspi.overlay b/tests/drivers/uart/uart_async_api/boards/mimxrt1060_evk_mimxrt1062_qspi.overlay deleted file mode 100644 index 22ecfdfa712..00000000000 --- a/tests/drivers/uart/uart_async_api/boards/mimxrt1060_evk_mimxrt1062_qspi.overlay +++ /dev/null @@ -1,7 +0,0 @@ -/* SPDX-License-Identifier: Apache-2.0 */ - -dut: &lpuart3 { - status = "okay"; - current-speed = <115200>; - nxp,loopback; -}; diff --git a/tests/drivers/uart/uart_async_api/boards/mimxrt1060_evk_mimxrt1062_qspi_B.overlay b/tests/drivers/uart/uart_async_api/boards/mimxrt1060_evk_mimxrt1062_qspi_B.overlay deleted file mode 100644 index 22ecfdfa712..00000000000 --- a/tests/drivers/uart/uart_async_api/boards/mimxrt1060_evk_mimxrt1062_qspi_B.overlay +++ /dev/null @@ -1,7 +0,0 @@ -/* SPDX-License-Identifier: Apache-2.0 */ - -dut: &lpuart3 { - status = "okay"; - current-speed = <115200>; - nxp,loopback; -}; diff --git a/tests/drivers/uart/uart_async_api/boards/mimxrt1060_evk_mimxrt1062_qspi_C.overlay b/tests/drivers/uart/uart_async_api/boards/mimxrt1060_evk_mimxrt1062_qspi_C.overlay deleted file mode 100644 index 22ecfdfa712..00000000000 --- a/tests/drivers/uart/uart_async_api/boards/mimxrt1060_evk_mimxrt1062_qspi_C.overlay +++ /dev/null @@ -1,7 +0,0 @@ -/* SPDX-License-Identifier: Apache-2.0 */ - -dut: &lpuart3 { - status = "okay"; - current-speed = <115200>; - nxp,loopback; -}; diff --git a/tests/drivers/uart/uart_async_api/boards/mimxrt1064_evk.overlay b/tests/drivers/uart/uart_async_api/boards/mimxrt1064_evk.overlay deleted file mode 100644 index 22ecfdfa712..00000000000 --- a/tests/drivers/uart/uart_async_api/boards/mimxrt1064_evk.overlay +++ /dev/null @@ -1,7 +0,0 @@ -/* SPDX-License-Identifier: Apache-2.0 */ - -dut: &lpuart3 { - status = "okay"; - current-speed = <115200>; - nxp,loopback; -}; diff --git a/tests/drivers/uart/uart_async_api/boards/mimxrt1160_evk_mimxrt1166_cm4.overlay b/tests/drivers/uart/uart_async_api/boards/mimxrt1160_evk_mimxrt1166_cm4.overlay deleted file mode 100644 index 4f031193d15..00000000000 --- a/tests/drivers/uart/uart_async_api/boards/mimxrt1160_evk_mimxrt1166_cm4.overlay +++ /dev/null @@ -1,7 +0,0 @@ -/* SPDX-License-Identifier: Apache-2.0 */ - -dut: &lpuart2 { - status = "okay"; - current-speed = <115200>; - nxp,loopback; -}; diff --git a/tests/drivers/uart/uart_async_api/boards/mimxrt1160_evk_mimxrt1166_cm7.overlay b/tests/drivers/uart/uart_async_api/boards/mimxrt1160_evk_mimxrt1166_cm7.overlay deleted file mode 100644 index 4f031193d15..00000000000 --- a/tests/drivers/uart/uart_async_api/boards/mimxrt1160_evk_mimxrt1166_cm7.overlay +++ /dev/null @@ -1,7 +0,0 @@ -/* SPDX-License-Identifier: Apache-2.0 */ - -dut: &lpuart2 { - status = "okay"; - current-speed = <115200>; - nxp,loopback; -}; diff --git a/tests/drivers/uart/uart_async_api/boards/mimxrt1170_evk_mimxrt1176_cm4.overlay b/tests/drivers/uart/uart_async_api/boards/mimxrt1170_evk_mimxrt1176_cm4.overlay deleted file mode 100644 index 4f031193d15..00000000000 --- a/tests/drivers/uart/uart_async_api/boards/mimxrt1170_evk_mimxrt1176_cm4.overlay +++ /dev/null @@ -1,7 +0,0 @@ -/* SPDX-License-Identifier: Apache-2.0 */ - -dut: &lpuart2 { - status = "okay"; - current-speed = <115200>; - nxp,loopback; -}; diff --git a/tests/drivers/uart/uart_async_api/boards/mimxrt1170_evk_mimxrt1176_cm7_A.overlay b/tests/drivers/uart/uart_async_api/boards/mimxrt1170_evk_mimxrt1176_cm7_A.overlay deleted file mode 100644 index 4f031193d15..00000000000 --- a/tests/drivers/uart/uart_async_api/boards/mimxrt1170_evk_mimxrt1176_cm7_A.overlay +++ /dev/null @@ -1,7 +0,0 @@ -/* SPDX-License-Identifier: Apache-2.0 */ - -dut: &lpuart2 { - status = "okay"; - current-speed = <115200>; - nxp,loopback; -}; diff --git a/tests/drivers/uart/uart_async_api/boards/mimxrt595_evk_mimxrt595s_cm33.overlay b/tests/drivers/uart/uart_async_api/boards/mimxrt595_evk_mimxrt595s_cm33.overlay deleted file mode 100644 index 3929742da9c..00000000000 --- a/tests/drivers/uart/uart_async_api/boards/mimxrt595_evk_mimxrt595s_cm33.overlay +++ /dev/null @@ -1,3 +0,0 @@ -/* SPDX-License-Identifier: Apache-2.0 */ - -dut: &flexcomm12 { }; diff --git a/tests/drivers/uart/uart_async_api/boards/mimxrt685_evk_mimxrt685s_cm33.overlay b/tests/drivers/uart/uart_async_api/boards/mimxrt685_evk_mimxrt685s_cm33.overlay deleted file mode 100644 index 43f7fdf3cd3..00000000000 --- a/tests/drivers/uart/uart_async_api/boards/mimxrt685_evk_mimxrt685s_cm33.overlay +++ /dev/null @@ -1,3 +0,0 @@ -/* SPDX-License-Identifier: Apache-2.0 */ - -dut: &flexcomm4 { }; diff --git a/tests/drivers/uart/uart_async_api/nxp/dut_flexcomm12.overlay b/tests/drivers/uart/uart_async_api/nxp/dut_flexcomm12.overlay new file mode 100644 index 00000000000..7bf3f93f6cc --- /dev/null +++ b/tests/drivers/uart/uart_async_api/nxp/dut_flexcomm12.overlay @@ -0,0 +1,11 @@ +/* + * Copyright 2025 NXP + * SPDX-License-Identifier: Apache-2.0 + */ + +/* + * To test this sample + * mimxrt595_evk/mimxrt595s/cm33 Short J27-1 to J27-2 + */ + +dut: &flexcomm12 { }; diff --git a/tests/drivers/uart/uart_async_api/boards/lpcxpresso55s69_lpc55s69_cpu0.overlay b/tests/drivers/uart/uart_async_api/nxp/dut_flexcomm2.overlay similarity index 55% rename from tests/drivers/uart/uart_async_api/boards/lpcxpresso55s69_lpc55s69_cpu0.overlay rename to tests/drivers/uart/uart_async_api/nxp/dut_flexcomm2.overlay index 927c5e947eb..dd1a1d7076a 100644 --- a/tests/drivers/uart/uart_async_api/boards/lpcxpresso55s69_lpc55s69_cpu0.overlay +++ b/tests/drivers/uart/uart_async_api/nxp/dut_flexcomm2.overlay @@ -4,7 +4,11 @@ * SPDX-License-Identifier: Apache-2.0 */ -/* Short P18.13 and P18.15 to loopback Flexcomm2 RX/TX for this test */ +/* + * To test this sample + * lpcxpresso55s69/lpc55s69/cpu0 Short P18.13 and P18.15 + */ + dut: &flexcomm2 { status = "okay"; }; diff --git a/tests/drivers/uart/uart_async_api/nxp/dut_flexcomm2_lpuart2.overlay b/tests/drivers/uart/uart_async_api/nxp/dut_flexcomm2_lpuart2.overlay new file mode 100644 index 00000000000..9788749a3b6 --- /dev/null +++ b/tests/drivers/uart/uart_async_api/nxp/dut_flexcomm2_lpuart2.overlay @@ -0,0 +1,13 @@ +/* + * Copyright 2025 NXP + * SPDX-License-Identifier: Apache-2.0 + */ + +/* + * To test this sample + * frdm_mcxn236 connect P4_2 to P4_3 + * frdm_mcxn947/mcxn947/cpu0 connect P4_2 to P4_3 + * frdm_mcxn947/mcxn947/cpu0/qspi connect P4_2(J1-4) to P4_3(J1-2) + */ + +dut: &flexcomm2_lpuart2 {}; diff --git a/tests/drivers/uart/uart_async_api/nxp/dut_flexcomm4.overlay b/tests/drivers/uart/uart_async_api/nxp/dut_flexcomm4.overlay new file mode 100644 index 00000000000..56b71c7fff8 --- /dev/null +++ b/tests/drivers/uart/uart_async_api/nxp/dut_flexcomm4.overlay @@ -0,0 +1,11 @@ +/* + * Copyright 2025 NXP + * SPDX-License-Identifier: Apache-2.0 + */ + +/* + * To test this sample + * mimxrt685_evk/mimxrt685s/cm33 Short J27-1 to J27-2 + */ + +dut: &flexcomm4 { }; diff --git a/tests/drivers/uart/uart_async_api/nxp/dut_lpc_flexcomm0.overlay b/tests/drivers/uart/uart_async_api/nxp/dut_lpc_flexcomm0.overlay new file mode 100644 index 00000000000..cef08cbd5aa --- /dev/null +++ b/tests/drivers/uart/uart_async_api/nxp/dut_lpc_flexcomm0.overlay @@ -0,0 +1,15 @@ +/* + * Copyright 2025 NXP + * SPDX-License-Identifier: Apache-2.0 + */ + +/* + * To test this sample + * frdm_rw612/rw612 connect J5-3 to J5-4 + * Note this will impact i2s_speed test + */ + +dut: &flexcomm0 { + status = "okay"; + current-speed = <115200>; +}; diff --git a/tests/drivers/uart/uart_async_api/boards/frdm_k82f.overlay b/tests/drivers/uart/uart_async_api/nxp/dut_lpuart0_loopback.overlay similarity index 100% rename from tests/drivers/uart/uart_async_api/boards/frdm_k82f.overlay rename to tests/drivers/uart/uart_async_api/nxp/dut_lpuart0_loopback.overlay diff --git a/tests/drivers/uart/uart_async_api/boards/frdm_mcxa156.overlay b/tests/drivers/uart/uart_async_api/nxp/dut_lpuart1.overlay similarity index 59% rename from tests/drivers/uart/uart_async_api/boards/frdm_mcxa156.overlay rename to tests/drivers/uart/uart_async_api/nxp/dut_lpuart1.overlay index 549b37ab4f5..f39495eaff8 100644 --- a/tests/drivers/uart/uart_async_api/boards/frdm_mcxa156.overlay +++ b/tests/drivers/uart/uart_async_api/nxp/dut_lpuart1.overlay @@ -4,6 +4,8 @@ */ /* - * To test this sample connect P3_20 to P3_21 + * To test this sample + * frdm_mcxa156 connect P3_20 to P3_21 */ + dut: &lpuart1 {}; diff --git a/tests/drivers/uart/uart_async_api/nxp/dut_lpuart2_loopback.overlay b/tests/drivers/uart/uart_async_api/nxp/dut_lpuart2_loopback.overlay new file mode 100644 index 00000000000..6e2b1ce53c7 --- /dev/null +++ b/tests/drivers/uart/uart_async_api/nxp/dut_lpuart2_loopback.overlay @@ -0,0 +1,15 @@ +/* + * Copyright 2024 NXP + * SPDX-License-Identifier: Apache-2.0 + */ + +/* + * Except testing with "nxp,loopback" + * frdm_mcxa153 : Short J5.3(P3_14) and J5.4(P3_15) + */ + +dut: &lpuart2 { + status = "okay"; + current-speed = <115200>; + nxp,loopback; +}; diff --git a/tests/drivers/uart/uart_async_api/nxp/dut_lpuart3_loopback.overlay b/tests/drivers/uart/uart_async_api/nxp/dut_lpuart3_loopback.overlay new file mode 100644 index 00000000000..cba6365e33d --- /dev/null +++ b/tests/drivers/uart/uart_async_api/nxp/dut_lpuart3_loopback.overlay @@ -0,0 +1,17 @@ +/* + * Copyright 2024 NXP + * SPDX-License-Identifier: Apache-2.0 + */ + +/* + * Except testing with "nxp,loopback" + * + * frdm_mcxa166: Short J5.3 and J5.4 + * frdm_mcxa276: Short J5.3 and J5.4 + */ + +dut: &lpuart3 { + status = "okay"; + current-speed = <115200>; + nxp,loopback; +}; diff --git a/tests/drivers/uart/uart_async_api/boards/mimxrt1015_evk.overlay b/tests/drivers/uart/uart_async_api/nxp/dut_lpuart4_loopback.overlay similarity index 54% rename from tests/drivers/uart/uart_async_api/boards/mimxrt1015_evk.overlay rename to tests/drivers/uart/uart_async_api/nxp/dut_lpuart4_loopback.overlay index f82d4c29082..0df694949f5 100644 --- a/tests/drivers/uart/uart_async_api/boards/mimxrt1015_evk.overlay +++ b/tests/drivers/uart/uart_async_api/nxp/dut_lpuart4_loopback.overlay @@ -1,4 +1,7 @@ -/* SPDX-License-Identifier: Apache-2.0 */ +/* + * Copyright 2024 NXP + * SPDX-License-Identifier: Apache-2.0 + */ dut: &lpuart4 { status = "okay"; diff --git a/tests/drivers/uart/uart_async_api/nxp/enable_edma0.overlay b/tests/drivers/uart/uart_async_api/nxp/enable_edma0.overlay new file mode 100644 index 00000000000..e0a3186bacc --- /dev/null +++ b/tests/drivers/uart/uart_async_api/nxp/enable_edma0.overlay @@ -0,0 +1,8 @@ +/* + * Copyright 2025 NXP + * SPDX-License-Identifier: Apache-2.0 + */ + +&edma0 { + status = "okay"; +}; diff --git a/tests/drivers/uart/uart_async_api/src/test_uart_async.c b/tests/drivers/uart/uart_async_api/src/test_uart_async.c index d0b1ac779c6..10bdc0cd05c 100644 --- a/tests/drivers/uart/uart_async_api/src/test_uart_async.c +++ b/tests/drivers/uart/uart_async_api/src/test_uart_async.c @@ -510,9 +510,11 @@ ZTEST_USER(uart_async_double_buf, test_double_buffer) "TX_DONE timeout"); zassert_equal(k_sem_take(&rx_rdy, K_MSEC(100)), 0, "RX_RDY timeout"); - zassert_equal(memcmp(tx_buf, read_ptr, sizeof(tx_buf)), - 0, - "Buffers not equal"); + if (read_ptr) { + zassert_equal(memcmp(tx_buf, read_ptr, sizeof(tx_buf)), + 0, + "Buffers not equal"); + } } uart_rx_disable(uart_dev); zassert_equal(k_sem_take(&rx_disabled, K_MSEC(100)), 0, diff --git a/tests/drivers/uart/uart_async_api/testcase.yaml b/tests/drivers/uart/uart_async_api/testcase.yaml index 96747dd1bac..efcf3af9453 100644 --- a/tests/drivers/uart/uart_async_api/testcase.yaml +++ b/tests/drivers/uart/uart_async_api/testcase.yaml @@ -13,6 +13,11 @@ tests: harness_config: fixture: gpio_loopback depends_on: gpio + extra_args: + - platform:lpcxpresso55s69/lpc55s69/cpu0:"DTC_OVERLAY_FILE=nxp/dut_flexcomm2.overlay" + - platform:mimxrt685_evk/mimxrt685s/cm33:"DTC_OVERLAY_FILE=nxp/dut_flexcomm4.overlay" + - platform:mimxrt595_evk/mimxrt595s/cm33:"DTC_OVERLAY_FILE=nxp/dut_flexcomm12.overlay" + - platform:frdm_rw612/rw612:"DTC_OVERLAY_FILE=nxp/dut_lpc_flexcomm0.overlay" drivers.uart.wide: filter: CONFIG_SERIAL_SUPPORT_ASYNC and not CONFIG_UART_MCUX_LPUART harness: ztest @@ -51,10 +56,24 @@ tests: drivers.uart.async_api.lpuart: filter: CONFIG_SERIAL_SUPPORT_ASYNC and CONFIG_UART_MCUX_LPUART and not CONFIG_CPU_HAS_DCACHE harness: ztest + harness_config: + fixture: gpio_loopback depends_on: dma extra_configs: - CONFIG_USERSPACE=n - CONFIG_TEST_USERSPACE=n + extra_args: + - platform:frdm_k82f/mk82f25615:"DTC_OVERLAY_FILE=nxp/dut_lpuart0_loopback.overlay" + - platform:frdm_mcxa156/mcxa156:"DTC_OVERLAY_FILE=nxp/dut_lpuart1.overlay" + - platform:frdm_mcxa153/mcxa153:"DTC_OVERLAY_FILE=nxp/dut_lpuart2_loopback.overlay;nxp/enable_edma0.overlay" + - platform:frdm_mcxa166/mcxa166:"DTC_OVERLAY_FILE=nxp/dut_lpuart3_loopback.overlay;nxp/enable_edma0.overlay" + - platform:frdm_mcxa276/mcxa276:"DTC_OVERLAY_FILE=nxp/dut_lpuart3_loopback.overlay;nxp/enable_edma0.overlay" + - platform:mimxrt1160_evk/mimxrt1166/cm4:"DTC_OVERLAY_FILE=nxp/dut_lpuart2_loopback.overlay" + - platform:mimxrt1170_evk@A/mimxrt1176/cm4:"DTC_OVERLAY_FILE=nxp/dut_lpuart2_loopback.overlay" + - platform:mimxrt1170_evk@B/mimxrt1176/cm4:"DTC_OVERLAY_FILE=nxp/dut_lpuart2_loopback.overlay" + - platform:frdm_mcxn236/mcxn236:"DTC_OVERLAY_FILE=nxp/dut_flexcomm2_lpuart2.overlay" + - platform:frdm_mcxn947/mcxn947/cpu0:"DTC_OVERLAY_FILE=nxp/dut_flexcomm2_lpuart2.overlay" + - platform:frdm_mcxn947/mcxn947/cpu0/qspi:"DTC_OVERLAY_FILE=nxp/dut_flexcomm2_lpuart2.overlay" drivers.uart.async_api.lpuart.rt_nocache: filter: CONFIG_SERIAL_SUPPORT_ASYNC and CONFIG_UART_MCUX_LPUART and CONFIG_CPU_HAS_DCACHE harness: ztest @@ -64,6 +83,22 @@ tests: - CONFIG_NOCACHE_MEMORY=y - CONFIG_USERSPACE=n - CONFIG_TEST_USERSPACE=n + extra_args: + - platform:mimxrt1010_evk/mimxrt1011:"DTC_OVERLAY_FILE=nxp/dut_lpuart4_loopback.overlay" + - platform:mimxrt1015_evk/mimxrt1015:"DTC_OVERLAY_FILE=nxp/dut_lpuart4_loopback.overlay" + - platform:mimxrt1020_evk/mimxrt1021:"DTC_OVERLAY_FILE=nxp/dut_lpuart2_loopback.overlay" + - platform:mimxrt1024_evk/mimxrt1024:"DTC_OVERLAY_FILE=nxp/dut_lpuart2_loopback.overlay" + - platform:mimxrt1160_evk/mimxrt1166/cm7:"DTC_OVERLAY_FILE=nxp/dut_lpuart2_loopback.overlay" + - platform:mimxrt1170_evk@A/mimxrt1176/cm7:"DTC_OVERLAY_FILE=nxp/dut_lpuart2_loopback.overlay" + - platform:mimxrt1170_evk@B/mimxrt1176/cm7:"DTC_OVERLAY_FILE=nxp/dut_lpuart2_loopback.overlay" + - platform:vmu_rt1170/mimxrt1176/cm7:"DTC_OVERLAY_FILE=nxp/dut_lpuart4_loopback.overlay" + - platform:mimxrt1180_evk/mimxrt1189/cm33:"DTC_OVERLAY_FILE=nxp/dut_lpuart3_loopback.overlay" + - platform:mimxrt1050_evk/mimxrt1052/hyperflash:"DTC_OVERLAY_FILE=nxp/dut_lpuart3_loopback.overlay" + - platform:mimxrt1060_evk/mimxrt1062/hyperflash:"DTC_OVERLAY_FILE=nxp/dut_lpuart3_loopback.overlay" + - platform:mimxrt1060_evk@A/mimxrt1062/qspi:"DTC_OVERLAY_FILE=nxp/dut_lpuart3_loopback.overlay" + - platform:mimxrt1060_evk@B/mimxrt1062/qspi:"DTC_OVERLAY_FILE=nxp/dut_lpuart3_loopback.overlay" + - platform:mimxrt1060_evk@C/mimxrt1062/qspi:"DTC_OVERLAY_FILE=nxp/dut_lpuart3_loopback.overlay" + - platform:mimxrt1064_evk/mimxrt1064:"DTC_OVERLAY_FILE=nxp/dut_lpuart3_loopback.overlay" drivers.uart.async_api.sam0: filter: CONFIG_SERIAL_SUPPORT_ASYNC and CONFIG_SOC_FAMILY_ATMEL_SAM0 platform_allow: From a37686ef71cb741697a016dd123188c9d4e804e5 Mon Sep 17 00:00:00 2001 From: Hake Huang Date: Wed, 23 Apr 2025 14:52:09 +0800 Subject: [PATCH 0017/2553] boards: frdm_mcxa: add pinmux to boards for lpuart test move the pinmux setting to boards Signed-off-by: Hake Huang --- boards/nxp/frdm_mcxa153/frdm_mcxa153.dts | 7 +++++++ boards/nxp/frdm_mcxa166/frdm_mcxa166.dts | 6 ++++++ boards/nxp/frdm_mcxa276/frdm_mcxa276.dts | 6 ++++++ 3 files changed, 19 insertions(+) diff --git a/boards/nxp/frdm_mcxa153/frdm_mcxa153.dts b/boards/nxp/frdm_mcxa153/frdm_mcxa153.dts index d2d96daf79e..1174c4ac0de 100644 --- a/boards/nxp/frdm_mcxa153/frdm_mcxa153.dts +++ b/boards/nxp/frdm_mcxa153/frdm_mcxa153.dts @@ -122,3 +122,10 @@ pinctrl-0 = <&pinmux_lpuart0>; pinctrl-names = "default"; }; + +&lpuart2 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&pinmux_lpuart2>; + pinctrl-names = "default"; +}; diff --git a/boards/nxp/frdm_mcxa166/frdm_mcxa166.dts b/boards/nxp/frdm_mcxa166/frdm_mcxa166.dts index 0305e2b5c41..6c4582130f0 100644 --- a/boards/nxp/frdm_mcxa166/frdm_mcxa166.dts +++ b/boards/nxp/frdm_mcxa166/frdm_mcxa166.dts @@ -145,3 +145,9 @@ &wwdt0 { status = "okay"; }; + +&lpuart3 { + current-speed = <115200>; + pinctrl-0 = <&pinmux_lpuart3>; + pinctrl-names = "default"; +}; diff --git a/boards/nxp/frdm_mcxa276/frdm_mcxa276.dts b/boards/nxp/frdm_mcxa276/frdm_mcxa276.dts index 2858f54c094..2086ea6e474 100644 --- a/boards/nxp/frdm_mcxa276/frdm_mcxa276.dts +++ b/boards/nxp/frdm_mcxa276/frdm_mcxa276.dts @@ -145,3 +145,9 @@ &wwdt0 { status = "okay"; }; + +&lpuart3 { + current-speed = <115200>; + pinctrl-0 = <&pinmux_lpuart3>; + pinctrl-names = "default"; +}; From 7a1e39fec42a1ad2595d6cd8ea80c99719ba6925 Mon Sep 17 00:00:00 2001 From: Neil Chen Date: Mon, 14 Apr 2025 10:32:12 +0800 Subject: [PATCH 0018/2553] dts: arm/nxp: Add adc nodes to NXP MCXA153 dtsi file Add adc nodes to NXP MCXA153 dtsi file Signed-off-by: Neil Chen --- dts/arm/nxp/nxp_mcxa153.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/dts/arm/nxp/nxp_mcxa153.dtsi b/dts/arm/nxp/nxp_mcxa153.dtsi index d1d2c42f0fa..e7933d76fb5 100644 --- a/dts/arm/nxp/nxp_mcxa153.dtsi +++ b/dts/arm/nxp/nxp_mcxa153.dtsi @@ -137,6 +137,22 @@ nxp,kinetis-port = <&portd>; }; + lpadc0: lpadc@400af000 { + compatible = "nxp,lpc-lpadc"; + reg = <0x400af000 0x1000>; + interrupts = <62 0>; + status = "disabled"; + clk-divider = <1>; + clk-source = <0>; + voltage-ref= <2>; + calibration-average = <128>; + power-level = <0>; + offset-value-a = <0>; + offset-value-b = <0>; + #io-channel-cells = <1>; + clocks = <&syscon MCUX_LPADC1_CLK>; + }; + lpuart0: lpuart@4009f000 { compatible = "nxp,lpuart"; status = "disabled"; From 2b168adfe8d7d02387e1071b4c3e8a62dd9dea7e Mon Sep 17 00:00:00 2001 From: Neil Chen Date: Wed, 23 Apr 2025 16:53:23 +0800 Subject: [PATCH 0019/2553] boards: nxp: frdm_mcxa153: Support adc for NXP frdm_mcxa153 board Support adc for NXP frdm_mcxa153 board. Signed-off-by: Neil Chen --- boards/nxp/frdm_mcxa153/board.c | 7 +++++++ boards/nxp/frdm_mcxa153/frdm_mcxa153-pinctrl.dtsi | 9 +++++++++ boards/nxp/frdm_mcxa153/frdm_mcxa153.dts | 6 ++++++ boards/nxp/frdm_mcxa153/frdm_mcxa153.yaml | 1 + boards/nxp/frdm_mcxa153/frdm_mcxa153_defconfig | 1 + 5 files changed, 24 insertions(+) diff --git a/boards/nxp/frdm_mcxa153/board.c b/boards/nxp/frdm_mcxa153/board.c index b6ededcb572..1a9a40a264a 100644 --- a/boards/nxp/frdm_mcxa153/board.c +++ b/boards/nxp/frdm_mcxa153/board.c @@ -90,6 +90,13 @@ void board_early_init_hook(void) CLOCK_EnableClock(kCLOCK_GateGPIO3); #endif +#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lpadc0)) + CLOCK_SetClockDiv(kCLOCK_DivADC0, 1u); + CLOCK_AttachClk(kFRO12M_to_ADC0); + + CLOCK_EnableClock(kCLOCK_GateADC0); +#endif + #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lpuart0)) CLOCK_SetClockDiv(kCLOCK_DivLPUART0, 1u); CLOCK_AttachClk(kFRO12M_to_LPUART0); diff --git a/boards/nxp/frdm_mcxa153/frdm_mcxa153-pinctrl.dtsi b/boards/nxp/frdm_mcxa153/frdm_mcxa153-pinctrl.dtsi index 65419589b86..94f6a8de887 100644 --- a/boards/nxp/frdm_mcxa153/frdm_mcxa153-pinctrl.dtsi +++ b/boards/nxp/frdm_mcxa153/frdm_mcxa153-pinctrl.dtsi @@ -16,6 +16,15 @@ }; }; + pinmux_lpadc0: pinmux_lpadc0 { + group0 { + pinmux = , + ; + slew-rate = "fast"; + drive-strength = "low"; + }; + }; + pinmux_lpuart0: pinmux_lpuart0 { group0 { pinmux = , diff --git a/boards/nxp/frdm_mcxa153/frdm_mcxa153.dts b/boards/nxp/frdm_mcxa153/frdm_mcxa153.dts index 1174c4ac0de..d854c32869c 100644 --- a/boards/nxp/frdm_mcxa153/frdm_mcxa153.dts +++ b/boards/nxp/frdm_mcxa153/frdm_mcxa153.dts @@ -116,6 +116,12 @@ status = "okay"; }; +&lpadc0 { + status = "okay"; + pinctrl-0 = <&pinmux_lpadc0>; + pinctrl-names = "default"; +}; + &lpuart0 { status = "okay"; current-speed = <115200>; diff --git a/boards/nxp/frdm_mcxa153/frdm_mcxa153.yaml b/boards/nxp/frdm_mcxa153/frdm_mcxa153.yaml index ae838f08d70..163f421c1aa 100644 --- a/boards/nxp/frdm_mcxa153/frdm_mcxa153.yaml +++ b/boards/nxp/frdm_mcxa153/frdm_mcxa153.yaml @@ -14,6 +14,7 @@ toolchain: - zephyr - gnuarmemb supported: + - adc - dma - flash - gpio diff --git a/boards/nxp/frdm_mcxa153/frdm_mcxa153_defconfig b/boards/nxp/frdm_mcxa153/frdm_mcxa153_defconfig index a630917318f..e006f652503 100644 --- a/boards/nxp/frdm_mcxa153/frdm_mcxa153_defconfig +++ b/boards/nxp/frdm_mcxa153/frdm_mcxa153_defconfig @@ -9,3 +9,4 @@ CONFIG_UART_CONSOLE=y CONFIG_SERIAL=y CONFIG_UART_INTERRUPT_DRIVEN=y CONFIG_GPIO=y +CONFIG_LPADC_DO_OFFSET_CALIBRATION=y From 2826c4eb81589e6898d2c0c02edf9e4329376b68 Mon Sep 17 00:00:00 2001 From: Neil Chen Date: Mon, 14 Apr 2025 10:53:16 +0800 Subject: [PATCH 0020/2553] samples: drivers/adc: Support adc example for NXP frdm_mcxa153 Support adc example for NXP frdm_mcxa153 Signed-off-by: Neil Chen --- .../adc/adc_dt/boards/frdm_mcxa153.overlay | 36 +++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 samples/drivers/adc/adc_dt/boards/frdm_mcxa153.overlay diff --git a/samples/drivers/adc/adc_dt/boards/frdm_mcxa153.overlay b/samples/drivers/adc/adc_dt/boards/frdm_mcxa153.overlay new file mode 100644 index 00000000000..18651907bc9 --- /dev/null +++ b/samples/drivers/adc/adc_dt/boards/frdm_mcxa153.overlay @@ -0,0 +1,36 @@ +/* + * Copyright 2025 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +/ { + zephyr,user { + /* adjust channel number according to pinmux in board.dts */ + io-channels = <&lpadc0 0>; + }; +}; + +&lpadc0 { + #address-cells = <1>; + #size-cells = <0>; + + /* + * To use this sample: + * LPADC0 CH0A is set up in single ended mode + * - Connect LPADC0 CH0A signal to voltage between 0~3.3V (J4 pin 8) + */ + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_EXTERNAL0"; + zephyr,vref-mv = <3300>; + zephyr,acquisition-time = ; + zephyr,resolution = <16>; + zephyr,input-positive = ; + }; +}; From 4ea825152fe151ad6af90d125102e3895441e629 Mon Sep 17 00:00:00 2001 From: Neil Chen Date: Mon, 14 Apr 2025 10:54:00 +0800 Subject: [PATCH 0021/2553] tests: drivers/adc/adc_api: Support adc api test for NXP frdm_mcxa153 Support adc api test for NXP frdm_mcxa153 Signed-off-by: Neil Chen --- .../adc/adc_api/boards/frdm_mcxa153.overlay | 28 +++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 tests/drivers/adc/adc_api/boards/frdm_mcxa153.overlay diff --git a/tests/drivers/adc/adc_api/boards/frdm_mcxa153.overlay b/tests/drivers/adc/adc_api/boards/frdm_mcxa153.overlay new file mode 100644 index 00000000000..777ec34e56f --- /dev/null +++ b/tests/drivers/adc/adc_api/boards/frdm_mcxa153.overlay @@ -0,0 +1,28 @@ +/* + * Copyright 2025 NXP + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +/ { + zephyr,user { + io-channels = <&lpadc0 0>; + }; +}; + +&lpadc0 { + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_EXTERNAL0"; + zephyr,vref-mv = <3300>; + zephyr,acquisition-time = ; + zephyr,resolution = <16>; + zephyr,input-positive = ; + }; +}; From 53dd770a901bb538c9dc08db58421226ceba5b57 Mon Sep 17 00:00:00 2001 From: Neil Chen Date: Mon, 14 Apr 2025 10:58:21 +0800 Subject: [PATCH 0022/2553] dts: arm/nxp: Add lpcmp nodes to NXP MCXA153 dtsi file Add lpcmp nodes to NXP MCXA153 dtsi file Signed-off-by: Neil Chen --- dts/arm/nxp/nxp_mcxa153.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/dts/arm/nxp/nxp_mcxa153.dtsi b/dts/arm/nxp/nxp_mcxa153.dtsi index e7933d76fb5..25ca9e29cf7 100644 --- a/dts/arm/nxp/nxp_mcxa153.dtsi +++ b/dts/arm/nxp/nxp_mcxa153.dtsi @@ -153,6 +153,22 @@ clocks = <&syscon MCUX_LPADC1_CLK>; }; + lpcmp0: lpcmp@400b1000 { + compatible = "nxp,lpcmp"; + reg = <0x400b1000 0x1000>; + interrupts = <64 0>; + status = "disabled"; + #io-channel-cells = <2>; + }; + + lpcmp1: lpcmp@400b2000 { + compatible = "nxp,lpcmp"; + reg = <0x400b2000 0x1000>; + interrupts = <65 0>; + status = "disabled"; + #io-channel-cells = <2>; + }; + lpuart0: lpuart@4009f000 { compatible = "nxp,lpuart"; status = "disabled"; From 33e88b07a7dd00315159de005046d047514b487c Mon Sep 17 00:00:00 2001 From: Neil Chen Date: Mon, 14 Apr 2025 11:09:22 +0800 Subject: [PATCH 0023/2553] boards: nxp: frdm_mcxa153: Support lpcmp for NXP frdm_mcxa153 board Support lpcmp for NXP frdm_mcxa153 board. Signed-off-by: Neil Chen --- boards/nxp/frdm_mcxa153/board.c | 6 ++++++ boards/nxp/frdm_mcxa153/frdm_mcxa153-pinctrl.dtsi | 9 +++++++++ boards/nxp/frdm_mcxa153/frdm_mcxa153.dts | 6 ++++++ 3 files changed, 21 insertions(+) diff --git a/boards/nxp/frdm_mcxa153/board.c b/boards/nxp/frdm_mcxa153/board.c index 1a9a40a264a..a7c9de9f865 100644 --- a/boards/nxp/frdm_mcxa153/board.c +++ b/boards/nxp/frdm_mcxa153/board.c @@ -97,6 +97,12 @@ void board_early_init_hook(void) CLOCK_EnableClock(kCLOCK_GateADC0); #endif +#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lpcmp0)) + CLOCK_AttachClk(kFRO12M_to_CMP0); + CLOCK_SetClockDiv(kCLOCK_DivCMP0_FUNC, 1U); + SPC_EnableActiveModeAnalogModules(SPC0, (kSPC_controlCmp0 | kSPC_controlCmp0Dac)); +#endif + #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lpuart0)) CLOCK_SetClockDiv(kCLOCK_DivLPUART0, 1u); CLOCK_AttachClk(kFRO12M_to_LPUART0); diff --git a/boards/nxp/frdm_mcxa153/frdm_mcxa153-pinctrl.dtsi b/boards/nxp/frdm_mcxa153/frdm_mcxa153-pinctrl.dtsi index 94f6a8de887..22a4f32c6dd 100644 --- a/boards/nxp/frdm_mcxa153/frdm_mcxa153-pinctrl.dtsi +++ b/boards/nxp/frdm_mcxa153/frdm_mcxa153-pinctrl.dtsi @@ -25,6 +25,15 @@ }; }; + pinmux_lpcmp0: pinmux_lpcmp0 { + group0 { + pinmux = ; + drive-strength = "low"; + slew-rate = "fast"; + bias-pull-up; + }; + }; + pinmux_lpuart0: pinmux_lpuart0 { group0 { pinmux = , diff --git a/boards/nxp/frdm_mcxa153/frdm_mcxa153.dts b/boards/nxp/frdm_mcxa153/frdm_mcxa153.dts index d854c32869c..6826457bd2f 100644 --- a/boards/nxp/frdm_mcxa153/frdm_mcxa153.dts +++ b/boards/nxp/frdm_mcxa153/frdm_mcxa153.dts @@ -122,6 +122,12 @@ pinctrl-names = "default"; }; +&lpcmp0 { + status = "okay"; + pinctrl-0 = <&pinmux_lpcmp0>; + pinctrl-names = "default"; +}; + &lpuart0 { status = "okay"; current-speed = <115200>; From 096468e7f26a4e5c09e0c25710381dd07b748a1f Mon Sep 17 00:00:00 2001 From: Neil Chen Date: Mon, 14 Apr 2025 11:10:34 +0800 Subject: [PATCH 0024/2553] samples: sensor/mcux_lpcmp: Add LPCMP use case Enable LPCMP use case on NXP frdm_mcxa153 board. Signed-off-by: Neil Chen --- samples/sensor/mcux_lpcmp/README.rst | 11 +++++++++++ samples/sensor/mcux_lpcmp/boards/frdm_mcxa153.overlay | 9 +++++++++ samples/sensor/mcux_lpcmp/sample.yaml | 1 + 3 files changed, 21 insertions(+) create mode 100644 samples/sensor/mcux_lpcmp/boards/frdm_mcxa153.overlay diff --git a/samples/sensor/mcux_lpcmp/README.rst b/samples/sensor/mcux_lpcmp/README.rst index 69becfac9b3..c8abe614854 100644 --- a/samples/sensor/mcux_lpcmp/README.rst +++ b/samples/sensor/mcux_lpcmp/README.rst @@ -57,3 +57,14 @@ LPCMP positive input port voltage by changing the voltage input to J2-9. :board: frdm_mcxa156 :goals: build flash :compact: + +Building and Running for NXP FRDM-MCXA153 +========================================= +Build the application for the :zephyr:board:`frdm_mcxa153` board, and adjust the +LPCMP positive input port voltage by changing the voltage input to J2-9. + +.. zephyr-app-commands:: + :zephyr-app: samples/sensor/mcux_lpcmp + :board: frdm_mcxa153 + :goals: build flash + :compact: diff --git a/samples/sensor/mcux_lpcmp/boards/frdm_mcxa153.overlay b/samples/sensor/mcux_lpcmp/boards/frdm_mcxa153.overlay new file mode 100644 index 00000000000..b162ff17e6a --- /dev/null +++ b/samples/sensor/mcux_lpcmp/boards/frdm_mcxa153.overlay @@ -0,0 +1,9 @@ +/* + * Copyright 2025 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&lpcmp0 { + function-clock = "CMP_CLOCK"; +}; diff --git a/samples/sensor/mcux_lpcmp/sample.yaml b/samples/sensor/mcux_lpcmp/sample.yaml index 49657b6f970..fce06e41441 100644 --- a/samples/sensor/mcux_lpcmp/sample.yaml +++ b/samples/sensor/mcux_lpcmp/sample.yaml @@ -7,6 +7,7 @@ common: - mcx_n9xx_evk/mcxn947/cpu0 - frdm_mcxn236 - frdm_mcxa156 + - frdm_mcxa153 integration_platforms: - frdm_mcxn947/mcxn947/cpu0 - frdm_mcxn236 From b41806ba78faa650cd56ba24121515010c7f6626 Mon Sep 17 00:00:00 2001 From: Marek Matej Date: Mon, 14 Apr 2025 21:37:27 +0200 Subject: [PATCH 0025/2553] dts: common: espressif: update flash partitions Include sys partition to be used with the virtual eFuse. Signed-off-by: Marek Matej --- dts/common/espressif/partitions_0x0_amp_16M.dtsi | 7 ++++++- dts/common/espressif/partitions_0x0_amp_2M.dtsi | 7 ++++++- dts/common/espressif/partitions_0x0_amp_32M.dtsi | 7 ++++++- dts/common/espressif/partitions_0x0_amp_4M.dtsi | 7 ++++++- dts/common/espressif/partitions_0x0_amp_8M.dtsi | 7 ++++++- dts/common/espressif/partitions_0x0_default_16M.dtsi | 7 ++++++- dts/common/espressif/partitions_0x0_default_2M.dtsi | 7 ++++++- dts/common/espressif/partitions_0x0_default_32M.dtsi | 7 ++++++- dts/common/espressif/partitions_0x0_default_4M.dtsi | 7 ++++++- dts/common/espressif/partitions_0x0_default_8M.dtsi | 7 ++++++- dts/common/espressif/partitions_0x1000_amp_16M.dtsi | 7 ++++++- dts/common/espressif/partitions_0x1000_amp_2M.dtsi | 7 ++++++- dts/common/espressif/partitions_0x1000_amp_32M.dtsi | 7 ++++++- dts/common/espressif/partitions_0x1000_amp_4M.dtsi | 7 ++++++- dts/common/espressif/partitions_0x1000_amp_8M.dtsi | 7 ++++++- dts/common/espressif/partitions_0x1000_default_16M.dtsi | 7 ++++++- dts/common/espressif/partitions_0x1000_default_2M.dtsi | 7 ++++++- dts/common/espressif/partitions_0x1000_default_32M.dtsi | 7 ++++++- dts/common/espressif/partitions_0x1000_default_4M.dtsi | 7 ++++++- dts/common/espressif/partitions_0x1000_default_8M.dtsi | 7 ++++++- 20 files changed, 120 insertions(+), 20 deletions(-) diff --git a/dts/common/espressif/partitions_0x0_amp_16M.dtsi b/dts/common/espressif/partitions_0x0_amp_16M.dtsi index 54eb03f738b..e47801b3415 100644 --- a/dts/common/espressif/partitions_0x0_amp_16M.dtsi +++ b/dts/common/espressif/partitions_0x0_amp_16M.dtsi @@ -12,7 +12,12 @@ boot_partition: partition@0 { label = "mcuboot"; - reg = <0x0 DT_SIZE_K(128)>; + reg = <0x0 DT_SIZE_K(64)>; + }; + + sys_partition: partition@10000 { + label = "sys"; + reg = <0x10000 DT_SIZE_K(64)>; }; slot0_partition: partition@20000 { diff --git a/dts/common/espressif/partitions_0x0_amp_2M.dtsi b/dts/common/espressif/partitions_0x0_amp_2M.dtsi index adc496d577e..4a956952e0a 100644 --- a/dts/common/espressif/partitions_0x0_amp_2M.dtsi +++ b/dts/common/espressif/partitions_0x0_amp_2M.dtsi @@ -12,7 +12,12 @@ boot_partition: partition@0 { label = "mcuboot"; - reg = <0x0 DT_SIZE_K(128)>; + reg = <0x0 DT_SIZE_K(64)>; + }; + + sys_partition: partition@10000 { + label = "sys"; + reg = <0x10000 DT_SIZE_K(64)>; }; slot0_partition: partition@20000 { diff --git a/dts/common/espressif/partitions_0x0_amp_32M.dtsi b/dts/common/espressif/partitions_0x0_amp_32M.dtsi index 2d8c92d1b32..81e7fdc5800 100644 --- a/dts/common/espressif/partitions_0x0_amp_32M.dtsi +++ b/dts/common/espressif/partitions_0x0_amp_32M.dtsi @@ -12,7 +12,12 @@ boot_partition: partition@0 { label = "mcuboot"; - reg = <0x0 DT_SIZE_K(128)>; + reg = <0x0 DT_SIZE_K(64)>; + }; + + sys_partition: partition@10000 { + label = "sys"; + reg = <0x10000 DT_SIZE_K(64)>; }; slot0_partition: partition@20000 { diff --git a/dts/common/espressif/partitions_0x0_amp_4M.dtsi b/dts/common/espressif/partitions_0x0_amp_4M.dtsi index 856e35326e0..0d7b86bac8b 100644 --- a/dts/common/espressif/partitions_0x0_amp_4M.dtsi +++ b/dts/common/espressif/partitions_0x0_amp_4M.dtsi @@ -12,7 +12,12 @@ boot_partition: partition@0 { label = "mcuboot"; - reg = <0x0 DT_SIZE_K(128)>; + reg = <0x0 DT_SIZE_K(64)>; + }; + + sys_partition: partition@10000 { + label = "sys"; + reg = <0x10000 DT_SIZE_K(64)>; }; slot0_partition: partition@20000 { diff --git a/dts/common/espressif/partitions_0x0_amp_8M.dtsi b/dts/common/espressif/partitions_0x0_amp_8M.dtsi index e854d854780..ef8289c49ab 100644 --- a/dts/common/espressif/partitions_0x0_amp_8M.dtsi +++ b/dts/common/espressif/partitions_0x0_amp_8M.dtsi @@ -12,7 +12,12 @@ boot_partition: partition@0 { label = "mcuboot"; - reg = <0x0 DT_SIZE_K(128)>; + reg = <0x0 DT_SIZE_K(64)>; + }; + + sys_partition: partition@10000 { + label = "sys"; + reg = <0x10000 DT_SIZE_K(64)>; }; slot0_partition: partition@20000 { diff --git a/dts/common/espressif/partitions_0x0_default_16M.dtsi b/dts/common/espressif/partitions_0x0_default_16M.dtsi index 1f595c1a030..fd333e90165 100644 --- a/dts/common/espressif/partitions_0x0_default_16M.dtsi +++ b/dts/common/espressif/partitions_0x0_default_16M.dtsi @@ -12,7 +12,12 @@ boot_partition: partition@0 { label = "mcuboot"; - reg = <0x0 DT_SIZE_K(128)>; + reg = <0x0 DT_SIZE_K(64)>; + }; + + sys_partition: partition@10000 { + label = "sys"; + reg = <0x10000 DT_SIZE_K(64)>; }; slot0_partition: partition@20000 { diff --git a/dts/common/espressif/partitions_0x0_default_2M.dtsi b/dts/common/espressif/partitions_0x0_default_2M.dtsi index 759a17c82f6..974e180df09 100644 --- a/dts/common/espressif/partitions_0x0_default_2M.dtsi +++ b/dts/common/espressif/partitions_0x0_default_2M.dtsi @@ -12,7 +12,12 @@ boot_partition: partition@0 { label = "mcuboot"; - reg = <0x0 DT_SIZE_K(128)>; + reg = <0x0 DT_SIZE_K(64)>; + }; + + sys_partition: partition@10000 { + label = "sys"; + reg = <0x10000 DT_SIZE_K(64)>; }; slot0_partition: partition@20000 { diff --git a/dts/common/espressif/partitions_0x0_default_32M.dtsi b/dts/common/espressif/partitions_0x0_default_32M.dtsi index 77fd4a6919e..5cb8a5ebec7 100644 --- a/dts/common/espressif/partitions_0x0_default_32M.dtsi +++ b/dts/common/espressif/partitions_0x0_default_32M.dtsi @@ -12,7 +12,12 @@ boot_partition: partition@0 { label = "mcuboot"; - reg = <0x0 DT_SIZE_K(128)>; + reg = <0x0 DT_SIZE_K(64)>; + }; + + sys_partition: partition@10000 { + label = "sys"; + reg = <0x10000 DT_SIZE_K(64)>; }; slot0_partition: partition@20000 { diff --git a/dts/common/espressif/partitions_0x0_default_4M.dtsi b/dts/common/espressif/partitions_0x0_default_4M.dtsi index c82ecb50fba..c4e1d5c52b7 100644 --- a/dts/common/espressif/partitions_0x0_default_4M.dtsi +++ b/dts/common/espressif/partitions_0x0_default_4M.dtsi @@ -12,7 +12,12 @@ boot_partition: partition@0 { label = "mcuboot"; - reg = <0x0 DT_SIZE_K(128)>; + reg = <0x0 DT_SIZE_K(64)>; + }; + + sys_partition: partition@10000 { + label = "sys"; + reg = <0x10000 DT_SIZE_K(64)>; }; slot0_partition: partition@20000 { diff --git a/dts/common/espressif/partitions_0x0_default_8M.dtsi b/dts/common/espressif/partitions_0x0_default_8M.dtsi index 8087050765f..c316321ed39 100644 --- a/dts/common/espressif/partitions_0x0_default_8M.dtsi +++ b/dts/common/espressif/partitions_0x0_default_8M.dtsi @@ -12,7 +12,12 @@ boot_partition: partition@0 { label = "mcuboot"; - reg = <0x0 DT_SIZE_K(128)>; + reg = <0x0 DT_SIZE_K(64)>; + }; + + sys_partition: partition@10000 { + label = "sys"; + reg = <0x10000 DT_SIZE_K(64)>; }; slot0_partition: partition@20000 { diff --git a/dts/common/espressif/partitions_0x1000_amp_16M.dtsi b/dts/common/espressif/partitions_0x1000_amp_16M.dtsi index 3a6e769d919..0fcbf5abd3c 100644 --- a/dts/common/espressif/partitions_0x1000_amp_16M.dtsi +++ b/dts/common/espressif/partitions_0x1000_amp_16M.dtsi @@ -12,7 +12,12 @@ boot_partition: partition@1000 { label = "mcuboot"; - reg = <0x1000 DT_SIZE_K(124)>; + reg = <0x1000 DT_SIZE_K(60)>; + }; + + sys_partition: partition@10000 { + label = "sys"; + reg = <0x10000 DT_SIZE_K(64)>; }; slot0_partition: partition@20000 { diff --git a/dts/common/espressif/partitions_0x1000_amp_2M.dtsi b/dts/common/espressif/partitions_0x1000_amp_2M.dtsi index aba0c5be16c..54e8fdaf46c 100644 --- a/dts/common/espressif/partitions_0x1000_amp_2M.dtsi +++ b/dts/common/espressif/partitions_0x1000_amp_2M.dtsi @@ -12,7 +12,12 @@ boot_partition: partition@1000 { label = "mcuboot"; - reg = <0x1000 DT_SIZE_K(124)>; + reg = <0x1000 DT_SIZE_K(60)>; + }; + + sys_partition: partition@10000 { + label = "sys"; + reg = <0x10000 DT_SIZE_K(64)>; }; slot0_partition: partition@20000 { diff --git a/dts/common/espressif/partitions_0x1000_amp_32M.dtsi b/dts/common/espressif/partitions_0x1000_amp_32M.dtsi index 1863dc11bb8..4c36ae7f954 100644 --- a/dts/common/espressif/partitions_0x1000_amp_32M.dtsi +++ b/dts/common/espressif/partitions_0x1000_amp_32M.dtsi @@ -12,7 +12,12 @@ boot_partition: partition@1000 { label = "mcuboot"; - reg = <0x1000 DT_SIZE_K(124)>; + reg = <0x1000 DT_SIZE_K(60)>; + }; + + sys_partition: partition@10000 { + label = "sys"; + reg = <0x10000 DT_SIZE_K(64)>; }; slot0_partition: partition@20000 { diff --git a/dts/common/espressif/partitions_0x1000_amp_4M.dtsi b/dts/common/espressif/partitions_0x1000_amp_4M.dtsi index 84bfe8d2e37..c3d3d28546f 100644 --- a/dts/common/espressif/partitions_0x1000_amp_4M.dtsi +++ b/dts/common/espressif/partitions_0x1000_amp_4M.dtsi @@ -12,7 +12,12 @@ boot_partition: partition@1000 { label = "mcuboot"; - reg = <0x1000 DT_SIZE_K(124)>; + reg = <0x1000 DT_SIZE_K(60)>; + }; + + sys_partition: partition@10000 { + label = "sys"; + reg = <0x10000 DT_SIZE_K(64)>; }; slot0_partition: partition@20000 { diff --git a/dts/common/espressif/partitions_0x1000_amp_8M.dtsi b/dts/common/espressif/partitions_0x1000_amp_8M.dtsi index 87c94061d40..77526fe6068 100644 --- a/dts/common/espressif/partitions_0x1000_amp_8M.dtsi +++ b/dts/common/espressif/partitions_0x1000_amp_8M.dtsi @@ -12,7 +12,12 @@ boot_partition: partition@1000 { label = "mcuboot"; - reg = <0x1000 DT_SIZE_K(124)>; + reg = <0x1000 DT_SIZE_K(60)>; + }; + + sys_partition: partition@10000 { + label = "sys"; + reg = <0x10000 DT_SIZE_K(64)>; }; slot0_partition: partition@20000 { diff --git a/dts/common/espressif/partitions_0x1000_default_16M.dtsi b/dts/common/espressif/partitions_0x1000_default_16M.dtsi index 8150760ffbe..e29c1f83e41 100644 --- a/dts/common/espressif/partitions_0x1000_default_16M.dtsi +++ b/dts/common/espressif/partitions_0x1000_default_16M.dtsi @@ -12,7 +12,12 @@ boot_partition: partition@1000 { label = "mcuboot"; - reg = <0x1000 DT_SIZE_K(124)>; + reg = <0x1000 DT_SIZE_K(60)>; + }; + + sys_partition: partition@10000 { + label = "sys"; + reg = <0x10000 DT_SIZE_K(64)>; }; slot0_partition: partition@20000 { diff --git a/dts/common/espressif/partitions_0x1000_default_2M.dtsi b/dts/common/espressif/partitions_0x1000_default_2M.dtsi index b32f686dd5b..c290dbd18f5 100644 --- a/dts/common/espressif/partitions_0x1000_default_2M.dtsi +++ b/dts/common/espressif/partitions_0x1000_default_2M.dtsi @@ -12,7 +12,12 @@ boot_partition: partition@1000 { label = "mcuboot"; - reg = <0x1000 DT_SIZE_K(124)>; + reg = <0x1000 DT_SIZE_K(60)>; + }; + + sys_partition: partition@10000 { + label = "sys"; + reg = <0x10000 DT_SIZE_K(64)>; }; slot0_partition: partition@20000 { diff --git a/dts/common/espressif/partitions_0x1000_default_32M.dtsi b/dts/common/espressif/partitions_0x1000_default_32M.dtsi index 4139d18976d..a6ecdffb8d9 100644 --- a/dts/common/espressif/partitions_0x1000_default_32M.dtsi +++ b/dts/common/espressif/partitions_0x1000_default_32M.dtsi @@ -12,7 +12,12 @@ boot_partition: partition@1000 { label = "mcuboot"; - reg = <0x1000 DT_SIZE_K(124)>; + reg = <0x1000 DT_SIZE_K(60)>; + }; + + sys_partition: partition@10000 { + label = "sys"; + reg = <0x10000 DT_SIZE_K(64)>; }; slot0_partition: partition@20000 { diff --git a/dts/common/espressif/partitions_0x1000_default_4M.dtsi b/dts/common/espressif/partitions_0x1000_default_4M.dtsi index 61282f2ae09..7011c48f7b8 100644 --- a/dts/common/espressif/partitions_0x1000_default_4M.dtsi +++ b/dts/common/espressif/partitions_0x1000_default_4M.dtsi @@ -12,7 +12,12 @@ boot_partition: partition@1000 { label = "mcuboot"; - reg = <0x1000 DT_SIZE_K(124)>; + reg = <0x1000 DT_SIZE_K(60)>; + }; + + sys_partition: partition@10000 { + label = "sys"; + reg = <0x10000 DT_SIZE_K(64)>; }; slot0_partition: partition@20000 { diff --git a/dts/common/espressif/partitions_0x1000_default_8M.dtsi b/dts/common/espressif/partitions_0x1000_default_8M.dtsi index 301644b6bef..9b8810573ed 100644 --- a/dts/common/espressif/partitions_0x1000_default_8M.dtsi +++ b/dts/common/espressif/partitions_0x1000_default_8M.dtsi @@ -12,7 +12,12 @@ boot_partition: partition@1000 { label = "mcuboot"; - reg = <0x1000 DT_SIZE_K(124)>; + reg = <0x1000 DT_SIZE_K(60)>; + }; + + sys_partition: partition@10000 { + label = "sys"; + reg = <0x10000 DT_SIZE_K(64)>; }; slot0_partition: partition@20000 { From 5ff676f9fa34d11bbf777d59f7f35e681ff06020 Mon Sep 17 00:00:00 2001 From: Derek Snell Date: Wed, 16 Apr 2025 11:42:13 -0400 Subject: [PATCH 0026/2553] drivers: i2c_mcux_flexcomm: adds PM TURN_ON low-power recovery support Enables Sleep mode (PM3) in RW61x. Signed-off-by: Derek Snell --- drivers/i2c/i2c_mcux_flexcomm.c | 50 +++++++++++++++++++++++++++++---- 1 file changed, 45 insertions(+), 5 deletions(-) diff --git a/drivers/i2c/i2c_mcux_flexcomm.c b/drivers/i2c/i2c_mcux_flexcomm.c index cba19771cdf..f0dc4fe6cf2 100644 --- a/drivers/i2c/i2c_mcux_flexcomm.c +++ b/drivers/i2c/i2c_mcux_flexcomm.c @@ -25,6 +25,9 @@ LOG_MODULE_REGISTER(mcux_flexcomm); #include "i2c-priv.h" +#include +#include + #define I2C_TRANSFER_TIMEOUT_MSEC \ COND_CODE_0(CONFIG_I2C_NXP_TRANSFER_TIMEOUT, (K_FOREVER), \ (K_MSEC(CONFIG_I2C_NXP_TRANSFER_TIMEOUT))) @@ -154,6 +157,10 @@ static int mcux_flexcomm_transfer(const struct device *dev, k_sem_take(&data->lock, K_FOREVER); +#ifdef CONFIG_PM_POLICY_DEVICE_CONSTRAINTS + pm_policy_device_power_lock_get(dev); +#endif + /* Iterate over all the messages */ for (int i = 0; i < num_msgs; i++) { if (I2C_MSG_ADDR_10_BITS & msgs->flags) { @@ -208,6 +215,10 @@ static int mcux_flexcomm_transfer(const struct device *dev, msgs++; } +#ifdef CONFIG_PM_POLICY_DEVICE_CONSTRAINTS + pm_policy_device_power_lock_put(dev); +#endif + k_sem_give(&data->lock); return ret; @@ -555,7 +566,7 @@ static void mcux_flexcomm_isr(const struct device *dev) I2C_MasterTransferHandleIRQ(base, &data->handle); } -static int mcux_flexcomm_init(const struct device *dev) +static int mcux_flexcomm_init_common(const struct device *dev) { const struct mcux_flexcomm_config *config = dev->config; struct mcux_flexcomm_data *data = dev->data; @@ -579,9 +590,6 @@ static int mcux_flexcomm_init(const struct device *dev) return error; } - k_sem_init(&data->lock, 1, 1); - k_sem_init(&data->device_sync_sem, 0, K_SEM_MAX_LIMIT); - if (!device_is_ready(config->clock_dev)) { LOG_ERR("clock control device not ready"); return -ENODEV; @@ -611,6 +619,37 @@ static int mcux_flexcomm_init(const struct device *dev) return 0; } +static int i2c_mcux_flexcomm_pm_action(const struct device *dev, enum pm_device_action action) +{ + switch (action) { + case PM_DEVICE_ACTION_RESUME: + break; + case PM_DEVICE_ACTION_SUSPEND: + break; + case PM_DEVICE_ACTION_TURN_OFF: + return 0; + case PM_DEVICE_ACTION_TURN_ON: + mcux_flexcomm_init_common(dev); + return 0; + default: + return -ENOTSUP; + } + return 0; +} + +static int mcux_flexcomm_init(const struct device *dev) +{ + struct mcux_flexcomm_data *data = dev->data; + + k_sem_init(&data->lock, 1, 1); + k_sem_init(&data->device_sync_sem, 0, K_SEM_MAX_LIMIT); + + /* Rest of the init is done from the PM_DEVICE_TURN_ON action + * which is invoked by pm_device_driver_init(). + */ + return pm_device_driver_init(dev, i2c_mcux_flexcomm_pm_action); +} + static DEVICE_API(i2c, mcux_flexcomm_driver_api) = { .configure = mcux_flexcomm_configure, .transfer = mcux_flexcomm_transfer, @@ -650,9 +689,10 @@ static DEVICE_API(i2c, mcux_flexcomm_driver_api) = { .reset = RESET_DT_SPEC_INST_GET(id), \ }; \ static struct mcux_flexcomm_data mcux_flexcomm_data_##id; \ + PM_DEVICE_DT_INST_DEFINE(id, i2c_mcux_flexcomm_pm_action); \ I2C_DEVICE_DT_INST_DEFINE(id, \ mcux_flexcomm_init, \ - NULL, \ + PM_DEVICE_DT_INST_GET(id), \ &mcux_flexcomm_data_##id, \ &mcux_flexcomm_config_##id, \ POST_KERNEL, \ From 79b0e06692059d6dbc0225ba445d22890c9b9dbf Mon Sep 17 00:00:00 2001 From: Derek Snell Date: Thu, 17 Apr 2025 14:06:47 -0400 Subject: [PATCH 0027/2553] samples: sensor: thermometer: frdm_rw612: enable Standby power mode Enables System PM and Standby (AKA Sleep or PM3) mode, to test I2C after waking from Standby mode. Signed-off-by: Derek Snell --- samples/sensor/thermometer/boards/frdm_rw612.conf | 7 +++++++ samples/sensor/thermometer/boards/frdm_rw612.overlay | 10 ++++++++++ 2 files changed, 17 insertions(+) create mode 100644 samples/sensor/thermometer/boards/frdm_rw612.conf create mode 100644 samples/sensor/thermometer/boards/frdm_rw612.overlay diff --git a/samples/sensor/thermometer/boards/frdm_rw612.conf b/samples/sensor/thermometer/boards/frdm_rw612.conf new file mode 100644 index 00000000000..94af1cff966 --- /dev/null +++ b/samples/sensor/thermometer/boards/frdm_rw612.conf @@ -0,0 +1,7 @@ +# +# Copyright 2025 NXP +# +# SPDX-License-Identifier: Apache-2.0 +# +CONFIG_PM=y +CONFIG_PM_DEVICE=y diff --git a/samples/sensor/thermometer/boards/frdm_rw612.overlay b/samples/sensor/thermometer/boards/frdm_rw612.overlay new file mode 100644 index 00000000000..cf8890926a3 --- /dev/null +++ b/samples/sensor/thermometer/boards/frdm_rw612.overlay @@ -0,0 +1,10 @@ +/* + * Copyright 2025 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* Enable standby low power mode (AKA PM3, or Sleep mode) */ +&standby { + status = "okay"; +}; From 881b1ea47722319e8726950885846398e534c0bc Mon Sep 17 00:00:00 2001 From: Mahesh Mahadevan Date: Tue, 15 Apr 2025 10:35:02 -0500 Subject: [PATCH 0028/2553] drivers: mipi_dbi: Add PM action for NXP driver Add PM action for the NXP LCDIC driver so that we can recover from a lower power mode where we lose the register settings and we need to reconfigure the block. Signed-off-by: Mahesh Mahadevan --- drivers/mipi_dbi/mipi_dbi_nxp_lcdic.c | 118 ++++++++++++++++++++++---- dts/arm/nxp/nxp_rw6xx_common.dtsi | 1 + 2 files changed, 101 insertions(+), 18 deletions(-) diff --git a/drivers/mipi_dbi/mipi_dbi_nxp_lcdic.c b/drivers/mipi_dbi/mipi_dbi_nxp_lcdic.c index 9af91a72d86..e9db3d71d23 100644 --- a/drivers/mipi_dbi/mipi_dbi_nxp_lcdic.c +++ b/drivers/mipi_dbi/mipi_dbi_nxp_lcdic.c @@ -9,6 +9,8 @@ #include #include #include +#include +#include #include #include #include @@ -110,6 +112,13 @@ struct mipi_dbi_lcdic_data { uint8_t pixel_fmt; /* Tracks TE edge setting we should use for pixel data */ uint8_t te_edge; + /* Tracks TE delay setting we should use */ + k_timeout_t te_delay; + /* Flag indicates we need to reconfigure TE signal. + * This is the case when we exit low power modes where we + * need to configure the hardware registers. + */ + bool reconfigure_te; /* Are we starting a new display frame */ bool new_frame; const struct mipi_dbi_config *active_cfg; @@ -418,12 +427,16 @@ static int mipi_dbi_lcdic_write_display(const struct device *dev, ret = k_sem_take(&dev_data->lock, K_FOREVER); if (ret) { - goto out; + goto release_sem; } +#ifdef CONFIG_PM_POLICY_DEVICE_CONSTRAINTS + pm_policy_device_power_lock_get(dev); +#endif + ret = mipi_dbi_lcdic_configure(dev, dbi_config); if (ret) { - goto out; + goto release_power_lock; } if (dev_data->new_frame) { @@ -492,7 +505,7 @@ static int mipi_dbi_lcdic_write_display(const struct device *dev, ret = mipi_dbi_lcdic_start_dma(dev); if (ret) { LOG_ERR("Could not start DMA (%d)", ret); - goto out; + goto release_power_lock; } #else /* Enable TX FIFO threshold interrupt. This interrupt @@ -506,8 +519,19 @@ static int mipi_dbi_lcdic_write_display(const struct device *dev, base->IMR &= ~interrupts; #endif ret = k_sem_take(&dev_data->xfer_sem, K_FOREVER); + /* Do not release the lock from the power states. + * This is released in the ISR after the transfer + * is complete. + */ + goto release_sem; } -out: + +release_power_lock: +#ifdef CONFIG_PM_POLICY_DEVICE_CONSTRAINTS + pm_policy_device_power_lock_put(dev); +#endif + +release_sem: k_sem_give(&dev_data->lock); return ret; @@ -527,12 +551,16 @@ static int mipi_dbi_lcdic_write_cmd(const struct device *dev, ret = k_sem_take(&dev_data->lock, K_FOREVER); if (ret) { - goto out; + goto release_sem; } +#ifdef CONFIG_PM_POLICY_DEVICE_CONSTRAINTS + pm_policy_device_power_lock_get(dev); +#endif + ret = mipi_dbi_lcdic_configure(dev, dbi_config); if (ret) { - goto out; + goto release_power_lock; } /* State reset is required before transfer */ @@ -580,7 +608,7 @@ static int mipi_dbi_lcdic_write_cmd(const struct device *dev, ret = mipi_dbi_lcdic_start_dma(dev); if (ret) { LOG_ERR("Could not start DMA (%d)", ret); - goto out; + goto release_power_lock; } } else /* Data is not aligned */ #endif @@ -596,8 +624,19 @@ static int mipi_dbi_lcdic_write_cmd(const struct device *dev, base->IMR &= ~interrupts; } ret = k_sem_take(&dev_data->xfer_sem, K_FOREVER); + /* Do not release the lock from the power states. + * This is released in the ISR after the transfer + * is complete. + */ + goto release_sem; } -out: + +release_power_lock: +#ifdef CONFIG_PM_POLICY_DEVICE_CONSTRAINTS + pm_policy_device_power_lock_put(dev); +#endif + +release_sem: k_sem_give(&dev_data->lock); return ret; } @@ -686,12 +725,15 @@ static int mipi_dbi_lcdic_configure_te(const struct device *dev, reg |= LCDIC_TE_CTRL_TTEW(ttew); base->TE_CTRL = reg; data->te_edge = edge; + data->te_delay = delay; + /* We should re-configure te signal when coming out of PM mode */ + data->reconfigure_te = true; return 0; } /* Initializes LCDIC peripheral */ -static int mipi_dbi_lcdic_init(const struct device *dev) +static int mipi_dbi_lcdic_init_common(const struct device *dev) { const struct mipi_dbi_lcdic_config *config = dev->config; struct mipi_dbi_lcdic_data *data = dev->data; @@ -714,14 +756,6 @@ static int mipi_dbi_lcdic_init(const struct device *dev) if (ret) { return ret; } - ret = k_sem_init(&data->xfer_sem, 0, 1); - if (ret) { - return ret; - } - ret = k_sem_init(&data->lock, 1, 1); - if (ret) { - return ret; - } /* Clear all interrupt flags */ base->ICR = LCDIC_ALL_INTERRUPTS; /* Mask all interrupts */ @@ -787,6 +821,9 @@ static void mipi_dbi_lcdic_isr(const struct device *dev) base->IMR |= LCDIC_ALL_INTERRUPTS; /* All data has been sent. */ k_sem_give(&data->xfer_sem); +#ifdef CONFIG_PM_POLICY_DEVICE_CONSTRAINTS + pm_policy_device_power_lock_put(dev); +#endif } else { /* Command done. Queue next command */ data->cmd_bytes = MIN(data->xfer_bytes, LCDIC_MAX_XFER); @@ -839,6 +876,49 @@ static void mipi_dbi_lcdic_isr(const struct device *dev) } } +static int mipi_dbi_lcdic_pm_action(const struct device *dev, enum pm_device_action action) +{ + struct mipi_dbi_lcdic_data *data = dev->data; + + switch (action) { + case PM_DEVICE_ACTION_RESUME: + break; + case PM_DEVICE_ACTION_SUSPEND: + break; + case PM_DEVICE_ACTION_TURN_OFF: + break; + case PM_DEVICE_ACTION_TURN_ON: + mipi_dbi_lcdic_init_common(dev); + data->active_cfg = NULL; + if (data->reconfigure_te) { + mipi_dbi_lcdic_configure_te(dev, data->te_edge, data->te_delay); + } + break; + default: + return -ENOTSUP; + } + return 0; +} + +static int mipi_dbi_lcdic_init(const struct device *dev) +{ + struct mipi_dbi_lcdic_data *data = dev->data; + int ret; + + ret = k_sem_init(&data->xfer_sem, 0, 1); + if (ret) { + return ret; + } + ret = k_sem_init(&data->lock, 1, 1); + if (ret) { + return ret; + } + /* Rest of the init is done from the PM_DEVICE_TURN_ON action + * which is invoked by pm_device_driver_init(). + */ + return pm_device_driver_init(dev, mipi_dbi_lcdic_pm_action); +} + #ifdef CONFIG_MIPI_DBI_NXP_LCDIC_DMA #define LCDIC_DMA_CHANNELS(n) \ .dma_stream = { \ @@ -891,7 +971,9 @@ static void mipi_dbi_lcdic_isr(const struct device *dev) static struct mipi_dbi_lcdic_data mipi_dbi_lcdic_data_##n = { \ LCDIC_DMA_CHANNELS(n) \ }; \ - DEVICE_DT_INST_DEFINE(n, mipi_dbi_lcdic_init, NULL, \ + PM_DEVICE_DT_INST_DEFINE(n, mipi_dbi_lcdic_pm_action); \ + DEVICE_DT_INST_DEFINE(n, mipi_dbi_lcdic_init, \ + PM_DEVICE_DT_INST_GET(n), \ &mipi_dbi_lcdic_data_##n, \ &mipi_dbi_lcdic_config_##n, \ POST_KERNEL, \ diff --git a/dts/arm/nxp/nxp_rw6xx_common.dtsi b/dts/arm/nxp/nxp_rw6xx_common.dtsi index 7777fd81439..729e29b3084 100644 --- a/dts/arm/nxp/nxp_rw6xx_common.dtsi +++ b/dts/arm/nxp/nxp_rw6xx_common.dtsi @@ -355,6 +355,7 @@ #size-cells = <0>; clocks = <&clkctl1 MCUX_LCDIC_CLK>; dmas = <&dma0 0>; + zephyr,disabling-power-states = <&suspend &standby>; power-domains = <&power_mode3_domain>; }; From f5691120cad86fffa776d7abf801d5ae89c3f29c Mon Sep 17 00:00:00 2001 From: Mahesh Mahadevan Date: Wed, 16 Apr 2025 09:17:35 -0500 Subject: [PATCH 0029/2553] samples: display: Add overlay for FRDM_RW612 boards Enable low power mode (PM Mode 3) for FRDM_RW612 board. Signed-off-by: Mahesh Mahadevan --- samples/drivers/display/boards/frdm_rw612.conf | 6 ++++++ samples/drivers/display/boards/frdm_rw612.overlay | 9 +++++++++ 2 files changed, 15 insertions(+) create mode 100644 samples/drivers/display/boards/frdm_rw612.conf create mode 100644 samples/drivers/display/boards/frdm_rw612.overlay diff --git a/samples/drivers/display/boards/frdm_rw612.conf b/samples/drivers/display/boards/frdm_rw612.conf new file mode 100644 index 00000000000..b0995a93b88 --- /dev/null +++ b/samples/drivers/display/boards/frdm_rw612.conf @@ -0,0 +1,6 @@ +# +# Copyright 2025 NXP +# +# SPDX-License-Identifier: Apache-2.0 +# +CONFIG_PM=y diff --git a/samples/drivers/display/boards/frdm_rw612.overlay b/samples/drivers/display/boards/frdm_rw612.overlay new file mode 100644 index 00000000000..65821c8b3eb --- /dev/null +++ b/samples/drivers/display/boards/frdm_rw612.overlay @@ -0,0 +1,9 @@ +/* + * Copyright 2025 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&standby { + status = "okay"; +}; From ebd8803bd12ccbd0f506681286ae29870192cbb6 Mon Sep 17 00:00:00 2001 From: Dominik Ermel Date: Fri, 18 Apr 2025 11:19:20 +0000 Subject: [PATCH 0030/2553] arch: arm: cortex_m: Rephrase comment on IRQ decrement Move and rephrase the comment to better explain reason why obtained IRQ number is decremented. Signed-off-by: Dominik Ermel --- arch/arm/core/cortex_m/isr_wrapper.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm/core/cortex_m/isr_wrapper.c b/arch/arm/core/cortex_m/isr_wrapper.c index f75963c413f..cb72797e2ec 100644 --- a/arch/arm/core/cortex_m/isr_wrapper.c +++ b/arch/arm/core/cortex_m/isr_wrapper.c @@ -68,9 +68,12 @@ void _isr_wrapper(void) #if defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER) int32_t irq_number = z_soc_irq_get_active(); #else - /* _sw_isr_table does not map the exceptions, only the interrupts. */ int32_t irq_number = __get_IPSR(); #endif + /* _sw_isr_table does not map the core system exceptions, + * which take first 16 interrupt numbers, only the external + * interrupts. + */ irq_number -= 16; struct _isr_table_entry *entry = &_sw_isr_table[irq_number]; From 8009614c16e84dc0d4258ceee52045be8e7c2f69 Mon Sep 17 00:00:00 2001 From: Fabian Blatz Date: Tue, 22 Apr 2025 10:52:52 +0200 Subject: [PATCH 0031/2553] drivers: display: sdl: Ensure task thread is run once on init Adds taking of the task semaphore after creating the display thread to ensure that the thread is run once, executing the SDL init. Adjust the threads priority to match the main thread. Signed-off-by: Fabian Blatz --- drivers/display/Kconfig.sdl | 2 +- drivers/display/display_sdl.c | 4 ++++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/display/Kconfig.sdl b/drivers/display/Kconfig.sdl index 3c41b2848ab..db14ed8eaf4 100644 --- a/drivers/display/Kconfig.sdl +++ b/drivers/display/Kconfig.sdl @@ -90,7 +90,7 @@ config SDL_DISPLAY_TRANSPARENCY_GRID_CELL_COLOR_2 config SDL_DISPLAY_THREAD_PRIORITY int "SDL display thread priority" - default NUM_PREEMPT_PRIORITIES + default MAIN_THREAD_PRIORITY help Drawing thread priority. diff --git a/drivers/display/display_sdl.c b/drivers/display/display_sdl.c index e24e6ea6692..e03232da905 100644 --- a/drivers/display/display_sdl.c +++ b/drivers/display/display_sdl.c @@ -125,6 +125,8 @@ static void sdl_task_thread(void *p1, void *p2, void *p3) CONFIG_SDL_DISPLAY_TRANSPARENCY_GRID_CELL_COLOR_2, CONFIG_SDL_DISPLAY_TRANSPARENCY_GRID_CELL_SIZE); + k_sem_give(&disp_data->task_sem); + if (rc != 0) { nsi_print_error_and_exit("Failed to create SDL display"); return; @@ -169,6 +171,8 @@ static int sdl_display_init(const struct device *dev) K_KERNEL_STACK_SIZEOF(disp_data->sdl_thread_stack), sdl_task_thread, (void *)dev, NULL, NULL, CONFIG_SDL_DISPLAY_THREAD_PRIORITY, 0, K_NO_WAIT); + /* Ensure task thread has performed the init */ + k_sem_take(&disp_data->task_sem, K_FOREVER); return 0; } From 1f7a694a7663ea02415d5f05087e210f1d79f8b7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Fin=20Maa=C3=9F?= Date: Wed, 23 Apr 2025 08:25:08 +0200 Subject: [PATCH 0032/2553] MAINTAINERS.yml: promote maass-hamburg to mdio maintainer MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit promote maass-hamburg to mdio maintainer. Signed-off-by: Fin Maaß --- MAINTAINERS.yml | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/MAINTAINERS.yml b/MAINTAINERS.yml index 12ac45e4e4d..f44cd673f53 100644 --- a/MAINTAINERS.yml +++ b/MAINTAINERS.yml @@ -1700,10 +1700,11 @@ Release Notes: - drivers.memc "Drivers: MDIO": - status: odd fixes + status: maintained + maintainers: + - maass-hamburg collaborators: - decsny - - maass-hamburg files: - doc/hardware/peripherals/mdio.rst - drivers/mdio/ From 1b7eae43dbe633c0783ee87c97176d8255a53da4 Mon Sep 17 00:00:00 2001 From: Guennadi Liakhovetski Date: Wed, 23 Apr 2025 16:04:26 +0200 Subject: [PATCH 0033/2553] logging: mtrace: don't activate with hook == NULL adsp_mtrace_log_init() can be called with its argument equal NULL, mtrace_active shouldn't be set to true in that case. Signed-off-by: Guennadi Liakhovetski --- subsys/logging/backends/log_backend_adsp_mtrace.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/subsys/logging/backends/log_backend_adsp_mtrace.c b/subsys/logging/backends/log_backend_adsp_mtrace.c index d18ae6e52b1..6e73a7f1323 100644 --- a/subsys/logging/backends/log_backend_adsp_mtrace.c +++ b/subsys/logging/backends/log_backend_adsp_mtrace.c @@ -221,7 +221,7 @@ void adsp_mtrace_log_init(adsp_mtrace_log_hook_t hook) mtrace_init(); mtrace_hook = hook; - mtrace_active = true; + mtrace_active = !!hook; } const struct log_backend *log_backend_adsp_mtrace_get(void) From aef83fce14ce005850b6557cf04bca0ac6991501 Mon Sep 17 00:00:00 2001 From: Jukka Rissanen Date: Wed, 23 Apr 2025 17:41:07 +0300 Subject: [PATCH 0034/2553] net: if: Allow selecting deprecated IPv6 address as src addr This adjust the IPv6 source address selection so that it is possible to select deprecated IPv6 address if no better preferred address is found. From RFC 6724 chapter 5: Rule 3: Avoid deprecated addresses. If one of the two source addresses is "preferred" and one of them is "deprecated" (in the RFC 4862 sense), then prefer the one that is "preferred". Rule 8: Use longest matching prefix. If CommonPrefixLen(SA, D) > CommonPrefixLen(SB, D), then prefer SA. Similarly, if CommonPrefixLen(SB, D) > CommonPrefixLen(SA, D), then prefer SB. So the fix allows deprecated address to be selected if it is a better match than the preferred one. The reasoning here is that an address with a longer matching prefix is generally considered topologically closer to the destination. Using such a source address can lead to more efficient routing, as it's more likely that the source and destination are within the same network segment or a closely related one. Signed-off-by: Jukka Rissanen --- subsys/net/ip/net_if.c | 36 +++++++++++++++++++++++++++++++++--- 1 file changed, 33 insertions(+), 3 deletions(-) diff --git a/subsys/net/ip/net_if.c b/subsys/net/ip/net_if.c index 3a56b606e01..198d44acd7b 100644 --- a/subsys/net/ip/net_if.c +++ b/subsys/net/ip/net_if.c @@ -3085,10 +3085,12 @@ static uint8_t get_diff_ipv6(const struct in6_addr *src, static inline bool is_proper_ipv6_address(struct net_if_addr *addr) { - if (addr->is_used && addr->addr_state == NET_ADDR_PREFERRED && - addr->address.family == AF_INET6 && + if (addr->is_used && addr->address.family == AF_INET6 && !net_ipv6_is_ll_addr(&addr->address.in6_addr)) { - return true; + if (addr->addr_state == NET_ADDR_PREFERRED || + addr->addr_state == NET_ADDR_DEPRECATED) { + return true; + } } return false; @@ -3122,6 +3124,7 @@ static struct in6_addr *net_if_ipv6_get_best_match(struct net_if *iface, uint8_t *best_so_far, int flags) { + enum net_addr_state addr_state = NET_ADDR_ANY_STATE; struct net_if_ipv6 *ipv6 = iface->config.ip.ipv6; struct net_if_addr *public_addr = NULL; struct in6_addr *src = NULL; @@ -3179,6 +3182,25 @@ static struct in6_addr *net_if_ipv6_get_best_match(struct net_if *iface, continue; } + if (len == *best_so_far && + ipv6->unicast[i].addr_state == NET_ADDR_DEPRECATED && + addr_state == NET_ADDR_PREFERRED) { + /* We have a preferred address and a deprecated + * address. We prefer the preferred address if the + * prefix lengths are the same. + * See RFC 6724 chapter 5. + */ + continue; + } + + addr_state = ipv6->unicast[i].addr_state; + + NET_DBG("[%zd] Checking %s (%s) dst %s/%d", i, + net_sprint_ipv6_addr(&ipv6->unicast[i].address.in6_addr), + addr_state == NET_ADDR_PREFERRED ? "preferred" : + addr_state == NET_ADDR_DEPRECATED ? "deprecated" : "?", + net_sprint_ipv6_addr(dst), prefix_len); + ret = use_public_address(iface->pe_prefer_public, ipv6->unicast[i].is_temporary, flags); @@ -3228,6 +3250,14 @@ static struct in6_addr *net_if_ipv6_get_best_match(struct net_if *iface, out: net_if_unlock(iface); + if (src != NULL) { + NET_DBG("Selected %s (%s) dst %s/%d", + net_sprint_ipv6_addr(src), + addr_state == NET_ADDR_PREFERRED ? "preferred" : + addr_state == NET_ADDR_DEPRECATED ? "deprecated" : "?", + net_sprint_ipv6_addr(dst), prefix_len); + } + return src; } From 0c1dca52f4c2a4414ef8314ee06d652adcd900d8 Mon Sep 17 00:00:00 2001 From: Jukka Rissanen Date: Wed, 23 Apr 2025 18:23:20 +0300 Subject: [PATCH 0035/2553] tests: net: ipv6: Test deprecated address selection Make sure deprecated address is selected if no other address is available. Signed-off-by: Jukka Rissanen --- tests/net/ip-addr/src/main.c | 86 ++++++++++++++++++++++++++++++++++++ 1 file changed, 86 insertions(+) diff --git a/tests/net/ip-addr/src/main.c b/tests/net/ip-addr/src/main.c index 8f1fbccd8a4..aa0fb3ec6e4 100644 --- a/tests/net/ip-addr/src/main.c +++ b/tests/net/ip-addr/src/main.c @@ -224,10 +224,21 @@ ZTEST(ip_addr_fn, test_ipv6_addresses) 0, 0, 0, 0, 0, 0, 0, 0x2 } } }; struct in6_addr addr6_pref3 = { { { 0x20, 0x01, 0x0d, 0xb8, 0x64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x2 } } }; + struct in6_addr ula = { { { 0xfc, 0x00, 0xaa, 0xaa, 0, 0, 0, 0, + 0, 0, 0, 0, 0xd1, 0xd2, 0xd3, 0xd4 } } }; + struct in6_addr ula2 = { { { 0xfc, 0x00, 0xaa, 0xaa, 0, 0, 0, 0, + 0, 0, 0, 0, 0x1, 0x2, 0x3, 0x4 } } }; + struct in6_addr ula3 = { { { 0xfc, 0x00, 0xaa, 0xaa, 0, 0, 0, 0, + 0, 0, 0, 0, 0xf1, 0xf2, 0xf3, 0xf4 } } }; + struct in6_addr ula4 = { { { 0xfc, 0x00, 0xaa, 0xaa, 0, 0, 0, 0, + 0, 0, 0, 0, 0xf1, 0xf2, 0xf3, 0xf5 } } }; + struct in6_addr ula5 = { { { 0xfc, 0x00, 0xaa, 0xaa, 0, 0, 0, 0, + 0, 0, 0, 0, 0xf1, 0xf2, 0xf3, 0xf6 } } }; struct in6_addr *tmp; const struct in6_addr *out; struct net_if_addr *ifaddr1, *ifaddr2; struct net_if_mcast_addr *ifmaddr1; + struct net_if_ipv6_prefix *prefix; struct net_if *iface; int i; @@ -369,6 +380,81 @@ ZTEST(ip_addr_fn, test_ipv6_addresses) "IPv6 removing address failed\n"); zassert_true(net_if_ipv6_addr_rm(default_iface, &addr6_pref2), "IPv6 removing address failed\n"); + + /**TESTPOINTS: Check what IPv6 address is selected when some + * addresses are in preferred state and some in deprecated state. + */ + ifaddr2 = net_if_ipv6_addr_add(default_iface, &ula, + NET_ADDR_AUTOCONF, 0); + zassert_not_null(ifaddr2, "IPv6 ula address add failed"); + + ifaddr2->addr_state = NET_ADDR_PREFERRED; + + out = net_if_ipv6_select_src_addr(default_iface, &ula2); + zassert_not_null(out, "IPv6 src ula addr selection failed, " + "iface %p\n", default_iface); + + DBG("Selected IPv6 address %s, iface %p\n", + net_sprint_ipv6_addr(out), iface); + + zassert_false(memcmp(out->s6_addr, &ula.s6_addr, sizeof(struct in6_addr)), + "IPv6 wrong src ula address selected, iface %p\n", iface); + + /* Allow selection of deprecated address if no other address + * is available. + */ + ifaddr2->addr_state = NET_ADDR_DEPRECATED; + + out = net_if_ipv6_select_src_addr(default_iface, &ula3); + zassert_not_null(out, "IPv6 src ula addr selection failed, " + "iface %p\n", default_iface); + + /* Then add another address with preferred state and check that we + * still select the deprecated address as it is a better match. + */ + ifaddr2 = net_if_ipv6_addr_add(default_iface, &ula3, + NET_ADDR_AUTOCONF, 0); + zassert_not_null(ifaddr2, "IPv6 ula address add failed"); + + ifaddr2->addr_state = NET_ADDR_PREFERRED; + + out = net_if_ipv6_select_src_addr(default_iface, &ula2); + zassert_not_null(out, "IPv6 src ula addr selection failed, " + "iface %p\n", default_iface); + + DBG("Selected IPv6 address %s, iface %p\n", + net_sprint_ipv6_addr(out), iface); + + zassert_false(memcmp(out->s6_addr, &ula3.s6_addr, sizeof(struct in6_addr)), + "IPv6 wrong src ula address selected, iface %p\n", iface); + + zassert_true(net_if_ipv6_addr_rm(default_iface, &ula), + "IPv6 removing address failed\n"); + + prefix = net_if_ipv6_prefix_add(default_iface, &ula4, 96, 3600); + zassert_not_null(prefix, "IPv6 ula prefix add failed"); + + ifaddr1 = net_if_ipv6_addr_add(default_iface, &ula4, + NET_ADDR_AUTOCONF, 0); + zassert_not_null(ifaddr1, "IPv6 ula address add failed"); + + ifaddr2->addr_state = NET_ADDR_DEPRECATED; + + out = net_if_ipv6_select_src_addr(default_iface, &ula5); + zassert_not_null(out, "IPv6 src ula addr selection failed, " + "iface %p\n", default_iface); + + DBG("Selected IPv6 address %s, iface %p\n", + net_sprint_ipv6_addr(out), iface); + + zassert_false(memcmp(out->s6_addr, &ula4.s6_addr, sizeof(struct in6_addr)), + "IPv6 wrong src ula address selected, iface %p\n", iface); + + zassert_true(net_if_ipv6_addr_rm(default_iface, &ula3), + "IPv6 removing address failed\n"); + + zassert_true(net_if_ipv6_addr_rm(default_iface, &ula4), + "IPv6 removing address failed\n"); } ZTEST(ip_addr_fn, test_ipv4_ll_address_select_default_first) From c080d1cb4b478ef07f11833c50ad02682177b1c5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Benjamin=20Cab=C3=A9?= Date: Fri, 25 Apr 2025 10:11:32 +0200 Subject: [PATCH 0036/2553] tests: posix: add test for pthread_cond_init with existing condattr MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Introduce new test for pthread_cond_init verifying successful initialization with a valid pre-initialized condattr. Signed-off-by: Benjamin Cabé --- tests/posix/common/src/cond.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/tests/posix/common/src/cond.c b/tests/posix/common/src/cond.c index 94de124c375..83d3c84756d 100644 --- a/tests/posix/common/src/cond.c +++ b/tests/posix/common/src/cond.c @@ -69,4 +69,20 @@ ZTEST(cond, test_pthread_condattr) zassert_ok(pthread_condattr_destroy(&att)); } +/** + * @brief Test pthread_cond_init() with a pre-existing initialized attribute. + */ +ZTEST(cond, test_cond_init_existing_initialized_condattr) +{ + pthread_cond_t cond; + pthread_condattr_t att = {0}; + + zassert_ok(pthread_condattr_init(&att)); + zassert_ok(pthread_cond_init(&cond, &att), "pthread_cond_init failed with valid attr"); + + /* Clean up */ + zassert_ok(pthread_cond_destroy(&cond)); + zassert_ok(pthread_condattr_destroy(&att)); +} + ZTEST_SUITE(cond, NULL, NULL, NULL, NULL, NULL); From f412cc643d91660b7acffacdbb6e18b100fccf7c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Benjamin=20Cab=C3=A9?= Date: Fri, 25 Apr 2025 09:56:58 +0200 Subject: [PATCH 0037/2553] posix: fix typo in pthread_cond_init MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Update the casting of the 'attr' parameter in pthread_cond_init to use the correct variable name 'att'. Thanks clang for spotting the typo. Signed-off-by: Benjamin Cabé --- lib/posix/options/cond.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/posix/options/cond.c b/lib/posix/options/cond.c index d1fc231c94c..c93386ab539 100644 --- a/lib/posix/options/cond.c +++ b/lib/posix/options/cond.c @@ -186,7 +186,7 @@ int pthread_cond_timedwait(pthread_cond_t *cv, pthread_mutex_t *mut, const struc int pthread_cond_init(pthread_cond_t *cvar, const pthread_condattr_t *att) { struct posix_cond *cv; - struct posix_condattr *attr = (struct posix_condattr *)attr; + struct posix_condattr *attr = (struct posix_condattr *)att; *cvar = PTHREAD_COND_INITIALIZER; cv = to_posix_cond(cvar); From db63e563a950dbea4ebd8213009a701d2f0247f5 Mon Sep 17 00:00:00 2001 From: Jacob Wienecke Date: Tue, 18 Feb 2025 10:05:37 -0600 Subject: [PATCH 0038/2553] drivers: memc: memc_nxp_flexram.h: Move to the public includes directory Moved to: include/zephyr/drivers/misc/flexram/memc_nxp_flexram.h This change makes it so that the .h file does not need to be pulled in using the CMakeLists.txt file, and can be included like other public includes. Removes drivers/memc/memc_nxp_flexram.h Add memc_nxp_flexram.h to include/zephyr/drivers/misc/flexram Modify drivers/memc/memc_nxp_flexram.c to use the new include path. Modifies the mimxrt1170 magic_addr sample to include the driver using the new include path. Modify the soc file: soc/nxp/imxrt/imxrt11xx/soc.c to use the new path. Add relevant information to migration-guide-4.2.rst. Signed-off-by: Jacob Wienecke Co-authored-by: Declan Snyder --- doc/releases/migration-guide-4.2.rst | 9 +++++++++ drivers/memc/memc_nxp_flexram.c | 2 +- .../zephyr/drivers/misc/flexram/nxp_flexram.h | 0 .../nxp/mimxrt1170_evk_cm7/magic_addr/CMakeLists.txt | 2 -- .../boards/nxp/mimxrt1170_evk_cm7/magic_addr/src/main.c | 2 +- soc/nxp/imxrt/imxrt10xx/soc.c | 2 +- soc/nxp/imxrt/imxrt11xx/soc.c | 2 +- 7 files changed, 13 insertions(+), 6 deletions(-) rename drivers/memc/memc_nxp_flexram.h => include/zephyr/drivers/misc/flexram/nxp_flexram.h (100%) diff --git a/doc/releases/migration-guide-4.2.rst b/doc/releases/migration-guide-4.2.rst index 732c4b08fea..bd198b9d204 100644 --- a/doc/releases/migration-guide-4.2.rst +++ b/doc/releases/migration-guide-4.2.rst @@ -228,6 +228,15 @@ Stepper * Refactored the ``stepper_enable(const struct device * dev, bool enable)`` function to :c:func:`stepper_enable` & :c:func:`stepper_disable`. +Misc +==== + +* Moved file ``drivers/memc/memc_nxp_flexram.h`` to + :zephyr_file:`include/zephyr/drivers/misc/flexram/nxp_flexram.h` so that the + file can be included using ````. + Modification to CMakeList.txt to use include this driver is no longer + required. + Bluetooth ********* diff --git a/drivers/memc/memc_nxp_flexram.c b/drivers/memc/memc_nxp_flexram.c index 39da8349e1a..fb200d63b86 100644 --- a/drivers/memc/memc_nxp_flexram.c +++ b/drivers/memc/memc_nxp_flexram.c @@ -4,7 +4,7 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "memc_nxp_flexram.h" +#include #include #include #include diff --git a/drivers/memc/memc_nxp_flexram.h b/include/zephyr/drivers/misc/flexram/nxp_flexram.h similarity index 100% rename from drivers/memc/memc_nxp_flexram.h rename to include/zephyr/drivers/misc/flexram/nxp_flexram.h diff --git a/samples/boards/nxp/mimxrt1170_evk_cm7/magic_addr/CMakeLists.txt b/samples/boards/nxp/mimxrt1170_evk_cm7/magic_addr/CMakeLists.txt index b8af716702a..6f7101fa1cf 100644 --- a/samples/boards/nxp/mimxrt1170_evk_cm7/magic_addr/CMakeLists.txt +++ b/samples/boards/nxp/mimxrt1170_evk_cm7/magic_addr/CMakeLists.txt @@ -5,6 +5,4 @@ cmake_minimum_required(VERSION 3.20.0) find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) project(magic_addr) -zephyr_library_include_directories(${ZEPHYR_BASE}/drivers/memc) - target_sources(app PRIVATE src/main.c) diff --git a/samples/boards/nxp/mimxrt1170_evk_cm7/magic_addr/src/main.c b/samples/boards/nxp/mimxrt1170_evk_cm7/magic_addr/src/main.c index f44c3f23923..a654946e60d 100644 --- a/samples/boards/nxp/mimxrt1170_evk_cm7/magic_addr/src/main.c +++ b/samples/boards/nxp/mimxrt1170_evk_cm7/magic_addr/src/main.c @@ -6,7 +6,7 @@ #include #include -#include "memc_nxp_flexram.h" +#include #include #include #include diff --git a/soc/nxp/imxrt/imxrt10xx/soc.c b/soc/nxp/imxrt/imxrt10xx/soc.c index 83135d7d834..ea870c84ed0 100644 --- a/soc/nxp/imxrt/imxrt10xx/soc.c +++ b/soc/nxp/imxrt/imxrt10xx/soc.c @@ -22,7 +22,7 @@ #include "usb.h" #endif -#include "memc_nxp_flexram.h" +#include #include diff --git a/soc/nxp/imxrt/imxrt11xx/soc.c b/soc/nxp/imxrt/imxrt11xx/soc.c index e8261016bb3..6f2505e0c18 100644 --- a/soc/nxp/imxrt/imxrt11xx/soc.c +++ b/soc/nxp/imxrt/imxrt11xx/soc.c @@ -37,7 +37,7 @@ LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL); #include "usb_phy.h" #include "usb.h" #endif -#include "memc_nxp_flexram.h" +#include #include From e358713ea4f844764c290f2cd016493090c157ec Mon Sep 17 00:00:00 2001 From: Declan Snyder Date: Wed, 19 Mar 2025 09:59:41 -0500 Subject: [PATCH 0039/2553] drivers: Move flexram to misc driver Flexram is really not a memory controller, and does not belong in memc namespace or directory. Move it to it's own misc directory and remove memc_ from the namespace. Signed-off-by: Declan Snyder --- doc/releases/migration-guide-4.2.rst | 2 ++ drivers/memc/CMakeLists.txt | 1 - drivers/memc/Kconfig.mcux | 19 ------------ drivers/misc/CMakeLists.txt | 1 + drivers/misc/Kconfig | 1 + drivers/misc/nxp_flexram/CMakeLists.txt | 8 +++++ drivers/misc/nxp_flexram/Kconfig | 24 +++++++++++++++ .../nxp_flexram/nxp_flexram.c} | 30 +++++++++---------- .../zephyr/drivers/misc/flexram/nxp_flexram.h | 28 ++++++++--------- .../mimxrt1170_evk_cm7/magic_addr/prj.conf | 2 +- .../mimxrt1170_evk_cm7/magic_addr/src/main.c | 6 ++-- 11 files changed, 69 insertions(+), 53 deletions(-) create mode 100644 drivers/misc/nxp_flexram/CMakeLists.txt create mode 100644 drivers/misc/nxp_flexram/Kconfig rename drivers/{memc/memc_nxp_flexram.c => misc/nxp_flexram/nxp_flexram.c} (89%) diff --git a/doc/releases/migration-guide-4.2.rst b/doc/releases/migration-guide-4.2.rst index bd198b9d204..788efd3f0df 100644 --- a/doc/releases/migration-guide-4.2.rst +++ b/doc/releases/migration-guide-4.2.rst @@ -236,6 +236,8 @@ Misc file can be included using ````. Modification to CMakeList.txt to use include this driver is no longer required. +* All memc_flexram_* namespaced things including kconfigs and C API + have been changed to just flexram_*. Bluetooth ********* diff --git a/drivers/memc/CMakeLists.txt b/drivers/memc/CMakeLists.txt index afd05f4ecf1..ab1702584bc 100644 --- a/drivers/memc/CMakeLists.txt +++ b/drivers/memc/CMakeLists.txt @@ -15,7 +15,6 @@ zephyr_library_sources_ifdef(CONFIG_MEMC_MCUX_FLEXSPI_S27KS0641 memc_mcux_flexsp zephyr_library_sources_ifdef(CONFIG_MEMC_MCUX_FLEXSPI_APS6408L memc_mcux_flexspi_aps6408l.c) zephyr_library_sources_ifdef(CONFIG_MEMC_MCUX_FLEXSPI_APS6404L memc_mcux_flexspi_aps6404l.c) zephyr_library_sources_ifdef(CONFIG_MEMC_MCUX_FLEXSPI_IS66WVQ8M4 memc_mcux_flexspi_is66wvq8m4.c) -zephyr_library_sources_ifdef(CONFIG_MEMC_NXP_FLEXRAM memc_nxp_flexram.c) zephyr_library_sources_ifdef(CONFIG_MEMC_RENESAS_RA_SDRAM memc_renesas_ra_sdram.c) zephyr_library_sources_ifdef(CONFIG_MEMC_SAM_SMC memc_sam_smc.c) diff --git a/drivers/memc/Kconfig.mcux b/drivers/memc/Kconfig.mcux index 23aac7e3fa7..54dc92144d9 100644 --- a/drivers/memc/Kconfig.mcux +++ b/drivers/memc/Kconfig.mcux @@ -66,22 +66,3 @@ choice MEMC_LOG_LEVEL_CHOICE endchoice endif # DT_HAS_NXP_IMX_FLEXSPI_ENABLED - - -if DT_HAS_NXP_FLEXRAM_ENABLED - -config MEMC_NXP_FLEXRAM - bool - default y - -config MEMC_NXP_FLEXRAM_MAGIC_ADDR_API - bool "NXP FlexRAM magic addr API" - help - Enable API to use flexRAM magic address functionality - -config MEMC_NXP_FLEXRAM_ERROR_INTERRUPT - bool "NXP FlexRAM error interrupt" - help - Allow flexram to generate error interrupts - -endif # DT_HAS_NXP_FLEXRAM_ENABLED diff --git a/drivers/misc/CMakeLists.txt b/drivers/misc/CMakeLists.txt index 320358adc8d..4b1e29a4901 100644 --- a/drivers/misc/CMakeLists.txt +++ b/drivers/misc/CMakeLists.txt @@ -4,6 +4,7 @@ add_subdirectory_ifdef(CONFIG_ARM_ETHOS_U ethos_u) add_subdirectory_ifdef(CONFIG_FT800 ft8xx) add_subdirectory_ifdef(CONFIG_GROVE_LCD_RGB grove_lcd_rgb) add_subdirectory_ifdef(CONFIG_PIO_RPI_PICO pio_rpi_pico) +add_subdirectory_ifdef(CONFIG_NXP_FLEXRAM nxp_flexram) add_subdirectory_ifdef(CONFIG_NXP_S32_EMIOS nxp_s32_emios) add_subdirectory_ifdef(CONFIG_TIMEAWARE_GPIO timeaware_gpio) add_subdirectory_ifdef(CONFIG_DEVMUX devmux) diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index a0baae98bde..e80b1650ccd 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -8,6 +8,7 @@ menu "Miscellaneous Drivers" source "drivers/misc/ft8xx/Kconfig" source "drivers/misc/grove_lcd_rgb/Kconfig" source "drivers/misc/pio_rpi_pico/Kconfig" +source "drivers/misc/nxp_flexram/Kconfig" source "drivers/misc/nxp_s32_emios/Kconfig" source "drivers/misc/timeaware_gpio/Kconfig" source "drivers/misc/devmux/Kconfig" diff --git a/drivers/misc/nxp_flexram/CMakeLists.txt b/drivers/misc/nxp_flexram/CMakeLists.txt new file mode 100644 index 00000000000..fba07e93a53 --- /dev/null +++ b/drivers/misc/nxp_flexram/CMakeLists.txt @@ -0,0 +1,8 @@ +# Copyright 2025 NXP +# SPDX-License-Identifier: Apache-2.0 + +zephyr_library() + +zephyr_library_sources( + nxp_flexram.c +) diff --git a/drivers/misc/nxp_flexram/Kconfig b/drivers/misc/nxp_flexram/Kconfig new file mode 100644 index 00000000000..536a61078f9 --- /dev/null +++ b/drivers/misc/nxp_flexram/Kconfig @@ -0,0 +1,24 @@ +# Copyright (c) 2021 Basalte bv +# Copyright (c) 2023, ithinx GmbH +# Copyright (c) 2023, Tonies GmbH +# Copyright 2020-2023, 2025 NXP +# SPDX-License-Identifier: Apache-2.0 + +config NXP_FLEXRAM + bool + default y if DT_HAS_NXP_FLEXRAM_ENABLED + +if NXP_FLEXRAM + +config NXP_FLEXRAM_MAGIC_ADDR_API + bool "NXP FlexRAM magic addr API" + depends on SOC_SERIES_IMXRT11XX + help + Enable API to use flexRAM magic address functionality + +config NXP_FLEXRAM_ERROR_INTERRUPT + bool "NXP FlexRAM error interrupt" + help + Allow flexram to generate error interrupts + +endif # NXP_FLEXRAM diff --git a/drivers/memc/memc_nxp_flexram.c b/drivers/misc/nxp_flexram/nxp_flexram.c similarity index 89% rename from drivers/memc/memc_nxp_flexram.c rename to drivers/misc/nxp_flexram/nxp_flexram.c index fb200d63b86..3d0c4724dee 100644 --- a/drivers/memc/memc_nxp_flexram.c +++ b/drivers/misc/nxp_flexram/nxp_flexram.c @@ -15,7 +15,7 @@ #include "fsl_device_registers.h" -#if defined(CONFIG_MEMC_NXP_FLEXRAM_MAGIC_ADDR_API) +#if defined(CONFIG_NXP_FLEXRAM_MAGIC_ADDR_API) BUILD_ASSERT(DT_PROP(FLEXRAM_DT_NODE, flexram_has_magic_addr), "SOC does not support magic flexram addresses"); #endif @@ -92,7 +92,7 @@ static FLEXRAM_Type *const base = (FLEXRAM_Type *) DT_REG_ADDR(FLEXRAM_DT_NODE); static flexram_callback_t flexram_callback; static void *flexram_user_data; -void memc_flexram_register_callback(flexram_callback_t callback, void *user_data) +void flexram_register_callback(flexram_callback_t callback, void *user_data) { flexram_callback = callback; flexram_user_data = user_data; @@ -106,7 +106,7 @@ static void nxp_flexram_isr(void *arg) return; } -#if defined(CONFIG_MEMC_NXP_FLEXRAM_ERROR_INTERRUPT) +#if defined(CONFIG_NXP_FLEXRAM_ERROR_INTERRUPT) if (base->INT_STATUS & FLEXRAM_INT_STATUS_OCRAM_ERR_STATUS_MASK) { base->INT_STATUS |= FLEXRAM_INT_STATUS_OCRAM_ERR_STATUS_MASK; flexram_callback(flexram_ocram_access_error, flexram_user_data); @@ -119,9 +119,9 @@ static void nxp_flexram_isr(void *arg) base->INT_STATUS |= FLEXRAM_INT_STATUS_ITCM_ERR_STATUS_MASK; flexram_callback(flexram_itcm_access_error, flexram_user_data); } -#endif /* CONFIG_MEMC_NXP_FLEXRAM_ERROR_INTERRUPT */ +#endif /* CONFIG_NXP_FLEXRAM_ERROR_INTERRUPT */ -#if defined(CONFIG_MEMC_NXP_FLEXRAM_MAGIC_ADDR_API) +#if defined(CONFIG_NXP_FLEXRAM_MAGIC_ADDR_API) if (base->INT_STATUS & FLEXRAM_INT_STATUS_OCRAM_MAM_STATUS_MASK) { base->INT_STATUS |= FLEXRAM_INT_STATUS_OCRAM_MAM_STATUS_MASK; flexram_callback(flexram_ocram_magic_addr, flexram_user_data); @@ -134,11 +134,11 @@ static void nxp_flexram_isr(void *arg) base->INT_STATUS |= FLEXRAM_INT_STATUS_ITCM_MAM_STATUS_MASK; flexram_callback(flexram_itcm_magic_addr, flexram_user_data); } -#endif /* CONFIG_MEMC_NXP_FLEXRAM_MAGIC_ADDR_API */ +#endif /* CONFIG_NXP_FLEXRAM_MAGIC_ADDR_API */ } -#if defined(CONFIG_MEMC_NXP_FLEXRAM_MAGIC_ADDR_API) -int memc_flexram_set_ocram_magic_addr(uint32_t ocram_addr) +#if defined(CONFIG_NXP_FLEXRAM_MAGIC_ADDR_API) +int flexram_set_ocram_magic_addr(uint32_t ocram_addr) { #ifdef OCRAM_DT_NODE ocram_addr -= DT_REG_ADDR(OCRAM_DT_NODE); @@ -156,7 +156,7 @@ int memc_flexram_set_ocram_magic_addr(uint32_t ocram_addr) #endif } -int memc_flexram_set_itcm_magic_addr(uint32_t itcm_addr) +int flexram_set_itcm_magic_addr(uint32_t itcm_addr) { #ifdef ITCM_DT_NODE itcm_addr -= DT_REG_ADDR(ITCM_DT_NODE); @@ -174,7 +174,7 @@ int memc_flexram_set_itcm_magic_addr(uint32_t itcm_addr) #endif } -int memc_flexram_set_dtcm_magic_addr(uint32_t dtcm_addr) +int flexram_set_dtcm_magic_addr(uint32_t dtcm_addr) { #ifdef DTCM_DT_NODE dtcm_addr -= DT_REG_ADDR(DTCM_DT_NODE); @@ -191,7 +191,7 @@ int memc_flexram_set_dtcm_magic_addr(uint32_t dtcm_addr) return -ENODEV; #endif } -#endif /* CONFIG_MEMC_NXP_FLEXRAM_MAGIC_ADDR_API */ +#endif /* CONFIG_NXP_FLEXRAM_MAGIC_ADDR_API */ #endif /* FLEXRAM_INTERRUPTS_USED */ @@ -204,20 +204,20 @@ static int nxp_flexram_init(void) base->TCM_CTRL |= FLEXRAM_TCM_CTRL_TCM_RWAIT_EN_MASK; } -#if defined(CONFIG_MEMC_NXP_FLEXRAM_ERROR_INTERRUPT) +#if defined(CONFIG_NXP_FLEXRAM_ERROR_INTERRUPT) base->INT_SIG_EN |= FLEXRAM_INT_SIG_EN_OCRAM_ERR_SIG_EN_MASK; base->INT_SIG_EN |= FLEXRAM_INT_SIG_EN_DTCM_ERR_SIG_EN_MASK; base->INT_SIG_EN |= FLEXRAM_INT_SIG_EN_ITCM_ERR_SIG_EN_MASK; base->INT_STAT_EN |= FLEXRAM_INT_STAT_EN_OCRAM_ERR_STAT_EN_MASK; base->INT_STAT_EN |= FLEXRAM_INT_STAT_EN_DTCM_ERR_STAT_EN_MASK; base->INT_STAT_EN |= FLEXRAM_INT_STAT_EN_ITCM_ERR_STAT_EN_MASK; -#endif /* CONFIG_MEMC_NXP_FLEXRAM_ERROR_INTERRUPT */ +#endif /* CONFIG_NXP_FLEXRAM_ERROR_INTERRUPT */ -#if defined(CONFIG_MEMC_NXP_FLEXRAM_MAGIC_ADDR_API) +#if defined(CONFIG_NXP_FLEXRAM_MAGIC_ADDR_API) base->INT_SIG_EN |= FLEXRAM_INT_SIG_EN_OCRAM_MAM_SIG_EN_MASK; base->INT_SIG_EN |= FLEXRAM_INT_SIG_EN_DTCM_MAM_SIG_EN_MASK; base->INT_SIG_EN |= FLEXRAM_INT_SIG_EN_ITCM_MAM_SIG_EN_MASK; -#endif /* CONFIG_MEMC_NXP_FLEXRAM_MAGIC_ADDR_API */ +#endif /* CONFIG_NXP_FLEXRAM_MAGIC_ADDR_API */ #ifdef FLEXRAM_INTERRUPTS_USED IRQ_CONNECT(DT_IRQN(FLEXRAM_DT_NODE), DT_IRQ(FLEXRAM_DT_NODE, priority), diff --git a/include/zephyr/drivers/misc/flexram/nxp_flexram.h b/include/zephyr/drivers/misc/flexram/nxp_flexram.h index 2bc0e03752e..29d7f1acfdf 100644 --- a/include/zephyr/drivers/misc/flexram/nxp_flexram.h +++ b/include/zephyr/drivers/misc/flexram/nxp_flexram.h @@ -10,8 +10,8 @@ #define FLEXRAM_DT_NODE DT_INST(0, nxp_flexram) #define IOMUXC_GPR_DT_NODE DT_NODELABEL(iomuxcgpr) -#if defined(CONFIG_MEMC_NXP_FLEXRAM_MAGIC_ADDR_API) || \ - defined(CONFIG_MEMC_NXP_FLEXRAM_ERROR_INTERRUPT) +#if defined(CONFIG_NXP_FLEXRAM_MAGIC_ADDR_API) || \ + defined(CONFIG_NXP_FLEXRAM_ERROR_INTERRUPT) #define FLEXRAM_INTERRUPTS_USED #endif @@ -20,22 +20,22 @@ #endif #ifdef FLEXRAM_INTERRUPTS_USED -enum memc_flexram_interrupt_cause { -#ifdef CONFIG_MEMC_NXP_FLEXRAM_ERROR_INTERRUPT +enum flexram_interrupt_cause { +#ifdef CONFIG_NXP_FLEXRAM_ERROR_INTERRUPT flexram_ocram_access_error, flexram_itcm_access_error, flexram_dtcm_access_error, #endif -#ifdef CONFIG_MEMC_NXP_FLEXRAM_MAGIC_ADDR_API +#ifdef CONFIG_NXP_FLEXRAM_MAGIC_ADDR_API flexram_ocram_magic_addr, flexram_itcm_magic_addr, flexram_dtcm_magic_addr, -#endif /* CONFIG_MEMC_NXP_FLEXRAM_MAGIC_ADDR_API */ +#endif /* CONFIG_NXP_FLEXRAM_MAGIC_ADDR_API */ }; -typedef void (*flexram_callback_t)(enum memc_flexram_interrupt_cause, void *user_data); +typedef void (*flexram_callback_t)(enum flexram_interrupt_cause, void *user_data); -void memc_flexram_register_callback(flexram_callback_t callback, void *user_data); +void flexram_register_callback(flexram_callback_t callback, void *user_data); #endif /* FLEXRAM_INTERRUPTS_USED */ #ifdef FLEXRAM_RUNTIME_BANKS_USED @@ -46,7 +46,7 @@ void memc_flexram_register_callback(flexram_callback_t callback, void *user_data */ #define GPR_FLEXRAM_REG_FILL(node_id, prop, idx) \ (((uint32_t)DT_PROP_BY_IDX(node_id, prop, idx)) << (2 * idx)) -static inline void memc_flexram_dt_partition(void) +static inline void flexram_dt_partition(void) { /* iomuxc_gpr must be const (in ROM region) because used in reconfiguring ram */ static IOMUXC_GPR_Type *const iomuxc_gpr = @@ -65,7 +65,7 @@ static inline void memc_flexram_dt_partition(void) } #endif /* FLEXRAM_RUNTIME_BANKS_USED */ -#ifdef CONFIG_MEMC_NXP_FLEXRAM_MAGIC_ADDR_API +#ifdef CONFIG_NXP_FLEXRAM_MAGIC_ADDR_API /** @brief Sets magic address for OCRAM * * Magic address allows core interrupt from FlexRAM when address @@ -76,7 +76,7 @@ static inline void memc_flexram_dt_partition(void) * @retval -EINVAL if ocram_addr is not in OCRAM * @retval -ENODEV if there is no OCRAM allocation in flexram */ -int memc_flexram_set_ocram_magic_addr(uint32_t ocram_addr); +int flexram_set_ocram_magic_addr(uint32_t ocram_addr); /** @brief Sets magic address for ITCM * @@ -88,7 +88,7 @@ int memc_flexram_set_ocram_magic_addr(uint32_t ocram_addr); * @retval -EINVAL if itcm_addr is not in ITCM * @retval -ENODEV if there is no ITCM allocation in flexram */ -int memc_flexram_set_itcm_magic_addr(uint32_t itcm_addr); +int flexram_set_itcm_magic_addr(uint32_t itcm_addr); /** @brief Sets magic address for DTCM * @@ -100,6 +100,6 @@ int memc_flexram_set_itcm_magic_addr(uint32_t itcm_addr); * @retval -EINVAL if dtcm_addr is not in DTCM * @retval -ENODEV if there is no DTCM allocation in flexram */ -int memc_flexram_set_dtcm_magic_addr(uint32_t dtcm_addr); +int flexram_set_dtcm_magic_addr(uint32_t dtcm_addr); -#endif /* CONFIG_MEMC_NXP_FLEXRAM_MAGIC_ADDR_API */ +#endif /* CONFIG_NXP_FLEXRAM_MAGIC_ADDR_API */ diff --git a/samples/boards/nxp/mimxrt1170_evk_cm7/magic_addr/prj.conf b/samples/boards/nxp/mimxrt1170_evk_cm7/magic_addr/prj.conf index b58887f4998..8ec2803df8c 100644 --- a/samples/boards/nxp/mimxrt1170_evk_cm7/magic_addr/prj.conf +++ b/samples/boards/nxp/mimxrt1170_evk_cm7/magic_addr/prj.conf @@ -1,3 +1,3 @@ -CONFIG_MEMC_NXP_FLEXRAM_MAGIC_ADDR_API=y +CONFIG_NXP_FLEXRAM_MAGIC_ADDR_API=y CONFIG_CONSOLE_SUBSYS=y CONFIG_CONSOLE_GETCHAR=y diff --git a/samples/boards/nxp/mimxrt1170_evk_cm7/magic_addr/src/main.c b/samples/boards/nxp/mimxrt1170_evk_cm7/magic_addr/src/main.c index a654946e60d..42aa4545a6a 100644 --- a/samples/boards/nxp/mimxrt1170_evk_cm7/magic_addr/src/main.c +++ b/samples/boards/nxp/mimxrt1170_evk_cm7/magic_addr/src/main.c @@ -16,7 +16,7 @@ K_SEM_DEFINE(dtcm_magic, 0, 1); __dtcm_bss_section uint8_t var; int cnt; -void flexram_magic_addr_isr_cb(enum memc_flexram_interrupt_cause cause, +void flexram_magic_addr_isr_cb(enum flexram_interrupt_cause cause, void *data) { ARG_UNUSED(data); @@ -29,7 +29,7 @@ void flexram_magic_addr_isr_cb(enum memc_flexram_interrupt_cause cause, int main(void) { - memc_flexram_register_callback(flexram_magic_addr_isr_cb, NULL); + flexram_register_callback(flexram_magic_addr_isr_cb, NULL); console_init(); @@ -38,7 +38,7 @@ int main(void) uint32_t dtcm_addr = (uint32_t)&var; - memc_flexram_set_dtcm_magic_addr(dtcm_addr); + flexram_set_dtcm_magic_addr(dtcm_addr); uint8_t tmp; From 7f21dc2dfa152aefcb8af838591dbdf56011030f Mon Sep 17 00:00:00 2001 From: Michael Hope Date: Sun, 30 Jun 2024 17:05:51 +0200 Subject: [PATCH 0040/2553] drivers: watchdog: add a CH32V00x Independent Watchdog (IWDT) driver The CH32V003 has a built-in watchdog that runs off the low speed internal oscillator. Add a driver. Signed-off-by: Michael Hope --- drivers/watchdog/CMakeLists.txt | 1 + drivers/watchdog/Kconfig | 2 + drivers/watchdog/Kconfig.wch | 10 +++ drivers/watchdog/wdt_iwdg_wch.c | 93 ++++++++++++++++++++++++++++ dts/bindings/watchdog/wch,iwdg.yaml | 12 ++++ dts/riscv/wch/ch32v0/ch32v003.dtsi | 6 ++ dts/riscv/wch/ch32v208/ch32v208.dtsi | 6 ++ 7 files changed, 130 insertions(+) create mode 100644 drivers/watchdog/Kconfig.wch create mode 100644 drivers/watchdog/wdt_iwdg_wch.c create mode 100644 dts/bindings/watchdog/wch,iwdg.yaml diff --git a/drivers/watchdog/CMakeLists.txt b/drivers/watchdog/CMakeLists.txt index 2c5140eea9a..050cd1e72fa 100644 --- a/drivers/watchdog/CMakeLists.txt +++ b/drivers/watchdog/CMakeLists.txt @@ -51,6 +51,7 @@ zephyr_library_sources_ifdef(CONFIG_WDT_AMBIQ wdt_ambiq.c) zephyr_library_sources_ifdef(CONFIG_WDT_XMC4XXX wdt_xmc4xxx.c) zephyr_library_sources_ifdef(CONFIG_WWDT_NUMAKER wdt_wwdt_numaker.c) zephyr_library_sources_ifdef(CONFIG_WDT_ENE_KB1200 wdt_ene_kb1200.c) +zephyr_library_sources_ifdef(CONFIG_WDT_IWDG_WCH wdt_iwdg_wch.c) zephyr_library_sources_ifdef(CONFIG_WDT_DW wdt_dw.c wdt_dw_common.c) zephyr_library_sources_ifdef(CONFIG_WDT_INTEL_ADSP wdt_intel_adsp.c wdt_dw_common.c) diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 6bb30ff61b4..722931b60bc 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -151,4 +151,6 @@ source "drivers/watchdog/Kconfig.rts5912" source "drivers/watchdog/Kconfig.renesas_ra" +source "drivers/watchdog/Kconfig.wch" + endif # WATCHDOG diff --git a/drivers/watchdog/Kconfig.wch b/drivers/watchdog/Kconfig.wch new file mode 100644 index 00000000000..e84b51bf5a3 --- /dev/null +++ b/drivers/watchdog/Kconfig.wch @@ -0,0 +1,10 @@ +# Copyright (c) 2025 Michael Hope +# SPDX-License-Identifier: Apache-2.0 + +config WDT_IWDG_WCH + bool "WCH Independent Watchdog (IWDG) driver" + default y + depends on DT_HAS_WCH_IWDG_ENABLED + help + Enable the Independent Watchdog (IWDG) driver. Tested on the + CH32V003 and CH32V208. diff --git a/drivers/watchdog/wdt_iwdg_wch.c b/drivers/watchdog/wdt_iwdg_wch.c new file mode 100644 index 00000000000..c3108e69dd1 --- /dev/null +++ b/drivers/watchdog/wdt_iwdg_wch.c @@ -0,0 +1,93 @@ +/* + * Copyright (c) 2025 Michael Hope + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#define DT_DRV_COMPAT wch_iwdg + +#include +#include +#include +#include + +#include + +static int iwdg_wch_setup(const struct device *dev, uint8_t options) +{ + if (options != 0) { + return -ENOTSUP; + } + + IWDG->CTLR = CTLR_KEY_Enable; + + return 0; +} + +static int iwdg_wch_disable(const struct device *dev) +{ + return -EPERM; +} + +static int iwdg_wch_install_timeout(const struct device *dev, + const struct wdt_timeout_cfg *config) +{ + int prescaler = 0; + /* The IWDT is driven by the 128 kHz LSI oscillator with at least a /4 prescaler. */ + uint32_t lsi_frequency = DT_PROP(DT_NODELABEL(clk_lsi), clock_frequency); + uint32_t reload = config->window.max * (lsi_frequency / 1000 / 4); + + if (config->callback != NULL) { + return -ENOTSUP; + } + if (config->window.min != 0) { + return -ENOTSUP; + } + if ((config->flags & WDT_FLAG_RESET_MASK) != WDT_FLAG_RESET_SOC) { + return -ENOTSUP; + } + + for (; reload > IWDG_RL && prescaler < IWDG_PR;) { + prescaler++; + reload /= 2; + } + if (reload > IWDG_RL) { + /* The reload is too high even with the maximum prescaler */ + return -EINVAL; + } + + /* Wait for the watchdog to be idle, unlock it, update, and wait for idle. */ + while ((IWDG->STATR & (IWDG_RVU | IWDG_PVU)) != 0) { + } + + IWDG->CTLR = IWDG_WriteAccess_Enable; + IWDG->PSCR = prescaler; + IWDG->RLDR = reload; + + while ((IWDG->STATR & (IWDG_RVU | IWDG_PVU)) != 0) { + } + + return 0; +} + +static int iwdg_wch_feed(const struct device *dev, int channel_id) +{ + IWDG->CTLR = CTLR_KEY_Reload; + + return 0; +} + +static const struct wdt_driver_api iwdg_wch_api = { + .setup = iwdg_wch_setup, + .disable = iwdg_wch_disable, + .install_timeout = iwdg_wch_install_timeout, + .feed = iwdg_wch_feed, +}; + +static int iwdg_wch_init(const struct device *dev) +{ + return 0; +} + +DEVICE_DT_INST_DEFINE(0, iwdg_wch_init, NULL, NULL, NULL, PRE_KERNEL_1, + CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &iwdg_wch_api); diff --git a/dts/bindings/watchdog/wch,iwdg.yaml b/dts/bindings/watchdog/wch,iwdg.yaml new file mode 100644 index 00000000000..58c44d814d5 --- /dev/null +++ b/dts/bindings/watchdog/wch,iwdg.yaml @@ -0,0 +1,12 @@ +# Copyright (c) 2025 Michael Hope +# SPDX-License-Identifier: Apache-2.0 + +description: WCH Independent Watchdog (IWDG) + +compatible: "wch,iwdg" + +include: base.yaml + +properties: + reg: + required: true diff --git a/dts/riscv/wch/ch32v0/ch32v003.dtsi b/dts/riscv/wch/ch32v0/ch32v003.dtsi index e2de8a5ad27..0050307d9af 100644 --- a/dts/riscv/wch/ch32v0/ch32v003.dtsi +++ b/dts/riscv/wch/ch32v0/ch32v003.dtsi @@ -66,6 +66,12 @@ reg = <0x40007000 0x10>; }; + iwdg: watchdog@40003000 { + compatible = "wch,iwdg"; + reg = <0x40003000 0x10>; + status = "disabled"; + }; + pinctrl: pin-controller@40010000 { compatible = "wch,afio"; reg = <0x40010000 0x10>; diff --git a/dts/riscv/wch/ch32v208/ch32v208.dtsi b/dts/riscv/wch/ch32v208/ch32v208.dtsi index c92324dad64..b1e03ecc147 100644 --- a/dts/riscv/wch/ch32v208/ch32v208.dtsi +++ b/dts/riscv/wch/ch32v208/ch32v208.dtsi @@ -65,6 +65,12 @@ reg = <0x40007000 16>; }; + iwdg: watchdog@40003000 { + compatible = "wch,iwdg"; + reg = <0x40003000 0x10>; + status = "disabled"; + }; + pinctrl: pin-controller@40010000 { compatible = "wch,20x_30x-afio"; reg = <0x40010000 16>; From 7e31f6be48ce866eeba37f71a5add931b58b27e3 Mon Sep 17 00:00:00 2001 From: Michael Hope Date: Sun, 30 Jun 2024 17:07:13 +0200 Subject: [PATCH 0041/2553] samples: watchdog: add the ch32v003evt to the sample The CH32V003 has a straight-forward watchdog that does not support callbacks. Add an overlay and support. To make the sample fit in flash, remove the unused logging from the project configuration. The sample itself doesn't seem to use logging so this is (mostly) a no-op. Signed-off-by: Michael Hope --- samples/drivers/watchdog/boards/ch32v003evt.conf | 1 + .../drivers/watchdog/boards/ch32v003evt.overlay | 15 +++++++++++++++ samples/drivers/watchdog/src/main.c | 3 +++ 3 files changed, 19 insertions(+) create mode 100644 samples/drivers/watchdog/boards/ch32v003evt.conf create mode 100644 samples/drivers/watchdog/boards/ch32v003evt.overlay diff --git a/samples/drivers/watchdog/boards/ch32v003evt.conf b/samples/drivers/watchdog/boards/ch32v003evt.conf new file mode 100644 index 00000000000..5a654a1e5ed --- /dev/null +++ b/samples/drivers/watchdog/boards/ch32v003evt.conf @@ -0,0 +1 @@ +CONFIG_LOG_MODE_MINIMAL=y diff --git a/samples/drivers/watchdog/boards/ch32v003evt.overlay b/samples/drivers/watchdog/boards/ch32v003evt.overlay new file mode 100644 index 00000000000..86521224724 --- /dev/null +++ b/samples/drivers/watchdog/boards/ch32v003evt.overlay @@ -0,0 +1,15 @@ +/* + * Copyright (c) 2025 Michael Hope + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + aliases { + watchdog0 = &iwdg; + }; +}; + +&iwdg { + status = "okay"; +}; diff --git a/samples/drivers/watchdog/src/main.c b/samples/drivers/watchdog/src/main.c index faeb79c5b8a..61a93c16d5d 100644 --- a/samples/drivers/watchdog/src/main.c +++ b/samples/drivers/watchdog/src/main.c @@ -42,6 +42,9 @@ #define WDG_FEED_INTERVAL (WDT_MIN_WINDOW + ((WDT_MAX_WINDOW - WDT_MIN_WINDOW) / 4)) #elif DT_HAS_COMPAT_STATUS_OKAY(renesas_ra_wdt) #define WDT_ALLOW_CALLBACK 0 +#elif DT_HAS_COMPAT_STATUS_OKAY(wch_iwdg) +#define WDT_ALLOW_CALLBACK 0 +#define WDT_OPT 0 #endif #ifndef WDT_ALLOW_CALLBACK From 6f5953367568d7f9f2e38aa9d1db15b5282d2a98 Mon Sep 17 00:00:00 2001 From: Maxmillion McLaughlin Date: Mon, 14 Apr 2025 16:41:29 -0700 Subject: [PATCH 0042/2553] drivers: bmp581: change sensor_channel units to match spec The bmp581 driver currently returns pressure in pascals, when the sensor_channel enum specifies kilopascals. Signed-off-by: Maxmillion McLaughlin --- drivers/sensor/bosch/bmp581/bmp581.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/sensor/bosch/bmp581/bmp581.c b/drivers/sensor/bosch/bmp581/bmp581.c index 0927c3395a1..83a4a4b37fd 100644 --- a/drivers/sensor/bosch/bmp581/bmp581.c +++ b/drivers/sensor/bosch/bmp581/bmp581.c @@ -376,14 +376,14 @@ static int bmp581_sample_fetch(const struct device *dev, enum sensor_channel cha drv->last_sample.temperature.val2 = (data[1] << 8 | data[0]) * 10; if (drv->osr_odr_press_config.press_en == BMP5_ENABLE) { - uint32_t raw_pressure = (uint32_t)((uint32_t)(data[5] << 16) | - (uint16_t)(data[4] << 8) | data[3]); /* convert raw sensor data to sensor_value. Shift the decimal part by * 4 decimal places to compensate for the conversion in * sensor_value_to_double() */ - drv->last_sample.pressure.val1 = raw_pressure >> 6; - drv->last_sample.pressure.val2 = (raw_pressure & BIT_MASK(6)) * 10000; + uint32_t raw_pressure = (uint32_t)((uint32_t)(data[5] << 16) | + (uint16_t)(data[4] << 8) | data[3]) >> 6; + drv->last_sample.pressure.val1 = raw_pressure / 1000; + drv->last_sample.pressure.val2 = (raw_pressure % 1000) * 1000; } else { drv->last_sample.pressure.val1 = 0; drv->last_sample.pressure.val2 = 0; @@ -404,7 +404,7 @@ static int bmp581_channel_get(const struct device *dev, enum sensor_channel chan switch (chan) { case SENSOR_CHAN_PRESS: - /* returns pressure in Pa */ + /* returns pressure in kPa */ *val = drv->last_sample.pressure; return BMP5_OK; case SENSOR_CHAN_AMBIENT_TEMP: From 5fc5259964c272f25ae3f33f58e8e3710f7bdcba Mon Sep 17 00:00:00 2001 From: Vladislav Pejic Date: Tue, 15 Apr 2025 13:16:18 +0200 Subject: [PATCH 0043/2553] drivers: sensor: adxl362: FIFO mode from DT Adds support for setting FIFO mode from DT. Signed-off-by: Vladislav Pejic --- .../eval_adxl362_ardz.overlay | 4 +++ drivers/sensor/adi/adxl362/adxl362.c | 6 ++-- drivers/sensor/adi/adxl362/adxl362.h | 11 +++--- drivers/sensor/adi/adxl362/adxl362_stream.c | 3 +- dts/bindings/sensor/adi,adxl362.yaml | 35 ++++++++++++++++++- include/zephyr/dt-bindings/sensor/adxl362.h | 28 +++++++++++++++ 6 files changed, 79 insertions(+), 8 deletions(-) create mode 100644 include/zephyr/dt-bindings/sensor/adxl362.h diff --git a/boards/shields/eval_adxl362_ardz/eval_adxl362_ardz.overlay b/boards/shields/eval_adxl362_ardz/eval_adxl362_ardz.overlay index d5b63252656..777730ccf7e 100644 --- a/boards/shields/eval_adxl362_ardz/eval_adxl362_ardz.overlay +++ b/boards/shields/eval_adxl362_ardz/eval_adxl362_ardz.overlay @@ -4,6 +4,8 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include + &arduino_spi { status = "okay"; @@ -12,6 +14,8 @@ reg = <0x0>; spi-max-frequency = ; int1-gpios = <&arduino_header 8 GPIO_ACTIVE_HIGH>; + fifo-mode = ; + fifo-watermark = <0x80>; status = "okay"; }; }; diff --git a/drivers/sensor/adi/adxl362/adxl362.c b/drivers/sensor/adi/adxl362/adxl362.c index a18028ac937..27d6b3b04e8 100644 --- a/drivers/sensor/adi/adxl362/adxl362.c +++ b/drivers/sensor/adi/adxl362/adxl362.c @@ -717,7 +717,7 @@ static int adxl362_chip_init(const struct device *dev) } /* Configures the FIFO feature. */ - ret = adxl362_fifo_setup(dev, ADXL362_FIFO_DISABLE, 0, 0); + ret = adxl362_fifo_setup(dev, config->fifo_mode, config->water_mark_lvl, 0); if (ret) { return ret; } @@ -821,7 +821,7 @@ static int adxl362_init(const struct device *dev) ADXL362_SPI_CFG, 0U); \ RTIO_DEFINE(adxl362_rtio_ctx_##inst, 8, 8); -#define ADXL362_DEFINE(inst) \ +#define ADXL362_DEFINE(inst)\ IF_ENABLED(CONFIG_ADXL362_STREAM, (ADXL362_RTIO_DEFINE(inst))); \ static struct adxl362_data adxl362_data_##inst = { \ IF_ENABLED(CONFIG_ADXL362_STREAM, (.rtio_ctx = &adxl362_rtio_ctx_##inst, \ @@ -832,6 +832,8 @@ static int adxl362_init(const struct device *dev) .power_ctl = ADXL362_POWER_CTL_MEASURE(ADXL362_MEASURE_ON) | \ (DT_INST_PROP(inst, wakeup_mode) * ADXL362_POWER_CTL_WAKEUP) | \ (DT_INST_PROP(inst, autosleep) * ADXL362_POWER_CTL_AUTOSLEEP), \ + .fifo_mode = DT_INST_PROP_OR(inst, fifo_mode, ADXL362_FIFO_DISABLE), \ + .water_mark_lvl = DT_INST_PROP_OR(inst, fifo_watermark, 0x80), \ IF_ENABLED(CONFIG_ADXL362_TRIGGER, \ (.interrupt = GPIO_DT_SPEC_INST_GET_OR(inst, int1_gpios, { 0 }),)) \ }; \ diff --git a/drivers/sensor/adi/adxl362/adxl362.h b/drivers/sensor/adi/adxl362/adxl362.h index 1959833e15f..037125c4db6 100644 --- a/drivers/sensor/adi/adxl362/adxl362.h +++ b/drivers/sensor/adi/adxl362/adxl362.h @@ -12,6 +12,7 @@ #include #include #include +#include #define ADXL362_SLAVE_ID 1 @@ -84,10 +85,10 @@ #define ADXL362_FIFO_CTL_FIFO_MODE(x) (((x) & 0x3) << 0) /* ADXL362_FIFO_CTL_FIFO_MODE(x) options */ -#define ADXL362_FIFO_DISABLE 0 -#define ADXL362_FIFO_OLDEST_SAVED 1 -#define ADXL362_FIFO_STREAM 2 -#define ADXL362_FIFO_TRIGGERED 3 +#define ADXL362_FIFO_DISABLE ADXL362_FIFO_MODE_DISABLED +#define ADXL362_FIFO_OLDEST_SAVED ADXL362_FIFO_MODE_OLDEST_SAVED +#define ADXL362_FIFO_STREAM ADXL362_FIFO_MODE_STREAM +#define ADXL362_FIFO_TRIGGERED ADXL362_FIFO_MODE_TRIGGERED /* ADXL362_REG_INTMAP1 */ #define ADXL362_INTMAP1_INT_LOW (1 << 7) @@ -188,6 +189,8 @@ struct adxl362_config { uint8_t int2_config; #endif uint8_t power_ctl; + uint8_t fifo_mode; + uint16_t water_mark_lvl; }; struct adxl362_data { diff --git a/drivers/sensor/adi/adxl362/adxl362_stream.c b/drivers/sensor/adi/adxl362/adxl362_stream.c index 453ed334348..5997ce11025 100644 --- a/drivers/sensor/adi/adxl362/adxl362_stream.c +++ b/drivers/sensor/adi/adxl362/adxl362_stream.c @@ -107,7 +107,8 @@ void adxl362_submit_stream(const struct device *dev, struct rtio_iodev_sqe *iode } if (fifo_mode == ADXL362_FIFO_DISABLE) { - fifo_mode = ADXL362_FIFO_STREAM; + LOG_ERR("ERROR: FIFO DISABLED"); + return; } if (en_temp_read == 0) { diff --git a/dts/bindings/sensor/adi,adxl362.yaml b/dts/bindings/sensor/adi,adxl362.yaml index a173375adb7..e79d8844490 100644 --- a/dts/bindings/sensor/adi,adxl362.yaml +++ b/dts/bindings/sensor/adi,adxl362.yaml @@ -1,7 +1,20 @@ # Copyright (c) 2018, NXP # SPDX-License-Identifier: Apache-2.0 -description: ADXL362 3-axis SPI accelerometer +description: | + ADXL362 3-axis SPI accelerometer + When setting the accelerometer DTS properties and want to use + streaming funcionality, make sure to include adxl362.h and + use the macros defined there for fifo-mode and fifo-watermark properties. + + Example: + #include + + adxl362: adxl362@0 { + ... + fifo-mode = ; + fifo-watermark = <0x80>; + }; compatible: "adi,adxl362" @@ -27,3 +40,23 @@ properties: Enter Wake-Up mode when inactivity is detected, reenter Measurement mode when activity is detected. Only applies for Linked and Loop mode, ignored otherwise. + + fifo-mode: + type: int + description: | + Accelerometer FIFO Mode. + 0 # ADXL362_FIFO_MODE_DISABLED + 1 # ADXL362_FIFO_MODE_OLDEST_SAVED + 2 # ADXL362_FIFO_MODE_STREAM + 3 # ADXL362_FIFO_MODE_TRIGGERED + enum: + - 0 + - 1 + - 2 + - 3 + + fifo-watermark: + type: int + description: | + Specify the FIFO watermark level in frame count. + Valid range: 0 - 511 diff --git a/include/zephyr/dt-bindings/sensor/adxl362.h b/include/zephyr/dt-bindings/sensor/adxl362.h new file mode 100644 index 00000000000..0a5066483ca --- /dev/null +++ b/include/zephyr/dt-bindings/sensor/adxl362.h @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2025 Analog Devices Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_ADI_ADX362_H_ +#define ZEPHYR_INCLUDE_DT_BINDINGS_ADI_ADX362_H_ + +/** + * @defgroup ADXL362 ADI DT Options + * @ingroup sensor_interface + * @{ + */ + +/** + * @defgroup ADXL362_FIFO_MODE FIFO mode options + * @{ + */ +#define ADXL362_FIFO_MODE_DISABLED 0x0 +#define ADXL362_FIFO_MODE_OLDEST_SAVED 0x1 +#define ADXL362_FIFO_MODE_STREAM 0x2 +#define ADXL362_FIFO_MODE_TRIGGERED 0x3 + +/** @} */ + +/** @} */ + +#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_ADI_ADX362_H_ */ From 1d7a095779b13d59071e41060160ca687b4d7f10 Mon Sep 17 00:00:00 2001 From: Michael Hope Date: Mon, 21 Apr 2025 11:41:26 +0000 Subject: [PATCH 0044/2553] soc: wch: move from qingke-v2 to the more specific qingke-v2a The CH32V003 CPU is a QingKe V2A while others in the CH32V00x series use the QingKe V2C. Prepare for adding support for the CH32V006 moving to the more specifc qingke-v2a, moving some cases of SOC_CH32V003 actually meaning SOC_FAMILY_QINGKE_V2A. Signed-off-by: Michael Hope --- drivers/timer/Kconfig.wch_ch32v00x | 2 +- dts/riscv/wch/ch32v0/ch32v003.dtsi | 2 +- dts/riscv/wch/{qingke-v2.dtsi => qingke-v2a.dtsi} | 0 modules/hal_wch/CMakeLists.txt | 2 +- soc/wch/ch32v/soc.yml | 2 +- 5 files changed, 4 insertions(+), 4 deletions(-) rename dts/riscv/wch/{qingke-v2.dtsi => qingke-v2a.dtsi} (100%) diff --git a/drivers/timer/Kconfig.wch_ch32v00x b/drivers/timer/Kconfig.wch_ch32v00x index 744d54c2c0d..6f5bc1e19ea 100644 --- a/drivers/timer/Kconfig.wch_ch32v00x +++ b/drivers/timer/Kconfig.wch_ch32v00x @@ -3,6 +3,6 @@ config CH32V00X_SYSTICK bool "CH32V00X systick timer" - depends on SOC_CH32V003 || SOC_SERIES_QINGKE_V4C + depends on SOC_SERIES_QINGKE_V2A || SOC_SERIES_QINGKE_V4C default y depends on DT_HAS_WCH_SYSTICK_ENABLED diff --git a/dts/riscv/wch/ch32v0/ch32v003.dtsi b/dts/riscv/wch/ch32v0/ch32v003.dtsi index 0050307d9af..12f5305ff53 100644 --- a/dts/riscv/wch/ch32v0/ch32v003.dtsi +++ b/dts/riscv/wch/ch32v0/ch32v003.dtsi @@ -7,7 +7,7 @@ #include #include -#include +#include #include #include #include diff --git a/dts/riscv/wch/qingke-v2.dtsi b/dts/riscv/wch/qingke-v2a.dtsi similarity index 100% rename from dts/riscv/wch/qingke-v2.dtsi rename to dts/riscv/wch/qingke-v2a.dtsi diff --git a/modules/hal_wch/CMakeLists.txt b/modules/hal_wch/CMakeLists.txt index ad16ad6c62b..c2ce8abc3b8 100644 --- a/modules/hal_wch/CMakeLists.txt +++ b/modules/hal_wch/CMakeLists.txt @@ -1,3 +1,3 @@ -if(CONFIG_SOC_CH32V003 OR CONFIG_SOC_SERIES_QINGKE_V4C) +if(CONFIG_SOC_SERIES_QINGKE_V2A OR CONFIG_SOC_SERIES_QINGKE_V4C) zephyr_include_directories(${ZEPHYR_HAL_WCH_MODULE_DIR}/ch32v003fun .) endif() diff --git a/soc/wch/ch32v/soc.yml b/soc/wch/ch32v/soc.yml index a019651b5dc..15d953a849e 100644 --- a/soc/wch/ch32v/soc.yml +++ b/soc/wch/ch32v/soc.yml @@ -4,7 +4,7 @@ family: - name: ch32v series: - - name: qingke-v2 + - name: qingke-v2a socs: - name: ch32v003 - name: qingke-v4c From 02f85b253a16f71176d8e4995d801ac464a14633 Mon Sep 17 00:00:00 2001 From: Michael Hope Date: Mon, 21 Apr 2025 14:15:46 +0000 Subject: [PATCH 0045/2553] drivers: clock_control: fix the CH32V00x clock definitions Some time during the initial review, the CH32V003 clock definitions were exended to include clocks from the CH32V20x and CH32V30x series. As the CH32V20x series now has a separate clocks include, remove the non-existent clocks. While there, drop the 'A' prefix to match the register names in the CH32V00X reference manual. Also add the USART2 clock that's present in the CH32V00x series. Signed-off-by: Michael Hope --- .../dt-bindings/clock/ch32v00x-clocks.h | 46 ++++++++----------- 1 file changed, 20 insertions(+), 26 deletions(-) diff --git a/include/zephyr/dt-bindings/clock/ch32v00x-clocks.h b/include/zephyr/dt-bindings/clock/ch32v00x-clocks.h index 128e370e611..8c144533f86 100644 --- a/include/zephyr/dt-bindings/clock/ch32v00x-clocks.h +++ b/include/zephyr/dt-bindings/clock/ch32v00x-clocks.h @@ -7,36 +7,30 @@ #ifndef __CH32V00X_CLOCKS_H__ #define __CH32V00X_CLOCKS_H__ -#define CH32V00X_AHB_PCENR_OFFSET 0 -#define CH32V00X_APB2_PCENR_OFFSET 1 -#define CH32V00X_APB1_PCENR_OFFSET 2 +#define CH32V00X_HB_PCENR_OFFSET 0 +#define CH32V00X_PB2_PCENR_OFFSET 1 +#define CH32V00X_PB1_PCENR_OFFSET 2 #define CH32V00X_CLOCK_CONFIG(bus, bit) (((CH32V00X_##bus##_PCENR_OFFSET) << 5) | (bit)) -#define CH32V00X_CLOCK_DMA1 CH32V00X_CLOCK_CONFIG(AHB, 0) -#define CH32V00X_CLOCK_SRAM CH32V00X_CLOCK_CONFIG(AHB, 2) -#define CH32V00X_CLOCK_FLITF CH32V00X_CLOCK_CONFIG(AHB, 4) -#define CH32V00X_CLOCK_CRC CH32V00X_CLOCK_CONFIG(AHB, 6) -#define CH32V00X_CLOCK_USB CH32V00X_CLOCK_CONFIG(AHB, 12) +#define CH32V00X_CLOCK_DMA1 CH32V00X_CLOCK_CONFIG(HB, 0) +#define CH32V00X_CLOCK_SRAM CH32V00X_CLOCK_CONFIG(HB, 2) -#define CH32V00X_CLOCK_AFIO CH32V00X_CLOCK_CONFIG(APB2, 0) -#define CH32V00X_CLOCK_IOPA CH32V00X_CLOCK_CONFIG(APB2, 2) -#define CH32V00X_CLOCK_IOPB CH32V00X_CLOCK_CONFIG(APB2, 3) -#define CH32V00X_CLOCK_IOPC CH32V00X_CLOCK_CONFIG(APB2, 4) -#define CH32V00X_CLOCK_IOPD CH32V00X_CLOCK_CONFIG(APB2, 5) -#define CH32V00X_CLOCK_ADC1 CH32V00X_CLOCK_CONFIG(APB2, 9) -#define CH32V00X_CLOCK_ADC2 CH32V00X_CLOCK_CONFIG(APB2, 10) -#define CH32V00X_CLOCK_TIM1 CH32V00X_CLOCK_CONFIG(APB2, 11) -#define CH32V00X_CLOCK_SPI1 CH32V00X_CLOCK_CONFIG(APB2, 12) -#define CH32V00X_CLOCK_USART1 CH32V00X_CLOCK_CONFIG(APB2, 14) +#define CH32V00X_CLOCK_AFIO CH32V00X_CLOCK_CONFIG(PB2, 0) +#define CH32V00X_CLOCK_IOPA CH32V00X_CLOCK_CONFIG(PB2, 2) +#define CH32V00X_CLOCK_IOPB CH32V00X_CLOCK_CONFIG(PB2, 3) +#define CH32V00X_CLOCK_IOPC CH32V00X_CLOCK_CONFIG(PB2, 4) +#define CH32V00X_CLOCK_IOPD CH32V00X_CLOCK_CONFIG(PB2, 5) +#define CH32V00X_CLOCK_ADC1 CH32V00X_CLOCK_CONFIG(PB2, 9) +#define CH32V00X_CLOCK_TIM1 CH32V00X_CLOCK_CONFIG(PB2, 11) +#define CH32V00X_CLOCK_SPI1 CH32V00X_CLOCK_CONFIG(PB2, 12) +#define CH32V00X_CLOCK_USART2 CH32V00X_CLOCK_CONFIG(PB2, 13) +#define CH32V00X_CLOCK_USART1 CH32V00X_CLOCK_CONFIG(PB2, 14) -#define CH32V00X_CLOCK_TIM2 CH32V00X_CLOCK_CONFIG(APB1, 0) -#define CH32V00X_CLOCK_TIM3 CH32V00X_CLOCK_CONFIG(APB1, 1) -#define CH32V00X_CLOCK_WWDG CH32V00X_CLOCK_CONFIG(APB1, 11) -#define CH32V00X_CLOCK_USART2 CH32V00X_CLOCK_CONFIG(APB1, 17) -#define CH32V00X_CLOCK_I2C1 CH32V00X_CLOCK_CONFIG(APB1, 21) -#define CH32V00X_CLOCK_BKP CH32V00X_CLOCK_CONFIG(APB1, 27) -#define CH32V00X_CLOCK_PWR CH32V00X_CLOCK_CONFIG(APB1, 28) -#define CH32V00X_CLOCK_USB CH32V00X_CLOCK_CONFIG(APB1, 23) +#define CH32V00X_CLOCK_TIM2 CH32V00X_CLOCK_CONFIG(PB1, 0) +#define CH32V00X_CLOCK_TIM3 CH32V00X_CLOCK_CONFIG(PB1, 2) +#define CH32V00X_CLOCK_WWDG CH32V00X_CLOCK_CONFIG(PB1, 11) +#define CH32V00X_CLOCK_I2C1 CH32V00X_CLOCK_CONFIG(PB1, 21) +#define CH32V00X_CLOCK_PWR CH32V00X_CLOCK_CONFIG(PB1, 28) #endif From 87ecedf265aa63f42dc2051d809304d944523b29 Mon Sep 17 00:00:00 2001 From: Andrej Butok Date: Tue, 22 Apr 2025 14:59:46 +0200 Subject: [PATCH 0046/2553] doc: interrupts: fix Direct ISR code example - Fixes Direct ISR code example. - Deletes the wrong comment, which was likely copy-pasted from the previous ISR code example. Signed-off-by: Andrej Butok --- doc/kernel/services/interrupts.rst | 1 - 1 file changed, 1 deletion(-) diff --git a/doc/kernel/services/interrupts.rst b/doc/kernel/services/interrupts.rst index f598d4ba838..0053b019618 100644 --- a/doc/kernel/services/interrupts.rst +++ b/doc/kernel/services/interrupts.rst @@ -336,7 +336,6 @@ The following code demonstrates a direct ISR: #define MY_DEV_IRQ 24 /* device uses IRQ 24 */ #define MY_DEV_PRIO 2 /* device uses interrupt priority 2 */ - /* argument passed to my_isr(), in this case a pointer to the device */ #define MY_IRQ_FLAGS 0 /* IRQ flags */ ISR_DIRECT_DECLARE(my_isr) From 0b3e9abbff74aa0b55046b029b062940f51578b4 Mon Sep 17 00:00:00 2001 From: Andrej Butok Date: Wed, 23 Apr 2025 14:11:59 +0200 Subject: [PATCH 0047/2553] sys: ring_buffer: fix possible ring_buf_put_claim/get_claim wrong size - The issue is caused by the MIN() macro, which expands to (a)<(b)?(a):(b), where ring_buf_space_get()/ring_buf_size_get() is used as 'b' and is evaluated twice. The issue occurs when the (a)<(b) condition evaluates such that (b) is selected, but the value of (b) changes between evaluations, resulting in a possibly larger value than (a). - Fixes the potential incorrect behavior by storing the result of ring_buf_space_get()/ring_buf_size_get() in a variable before using it in the MIN macro. Signed-off-by: Andrej Butok --- include/zephyr/sys/ring_buffer.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/include/zephyr/sys/ring_buffer.h b/include/zephyr/sys/ring_buffer.h index 2c75cf1eb84..76c97107610 100644 --- a/include/zephyr/sys/ring_buffer.h +++ b/include/zephyr/sys/ring_buffer.h @@ -304,8 +304,9 @@ static inline uint32_t ring_buf_put_claim(struct ring_buf *buf, uint8_t **data, uint32_t size) { + uint32_t space = ring_buf_space_get(buf); return ring_buf_area_claim(buf, &buf->put, data, - MIN(size, ring_buf_space_get(buf))); + MIN(size, space)); } /** @@ -385,8 +386,9 @@ static inline uint32_t ring_buf_get_claim(struct ring_buf *buf, uint8_t **data, uint32_t size) { + uint32_t buf_size = ring_buf_size_get(buf); return ring_buf_area_claim(buf, &buf->get, data, - MIN(size, ring_buf_size_get(buf))); + MIN(size, buf_size)); } /** From 4f6d0c19105f1882fdd24abe5b9769cafc3cc7df Mon Sep 17 00:00:00 2001 From: Erik Tamlin Date: Tue, 15 Apr 2025 10:26:29 +0200 Subject: [PATCH 0048/2553] doc: tracing: Added Percepio View section Added Percepio View section to documentation. Signed-off-by: Erik Tamlin --- doc/services/tracing/index.rst | 32 ++++++++++++++++++ doc/services/tracing/percepio_view.webp | Bin 0 -> 44160 bytes .../tracing/percepio_view_user_event.webp | Bin 0 -> 19310 bytes 3 files changed, 32 insertions(+) create mode 100644 doc/services/tracing/percepio_view.webp create mode 100644 doc/services/tracing/percepio_view_user_event.webp diff --git a/doc/services/tracing/index.rst b/doc/services/tracing/index.rst index 61ac2e790ea..3f61d93efb0 100644 --- a/doc/services/tracing/index.rst +++ b/doc/services/tracing/index.rst @@ -361,6 +361,38 @@ Learn more about how to get started in the `Tracealyzer Getting Started Guides`_ .. _Tracealyzer Getting Started Guides: https://percepio.com/tracealyzer/gettingstarted/ +Percepio View for Zephyr +======================== +Percepio View is a free-of-charge tracing tool based on `Percepio Tracealyzer`_, intended for +debugging and verification of Zephyr applications. + +.. figure:: percepio_view.webp + :align: center + :alt: Percepio View + :figclass: align-center + :width: 80% + +Percepio View can be used side-by-side with a traditional debugger and complements your debugger +by visualising the real-time execution of threads, ISRs, syscalls and your own “User Events”. + +.. figure:: percepio_view_user_event.webp + :align: center + :alt: Percepio View User Events + :figclass: align-center + :width: 80% + + +To learn more about Percepio View, how to get started and upgrade options, check out +`Percepio's product page +`_. + +Percepio View provides snapshot tracing, meaning the data is stored to a ring-buffer in target RAM +and is saved to host using the regular debugger connection. +For trace streaming support, Percepio offers (paid-for) upgrades to Percepio Profile or +Percepio Tracealyzer. No modifications of the Zephyr source code are needed, only enabling the +TraceRecorder library in Kconfig. Percepio View runs on Windows and Linux hosts. + + SEGGER SystemView Support ========================= diff --git a/doc/services/tracing/percepio_view.webp b/doc/services/tracing/percepio_view.webp new file mode 100644 index 0000000000000000000000000000000000000000..a48d5b88db860c7b8599d9cfa4a0a1e3923c9d32 GIT binary patch literal 44160 zcmd3NV~;KjtnJvgZQHiB$F^ZE$9~Rx@A(raX+QK!(Kp1b(<2LZq5|5pVN3kCFF&P1Ly zKtKxyAbG$vM4IrLOYtsIN~zTN5^U^5o>^ z%kEgmxNcvvYNZ@3=01^fapidPxocTx4{R& ze83=}?iKuZ`N!j@;KEza~8G z*Y}?a2npr|_yBfqVFBHnK3^JN_W=Fl{fYjm0KgC6y$dk?mGyA_v;Nz0H{aR;Ffc>} z{1y@dJ~uyKep#0hgZHEUi_YtpbqPS6U-AQZll`*js94Gu=NW$OSh+tB2om)BS)bp3 zB|H$M`=R^>yb8Vo_5h1Mq5ft+pg#?7ijM?m0oY%n0MNld$^auk#&<#^W4)jnVDy*s z#~{_st@y>PXs8bO0@S_3{YL$QE~fwhzXiejJ^cW{`#0b3 zzW@N>&WQfyFBDIIqHroXOp*TAgLp05>jJKL3@`joYRuZ622dzeJLcaNqaJ7Rck~)Dc*8=qtj6W@+RGeh&?%agT*LN^e9}r~v>d;FUW1-Qk;F3RE$o>McU% zeFbV^&uaDP-+J_cu?ZFpyjrIEvavw=OPGa^fG;;%jHEy@%2pu;eXJYSUQg$2Cqgf^ zC*YaDdP?}RLAxI|=Xn#`u-5-u$s8tvuqcFI&o2Db1yg&EP+SV{z|S65v!%Mqd8+0K zkM~U^&}Vb?2SF4$Dk6s+A_r)1Lk&|)X|Zq3F(vtRsM2whUSP<>(^1iP6dNzFt)lU9 zR4U|r#3*V!H8loOZD7uAM;)VAov+1T)y)+JS4_^s_ek`D*7V0-BEe=XL0v(RHV0_f zt<+YSnsZ2t`Y9Z>E~t*AX!Sl#_nqSyh^;om;GS&TB>W1Te_@sDS=w+&4fZa+4aouF z>L&MR0W@lklg}LMOv7g>SKcL1Xid=2?Ibm|(P3iNn~$2-w~1d(TKnqs0VTa(#nBi| z3TQtDfX3nKg!*jk=8k)6>+J_*$1TP0S7AgGf$Lo;9v@qzmvlS3!plx;VV520+P9;P zszFloO)QU{TQotX$1=z&wKby);WmPqXj*EV94C!VwU=uzvGiw|EhhUm6yV#f+7>-M ztx5j)|4VI^ss@(xcnZSQg&^!Zey*pQz)ihOlqNf+@wbo13PAaYqLL6#2LwX)xOY3n zB&1;&KonB*0fuidLA2{=x@IQhoTVA`aA=7Kf*b_q+e(p8Md9Zp#d;krTp;zv7MRGf zo7G7ACLGrOP}h$g{7%6d5T(5_dK_2%_LDP0)!saI@2)(jQ0()+F0XzC8&6QkXlqBV zuJv{tAI2T`G-H{sNLO-?U#r@>$LpjE3zZ0Xfqg{KQb|D?>MGWwVK^Pv!63G*=5<;G8<{HoY=r#qRB^#)4FPU z93sXd`#gL-p!@>k@IU6BreO?^LTSN`t1SW@KZ#xlqZuHS;r{7|#!LxgsIo~SCZYn? z8Z0TYxymzP2-29xdy5q6aZ~C6SaI42e$w~qfqXU!dD{`1#lgwHCy&f@bkP%y^{?XL ztU@gj7|x%ys`=v^6Ucof0x{M z^3pPYb2Z5fPUtwxfb9-3*qCg9=Y|NJ%DRyi`RT9`@KN66VV8Ldw?yefwwCe$@LQ7( zI(&UpsOY_$1-dG5pGS!nYsW0iAPlpR>XwC(P!wr?C7i#W>?lRXXRp=;{*N}(6>>4z zs<%LDUi@&)=L8vT5==)CKc#Rx(+A?~e;t6H_eT4BshgTJrep1tm+E$LYyuT zM(-U&{;p+rIgS7H2pOJDH1aAj%$oQAo-{&A)Rjyguhd=gc!i{zk`GkWkCU+9*pV$_ zDo|p{wu-4wt#BuG4I4Tz$-vNx5P&w#;2(7uJ1lE0A9);U=$xc*U}u5ng5^jtDTN_m zF#V2-f>=AB#YTB^;#{9R7se&KCOE0;`M}85g`ePONzotV+V1%%Xhpur)4Q*7cnpiu zpG_`jpb?z&8rOQ)pX^z*`6z;rq(A>8Q$KY;JS`o}!XRDq{~QXzGbGwrbUe&m^~CW` zOC9sT9sxN$n10NYtpq!Z!!!LT4CwGV#T<Wt2KmJK@2xE@PzS%^C%Iz zIb-YEm!Z~iy>Hz7;VJi-CS_k~P?o!d#7*=}mLli1&7O48bW2x4?y*VNkfpL+ByLDv z6@(BA$cX-B?&-PCY~u9l0Dd2P;@~nHZhO?u;Y^g@9( zMNy`krw2rorRGK}F?pt7B6|b|qL{}!$rk6z8fO`9^NH4@!7gxmfdguy37%=0q{oAH zZ6Y6+i6K8Pp>TMZZ8CNsJOZI`lB+R5$D&aaVTC^zC-iD?eeoNk5RaVmhU(mu@p~L% zuvtnGLV93|&9-@>sCPCz=$oSGaiFbUAQ)lI_Z=l@|3Vl1@@h zhE;Dv6tl#S?C0*1ojW`Tm}WQit;BYc=E^}3p2^msr1`q!vXGok@$D21(#@HHk#5f(B|0P-y27I z2O$)gc(0>5z_{)#vBe09Jtf7Pg;8mMLvnvLiM$}uH(6YSAIinm zU}(hqUGmVaqL|(7%$0oKbBCI^jj6MjKOJm%w!YE8HPaNhRS6aQD9W90)^aSd&Dwc? zImcqp%9==uCfDFG&Tb_z*plTjz@ri;qwjeekpWt7hfO@&%(q8_J7;4<$a4r)RYFbe z1`1~Q=$){?nO z{z8$%JmN-?%!p701Oz{XD5Eq~6mtTezGBAlMvqet_ptoNp6?J!ztG-}aruqxdpgHBuoc}?`Fs#F6doTglJ0eFoFL8tz0k+3W-c% ziv>|;e`9?M6|sNMraz1vuMlP0-(W58V_C7irn_ndO&jL%$W|I4#^p2>rE|{3srWCc zv3nbQH3ph6HI5|t883E5>&lxHq&G{Y!mGW&ys?Uxzy$%#=yT6lXo@6l;epUs+2^p+ zBWx_A(%Pejv=nK!Z@!yE@UqAVspE}x9)d0=gENloaavM&e|9nDo0Aj%!@dD)Ayrys zlfuxV0+W}#n;2+&el#kST1C)zCV#!D8^{oG#wt%_{?^$5aZK-)sZ6;14rTF3giyGM zi4s4=_+0B78GM%;o(gd_io@_gSth%DM(I8L)Hz_uTMbvhr@TErxy`IX0MSDu`8X1A zSa_{iFARW4>~#u1(?z(c7h-NLs79!F^<(pr6OAx_kJ_~_EzUHZmnXV^NH}nrBBT0f zRlfxx2~IMGZF!Cg>Dt*J+aY;X`{6{=NQ1bBnqu~o@s*_rQ72;n4^g&c>;vVF>DO^r z?T$p!)|QtO4|6kT$#RD4qJtNxc*geMPYo#7qjOFFQA#3~WyAkgrm?dRfHmGD0|jZA zuaTq{LPzQBY6_)1Z&9(I8TdjSV3;;ZGyM}B1@II;z0Lij+2F?!iH03(c7uq2Vv^`o zaY?d>I?FINstkK~2?f_jj+0`yS%eJv&bma6_eXrjBI*j17sEzLA*kVOgr~pe;u;ap zhvgBpdjkIDR|we&k{1w4T$Eu6v1~cXcK2CC>Rb1Vr$0eRl=-y>djVZttZ%@ zuf2=iyUHoiSyN(SEFDp#Vsp58jRiJzel^JGG_%e-d-EYh8H+H$wGIi^3&QqzdJ-c4 z>#`drq%Ts0&AaZHr6V>Ds84~9t7^2FTmJs`=Y-&{(exFc2mJxA$nDVTIL#Z?Pdj?(U+LX%BSQ z$ZzMCQTV8+TdfxGBgt<~Hy<6hX6KbU2J5rrD8aR*zkpp7!Hw2QpHcN`fVKmzb%0$q zTfuAKQ;pZfS-uaNEcmiAV4I>xa-8WgT zgR27iqJZ`3z{o>C%9Tphost1iaQhrKATzkoKw%aJ&k=^EmJ!UD^ zfM5jPaLftn%e8CCQ7=PLbJ`X5Q26^#Rq`!lU@KMCXf~pGu#Jok+?9}NwAO~TYK4o# zcqRAAu!M$<#vliG-jJi>KC28wIc-Ris1axlzN6}`gamUsD-+vbVE!oOM+z*am)ejFh)e3Y>3 ze*j}WSIczBF!pOxl5e|bOf^T6n`djsZk*T5$gjuju!bImE!})j1F%BmGwzx7aCk<~ zt(?(aTtx5NV?;vM=Q2$czm8eZZ*iN>wMnO$*F0FQoE<^}*xD^4l%)@e=Ia@ccZ0zk z10L)(6w!}=`a|UBI$hR(8O<^p%;cQAhx!OrF`q+t4)s{bzkGoNW*OSZ&dQoPnAOZ% zQB@c-%bV2IZ9Gd@v!%%{#J)T0zMwWk90kOhXT971(K!o$-j=NuP9*+@a1lW!#>82R z`jvOXxjt4_6x^Ds?|R&sJz*u0KT*P@@=umH#+*~+n?<7oYZ3v=qNp;Jsh2?ijXkpG ztqT|KZLDT!E-LXWDHDKLK_3+nZn}E<7vE@AoxeTB{RU7~@RWtAI4gycEwZH{Naf@VJU4dU{;rojppE$c7(e^E796R?+@0@akqsD5ePmoh?dT^w$M(@+y(p9lJ#x_sp#TL;7cNt@f`Bb4Iw>I=2@ zH87g+jJX0rel@!;a+cC}D+V)+hZ~g5{Y*+&|hkp7LIFh13 zI@MQ5{i`3dxcTR)%{3^(So3e5?-EcL9tr`ukin>H%KQ5!9Nt^+VJaV$;B!ij`jGon zw6TDhe8l7?9R8e$@~J-e^@tjrj>0HmV|nR@kXw&c+xYOjv6i^Se?u}=&wSWl&{iva zm}uaRExV@Q%g^2$O6+2o3y^n@Wf8v9FF18KS1?;Kb!3Z!x{Owt>He$C()GHA)oLX2 zfQy3e4@mi)**-$VW6+hmg-9~1pQRJNya79Rsf5eFDA0)Ypk>j&LM75Lf{oZD+>@sEQuR}qb)?Aoh&mdSAYF%f90N2RIs$Uwie}O zxj|!(6jG=KJmit;|D~G~J{V{S(}#}xi=h>Y6~G#f^JVbJ-7SQRx`3VWUX)hmjwH&u zCUYH-kLIq$<-bP>RmJD%8`w+>5t~n+47q{2sQ(n?X6GO|57aQk#+-J>%IkuRIbVK{ z+f=5uwA*h*b5|EaODC)A(WHeNaC?%A>e`s#Ei?WY$c7`<9k)=xm;@OEBP9%GyB0#$zMdz|-x8VFtM0 zdM?N{mp@o{GikJe)-iAQK;f#b04<-{qmHw@v7S3L8E4E&A6I%5&~D`Trt8Q$P%72! zuHEfEIAdjsLs!5S^oB*+pp-n{l_w+K8LD<~Ijz}u%3{B=yU2QPA6@<(k3}*TVGDeb zyJfBDUPEQg>jZxm_su)3rnW(Qp{-jO>58D^u8ZwxWs~3|%#`S_DzI)*%>9=QljuXA zJz0ADuyebZZTVYaBT~}wE?C&_B95Nc9+115bBmM65~tAE$p zfZn1@O%kNX2Zq79*Iws=?vLt{zV2b6t;jmS83rdT(fXvBg3^5ymR6BQWVZ(sZS{o7 zfr2U$5^XyB^-CL5Yf&UZ_3rDoqe$9!^u;)g5FNYa|!e&Muw{CWp_5y|$N+c?5Ii3n~5n6g2_* zr4)SMVNcGGP?jrhzMdUNxe8oP`;z+_1C8d;MS)jiopf`(;Sbb<$2)_8%wIY)y$h0w zv^_ppA663wacKa@H*7j_kFGDT?VxwVXw0S~Q9w37=6^yxjmnQ}K9I)oBrqi4nI}0V zu{WIZ=xk$hTw}11Y1{kuBM@s<0e-LAM6h z)zO>1O-~fh4^NI$;0J>d=6LP7jQvP_I&e8!(Cl&u+Q8Jjfg7Qq--Pm|<#vL087szF z_(vbnLnC4XT0vZuf zu-UUNJH&8@CVV<+{=al5VnC6R;6T<=P0538u|TK`-0e6dxUbPo0;n1+bf_nm)FW@` z+1Sa7lYuzUSCd!DfH7~)ed6%JxFMnR&M66vaAH{O9*RQHIBq@Zyiu)CgDQ=I#$mdK z>**iRnpDyH)O?A)>{Z3UhQ`T^HJ`L&HFnO~Oz zwgwvN6Lwal5^ln`$)9Ovs6Y}Oy?(n3bvR1#I~^_xZ0QFFuKL^dxMVyiydMq`pHGaD zJ)?!l#n*0D(3Q}Fb((M3sO(l)oAie7rO#JDa^9vo`Bg>NOGwCGpQM>D3Tpct_>Ud6 z0v3Mp-P&Y*y}wf1AtPrs!nX4-@VBLP@Wh+)3W15$C+<#Ww0-2*iifFT+#h3pk zQuE(ZnTEAZD6Oie^4+;Pb%mpStUjiQ9qX<+vm_qkL9BwPFT8wKeqzdN+L1<)G3taf zEdjSa*Hlg`M)OjeG-%Hw4;Qtq9dc;TLC(c)mDh|Uh3rYAnvL$x;Jc|UL%;Q%U~J#V#>S1}Y<3AUIL*C{ zfJ*@mSevw?AQ>|_iKM7H`eGZa%MPzRCVI4AIGPDMceEa;0!}ep?7+af{ytN-eh2IH zCvZ!cPgD%yRZJqe56~u&janM(ZUFe2iOuxZ?+8NeB5fUlNYW>Y7$Z%6lhN)pieyh~qd5hz>W~?ZsGIu5&E3a4YgEFSMn= z97Lze%jCju4u*u%<9&dk9gyHRxC7!~HXhW8BTA6RG?bO}RPd9;HOx{V@|swg#y@b@ zhNt(K-0@FS7<+$x(&g(MeD^p{dsz@9k7@|Vd+QQ!P=bEZhMt|JgenYjxDeTVzpWT_8U)twzER zuHcYios#0QK4kRZf;2g)>Ff}4FChxhq6yg6;V_3L`NZ8+-!|!Xu0Y z?5IBuPJWl4S&}`T0;+L6Kp&GlV0Iz>)DAj}vqigj5jU%_-nKFCpsWp6J zN`v}0fomDZ9zx?TG8(P}Wxm`@CN6_5@L~vEM+vS1(2T<9)@6JQxRxqOMi~mNL$0iE zJ8*Suz|Jym!zfmRunTI|Vf#A;aLy76;yIUNoy#a!x9sx71UrYX4;Nu5O*>}u;N9r8 zJrPV<1-DBy1<58aZJ=K69QAA)q2$LlMbHn5ehNl2+7cJ3tRG<<>fhDZKvu=UEX@2- zSJEyDzWMZjB(7Ns>2d69z(Nb65C>p`eTL6^30-#>2U$eN#$l{!o^Aar?#V~H$nO+i zprM$n{agzo!7u`{GtPypm5-T%+s_i1*gG!=w<>w|U-z1%8*>k$QV8TRDHF&`$N^6s z8J#^(rbo#T3lL)?r4tI*MlWk;8&_$JJD}ezhB(sa_!8nc)KED2@x+80G?wA%3r+6dSUkG^Gq`tT!)7UjA^Dv%vdDe2BJ*m2_20DfMW} z&hf-WE9<%3vf3#N4YE5JTDr~g?Q$=dB6#W9v1i#OIoRE-4!->mYYaeU6NL%~45^*+cHWXORDBLH}cow3mqkj zuHr`C-GYfR5s-`EYDhg}!ITVDd;y}u$l+;s=MPw9)z@Ay3_HWJ^ubTJwV z@&_eKF;KOK)}_Bl$psK7oBxnH;x-873512|J@Z@rYyE>U%`tp6x7gda{IupWH*S8Y z{xpo4Pasf%t4U_mr?yETPSuSgV8$^R_nH%q)GHKm7?YqWqXzEHdlcNzBUVRD1+J|KikRQmJX+mng zq##A1;@6ge7YCrE^fZFG^5Uu>)h#=jxePNU>QU99Un}a21RtsFCiPPCHnSw!8H}1( z(IxM(qwO~a4I05AzQsPiU@Q<6e(=5Z7`rN4cZd&>T7eI8Gl|a@W2PQB!aZRGE1)_Z zDy@CbS9%Ah$0s|0{Z=D7fDoK5*Ad~ffe+!ba}sH7=utPGix?IsC&ubsu@pZi8>z~N zD{ke^EkVWC&Xl{mBA@Pn42Q&a_TTWJ9ZSB#VqP@Ql#uvn7ff#LI5q36}p!De>)f9n+z8Ltlx6hRpXw@9`==Mojs zk@9)D(0;Fj%7tJ!O+2BWgnZAosWcUTu8MWcs^SgYDi=wdKU=gU)#060WV#ewU|q7f2y;438xUN4 z+F)?6V*o`0@lP!C8_k#wx)r_a{!nJCnpp0ls%juJkFnKpBEXwWwIUpnlX~Td*|B|iW+wT z#Eew?RfC12g)Irg^of1j)C2_2#Gf}*oWypn9{Lu)_#~CgA|3-&`rZs52UdwY>t6qA z<@k~7>Af9MVpHNk$?eQD;@lJ5#(BD)y^>o52qIj}60*w5ZzdPt*j7-Ik6_E`kT6`l zpXj;j@cc_cC8~*Y{YR2gthGsKoD3Gia0wDQiOZANEB5p7m$Wt-$JBU& z;+?}j_O7(R8U%G(&vKV{^au5@E}6aB;5?*$mn`mGu)i$*cvTPimNgX8D|iAC`d~## zIACxut%mO|i2Iu3Kvqny>|jiou0{P`V|c;zmV@7ofHD;s=OdU98aH>gtixqGgVBp_ z)U#jLh7r>|%70`q?N|%*i#w`9lKuM5>HT(lkyXVT%;u(pb3$R#cFCPY?mmvStfuYT zBYd+#lMAnOz_&3zvl;p9?)vaAjgK7&&`M#*jzTO13_F^>?jY+Ezkm;Imgqu8vo6K- zi)7@rm-b)!zF;gy5#3NkR+5(Ux=DjMX<2YRM2vh`6&_*NUj)e10;k0Oz)P@r=Y^f5 zZ)?WRx9;4PWZScII~=v6s*g)Lxa`$Og!kqr!1DNV0w$u()*tqeZ6)xM9ZcJY48zVg zqNd|v_oAtDP3_ItY?YejW+~G;5 zyq*dj4^N`oS=#pRQ|M7>#-@!V8q@X3)#T1S=fC5w z7jvrFK+^|r(oSM?{uK|Go;u^^(BUB#7NQ_Y|BX@oiG}PtxG23k?h$Huz!;=P=v-=x zhoh-c$BsUuWTWPiv${g||I0A8g1S@{d%F)3Q@>rQ;nh0+zSW}D?$Ohzy~Glu36xIW zbv#W}beUKuJpt>(@f!>}{5_sYN#qg%D7Qo>G#G@+$;xJe#2p{67_Rcm0JaD(j3M>0 zQd^p;HKgzxc{JJ_dRg?t1kZo{_(&j~=*Ov#h(`m*7uKHhf`wl}SJOTtB%Qt|v5ji+ zhrBqpBIuTRM0Dm1`4ZlA9btCxxIwgzZQEy`zN;Cb?g(@V^URsMS;L6oAy*L#^@*=f z)+1+yhi^$CeeiQwg1S4H9~-=gsTBwam)?8!Nh?X4R_`K+TQe&$!ln7V+tXFIE1+n?H`kwk{^tk+q3BZ zH52P3X{DR&DlJimGZTbRp=0Za*~ir9fF|BUJkjFSR0y)Yj|D{xbg+znFJ7c*eRAI! zZiL8yXa-7jkxgpP8v73-H_U+gKBSX^{&~+QK2HZ2!hCEgt3+y7a-X*FDOd#nST?pT6b zNjfw_Z$^Xdo^rp89QgkRR3IRt#ji|B5vEK+Y#V0XxlI9gs-jTnn$QVg(+%I70#?r` z7_3K&Q=V)cH*jdzj0546OR{kZ92$8Ea9(W^hBiTy1S1433$H<4bi6jDU3_sYvC?@Pli5zwJ9`n9@%g!Fl}k+6mFA28;uSe z=J4Ic?hFRqiBfih?lq3q0P-xrQR-|^=lX5SjUmcWhoD%I8QC}CQobj6D2yVuE3wKEz3Kf(lZX1^PA`E-9dHo??Q- z2~!UPCVc3IoCS|a|64@y{$93;gzoI;RjP~ZO>(m^EbP}8ljo{BD56IO#8J%MqJ(p3 z2JO-p@4+C+soTF<~7h9lP5;0qt_!wMVH1|M-F)(_IaVA)9Izrx%HI^p89o(^iY`NQX? zNY%@i0777bPuygDHa27AVAO^ncTM0`k?KTp)sxU}M@|m~ommf6RM>7DN!H^?VltV& zQ&|J8&QQd>_a%$`Dk*-%{`Bt}f?idm#hiv(r*|=l13G?Q?bv~I@X)Riqc%#7oXwLR z7O5k5x|ZFpJlEH!v!9O1q}){1L+7*?i#2GtOBMoK>ep1c%fJ;nlFsD>a@oD@>Jv-h z6lOYFw`c`0YIsoDuwIKr)CDyoAVg+B4>CTvB#o7}%pJXvWnCeL0l>Tf&=TR(NdFxr z>lYZRe7lHmLz#Xx5nsiJwnb-7CPrz9vI)#jkpm1r7nB zSX%_=(K`ytoH1=qkgK&4;hN2Y+O%&IF$({q7%5)s#a8+;#s04$(BPF%?4@sG+rCK~ zzw>AJI_!GIv)ZGfdqH7Wxw3zDscT)iMFu&XvBtz z>89Ow3-4E09n^jr)>vub8%wlehS!rd^qIzM5fH4{UiMTIDd0_c)3J7u{uS}o@8jZyB zQR@r-#8pDl*)(&;`^Z#Ibm0Q`xJ`Rfcpru%xK=*hiAGS1cnkp2!ZJw0zHp-*! z_XW{8yvp%UZW{O>Szww@;@LjN3eFBS*7&kV=SFrIJ!CCzL^S$}$b#4H#v29oT4a>` zkFaVE#yM!=BR5UAEC}t5k3##LAVezd^M3Z?}UK!aQN(857$><$I zr_ok->_|W2A2$tul4V_AnyZ-BuOZDlclwS!PD##d3eaL8FFx=%Q)c`70o$2pR$tvv zMRP;MoeV~m@v$x zzf@62zbMehI{>GR&BjHAzVi1#?S8By1|I4R^2A!}f4HBu4O&mE z!5>bIR6T#)^l9-H=MGvmDtQ?|OO!m`>sxlSFz-tiD{skzRhr$6jWofsyf3c?!b?X~ z5Srwnt^ZrVv}#al1Mz2@B1d8WGbvs>vs2lr_rSyN_?L}zh7#Om8Jv!88kq`xJ@M4~ zlCKhE?~1Cdji*#x@h>p&i-M)#!>?2*1?@WEugvvTTv;{&W@d9 z_~fD=Sb6Fy$qz;7t#&oMjAbhAXeAK41@9hyO}6)JV@QK6RC4BeTSEPRWez=sJJI}nu)xcA)b4)NBL`R zmr|ZReaa-&+93lBv$zvclc3xo>9c5e%aA~j0Z)1EE zqmULe%Au!*hI_n3x-qOA4^#=!E@2#ljQh9ga&g5m@WzVwgI@M2hHU&HH_E9Hot`vj)686w_Cg?PUd?w7tyQeXip<0gCWS zlX<93s2uP1HyM4$zm^7JeU8396>K}Uy0+{7LI6J-A1f~j33Yg3EHzHwGKTb^gaU`@ zXxr#liCn4kWuH*R#8Qof?f90@pGg)wig5U2)Oc1!r-|C5yIw61;8N)9UTQWS-am}X z<^vtZq%w)ji!|EJ_z=+oD1${}lv=0?`1M3AEzhj^8I}}iT@L@P2QG*}Ps1wAFn0Qf z4@sU%%pd>J-c3QixbCMUJE07P7HZ~i@4F*1RNh<*n~z}E6O{-IA&)!7ugLxm`09_> z8B<9HI>yT&T;XVWBm{b(c;%|%vHdk$_GzYu#+8Q^?t_MbC-BX%Yyr`xlV7DidJA#g zPW0TrpMH2ejg-V0Ybqgu1RDG~toA2IC0=WhpjiYgT% zcK$0d-BBHm6J0KTBbi9JAK#DU3hCq_@*e8T>yv;018Q{HT+Q+MDqTJ)_`L2Se5wr( zVHhnnld;;GDru#4GMIH(@fX5=&?w1}scKR~0hUDUeY5@F<>T%9$N7iqdK59qdhSB* zTH0=40nc&2DJE2w$zMoPul{kr#c25@#VC%C2*#3B0InK^S>{bj6OUs1`}~5B;a!3e zuf(zlS`sMthr>~wV)+9c8%+%uE_GL$<)-A)qY!MLy zW$zCjNoiD>6|m^+o0Vqc7IHC_cW~!Sp{X zX#Bl~bg$j{rS#}Vo3*L5grP0O0NYwbHZ-2YM;<+1YjrwlCBlHt(r2%k)YEN^n1#Tv zhp7;rn{;oo)C)a(`5dQIrIw{(D2nD(p|xxNNNNW!g8Y!ki3KtyvN$lg#SPU%;OQ8|&jD3i1QMkDGjXs%wD{v`BmVfb zn&nV7eMewXT73`V`}tf=m;D7a@UIzc037D2rEGLyyQoHKQacOyE#^~3?0S$#14Iy| zlXaa)PF1d)k+wQT)y;PpIGty?w_Y_@h(KaXX|+6co)X-TiM=0D3rFRlH3| zdgL{8uy5HbR+3wBIOX}{QmXYB@t9-)wNk#5Du?P0KMB88=yRq=u8-JZXxm#@Mm`( z1>nZm&Jr@=jwVPOiy8rYkhaoj=rLKAL!GR@#eAg2F$)4~h8yG{RK}iM%$rw~(ll-G z%x1yN$8WVy$j?0_wwKr$qI0kS4hqvjTSTZ+Zdm~Hlnr;kU->>s2zgK5d1SzE1vcPx zbBFmur@rKsB!$SXCbn%3F_GB0ujERXo@7)>9K$gs#$>vG})pPp9JuNImw$U?WOY?%3~HNprcZ2py|5$*$&aN;Io@+|`y4@+qY zcgU5E(MVm{6t;B#P1+z*2?EX^%`C=YvExQKI>9}GSB7)y2lzSXCsz8+gSOw#&)~b9 z*qi2DjAcvU)Z@SNFcz1xHo5W%>zwH*2Kx!|ZQRUa1*JHjzN!CGmSB(7CYm6}zCin; zRYP7jFfgsmhL|Mw*S2N*lKyAmF^vY$cOP6ax%c6;!@HxXT_6l42twM42krVH*5KKZJ zOoJd;d!r6t^S|noP6E5JtBC}-eM0$^EAiS6zo!5D3!)(dW-rCW(>i=stL~X(E~cWw zvgg}uf(nG&so}%?`|#P+-gJl09Yv`AxFf)Fh__h~0k;JK3T+pi+17hXxh*1gI-6~c$m4aDe#-#5SYu+U zS)k*s45Xug)d%pE8yic}?|H~84TX{v=fRf_;yDHU@a0?b$N26~L0= z90QVSn((-)i#YdSK&iQCm~IL}v9m9OF^AH$d;2OJz1&{G{WGvwxX7@8`K`Fh@+Kj; zoF5l3>`B_Tke~+o3R$Jud>_ez+b8ljohyE~TRz86*>L&nm(XCduKZ^%iU68YL8q<_ zNHIn=wwPs{tZCY?MdOa}gEwfA>ux&|TViV(wQ08LSifNv(d+<%eEnPcVcSJHDlHUH z^G%A^z=P+mygZL{6$NjfUZh(D);W8ez@U@&*eDnOcUo)dsBCwvjWS*D)bo+-o;zO3 z2A9z!JR>D_6*7N2hoBNsQ)j?{dSp_BJ8l4j?F+w)^U4}(?LxAlN#xCyQfp&i14n#& z?HrzW515AppzYt(khy43^lP)0+n6$%&9IbZeh(tc;WJ5=?+#=INtwn+tf)?;4a|b- zmV0g__ol=O#`6&=QVTiv-ZZ`&%o+GE{2g1HVY`zUx;St6OK0Ejxg}#}; z>%>P^moqK27>l7zynpfyddz#NON+_$u-0Qn$F4;;R1 zRrHMEzKF%g7_>N`d+=5D_rclCJaHdE4gGLZxpK?^+6@5W6$_H!YV)~XFj zzskuKtzF|L{-3rcgt;O0m>iRtiL3~@gYUnH z4(BCMqd!L~SU!zQap`bTn8zAty~2L&Q6mnEsF<5VN&j7)3Mz`)#X%_iOkBar0q6FwDX?{8BFK-*A=J+v!u2@)!&za=M*$0PvoJLD z@W_ZWi9*-)k-O%Joi)7e?0zcFPKDI%`4Qz7$^o3kb|GoaQH-0{!l+fqI)7gji7c7Y zHwptUrVd3aZof8U<#sa{V$Q#o4*<^_Z%vQL;~V#mAePl8JZ*uN+gxp~yE1@&Y|{p_oB#5YIph!OX53O>!1>!j{wC-WkR=CDaQo13@*JaYP zcGs(=)vViCE=);Fn1B1W9U1t$xvkcpT1|EPFQ;SH7z<0biSl(v#WcB*9fT_>;l*}= zbbu~OP$^nEzo4iupJzJiT#b9p3+``(@ruTzg;Q-8P`gvq!o_v=6<+dcXgz`^-HaKJ z1~}zzPi!6HLczpC>VYo0z+=Z=Vk?q|F(Vkf^(n*Zm~(k++Fcg%7gYu?WIV#fdEc=2 zejNgk3Bks`!_)oD;8nE=F0gKry?QC|8_khh@!H?<4>;cA;!getH9*S0$FCo70EI9J z*e^rMn9ey^|Gb7U_pAp9yHM$Y(U1Qff#Qm(tX9-yRE#d+*A+H&1_ct{L?{y+z#}yO z8^q**Wag{XGF%>ArDh+bH7&OxK*@AJW&p?7!=iS^VI?8%=ET*@$ztZMuPbPeoF_X3 z;IVvxw*7S2sn^PlymGNwO6D;b{Ad`o@^vH=>BX+P`sFHJt*0(c!)J(c1%IDy6pQ_?|*KecjhFF zABw6Ms<-8>fu2*8F)(-pTF2I}y$976pr8cM^IL!M=uEsW$Hp&N?*)Rv=3w7eLSW)# zTJDaIU;7I?1`2UHTm>FS-)C}pNv&VD7ZSXzVt1VUu|#Xbztll-;^!z-2?tkg0pBQx zJli6Gx;(Do3b4y8002NEydgRfJ8Rvv3~~~7!59SX*2pNj)6Mw)lDt^H`-K>5^|5Sy zca8$Y#ox-RIl?ucDOFna{xh-gZBqD6S@D_nsACmX3*lCSy#WkOx3M6QV>2hbK0&^R znw>{pSP6}{NN}-x&a1J-mF=I9r^fthwPVXB?6%E(1n40M7%!LVkzgxk-I# z!jhS0{W|EEB&9u9$jU2#G3{er{7=y-{fWnS{2kffCC|PrDh5F2is?PB%Xl-p-#Vp> zL-~AINeB4(f_*T3|)Natb5&c~AbQkcUGGTOJ;eLhG8Pkyo?ef6Ck znsfTmWum!l)GAO?94qz?VyhzWCKcDFp4JQ>J^aot7to$eEjVN@@1?(6gLjkxek1k| zWcQEJr#{4%{pVjLLYV#v*B2|wTqg&{79k~$*q9r0@U3T_QI@JlvU-0sW>f0Gr>4b< zR}utgthi!KGQI0CMr>>IR^zp+1H4Zj#Pur*CRR7H9k92`O`$^4DpJ7sOFX*^uNm2> zdoY90JFU~u*0QLOf3BHJ<3A-{Qh$a|yAlRRn1#+wosaW}CI}mhfGNa#buaN8iuO#X z`$zwcQd+6r?9_<*?&2s$=D_jd??0})z8N+Th+QmEKw!cX@Zk`Ye2?%KLl|&p z9aHZG;_ujSsXS3BTa^=)i6|XE9%j}GtjF86%yx;}%cmeVLk`S4jgU=jOXX1qwe2nj zD}`1g8RnzoVwmwwf#$((ESMp$1e(6Yd}Z><{?*9u@R`QrK+`J6wW=3IRC;@B5R5&) ze%*dbu_}aQ*hk7rg#=m~#N$^?{LO%fh8GZIG|sicepG}*Qm-3dl2#Ov}jA3zTE@E^<{^h_!KVuCrpW`~97c-V4B1Ah#? zkg1A&VuRF*;dZ0bK$J0+~)LyC0>;gCYVp%~k? zayjuzRHE-*i3*4DUghAbO?tDU*@o>pP43e8@b=6x2T*WwNdwF8y5_R7$B&Rz0B)}% z_#{}?$KduQkR2tTA)*~Bm8}ZX0s(>0qgt%)u%l$(gNh1!g<1&w(m3jVEVeglLE*Ak z_V8DE(A(r4tP_A{G1zBXxgb$ZuM2V3g?M`dqZ->?&SkL7g2J^qdbT}1`Ts1seXS5vc>|0$yD}aR7V|Z;FHo^4{Uy* zshg4T1WsO?aV_}9Dc%7kan$MnYop`d1W9f$HdSw;HD!#^FjzTBP;Xg$5A^(xrM(O^ z67TOH`@o;Fm3W7BRIXDmx>&yys26iYlpDONa)#8?^<;)V6pfem9UREHC!k%{WLB5e z;I-U=U|floeElEcrE zs>v6$B({xO?K~t}{1sa)B3P`16!?;>46Yq|R0BB9y0QG>^P|W-xdLRevoJ9UYj`$f z^p!a2FonmfEx0YyTKJ(SB=!}9@vP{h0)4F`I>=aqRWT=MDgn+$_GQP!b0H2&Ec?5! zNgua1J3C1DrS9$>+4gN(G|Sq&IEFLwXi-lqlvRzd;gYAjT|`l`yy9prZx=glXd-74VzJX!Q_1= zjPZU@-NpXipydE-#H1yz&`xepYas(D^zxbr%Lc(QZdQeJmg>1LRgg@uDZD|Xm@KzP ze?^^pn|y%kn4m9`oVI1pSO@|{T(5=yt`y(A~~HsB%TT&F+Y8#JWQHzy+4g=P4c*Ozk~ zJo{f0=fMt(ojqCiVM5-h*Kc{UyG=at471f1*6;8_QhfiQ*{8jcX&qCe2*8V5QFJtn z3Kpi~mfq5*OL?f&-fW6^byuQ2gHwASYO~=oLz0WLp&*L>(p-v_etsVny%biI&G-_t z>GTdJ;zg7tiDQMw>3lvXd!F(szA*8c?l54NrOx_Jwt?BOLo=)9PE4iRvtW`YJg}?w z>kMeazVtk#Li6`-)ReAJFJ0 zmE#b@;))DUdd&ZCE<`B@T^m7`lFx3mR)8TrzzKIlTV(4%9C5*{(cd-CfA?S>#=uwG zEcwFk4+0xb^gMccGrO%Z-{23^TMW61K$c0rsa*gK%luf;sCkjb9&`2KB14!BG4nXe zP{s}Evce2qiCN-k(j>#n@rZHJw0V{DAgW?myoC(+R!|9QD-(wQ1W-6F(I zqhMg|%?wK5ELeO1gGrSnqe`}wo6xR)l9y)!LWXQgxx^+fnYZrC{4`HTO-a`t;Iczn z9us{>Ikg;q0XU|GXO2-W9cCVK{ET>a*=&^GRY3{gQO6%TmMBV(Bdw^0qJEY&^<%}S z$;8eLe+{-S2+D*}eNsEa?ZQvjd|A+Zi7=4^vBc(ak>D(}>rY5gO(+udT&^Ot=&5?| zCf8=aQwkK!#*L0d6*L@Vt-DsD)5Y*}!hpqN_wfmSn2@GZ6#=wNgEi$F^T8+{r`2LA z8IYT27>OZAW{WjCU=PddlL~@!>l3oS;F8>O(TQj(ct4dJ5V(Z0u9D)wQQP2!=3TA; zx)B2@hG2YK#M);Pu^iKumd&6}0j*!i3^Iv0HMcGAdWl9jPDHm~9`lqbSP+UvV7}cA zr|)TVUmA)c1-SCNv+C4k*jDh_kO!D~z?rZ1Y_-l5<~m?OvPCbKXv(o5gEyR5c%lx- z`H%=51t`IsfIwBmQV^hrmJ22;>4zR`*ySkcCmr4-9`!j90W=w+-JS=MIX z4=MY(vD7;)FLzAm4uu4#UYy+`Z<=(=`X;SOVhR8lwHJhaV7PfJWni}ambsE=j2HxW zP03htS#&@cmS9bHt*LRJp-j%^n}=#I=`>GJKg#2T$$Sry6D9pz<9-ah4A6teM(Ho% zDBPekav!M5!Z}6I*L(~+7a_P24n0t22V;J1o+%6RYd2x%jBbMGp?nu8=bhi9F>|h~ zD&S)FxFDD@xtb<=}=vAB(eFG0?#i@D0= z$2#QlP`h=X(s6tTj03LeM;L6kE&fb$8;+db*5rkWXiC&b5!CXNc2+U8g}Q|U^0|nt zw>F;Qndp-%boaB<3Kk4Il<6@MI}=DtRF3o|-+E3h2Bl!gB`n&NCG(~q4+NO$)b&3`z)Xx_)7`8}y&{!3K6p5h zRk%_{efUfH$7Q65iMAmxU6U) z4$Y;jMi$M|EN5KZ1;7Nxq{JbA^aFY9MAYcoDlUVxw_z+63$j9j5SkP5Fe^JghXa~p$LRxm{hgd>MSW7^7S`JP zL%mD{Vr@?7+FyT;aQ#~NQv~*q7uZy+3I=s0_$U2mqil9+B0SAU#QQxQ9yA#d`~29l z=r9jtFB<`?iHe_ubvXO}W6so&wxN`CpdW?PDSs*`#qG*3z&XJ`oI{aF6_18n zH%~u06olt@43oh$b`-WSb!Ufx)C5vv==1O@N(8t_d9{#4J4ys)PFAqCx-L-Lyy$v~ zH2EoNL~Pbod7hm#yqbqlO0EUmChv?D9;*ENS)&LK0zfyCrtp)O!@;EVk#73P)C(o*VaH7glIb$(iTY_n&$5JAjgLn9XQq zcVw{FkO(Zz#cSkW1}Ya!3~I-Kn??zT4EfqLqVTlWTm0Jr*!L6~8Lt90K?mmvVS<1y z+{XPQTemS>(6PhG|&LF=n@!&sG%1iyoa7yYWg6 z!_qR4DnU93Ybbx`j;(9;XtzldzD{wz6f&6FV>YtTIZ^$X#7bAzD%Fb=WK87OqCZTE zb>r#+Z5C{~avy{sQa?nZrtr9VBBHOAhV?nq)JHLmQMqHU{_!t0oJ`xHAB_CXC1zlJ zS`&)4lOM^@;@`+1=x+^a248jtyUPuZ*%!%b!7(1TxOPfb+X;V==Q45r5rq9**(^6c zpSpnSJ)8%gu4qpQRb4c4lV6#=z7l)Ltv}k9`nW$O*7)VTEU(XpCV#vV&ei&r*w_Fl zXG@j161vI`zIN}bpr}d}rP3gYz|;t|27>*Zzypc8;5jQd4Ja3cSspah?U`$$dm zrAXE*5^U5TY@vK%wUf5pFj<9gx<@!B(#dRKpB{N?QE;xDPKS{T;gt{&G%iH#k|o=; zU|h0+5O=mt8OQ+EIQx17pU6J< zP@fr7`F|c04VwabD8emL{eoHtL(rlf@-Sr*gwQC{T?&i-KHlU5tR;D7XtWd`|UsPiawy#&ckWvY^(VwqbCxj@?moXM~YEoy9dIy(SsSXwtjd6Q%-2$1?laD^6l0YNw zp}W-Y<2=QX6Cbc+qXtc*wJzfn$7Q7QXCMU9{xb|u426%7tP0&ED-Ca7C!IjG&8#S6 z(FBYeqPkSz2%n%Yr*}V_Inr^r^zJMh(|&IY=~sBzhjgx(kXklsq5;l-9p=MDCbm0Z z;#EUVGMN4T%(;FcN)yaOlE25a8?Jc>$d?PYwf7KBCiC%QRt8+=mDqtkijgg_dDX_o zZ?G!UES2GSB(M%XLYsNW!)2wKK+sseO$W)!WB$0#&BzKUJ?swt&c_$S5^a$9Y3pOa z-MesFSn%v*d4O5Z;F!@ON9Qz(l|V1EFnVGD3d_%=`|kFp@e)-X07X_L%Iu47k9_lv zJ-4bKuXNFB=D=`WW~(AfQqdFc=^=)>I8ey5Hx~%}VP-|T0rX?-&Nq1s7o$PlqlcHwJh;ZQtPVD!oDLQRXRNNlUoZLA3=)|DW$P_Rd4MG%XD& z9b_$Ki*>_daz03UK%n_GI}C0JUGiMC;99#nOG|jbP3BK58{?0!X;P#-8Y@;16a$QL z7>PPn*O#=U>;hv8eYq0JT6kOnzGRCY?)YYnEYg(Wxxlg)bpzt7r;9shZZ%%Msb?{3 zBk@408!@?HG=C&BXET4zw?M4ubE&TZL`3a8Ys45N=b3`qY%cc5;r6`axTqH#Pybj^ z2Z1JooVfu^-uFY4l!2kMoRfHJx%nANnf@Z)jAfXg+0#{qTn~4&%$XDs+jog_k zXjVFjqohbW`uID=0K(Ai*Z6f5($EP_t=mD=2c8vRoY`QI=w3LBqvlh24qLSx3$w-tC^5VXkjqVr9WJ1`7IXF7iHz z%ctP4&TVNEDo;}&V3!=Hs zkfFHx=VgL>Yud(fc9Q)e3Msq-s!$v;eI0~H;8|=KO!vRy#4qO&bT4-uq4C}2d(7`=6tV*dganwRRYYWb+@uRUHpcV- z!tB117LWk*2?GDp{bntIwyv)E|B5d`H)f>{q)9w_BQma*R8Ef zFvEg(l;Oe4`g%P`>~B6RG@vcShSrl~cy5tJuUaJ5PuBaD{2ZsUv^EGS{$dTt;ekEd zxTw6qA}ViNN-B!V5g0E5X()Mop@v`KMAHU-LkB<}U*RpsZv96nt7}mL>FK7-*cjxfcw@)eny=D0DuG^$VBEBFd!`t<@b z(+^aT&hj;XAc#9<6G62GZ#N|1xK7!&A4}tCC0taZ%^`(K_)H+iXNkVn4QNQAu#80} z)x-po%2n#DKB}Ce%`{305S>q{7NzkyfJDK78n7xIr6%$O$_{qs#VL!RNQMw9I)9sR z`Fg}P2(!bb>xRW+!|xqzRl8b==iJNbtZdWow_(aq;lUO`f`a|~Fq8il61Q*?Iw3TE zL)dcFT-gDybt0me)}gzgz*Z9JjuGkjg#bA0ZQ2x6qU+)7o_KO?f5~jAEG@72nE}(6 zbc|vy*U6&WmjSDnQrY9J{x0g*SyZ@y@4CPViNVQ@@+M$iu`Nln#i?7LGJ$63FAYF7 z@d<7CF*5U(-i*Av^FO{bqD(Qv-Do*A4O$hoqz01t%{^m!KQ|1=5ir8;*HH zREbEKg|*gEo}OC7UVOZiv+E9TFnh|F;% z5v+X)nr0wuEI0x+C^NTX5!qw*RFSnZLmho4eR z2kd0XW%wFqvWPw%t&&fH4jc&>l%gFNH;99;e&DoJ$dphDYV}j?{?1&d6jbi1CJK-> z5qe8My%P3mEi~r@;fAIo@ZO#6(##ChN`ROQ>x8k4ZB_+%zL#FMpp4DH_{*#f1d5_w z-mp0nXblGq1ZvE~*gav+sd6}xgy=CSi|HCn)>TJBx)7nwZwU^Ol7zNve8!dj8QTQ1 zY;Ph842@8yH#tFIp|(Fs(%33(I0KIw&I7rEh=K%VbE499F++C<%|wS2@GvvnYryFfhFxq3f9%L|r zU}cD+O}_#C11yH(yd~^VY;O4|l$u^TRG-jW^MBnh+Y~;vrrtP&J%1eD^}KQk^(P=Z z*;wlWXZ5ULh@@pcYs6gTB+`(ez0r_z-EaJNn!fz$gN*xC>bX;ofn*z*pMx#bZCH+1 z2VMee)T_xgrVS^IgpTnd(%}jho}DVz}ZpMjTOL>X)iq4AP164)+h*{w7AhXM;!L5GLCB*cl+xCq1c#}#g06LaYok&j1AG-X zgLozoQB9uFe~Z1|{WWRgsGbQqJdKVD3)c3-7+kk>|EPd7mC%LpXzlP3|07%t9t>d2 zUv`O*95>wG#TBx>aeT5}q}iLB@~~{0IsVNjnBL>pF$}As+ks4c*g8@)Ul$5SOdhmj z=s2TF{aAsni@bz?Q)lOzGg*GC4<+WqW9fzC$BUt%3ZXh-CK~9?-xl^#y{bCv6A^Ia zzsdYMcEcu^Tj~E=4+m*gKIT_Za8qSiF7x_ho>n-kDzGkmG@Qu;>-Z*1AC2vKG#dB) zH+}Ua_|nAbOVI>3e-fNoe!*=qSKtd+3x81J5fd@$r|A~7wxh)3Qw@L*I7k$mC_17~ z5=d$UHZT|C8SR;Gb3Ivqy-1>>2{I7wBJC%ptgUP+5_v84N1ZdUaRRUB9fAq{M;TMZ8%=6(9p zbyRNSF&+t>(tLZq;Sy0BUcHU0P76TTHm7de+XG43-ycH0u=k8FdV?H4 zvPW8^M>Qs<;#9qkR-xh}gPITnJqE5r@tQhr!FMPq+aWxN<|n#% z@2qh%O|i_xFZFElxvVK?fX$6_I3HoHq6Lqqm*0TzVJ;H=?|Z^e4r3aMZjiCeEytS!`b+g#4s-vPcfKDHgkf7j@{(W-# zFM8|mfBfjQmoLF*zPnG;0VKqikC`E9hH7{zwpVS@$e6|^peS;pFK7Lwu~2M9(76@yrgQPZUgcfa0}OL}^F zYJQ#eMY8u9xw}^;Qdmte`E5zDo~B;GLR3ws1J2`R7MP&$aUkVf6TO~5qQSkdsh<`= zerO~OfuZ&Nt*_HV+nQ)w0W$Gqu%J?qGooK0j6qM^KNuw9vk(VCd3lhSgmYDsOqzzhn5rj4$z)R}+3Qk^GmAKr5 zDB1ycl{J5cUFmu2Hq|Yo<|O=U#1;5SzG3J4@~UqjmYtAuaxkIi#lDnfPn5V zh>$&JCK<1H1cXh<4QPE2ylV+IKk&AgC(;|nZ-kB^gNSC9)hxm`3GlV=fu;LZU@<>% z@@!2k9hk)dz(jOZX+j5kh7XV-PT+OdFwDNw>AzzavAqu8~h5wYYyMsfn5O~#z;})A{Vl9JYZU$q|`0sf* z8+%RM56VRKsg~4_7wgjG@CPxQvd}tbi}h7mJe{^+kh^^xC7U>J&>hm z$K~L2G?x0A$6>qnE_m}6t{lh%knmRtISF6*3Mq(GS8@XM-9RtN;ep1d3X-N$xKIb? z^JU2ObmwY#$C0|~hT06viKvGG*fGm7!4_tFAITf~{p~Bo^B*M09@WJ-SVSR1t=j>! za6e)xtDamO{P@z{IuQv*Al%se$BtsqGlC)P>^S$)e#oG#qOdXHs(dpaq6HRJIXOYf zMlJas*@hU?IMWbq57iQ_yaNQLyX<%+Lyy1^1cpq#&rh4_61(6^mtHds@boR~w^@%D zs(tnO3ECD-+q-I~h?H{ks6JDE2(0?>rYq*!${f^2{rykQ&P{Pt%lf~0#LsoZW#|H0 zqEA-4s-z6##s2_e1gSQB9@*>%K45l5>c_{U)upA>)xM(SZ8B!p0yHfMEv+T}_tQi0 zR0%BVBVu1~Vp3-n)(pz;x4HZ8h&A^1baiT++zI^@dAKwQQkj=ZM@hU|Tdy zSRZO56k($lM4%q~GpFaweQ{*Al>@%JO4o9j$#VMnmvOmTwc%0tFrr|kn~U2cesBkB zNV0JHEDjotq_seV7E-ScZT%~ICprko2XjqW+Of$v?vo79C&XF^(W=48@^R_tO_uP4 z!obcyDt4oE`bY1%`a=&iFWZ}^hd*-kDtXMon|*qw{iIW|K}a__#AWqes6As1w_AdBf7vkvRvE9Xe+e3S ze{6iyxM+x*4%&lWXaG;FW(JaaI=~qz0p*ZmkHV$O*XifuU?ip3u4*Qb^;7@WOlk3; zaX>41{l5VPmDS$PQZY%;Cl<-Zif{K!@tqh{mLb~>Pb0&Yf&Esg-TAcbubkrcN3oMZ zQn*%PjBtJ-9-MSXP-3cAk7f81VP+WDs29`Bb-np>Sf`=wkU!59u|FpN-QciJthb64CBBuh>mW4A>%J+E+A-!zlI-xsJh=lws%Q) zp`h7q(%#?5xuk|2UU20kSq({>`$MBP?ZaW2YJds$`pMBVwQG_~&`z*B2s0~9RPS~@ zu9AW4lwak-cqxWpU88}OSMb=Kk!h~9)sXQi3wZ&k!H%pK-36)`J-?b2uMyB>V-(!< zj^+eJB~EYK3Vd2@4+a;Fr|KjNDIAAWmthEuF+b%xe=-TZ<~awdjuf6MueFZ6Z^iC`$>7xESBXerdE zqWm(~0=Vi!?;#s9UCFQ_sL=fluVza@028sKNiRDEFy{Yol9+urmhs&i>Ly{n}G{=`HJ-$7(?`XO!BIOqu0OWLgs^ zOp=bah-$~uHI$4i;v-#9_v&wKy(Cvk;dXXAJWO(f1)igTVjPc{GR6VNG9xA~DgcAJRfH zHcPQ-{*E~-F5D2TK{=G(%HoUpKgk>$r;hCcHaOJ8aHOoQ-azYm*so&Me}}Nwz3Dx< zteUMk>X=Yz)9n2oZt!a<`gwO13iJW%Y4t;@+j~k{!6Wu1E{{>xz8I`e6C{QpG3a{vshp^jiBV=R5fGus+JmLAHz3H3SPv*c{%3#*$v&?~^CT-6il@tI!u2 z_S`;Esm}_9rD)dasc0t6)<@F?ELL1Cg4=H+>7|V7Edzh0+*@4?Y7}XrA-O0j|7{9i ziE4jl01A3NKVQBC!sx(gV$uj^`dc68Le(_bq6=m@3|H)JWF87?DT$r+NQeq3uLMj~ z7BKMTlA^SB$-aeLd8M&<+&!Qx>sb911bQHnOfCRK;p?;0+jk&8KWH;2r8O&{;l|i5 ztx4l$;ZfrFCpVU80_?iUWxu8h8zreH=uCm!mR-4wyP=IFG@r>I_5R}ItgLN|#N)RoJ$l2A7XgGQhAkb?r{H%r_Ek8tV$=$BQ!YXJ^0~F4 zUxzAt5+3u|I8p{(h4pf8KCEvU4(dnuV_K=3Fi55)AmHfVMAH>~4&qk5?X*Wrnd3NH zWZT2y8@IM<;`kr2LM4TP^1Pi4H%jFg2YactTvJNJIAngWIRI4HZC|LP-j|NFtOOCa zi=GIa{fzAPs@|zY&Nd5FP%y|0Z1$r;=yzciEyKzc#ddsaqtQHUv-~xaKy@sAB_D97 zB)oz?AXjsK{_AJcE!9<`-(2ndrz162L`AbTJ5bcasb?aMd>J&`(+4QMUV+o=y>9CB z<#gI=rIRj-O!sY&ex}{$)mfz$crIR%{1rb6$dR-0xDvPT_o$ z@o`ZHBEW(|oK^lf{lws&*&Dgo#jOjSVfSPMSRo&cb#Zf|!S|U@FZM>Z4VQO650RPl z*RM!}7jiZ*11o0CV6h;=HjYOo>;N@w98-dkD=AU>AsLKvRsds^L#Oc>;FT}RVEI`& zF%Lbt#O(jAx77PyIv|p z%7mwa9Me`@SW88C#gYN{r%2HxN*9)O$z^&WX3pY?G&WBA%hx#Y1iu4b#ca%L=*oTa ze*BE-YSW%|nzWJHX95n9P~W^`{nRwIEO-AUwxUyGR2-`q-#(wlJ(NN;LhTtrg3zo;dz;Iq7_UPx|yl*rOgSFSKXJ#<+ni5~;YFZiIEg z$Q-RpfX+mWRC8;vGVykAYd;)i02ZKmzjAv7%~Pr_LP;T}2+K(@lL^K9LB&HgN44BB zVvKH0D@pXG{4DB!O&p}3Fl}xi;uF8rL&lOj(A71miBpV77RJnd?OPo_++Hg2X@0ho zC5v2xn&*$~=aPejePyf){+1lz*gauAu7e^A`6&9*Yh^hW7?HQ!9_1X<@en~+6eNR! zLU*;b4xsr`jupW_z`W{$!GXR<3lF7SBM@3r@RGwi1;eu4gRf!<1dlK#XS`|vS$!+F z!2)l?Tw`PfzjNiZ(mgY|X0g2+yhm|-{E?9oLjv`0Jh`e2r+`Jlq))6c6rYfA#?p~x zb!96t;fX~aWXkg5wFQ0>KLg>{^@(bt!&VonUz#s-jp0x%Kqe4m*aJy4DLYhfuz==> zS^fg>UI?z3DLti9FuNJT;n6rG<+Fw&Nr+I`NX6aVIW~Rwc{XgrzyOuO)22{++zyMUsf0y9-a@Hy*Wz|a% z!{w|zCyVM2%ZddrHb@os&w!~KTgTa+6Y<4Bb^>OPZH9bgUqBhpL_U?gRK%})9@A+W zI)1OTS{P)Wuo{d@zh(|O!gw#ela7qR;xP;{#)*q{G6GgfsqR`|U)o_1nFG1TRI1M$ z3#+&C0SL>9hj#uwhq@IkoP_;J%(K>bjczP;4@dV+bSe#PqC^`{FKp$PahZ#U_JdO! z1uVfkGWt7v4<|R-%-NqjlB6&~{vi}XS8yw|pcBimJy~c@1_No+#69?||4=X>gGs`% z;*4us-TmU{gUn|W=o@nf4(PIL_koo_hQCPev_-yaIBi1y_dv#r6TynLpLQv zs=1(h`#(0*LvnBBb8N@4Tss%#D7vEq{f<**Ok<8`7S|za_^B_z8skQ;PkYX&lVD%2=nTr;|LVC}G40zxdPZQg$J;1;PqP8F)^d1wuoz zU{&dPHv|Slb%n@yCl3I&@&6f7^X9x~0Ei$ZmpK)lq`=LbLZ@A>9``z3h#L8Y&yq)>3-uq{^WfEzElm03r;Y? zeDaH7G;r=SrUrwo@=mtgRP-X2NxSqXTLp0qi%-4n<9uk6jzx<@JT~1P^L|~P9WNtP z9206Y%7xYu@g*x8`OJRR%{AYj#FlLdo^r>*y7D?%uk|O6-x*oUo}dXXT&Av3VMC%h z?D$ibstoL$HnylWd>L!yuM&BR0}fS+Lj5cIo7AS}D5YGP6d-M;IpN9IjwCF<|J^UV zy+PLQO}~L8+rrodIEwkjXIPlK@~YHOHtmvm&Enjz5s&oH7Z;RAfS_#nOET@gqNF;O zYtujl?7Fs(%I>`Y)9HJW;x@cDCW~4MskwkB7hc6AIlXy>6R&J+UB!-_w*!sDT455A zF8VEAe6reM&$|zglpdrIPy^cZkfTs75@kh@BdI)>?7PtemML^kzuu(DWJ>2qyulJ3 zXNI9))PRNx3`UK%hZZU)DZT`15T^f;G6Z7(xmqX(ht>8yePJ4guJEC2xEV2TFjGs5-;P4ex~rHfs!hkCc1iy8}B+#vEM;D>hkr1;5naMQbQN2l`79HAC^Owzx~Rk zf^rr>GitBY61J)$N8VcW^G_|MjwedC-Ao|ItXS?O2pq)(9!r*^ZwD2PjI- z(6E~}(hy*Hw_cuu{CIJ@t>9u~(N%fgDQ!kM_H@;xPT^Rv%4FNDpU8T0(Wf{%Ngs;K z=v<{y0y~U45P+3)P27KI%_*!@w$gab=EiUv9QsCT8Qgx`g6+SrNz#xU=nuNSt_4Fq zt9SM(PElZi)5!Jz}Z@1fNY-TJ)woI9W80NUG zz%6vO^y!iYiZ7pv`M8b&}A!}SvXjJyW{@!sZ?vD2!c`1Q0 zYX+ms#OW38N^U5ZPjVeRFr2XsjG2Nq<;^+3QdXig04jC%wvUm*_87;IDzJgDCv|2Z z4MdG8`Y25OMVuiX5E0KH+Xq-Dxgl!o(8a(|5v0^4yTU?ij(gNQ#Pe)D(7_Ddh{=yk z>YAxIA%QPWqw;c{Z8ohwy@(_{AnOH~UkJfV2>=Yp!3zw__&AlOlTDtyaBF4U!OVH1 zC=a%IJ;?OyRs%M&cgMLF_&QIZks3%Ai5G}P^CG@g{L&;T20U5I5y6h)4bn?4%qMBemD~tABlHC@OWfm3BlFLv z^RsnXYoA&q8eS#nB*p0tO}M0ri!ZO!&PcW~)7O=47*ABU&@UQ8jnM>{Z2e7s>BQck zjstNE{wiMS z`Ap>6?}Kp3JN;RUj%eX`w~g~zx%2GR(V*ZQ`%mO`AQvgl^m0|8rMs?QFgv~56UJrOXj-bqN!4X!gOyjE z6&G&SW`PNHG-a}6zuxy8CeH4GmlA3}tl{aP)ysByq4L2Y#SVtlHgJkSQs`F|Hs})< zxi-o%48H)Z7w(g(tixQX#?TI;)&Fzo;ymiyoI0(rSA;i|s|GUQo8t&L-Ck@G5dpyt z^FR#*XqP;?WSv1QVm1|~M|0C2Dt(u5tpUfiUXs~da!P# zMMW&=xV9UVx7Z(7l@UHtFI0LM?Wl}Jw)`wYM2q`N*s#mLS?y=L=rZ5o!T+3V$jRy_ zAdC?H=cQ>zMWc-;DNi~RS$MOl%4*tbc1+n;e4^F8UW<;y8d$urImJCMU8s-eywc%J ziWYnSmlZA^5CLAL5cqBh|0-^Z5vUz;DyducqRMSHw^*~Fe1c9zkENhFry6+zp>_-q3uyZrjuesdB>7Y7kO%%}0&zCh0kw1dE8hUZX zwipLg86|Fb)gp51GpyI)H|xZ#Nz>dM3gdjOCraJ6~3yF&_;4zX-%=M6+2U%AvYUnDeSj7 z8BP#oB%krCRQ+Aj8OIap3$0$fyeigy&Na+XZ2PXQh0dfpv)22Pz8aZx0oB)hOj#P% zwkfHBk;xM2VVFF+oU&)?|GQ_gPX>mGpSml|zNDPMzFbn({8ODR47$SOADz>scVUX% zFYwuP%pfTvU1n+GUb`GO|EwCz9^E_S*Ko}%I8AIa0r&D>`3VAWXWXrkP4L7t2Wr6l z@f50pjUt6(>UkO^BC*d$Hx9N}M#*pga7>S0p0qT0x{JCkhquP^UYEC1eEtusJpTxy z(osN%-nB-t=e}-yrJBWC`N4$XtG!-^8E^^HFe<_Bh8yCLpND;BJx6mAZSdMo*~n)$ zuRK#Tv>K%gahmiDP1<7=X(_Gw5+a%-D?l1s)vmLTWx-<;yIf;emv@KDM*htVw%I9o zz*Y{lgIN+F9R=sYW1W48*~t*sFqP?<2t*ZOnKJSV>*?Mh>`4!sYUc*cHXkiLP@EVI z5bk_aRDY;b1IRGPCX@cfR0gS!n`6wrFM}&@$@|0eh0BOV_PtLqri5bTBvq(C6uW!7|yoJ_68`Xn(A_Vdb3l0?OY`OxP0|@ zN$H)t)tpzklY5-=o4{N^fm^`kSt_5$t#k2=KN4iG19udZW@-N*F;}coY-3=GEf@vw zFBnXUJjB1`0I6)QnG&au1YeYE1Bbo|dzE518-N_a{c3LK>>?O{%n!C!pD{QlmU+v% zo#GbOh72$m1h(P*4XyPH_jkWu{@RPeBH+gWhBG9JENT#(H#pMYIZcT-`TP(T9gX~^ z)me_QvH1bwQ4rkX_%<$5=siLZ4*JoS@ATPeNCL(2t55r`;$xCWVoVFIb{c!JjyFi# zFaX9Eoh5EcevSrS+6wrl3)l$<*Yp}`3~6_H+SS(Yn#f6=&UL_@NdKo7Ji;&r{Q-w7 zc+`Oh^Jbv)uC zl#(fCD*>4N7O`&NDZMQs;^ty2-Yb|a(GsU*2gPpP9SIgEc#fVUzqudM8N!M!#sSLc zw}$K>f>9hTEVI1O0+9Xgt7!VahVcbmxmUctq9-xWRL75w$MY6+q2$=Qr9qLW4ShCy zV#(vA-!QBXS0lSXQu}v_TV_#n{o~k@%5NH4JxpVk7n#yg^Q#!#e4|ILTaTmLKf6;1 z(*%68#6_EI=7wz-$dKH<|8GSk7qk~AaJk>-Tz=Ci70$Iqb_-d;8sM_ZX6gvza+pd} zd)ya*78lUp9`_y{L9h?6{C(nL&va^wBVT;mp#rJ%7fY~^Y1?scvA+4KLd*Oqi}H8-7*gGp`pfm(w6a=~@k7 z8rGZ<(Zk$#yhSpAf#hIphU!}9xvN&=vEwBG2!M53->`%+rI-&#=E8(#RsjY;OtT!P zAL}&n6l5T8Pya*AcF5YYbJaWx3~Q48`+%r(O6KE;Tckkt+W$?+2AC=Lz^F&anqwGF zutC3kWd%Wj&hG(~;O~-~glLG!kZGyF5)NG}IxA1bPPlFa>~R~d7$Jq6!%G6@G>HzX z5B+l(#is_Y_Q1)7G_?pufE=fK&$Y88t;^8=hvhNDbAk!8k_^usQndx&ZU!%P4pw8B zC_R$5nmG|G;AoAx)!U1#4^%UVJjx;i;~LO%r4U^BWi!VPb?FQjJvx!6Xxh_A!>>ps zO93RE^$nBS^Ti&L9aWm8kM2icxbOq>gC56wKUT&Z?s<+~-TghgzYt1++N^)gma5@v zB{T3OWP$sZ_WpELWRHme%rUFO-a-A(p`s zC)Atvy4atOjzTff)u665{pc>50|1g3@bTsl{BEK545{Ws&4?xo0O%MVl9iTRo>z2w zp@|t~WtbFUqhR>11!G8Qu5{HP_xX1${;V+079aW94Fi01KORI(Q8=^3mdy|ZqF)yNt$Uvl#o_qAty~ihd)QY z;}ZLoIJA_(2n6VjRED9tB6m!mnI$czYWa~jDGb7)5_Re!B)H-2JXoRZ5#$~lbTl_T z92f5j@TsdW``f#+xy)m`|6GD{9X-u2gODV6VqTFnW~#WT@Uy7aml<}!PtFueI6A^ujWrNgLQKja$$QPLZ9<#DZy3L}wU z;w!6mP+=`?M0)>8u$BKj&)yI_Fz~2yhnV@xj{tr35gB}iGHP5gzM88V-iv&49F8R< zpdL3uguSN2+%EWXZoJf+1tP{B9HmFu7vNeRPe&=P+YFzE-pBU!9(T)V_c`$5l^uyH(bIhIZgQ>e5T@!sf#K=;bNO0SjyHf zhS)iplNOJ9Dck=7#ifD2*S5-{cGk^xj?Np6_H6lSR|0d93`)YlTKwoC7*7ogvcEO8 zp6JiBRBa&VJ{pjMOZ?!nmr890KJr;jS2$n~9Y!gs z&v3k7-4eJ+- zG9ePyP}EWCFAt@W!<(Xz8ZBBpV7P^F)w9(qv4N9V1xXW2iIBbw01Ue`6#A{U+j=nh$kqF6#n=s+6gwzRC{YNYrQR5DT7N@ z*2jk!e7i&EzlQaNk|K~o6BWUPK_*dfhB7gUuyERmrVUndi4pC{<3}f;)9Qw=cwb|{ z$}ZD&44HO9QDS%#b~ld~P(8KiMVc8wtPES(n>DsOc74-(S~L9DfA}6Cd~woH9(Y#W=g> zs8D{~gelxXqrXf=3W*!LtNH5AdNO7l&l2n&a`~1~bN2d);x*OKbq&PUc&_Vi(-`Z` zYGRvZ2IPBkLV+Gf8WFAX8RbS$tw7KYR=aT9MbdG86GtG7($D^rv>x3!7(wwH?!6%V z^oteDK)gVuiKpj`YSf+7_>mrxi=vgV{pW1MP@tR<H@f6EpH{+mV2sI2CG0XuY5apu*`rNkyP(b%G(GD!k-?$lH)^yTZQ~EHKwRrR zT5i4zg2f11mf`rLBxU>5s1FZcUv`q#zeSy7uNEft9`CodFg-*;QLNt(4}?j89#=ai zKZrU0rti$1yJv&J*|H$A%z!`E0DDH&i_sc<=KA@_1Ld-tydSVB zQrw#4yL@M5H>P??bSEsLJ+AL!Z>A?jikYN9s88I7v;ta{bhCo+7qx2F*bjd(@ZBD9 zG3l=k4=#S8(bmR;uo4o`y1Hvhqn{(CSwCmAY?eG}qOuV4Ce)_TNw3Rt(+1 z|G;edS&L5aVI96N*sb{OPudPnP$ynZ1vvN7gZvd;^dgyK+p~drk7*pw0VeT0HbDu? zqJGC^6*bu?d16TfBTG7Om`JZDR zAX@J=4nKp8=f;Wtd@4MHXy{PNMWN+wV2a!b5CNg(!PL%^KxG><EY76@cz#;9C7;XtB#jWDE4qJ`@>X#3Vqjf?{$yK z$QJ&1DN=ggeM{0lKOPG))`T0DdO0p*VNt215oZX8)%`+!@LBFfzv||NP}ww>C5sJ| zuFjmK)lazxMPQUCLyD9%n#CL>x%eM@*V`YqnsD380?c#(It^|gsvtR3k6er6qdNU-@i#`yB6w| zw)vnYa8pM_b%kgPtR^zu|3pCD@aJ0CZmVEMIwE2rEJOz1I=oC-B|n5IiM^?Rhb~X~ z?0DJZoys}!`|$<5WFVIpISrV*!hnagLE+}9`Y@)EBy%eM#GeS>;-8KuQI?!-lrq&ncp+c_P0R=}b|HD0EFOe*SF>R-?L2 zE-%fE@MIFu)eZN5dN;^2y7{d`yU*goqD+PGw7 zYa)F*s#5#;vU$=mkm$RPHE*FP(PaODhm&0+s`eii^k>;hgn29l3I#|GL}Fags`pBk zap)AuTt#X!KVjKFkutsMhqHW+?#wGHFFs-J5$Qdo36fqP{3kM-U(t}g3YE=JSo{=? z`gZGkCZQv2`yL0!Q9Ami9Z}-MN!L8`NIeix0IisxSz^IENwo3X;zlT&#(*jos9E!m z=yLw!oJUArtQ6%y;Ib7N(hrOstjx1Kqplg7S$ivvKy+!6^`5nyNgf63hIVQmG7c2c z2_f73+G^DB`F#?+VBM7$p3o>inJ2~Z=*ud71I6DkUOpZ|A0BDg0T_FEeCUK0ZZOEloiQ%QM_5A@gTmn7c5Bz z?Jw*ASS@lip*|4E0`)f#c$k!jgYv1wEH}C=!q^4r3rJiVeSwA_?1^^8w7rXM!}Ges z^gP4R;du7ibtF`!9rr$bmxKr`9_Ar=*)V6vPqndroquC!~*G!FSDCkN$ zWBCrUlo{@=kK~{W0ZSvrMb~N`n z9kzJX^}qhd)K@*rSgYF(b$Hzt4&xZ`K|eanw}YolNRf0a>2U_XQnCdDByfyB5uU<1 z$5lJ?op!PR#5KK?m`-tZA>?^Xb0l?x5*{~FtMEa3g(5ojs}B5!4@h|l*nF9+{DH#F z!2_!%@Ys;w7>bRTXEer=a&Rcnv~uAo(-e-cEaVsyJH7t8;>q(WGVtiPN^*G1xx))d zp`LTTF454hEB4>22Wh%j=CQ|_y)5kv-%VG)OH&bQ*15m`9|4+br-6B55G({Ol8fcH zi$FPUm=!tmt5XN!Nt`zqB9D=&-gpieI9_sqyW$Ohz8g-@c&5cjF(A+NIBMn#5>+sf zF9xt>cGa=V)ZbN{rdk03aW6`;eDj3>$SA{GxVJ46aCSHk;< z)VPtjMVumg#mp-Ir&Rl~#*_v=H?O`_y2H6M5b2Pv{S9aQF?koYyXp>F#z6I)9LR0@ zoRk0+Sq+`B%Jlv@b)UuG%ATkTHWF`2A5>fDLo{|97Nq!)Rk?if9%Jb!Hlu#U+|NXH zQX~mkXK?Kz>Vyv1=u?N5w?OS!^^aYg+FZn3*9kb^G`QnJn`wW^uqc2!#-2{i_aLI2 z{e5B#HeagZ*PPw{l%*}OsNjbXUk5}f>%I~D1jnDljJ^4`XL&*ZzZK}?r_eC?;q@@j ztz8s5Ehfe-cWOw7BWNOpsNaP3Q{>^D#j&|mrFn$N^5akt18{bpWOVIF%oU|j?#%Ju zD@@>IigPEgIwLfLd5wX#0k)KtL3_G~*hc^(9Q25w@}z*7^9QKKTcl8Rsw74~U4EKQ zqK^#z+ul}Ks=a{?7Rw}6s|-)lPM4uo1Yl_XG zRn-f;;!%!r~v>F0Tve5lWhvsWt=SYrlx>)QwLOsZ`vyg0M~t#j1nnTjGAHf z2)VukxEU0gG8m7Ue^Aj*VD9%klIJ;fF0}iu1^8 zTDs=$wAiIa=t3~b`i`w@;rk7X-)1%wD=gwRbvytc^YxMxcgOZ{^89)QL)hZxO{Zbw zE7VoH-$7jhpE$8S@3Qnr)J-NzT40ynM?Em$Uw{fB(@51XnswpLC)dQE!pyDVcNn-D zA49wi3Hww89SI&P5_(MWwq7IVpR1#6ya<2I<*eUqy+~<^9T%fU?qIcv*lh1%3H^%a zB;9!GJUmTWd=!Zm8sL&NY&~k=)KY=Ln&eTX5eI`1@NG3WtaqVXLmp`QJ-F4x_H|i} z_{A0Nm{5u`bM9mMIhfbTN#pZAvC)5>*(>Gf0syOWBmX~*WD|6YXbW@H^XTyrPeneTqz?yoy)O68A@`df|`_xkS9 z_=Pe4a{a4k^}dtK$B}W$7ibT0e;HbHp^wM>@NEPUr$t8ZZRex->4u{tM*r#^p0$q; zTo~|Qn=Ywh6QYLs-g&Q-_cR&No{^vuQGE9-0-G~_b61B?ZAFlIe95*7#U^fB1pkP~ zu1JW`onMJSUCyAA0K@-pFMdjCxf}N+6rrukYr#A*;(95Xg~M>WHqZ_c1uPv zQ~u$<5+EixtbsMf@$tJa<^?olDuQ$sBwa;zir0}7ii*&)tz4wF7q}ri{Dy(!>6H>} z^%QB#RtczLt_`e6o!`iq^0Rn~x1}o%I_cq;73_Z})$1>FqGPF#A$4>HpWBD?A0R_^Bdjpb z-O#tHe_GCv!qAfbU1N_$jfgos_t2)_Yh?7jUF4mv&e4lR9 zQTbf64qto0d#aY-il68yc8#sc0PF%UuB z<5_d&hp_qJ_fD83mhOCE0t)~x(x*O6KS9AZxl(4e1kczIgppi|1Ol%dHzet^Q-g>? zOkC)V0|ZtAn6Xcr-T>QsxG8dR8%yBM?Q=iO6inU?!Wbp1edsEpd{}dmiKm5b8 zQq=A4UlD5Bg&XQ_dUU6X-JKR2wWtMbe-5kS1RA|0tC?f-cxAT-l-unEHG>#-Niv8v zEys!r9#cr6^tcYMoOO3k4zcv%2g5#8NSU0nl+qr7*XE`If%b?vIFSr8%?wZ2cfpJ7 zI%Og7X6EafEsQ3!*oSmSiBvhA*p5%7T}X%QoN#ZVM|aVx5WN~b_yC9ZlDbTtEF*?X z3r#fng<{Tub{ojtwSjQmq>5B00nxZp_Z(SD37ck_@}N&R`_#ufc2hU1KQt{Dy}9Cr zG>^0LSabbSmx;+0c`TnJn)@>rg))z+EAC*H_VoIM`EDaTfrfqKMVTWAo@MA~RD^@h z<6jv+T6+j+7%XU&e5tZ}vc+&oE*L|LO>gB66Th~RXp*VnB+hPP@J&q%IM{4NwGhf! zKU`0L1TVDHR4rA-n-W3F=^o4K^}y)HL7BL+ZBM;C8w!#7U<8c|FHQ`%PSoV9ABLv0 z$L|wQ)cAr+oms9dFw}s}JT768RRN?=)j!Z@q{g;<(+PCZR35cW8b6`j%P4~=34sB- zgnry35pvD3KjsCa;3TO(%Q;I4sv2Z*Z8&5;=Nr*i?J0Bjvb&$(%F()Zd|#$z$8#^p@X_X;vU(zm2QqR(7s z)?)az&bC&A11a6TD2 z22d<~fknUKJTu9KXGi7aH)=q8g7entcmQs@4g9e*u%2bw&{r(oE|zg1^jPJH|8OD& zO4tO_;YWA^V%{YtK)fl)AL`8o`>fA#I|89j>SWX31Bx|aaH=pE=YXb&)X?OBgOq2| zX{WPFN2Q(6X~3PxS+RpEm!AJ|!^?Zz7w-EA9FV?p9>GJi>oSv6yP*QXez>u(>bi?n;t}Y@2gnYQ_3q|q9!*gJq%;$TzI&!$-(YuCz z4uDBupdDD#!_OXQA=0Pa7keVi`wAZl54P$o5Z-zt?%%d2FE9>+`#D3&ZV5=Pafafx|RtOG3AL+aq8va5EtV|%p zH1f#SvX)-51@37@I@~axhx-A1+v=Vdp;DV3d`FQ}^Kp~|;^!b+QXS+xhz25-Q^Shl;8sz1<0GydhnFF@&h^1#-&~rg zNL3Gft6$sXFc~=NK8Wc+SP$MSj+(aT*{(kuQUh$QTSo6W64dvfpWV6F*oo1F4Hx3M z5_;@cBQqneIOBhv?@^4QM$~yL2wK&+fI(h3lsK8sXk0m%RIH33#wfyj68qz)A?^#^52PB2+zNYPS00*IgIyG}b72Zi}Xt;;yF0%DyGzNkE;@U`#Y z1N`o-N-!0braN3`+X?N$n}-&dHnmcDtz?#vc?e=OI@?b~sJ)(Q)P~;qmN=`SdRub zqK#;g6%#_I!`4@`QR~w}3nav!a6J~6!kRVICpu{f1`N8mJ3UYwgZ7miHFYoO3;6KE zzj`m3Z^`pEsbnad>$66N(j++nNYEhP9#ve>k)EUxa)ffH(UBkfd-?PI1ZU=@As=>> zahY!{NLSkl^L+|fnFkv9_Mt5PGnL-5UT2tU?cPd3qHqZ2@$Ev;;|2HEiE@*Ozy z`g(ty=N9(@kDovTJ*@bCK|%Aj^0(#or6~mg8KIUe=C;gfoE!Vy9p`HZmI|C3EliKx zRn)%r?hkV$3QA8)fbVd;Tc->KZbpz4KwOLd#DSNQEKJ2!y6v8efpG=v{FDb7KW+QI z$+@Cng7ZF^)k0B*jPH8M9Felnbz;%mddKAyM)f6>koF26a|rM{0TNBPNI$`_$pcb+ z(iWKkr%;y`bSAWy4wx}1K$VQBiwlA@8->#)HMZnaNsXjzQ&{rh;1EhJd+Q1M zx7{(o2G_qNTml9E{uv@2y!Rifr5qikgd*hY`xtc?JyawfT4d@(l0YRZBP&m$=D&{I zVJvYYvN#xQd-y+2n*-F`9m5Pk1}w)lP*B6 zqHn+B0G;CTucw@|e=5`9 zyX0hG6ukph&=DdYX-LxrYqm+cg~WDbLUKGI=zXASv*z-G7!jjWh(;vu) z-i6nWbP#X=0T8rI?R+0FF5!K5T~j+TG-M-lcQprqqdIL&%h4|U38;bWih6!#<3Srz zde}3I3#A!BB}qol!e4uNLyD?=)UNs%k&BCOcIZJ+SK3ClY@=SjekTWJ+kt z1qt*>azrTz@y^<4#x;ejQvH_vZcHE`;$HV|3IL2nNo_i#23|gA3<^Hcr0H_hY`cPa zBujUr%U!^$ujW@fX|SCjWLVjgWe{=wDb&y5dT4#oZVRmc<1;0F4fj3B=AM&$BsflKuyZ zkdAnA&^C{raVpXz@%;XCO<@RlXR=Z4UQOH^yNCFXAKIG*J0}-KDCe4yhHm(E3cS{P zK|39-LHp?4n0f@3s&6;F(3tV~4|bNN&22yI5V0+FOWwM4ZTvNta^nb^&kztIuq$MU=w+FIy( zO1GU1l0Z|ezk5tfFvNlRw@#cTp#*1AcCC)PqvBdtrZ5@It0k(F2x#sZ`wdRJ8esc zZVh2-U~W(nVOGlDq|S*JQ$Hv9h?3`rRI+pM-iKIOuht6NzLgWU{G-EqY}30!Sk|80 zRo^$agNSeK$|DrRvBCcQn6@O_Qn7*mxgFEtYOoDriQ(}TBkW9EeFR64`c5On7=Yzw zQK2Ar`f8TtFQEx{Oc__!wKaf_MftrRkBuccxoJpC9JF_k}s zIJdq_@if?Q-nXkeuB|B*-&d5n27%ndmTRUk+U_LAg*2oG-kpae)Wb&_#b1n~O=TOO zN6QHyJ0*e|gUu_KcGRlA@6-$Lp?*8OhxW~SOn~=$6 zDsAnbV|*qU%Yv#ahg>#gk|OUmO^&O-uQ}&g(9Mz>uyp-bw+9(QL0sVJk!EoseG`d{G;K218$T~NoiZ~=qWTn4%7nBMfJ=~8n zsxnd}CV~7(oBn7($LCYvP0o{W9jtxOk_UM0a){Km?>@M?nr$&8Wv5bgY}eYpkJxj> z!ksiTk=dOhFY2jpH|jNYRO^oJ+A+UhZk?jX_1G~zO0H;lBKxhOv#UNk1kuARC5HV_ zWze(i({z*v+YHhS)mMj}{fsmdp~e3gaRj&QK1YN(l44%U(#{T~_X((#nQy>WFF#p6Rz)~;%zcr#irnj; z00hq$s~X}__Oexgm%{zwGOT|f>;t1c=hG4D4iti-1A}9h_hA6X#J?Uo0G+Tl-dJv* zN{Vc-sb()vJ)cFcIVxVpyw^TFtXgQ63!!~1eRy$+3MC=DJ=tXDpw*@OSOIzpxxNw_IuT%&fdlrEKNHfM1Z{* zfVxR>p0%rl0AGE^m*K0>1?f`8F!u5?bDNN-X!1Zv|DSlzhbSqI{^n;HBsjcO`Rlea(mO+B_W=@g<6e&y zKM*HJLESFy*{|U*42kHWlj%w-_v1JU4Mkn_5CF}6g{FbMao$eJJy64F?isDj)-J0X~sHoJ%F6zoDhEYZLGi z31@Ei`y0=d&GCiqsjv94$azw`HU20AryrW(r`hhRzaTut=w5KYDSVifhrxfw@qvPG z+h1n?;re#^VDlOK5BnwW2l+?ufBSz*|Ek~j-~ArIAGdzE9Wul}Ee&*T5ze&PH9|3&{L z|BwAQ=C{)~`M z!d(^DIZcLr&Z3WCc4*|uKF)l9ZJwSoBI}jc`W71QUN3O*oR?epA0HG`)%#%jG6#8Lh_BH!qB_ zqX9fwkaA8#O4$w=5_+e~KN}gi_}A*00%mt6sZ9hopJ#PWm{et~F3}%aK;T0}gvn;n zG?3Zv@R37LTB8jelpcFRG2;QhMaq;%#SC$--u{l(G+-#vfTKobnagA+Uth_Xttfcn zyUa;<%G%#6HlTu=aA#Rl_7aD)bw|=$or`%Y1ELP`6GK4s+E$mLwvBrPf|lL`mN*Vr z;5(JN_3i>0bgf6r!Q&B`f^Cy(hGz98b6B-}XL($M5{S6M2%3H~B1?~NHW}2ONBRmo z2Vs2E!dKie1k=J(m!0mhZ?*<}<${eE3N&CS(SV~y0*}t8q0&_S4#c*+p6jh9((KzM zwZ2x?`CEF)EVl3*vA}Z20m~c=`#V>WTuCjRB5VKE)8JXR2D>3|jA^cXEl*x!z(Qe{ zr?VTYp#5BH7j%O`Yprvtk}lG%P*WUNY35m5R|r$1{|y@0*8Hp&&YPAh(4v=2>+fDy2uK8C`Vy) zzk@f-8<1hNL&#fy^bY3)+TS=G=fVv5)!%ietay9{fNmU*|Eu5FZIasGChda_NWS3% z9&<#n_wdQMEjoKU40g*ggz<Dsa!Sv9cg^TY^C%YsQj3m;eyGa&%y3+OdS4ggTlZu^3hX2Yos~}~RLrz<6 z+E9}<_24TZS(1*?TsTF-O}9RgY68MwYv~%!OV~9qRqtTS)7g#H(5NVw z6mhN;e+2iWux9V5{`-QO$!%|(4)`~oaPq(w$!%|yomesb=IDew3gigVC|(q5P%N?a zK)JMzu!{9I$!%|ywZ2x?`CFCfht8UrL=DzR0Gj^T_ERM^oC+s3;Z59|_2bZG>Fm9s zzVm1EVs@jYGxL8RUt44n1v(j-%Rq@M@>6L^;izniS^kDyOpt#w4Ce&fjOB> zV3186EF{ZS?(s8*6*sRD_||Eu z;W+7Q-+Iwtj|&0NGlXNICC_EcW|ClubT~_r zmZ@t&ky}z~)ci7m6Ww09&W(K`T+%R^9qDJb86+6pWD|2wkb#*npD8v@Gq^hv(O)%A4-Rl9NRgL)e6$dIbTi3_Xq>Fw@9trDXZAq zvrb)O9mHV$d}5V8%#_B$O{Sjgx3wu^Q7PN7TUJ}dk|{)&3u?K`z|bs1wrIKu2jv@1 zfav1pxfgmt{5Lv3+h%M1Q1pX7P%)hzxGYYHE-U(A^^TuZ$6aQSPoVstQ641rHL{Cs z!=q7|%G(56Wk>$mliompOh>f^Cz?RYrTB z_lL~`2X=R<9)CVfzM*6(5kboe_u+hUHr$=)DE-wY+`#iYFigb_p1JZja@#e$Zcqq+ z&+uHWnBsbhO$E?kY4MgcW?7iAO_{h%Yj6>?nAMT`B!%^gYVyoqe(LNTcpXlL&>?9@g;8X(SV~)DlQk5 zulP1Ic)eo{61=w&@FT70uo^m;cNnfiy)5sTEm9a`|3p-Qy4^OL})V)bdI@!1un zu;c{^+Az|97=f>TW*L!_tfiRE$EXFA1sq`|pWDC-Ix9GrWVFWd2y3q3X0m4bnR<0p zkWighsGBS-yR+ zn|l~3Y{?p{S6szmW)XwP);TBa_KbqLh2z6c0-7uN_9a|QI|q?9YC|GswOR(S@wUk` z7|Bu;=I|gLVD^-0vK;>w(&0~OlDQP1>4bxPqe_xt->eA*xP0Q>E9-8_Zo`cw9*6Yi zAnvCJhcNE&{zKBzrawRA?#P=)C3(rF0B>gYuuuPw{D zQOP00{vVZH$b$F7=DfP4rOaD+4p`thV}Rw31DE3-nzR6`V_3$WSJ`wK2~;^frQb?} zLb3MUa7cSIpP8(admf_F%c28nD}%bs!{UH__Dx)A5)_t>S@SDkY#+5W;e3z)_p6G`iSS~*Hn3RD zo)|8J0PMs7{>n-4B(5@@mUyqc=KM{w8-Ib2$+eoI)`9f8(=ceyWFLT&ouJD(i$ zOzUK-U5tKw8-nSv4h`>a2fLc`od~im8L!?kwBLX?6=Csz1gE$}sltCkey(CtCYpHy z@UpMGk-YQh@Ikk4qqV*Bav0%$WUmV;gcw)D7=EVYJ5`VAVk;VtJ^YRDc_&QmA8E>i z6;=Q}c02qF@#SFfUG_rSL(^z?$J0914iAW*4rK?t$XHk^kcnOG8UG0i+9yIQ_PzGM zr^Ti1lk~X|iDZ5=#y}NQ-Y+B_jAKyBxEYB)k#O-e+gL5`&_SQZNeS1KuZxWI<*k6# z!0&s|dK$-dkVC#i0nRoHN6Rmq>!_i3ag9=*OoRUTM`f5Bx?hycg}b4ZTP&dMNb!d* z7n{lP5fwV@w&ZL|REM8H!0YS|w*G$(7mU{ta$!_6fu_k)?Wg;`&f%R=>a!x>!S)FrLz z&Tm3b+$xDM%o<+)Z9sGXKGsEB%VO{?@gi}z7Y=lg966BvW?^mWJPt>CY#{I1u*k;I z`5~)+W=@#y`%-oXQ>8IsO?n3l0+7Wy)HodBh58CyfjpMjIuGji4Gg2n-6gU%gHhlu z)e)+b?r7^DpX2#LxvoXf2PTtH1@AVkAIq_jX<7ody|P-90q&&K4I5Zfcc-f*Kq2RO zyW!$?2t#)%<+l%AWB3G%C;`xQaRjNX>}5Von^SQ@UK9IBROY8p>=uzPB+d=l>BA}8 z{?=WCkr-ktUH$>z13DVk^{|R^cMNqYZ~i%6Cep7P?HcUvmN#vdtgv`Kt!+2U>BOYu zqhz?|PH~QL?y=myw!mh2<(EYYqx{DFb(#FO|&#rVyd>N1OXFv4O6!Y8l9`^>t92FHM-Po@^=jdsj1?sB3Hi-{~h(? z8-p<3UD*Sx*V!dwqT;(+IOMT7M%?RfAMf&im5xW{TZZH{UGSU7&_KumV~)Jw)jI5I z)r){>{FZW65vqN?EMQgjQC++NToj?kO+JH^aTPCIAwi!`WMj!{dDc{3mv?~zqzNGizGlw4?kUk&;=AD;im>Oo)M`}k-4exwxQs8n2@eeis@zUv&l9j>X6P%Akef*zHE z9)f0Qp9LR-18>;M{B{YP^3~|6971fP6D6FyMq};0j3f91J*l86G=FJ%+0exw_)l2Y zEH?`FswyjBG7Ca#M!nBeu^W|&YRuJ*RcyE~?rxWYY?fq?5W??>p!j&3daT843t+X07=-4+yHejSh9PSx<=Rn@ z6wB};{aXi2+)outa88Su2T@EK;RBIRs@4CX{%>m`EC+AURd%A|ENc_<^2@IG{E zoSlRJ^i08V)PMM^59|m4MtBtil&?>ChxvT$F6+r)qi0M@e5bHGAxCa&3bas-8=`Y>zFq+PRIb1e?fa7|T8CK>aGZ zU@Y%0%BlK5r=QL1hIATh|EJ>PsMFUMGaz51hBYY3$cq1U$03Lyz=4Sm`?0F#? z42-WOsvOu4_`1of`Kg(NBS~FaUuL=94z2u1ax%_SdWajiBoM3sNei$39-%ubY64d! ze>c@3EFBBwUN)w)ltqNILJyHKVxi;cF&H=zkCdFD>XdqdaZs_Nii%bUC!zxE>o+5A zf^V-J{mnDv;ju1~=XTYCd49=e>;}P`P$SgdrVMQ5?#54?6QzwuVvlb)H!qf{MYJ**iLX{R z4<%c|X+;1uK#Ux*A6v;54*q1%I&l`FBT*E2EC2ui1P1?*n&V6bQ9B@zZK2I6e9lpm z^zgJbhLQ!x0I@P{O-@SO%;vby?eikaoL72W%NXq=dUzzK3#C|aNTrh;+p-kNX@Qu* zd!r4f4eDnh%9npQ^3p0->sW6jiu>Yt2vO-27Xr{>jMcWfmUC_3qx&M8!mCmroP&3=RmQYl z+b5@0fYZ#a^bX}oEo&@& znar5iZcoc1f-vlpEe6SjT54X{`I+Nm#!SX0P+&~p$v;LR)Ft_Vs^!+b-WMA<2-y8O zT!RzD9)A+qlfA>5 zU-y!l<1Xr+mdscZIusFQi3G&s$59_SDdxt_rDlW5P0?=`Hz>*Zr+PDiugJR{20xYpxh>6626IiR+= z+60sl7Em;$e`-uk7hy*txDF1@_!!-aoAT$D_4Bp)GIHPY?V8|s6gAF{NcWtAGKUitZOl;o^oFSOG z9)q+X#T2{T10Z#0;w&faX2i1k>2(zVdCOQrIzvEuz9*KwTh1ro9g8@m!)1VyPD}># zym>%?PC1RCf^LKa1WqbjR%*iq1x^@i+)xt9^s){S%cG`2es?(PN2SL6O4T%+=#msLLWkSLxeu+@LaNmEKS1Y)f>mXHMPWd(Vf zz#BG9Qg?Mt1h-hiXgE#NqG=ExaMt=Rq>y{CVpV7ftjULvd5Cf7!0+;JbqaJSCebgo z;tT&vNQi0&C6j4HOfZ<3f*7nS;)B_VqlWP6&g}N^`1zcv17wn=Y;7KGeJWlXHs3DB z1q4pLo}CDr62DMcjSnboxg18jJ+#H{kdxnpku>TffvSai5fdv-V*o+jJ8vs9SJmn> zs20~0pY4WZM8>_^1(NPJDYNp0Z>#8p=ASCo!{^}FxSN=QYx3}M2YN`SjAll%+aH)7 zb-4UEyYJvi3(Y~L^hcVp8KNYS?LIE-cY$Hd5}m+OM~GLP>Uemxb4^U!$PAzACt{XV z^`E>(YDUf#9l$rgtczRYi6dkh3Qz5&w%COJ%yIVFtplg5GnQ}YemDq}=p9t~{NTi; zcUd`8dOXHlS4A069HYPZ7v;HjKOlE)15+Smb8$Gf5M)D|8?ky2%O(E#dpjr8uG?F? zTN66m>zQPG(UnivBvw!g2Z{P5c7VKozVnj`CaHYqo{S;SAg55I(uvdbOP+Ylw`XEu zkePxD2cxQ*ohH-qRA<2FtxOHCoV|u|{#Qq@l64Y%qAzWKgU{1)R3DACZf;q{Wu?2p zv@^d^b7X2>CY5b(X$Nejyg>>a1drKD5sb@)06GlW)DQ83Le!`lqn(DRu2Y^dTX>i` zVso-?p9!+*{Wm4TFZAsVkd5r=xI!)aA-Fn~vMNW1@)Lums>WXR8elo-mKyDCIOevY z-kWl<^*86}E0K+ZW&#kvj;Uzwhlr^0)ReQ;BrI&K?+7b@3hzYckrn0=lZ#joN${jFajbIqg&wS>Wu&36T+e6^)fNXysDTqL6>G?YV^?}W(! z8GALZKrb*nsnO`7d`HhIMo)X)u-eBV8{8w&&3baA`FUeULG#*>=(tfcoV~Wr(6m#B z_R%utUijgoKoixt?=-umQH0mx=b4CsAw5vnhr8u!oZDploR0JkTdA%@QZBg|Kmi^@ zKR=x~yHMdkxm^hh$(3ay#dV|ikCbmF9_?7%n<2yS1V%vaLnjZ<(Q?h09>&MJa^?D> zik8L30)^Q`OFW^Lk?~oTnCiWOGEYUOZ)(2I>&u%;BsGikaFU>nV?O7_?Z?AL(O7$xlqnY^YSEToqYzU~Ws8$q##YS%B8gIMV_#H7RU>CWVk8bh-QsfO+ z{_@>DqElD74wPa-WrVRpz`^Ud$5 z$-daIJrmSFdu;*?W@)Uy$2TBq;O_M~0VbpLp~5Igu9PG>4-dUTueNcA84@QaGbFEl3>^ui(E2|?NW7(z?i&@JXY z&ocF6)gPi4tCHYPhQJ4Fd<$<^)gns}2()Fr&1W6jn|Y1Q@t5U(SsSFw8(gTCr^Sn8z1sF~7Qy7q(xSxPsfpbW;$->2{upq*$H`%J5=9*-ZHv)9 zJc6^U`qZ($%t`irCQA=GACE>D!b1*_-7-%}ZqARsmGe)nVV4uTJoA_s`; z@d3}h2Zc3VQz#k|WLfVM5+DPt3JzZLXIt}hEva+=HG$$0N&I*>0MiHn zZK=XIo&&(;-Dcl?<29u=W`q!a5Oj^txTzzzO|l&UA5gchW=~snH(IJ1VFSb9nPi5Z z9qbuWbnoQ$l*OcMoC#w)&%+Xy360o6CNxZE;=z<9YopbQUHwG|Sl#?*z&m*$k;7fg zo-H?cxLTdTH}8X6BK=;7!58;#FrOAtSYf_fkA$r!jtD6aHmaC(V|+;za<{oxp^kbK z_KuneB?zmy>W6UAE48qvC8t0~Ze0#Qn+HW8u#^=+sydR-4P7V5T_}9(44fQ%BWCvZ z!^PQ)Dz2Z2GDo64#_f>_DdnZx0aQ?uf#+|h(1%dH{If)NqOm5bdB;#*<#`Q4A>f5O z20UECnbh_075cakPTvY5Nx6*@g*V$LdV>w{V98x9cXF^sNU$sO9dN?(AVx6b@yr+A4~QaRP_Np0wE72<*7uZBp@w`XPzJ^ zh5i0_Nluvel&m17o#*SWm4kH1=B$^HVsTHN7j(4NI4Q9Cn z6Bi&Ri}j$7BJAKOuJvLhAbdoI>|C+bs+i-*dFd2Fpu%%bbsMP{OQl-E2lpV;&ZurT zve>Po=6+`%G{dXw8YTWuu@z#Wh;TJ@D7m3*Np06_kA{vS!lUHp9qX7teJxv5L@D9Y z4Rg&G`?MrkO4!z*UKy3j06n?o5fK~RkOPSpVN-c4sQ(lIG(OyR0?6N$+KyqnVy)O| zumMcXPt{F-Ca@(beV+|KRk%c?wfcMz`45JsLZb5uHe~%HsFvU7zN6m*!}+Y?8{BXt zy{(>xE3U55XGvN?Si5bP6a{aMBdfq&_?5YX%r@w7fk62q%9-BMz;>_P>lkid=*c3} z6Q68Z8em+q%F&z{E12b-={=3%Shov*GWRYP(yoFQ_?M{bsHMHR2z92*_7kXr>*ZDw6QP!{DX^c#`m1d1G)Z`SMbF%p~;D#x#io1BjfQ!Y6N~yGb_mYBKan zJ-E#t94yfkd{IKe+`Tl4?W%QlEK{?H474WHdZ5YjpLY zN8yTXPrrdu*x@OQ+mvA?)NmM2M$RLPoO)`CM1q}h@tdY8kF6o0Dd7qWwT8L>gZ=O* z^%B-7qSW-xh%#@KO}o!ZtUa~p-`K<}VU|PQ@20|8Dwu}YRGzuDD9EFpNHqQi8Nt@}8*mN~6^+{QWuqsfd-ZsnR|n112~41SRe z$x#b=YzgtMj?zk$A%<&xnuN=GMZoBAqkuI*`~^uF=$J$}9KFx1mf%)Hce6G&50|1L zma*wdTfKa!m zvYtlytm7C4h$qIPAQi)q9mxbET*yIzYa-Ib*nH}|1?omFX)$14&n^wt;hJa7Zsu5m z6V?t4F>4=fstq_qB3eziB1xw#wuBATMSkE;@$dY$3mxL>Q|^tD?+yAKg&u%5QMIh( zElcgj`iDLD{tlHeGsjGla_uMryNM=gKU^73xyq7nQU%oD*;e{)dnIt8yrI@||2vV8 zd1Dv~hrZrQ%nY=}F|=5JjwUY>2y$>uDpkp)Yq&Xbx(^(z1fg%#$+16MRqPGVzUY~S z;Dc+qtxS;xw)CybeZ~ROJsXHW5m5VY5Yfbs7gckisx!>L0 z-k?;c!A@(sJC(GCdLa`GMwe?-dQd!Vas%I)%zLo48iAh*-Tr@x3aj|sE>JFFoyxep zn@A;ks=cg7=<YDD35hwOYa4xCUN1UZ z{A1D-yMetvl|WW%uN^O}8E%80<@@Bth^@^P6}d9c?l}nR=`X^RUMGZ?;eyeLjOB3% zEkRhD&|k zRYn-1;NBR?=dTdlx1q+@#f-o(OF&mMu8Eym0HIes8Rd_s=mVxupdE2*c|qoCqlr>A znK^D&l$I>+pyh7usM>z1FBYB#;hc2=Lnuzy2f8|!J7D1m538-i%(!1=fGv2PA~WfFI^%Oi@xIgRBqTDZfI4La^ZW79R}}9v|(^Qz)*) zOhmcmgD5Qx8jwPM-#-v&wAqBV@2033kQdg8K6_GgNmhYDjUKz{c zy{s_ceAD#IQ(f<9@7#_WmwuKz8BUk-1DkrKENp53cw25<3R1szg9z15F3Js6b4YVD zgSYZAfTuUI;cLmzk{K^&usqTvb?XRo*r-*1JOzEe+it?4*PsuJuf6E6<)4OpAVh3MMW?sx@vnNz(+= zyodikr6sO&ZDFfdGUuMNcCN!NlH;R>=6oR@wIS=YIk|6FbcK=!`F>iI z{+9Uhb+~?&rU(KBrg8cLFKIm^iz`D;Q1}L@+Ull;&oKAvfugEB8muYgL!CA9-YRwX z*4tig>c2>nr9TW4mn@<+lv63O`+|e%o`iSV+d4|)`SbJ^0-2bF)rSFc|H+kODIOL@ zLn~*IljqzWukGlYHud!=**n|DASV6Y`Xoo*us!(FJ<25hYp;(BrsQ6s>KDDoxhG7T zIakW8Nt+YAS{t~VB)!~qh!dq{_JQ{PHjf`Nn%WGUvZB~OXX3m|rIjp*oXP7xG)EoV zCqE#~7{lTte7$g@PAS+cn!tm+g%l95efa0^-Uk!Qd>JTqOB?UE(@AP3{c20$^CV!V zrfLW;Y0q9{+YdI1sB`-7sq%6Cm`+}+uVC62D($&Eb#N?6Sl8`oTGzOnRg~QlrQ_RT zwun4R1L5HV-<@<0$|%+%v6{PsnsT`2^)N-{LA9Vfl?8RI`SJrfOM9f)vUtt6XP(j4 zCZ)3ImiLXiZLoFtg6xD)!hRyoRn#dljtQ7Mk;dg7yRL~B%L-^6`{Z-|R7<7%w%0le zQ%)8jPfucXf}WOcH0Nhtn#}eLmc3|eeX%dEA@OR0O=>vM@}xE*MRJCHP#x+CE66{Hpnqk7cQ?d9V%F-(RFfwD*ioRu`pNyA^ipCO{A{=^<|eLI*4*z_?ur9A6Tf^m zyl!>q)@V6w09-7>l*uV`9Nhg(BQalC+jwnXT*Y)Q&e7&d=<9sp+@BYV# z3OFAHHc8-E=wUD$_^r=XEClztRK@KRzJ~)75R^y`rxYOK&P7KiQHUUdd2$hzoN#-f zijwF*_`{f%pt{T*7*;^-42aFWX5>Y9AJzdconZU!v-Y+$k)cQOTZH5N${bz} zWdw0=6pCUnr~x!w{y#po*ZX9o_SSEZ#9mxN6(_z<6c$^YU$O^_#0?hcEjRt&2s*n+ z=FKP272<(B5q?qJTqfW)2S9+hFtj#b+x|i{&cIvPRL`ya!XYSw@^#!49QrVjXYd0YaxCFVoc)MSa;lK3 z%bnyP>Yg!<{0BdNf|SWpN#=h{4(mMn2jZo8tO6S`H~+xE8i+o8#t)$19Dl-ng-dWM zi|ICsr1RSyzrB|dZ}*(tU=BEd)(CY;MuzqR1H*OGY(gI<;U-JWhHOt-6cNBq>S zCZo&O$39(KQQFuaso0 zArSdC6(~bw!b}|)dt4AY64-q}g$_5EliHc&<*NukXo7CQl)YSQwyQ$4G`Mgp>k<#T^9!U|#nqbE7~XftAr}wA7)ryZNNf(|-2k>#lSToM+l^IIIDnw-D3#kD2nu!6wobuO@7 zqNX~qt}mOohtn;PhUGfYA3h1~N6#Rsso#a^{!2r^no6L2(2h)tLq20mP` zlLq3{9*DX|_y9cDwGYbcz(tBU)nj6Zvwk?Un zViZ^5E+xiUx|@v$Yf6&%wD5)`Is_-jib;w?q<{PlUakdV!q?@7qs8)vL`4KPU@C-jXb zti*1G0lrY5!Kl5o5FQI|N$nDx(G-rPf)?S7fHhod6~Sn!{7jcKV_X(QE#HKRP^?sD zRxo~ExD3;)ve_?#u16kAhU9b*o}q-?DvXCkn&ZRmJPYBSYt2@1qI_86CnfxS=xW5) zZA=rRxhKS$DSBy;g^&w4>!dLkpW|oFH>ij%D#-)n!l}R2_Guy6PY;8wHYyGY9?qf(BToYLmYM%(9$@cCE~qKwDj z;z{pMCC@kp9Hk?X^NwF1WFptSaSY9tZun7bg}Pueua;vi*OBxVX5TuH=<8kDa9bL+ z$Y;Xw^CWiUf?RNiB@dpv=B4^!2(7S9Dw4DT%bf80VMS3qP2;OfY%N>pA zX`(h~^re+q{?^Yl~OH2|H89S7d{98cJ3Aamb_k|biG2-pdT!n z`n1x&22jt=;@DEj@_#<0ogO_d;+&x0Sf6H6MuCCnDvm%9&wbZ(u!VmC*sG121h(a-!gf5RL(8drKM~X( zxw03|`Qmd|o$>xmwacAd9!k_)@-3>Rh0yN_mUPXB_58IU>U$mb6PJee)}Y&%E#L$z zW6G10nSKxOC>+F-=;i_ z`BtfOv4PMI`E$Z|ljJCejcvAtC8Scy?QHAPEW`KTOXwrszpJ!Zz+q+^!mbE&9tz>z z=4CcvT_ZZ4U0qN&d7p2GT?)9#S9h^}jVgH6j|uMUd0O{;wy=s+k)Tp2jq2?3%2@^S zPspx?&=fv0aUrNSvFftzvj}_4a9S7#<8nx?IW&?V>!Tsj{QR$g{d}t7)O7y;;6MY4 z>6JkydmuTU^X&BXB9Yl`xvUq-8qf>9V9NRusPaRc%n)KkFs}((QX_`OK1Za5$nJXS z+lP+>j#)+(Wd8Tq7LY=V5*4w6(NXeyCaV9zJYCG|nMt|9)%yH%psL@23uW-n3KDK= z+MadeeTg#z-x`Zc9v3Mbc#vzk(00{Z3@i&)qIbxgmL59niCk0Y%(E7B+cJ4?6=l<=wMKoj{_-Kt(-npl7Blp&x5|sj0pwB$03z{yexmBD@x>8Xd_<4f<%v)EaAp`+tf_ zN<2Jn4z;)sH3!=Rq*7OQ znrcTjeS`5kr|m-6`7U~gs0U=S)EI`_SFjVX-CQxEAY@PbuT5Qe_0j|MSJb~(m7XKi zmK6|iNV`90{N!x1YXj_N0x5|1w3+;*e&?(dq!1~=X_V9)K7gnvd znf2W<>a2^6Osir&OomPmh;m;5>Gh*boiQm%i5oV^U-izTN3f>x(cW|;xbSXPiDL!V z&+gTUzUDrRWx9!1LDYsyXUw!S+xYkE{q6}h&-Tdv7e#)#;!14nOrZz5t0~UWzYw^W zsE_0&*IP#YWVfsGqal6=r5C(-!qGCd7OM_2x|E~|1MVgoo$rYE|3D{4K@M8~Nq`kV zut_{;TbeHsM(id3_SfJ7Z_cYa>lqmu^8J@_;B7g{q6ee$9wFPC$*bT_? z{9#QFCDT*u#Qe5ZOP$9)+(hI&*r6QxGjm>BJ5tY{`!c`0X1s~ zz2-K?f!eVw;mJ2J>joI4hl=KyZ4N|LTP!nAxsm} z5k#)HJf7sfUzlBqE}KI!bg@xMxOefo9p4-n*4{krEvQQ%#m+};M8)Fa7Fx~xj$2FQ zY)GCaiNuRs8*e9y4}S5);6#=(YEU5(oS32bl!X7Xo7;Ozd#{H(pT_F`2`B1xSEef6-@#o=mR`xGD3tsRQLCVheAdn>H^yq5$uDdJntC0AE^;=Q98>NYyc0 zR{W>@~piH2|`&l!+zR1ud= z2aljE<2b!F$>s^6{RV`lucYZE-RD4>{IBlSgTdM0eBBafRr`{c@ko?7-9CRD`Qp<| z@Uj|h_6YU!kJ^w0p#Bn#pv|K44Qz_s@skwbw7}T7o1#bYI`ASxDJ_cG{|7gQb_Oz7{IXIsZCLBd7cz8x3IdF_JuqdTC z4|%6Stew(Of2&(9xuxf@-1}LLR8>CkHr3-3bWP&40>#Kyb2J`Nu@Sdd%1$nk>-zCl zE&!ydD~bL!rR4>k@#s#CW4R=;paL?Uie*Lg0aJyZ(2=d~D`AQ?Szc8~o9&hRls5pve>{c{k=JZAccNt}C(xkvUrlqpDk9HLXI*sr(ZV zQazzOZKk!Ph5qumi)b|Ab zwY?QCy(?boLr@szZk2S{;${rpSIbz2Nj)@&T=G2@(-Q7MW$8%r6c*VtoP2+6J{**| zgcrDax>x_%W}eFhos?UIHmG@#9ZSWoSLH*pMM{K(J6-4bLA1;X$$qy~s<)Y^Gcq;~ zgBhPu^5NDqiuhiiU<|~Hc7WBe=tC4lu^QsR&54L4rYcrZVRI3^jrh{+&M6jEy2mNo z?_z4~Uoo-{H5tHaS^2h@IMnMA|kB9 z6Lfb%EWmM(b1Ikwit`FQ$a08=I@)BfbMl8%rY%8KMtsn*m>2214;bJP7?`j+bCW?! zBSkFI*BrqGA8}C%7RwcwL`7@EsmzAwurvX7>D^fTIVE;Ato6!;6924TxWHACEg&)Y z$GL+^B9jZh(sv3L!s;an7;kkvf5j=dt|8646o4{L<{6fDAQN0AA!D+YAPC=;=Wcub z&S2j1#5e8_cwNqKkSB6KWu1<#*uioG@ov9+!ko@wk7lnnQ56O};{LMaLF_8_9qZw949tCpj0jDm zbkj|D08W!_*NC(($}Iqgn{$J-6MMgXT}_Wml zyFoFIZuU_c_%2%wPG~Y=v4sZgqd}7b9dppk}zC@E_} zLuSDtR&))Eq#%Yn(XfnU=k97vf@B{N6c(*gGDfnMF^r$wqCEPsE4oKqHDkF7YcS;$ z!`Q-f>I%SiZ~8W@moeRG?bbk_1Hu;FyJdT!k^f>WRN?r19>NUgkmaNC6^CbTF2Pil zH2c0^dDI3}t;$lpX$f;`9?k*8h=LHw_?qEoIJK<%^4o3F`T8h2(eTD7aJEt!JwJ(s zMx|-N^v9!bGa@UXBDuouxfEieps@J)rMNB^yW7!Pi(6R))U=KH^L(@as^0@3@6LG3 z&;a+uDyX)X?2#%aqBMckw+k{>;T^qpL)Cy~G8>^|m|g6o|26-|sMiy!5BSw@^e^Ij;5=G8OTk4!4SjDahM?l>t9jk#-+QQxVwXLd zcc0n&ieylVw1)kWUPWuL&vm@ zr(e(Vje5pLtE82xt1N6xFem|>K3@j0-Ym3B8;dQxB5lv_s)5c%98?tP&$cv7F5WN4 z_h?%1qxJswEI6*rHBQEh?sheYEsX5!wni-dc%b1$HwZ^83lIYc;#TQYN2sGxj%`*w zS?IMvn@;kbB4csIcg}n+VTkf(rEX5z9|Y{xbc?DbmYpdm!v-+eas9%{ zsGV9E1liQ_Rr+h*ZmDrwNoN$p2rxydjr$`~YjBH$Hbh{DP@uob(xPgrf50w$8^mB(Iz?mkcA^}i@`e< zpqc3$jTyq~LUK^R$62$t@epIdG-X}G`UnGO+57!1K z-#t0F#YX&F@fP zf=YSPsKjQ#&V9<-U`>)uyII=o$jHwp7{bCLy>u4FAaOi|AtBPQ+GDJUs4VHE$9A$E z4)mkHssY1rdZE}Sl0S3&8v4sH>wy2XBfF#p6`+X#sH;c5-TCFany^1f9i|mK<}Mi1 zuyn1ObO@CuQEd%UHT1I~y&ZP51vCwKzZ*nhSt7-d>do_ci$q_72^H{8J+0M0J(_Jx z01IwZ3=grory5Hn)*e#Jn!y9w2Zi1KrI&>{q_`Y!$5w|3vDP_1Ow`e?+D8&uAJ5dU zFj>x1z}o!A1>)@Sg=%F9mcHx$jUDi-h$jfyHv0_4A4PgL*9Q-Fx|2D(U_5vrA3Ddc-?ECj}?6#p#?GMt7{b29{!PHmWQ+hfk z6FT3yWYE^l%V5y+2_0!hSOU!Lb)@}K((Pq4vR0A zyi6kPmQN)5%qCGbf&H?CsM)@ludT^P9A~5;a-!{WxSon#&yk5nBgwQ3ivKR(OzXo3uM=}iO zve_qPMm16hkxg_TjQj3u>zTUGcmU1_m42FO1%7=?)Vp@GT*nIV*Zisg6gTVSs_urG zUNubCOK{7|-{%YOzPAV+)(v*%idz8syvk02F{Q>!k%1P>2VD4S#Dg+aOTA($nHQd= zTA!@Ye;pUN-gsBaKcUkbyxuqUVX^|Zdb!^d7eQ1ZJ=C`nd>Pga@tgRE60a$3G@{5j z8HVWjPsbz@9qaI97c)yQ0zBH*_8qNW$b(D^0|MUbkB6&+#XGNup}p!r$ig`}qF08) zwSm`WnS)cd(Zszg&AV>Yc4E-}4FU6(juUR)&8O&vhnI@Mn_v9GTZA;HV8GdDAxLn8nHA15vkeofXZ?Dzl!x%QkraKa%WDLG`O7mjId zUw$+^7wO74Bzn^g=SAp+1A)j)L=OlqF#Iog>?``qfU+PAS9~x{#K9(e^p0+wV}ccC zVOGE}GZv)BZ+7qH{+!Hd&IB%6ky*Iaw+Hn*ux6)xQGiJ7+a-IYHyYNgQ0_0s=lh{8q|7b+ipN*o})h4$CzZlp`?`{k~ zK+ZmW#0PvXbaAfZ}L0q2YDLIA$Z590Yh$SaFLA|oKrI>vz zugH$R{MmWYoEc)z7wETb!SW>-6hvk=G_JP!*OD7dcsE7)!~Y3A#{223HGanP(W83{ zxya$69CmgX{U87U02st#4tgcHnesv%*+uz4b65=aQB)p+5tLhMVd-Xw8hN%Hg<4oI zEt)Y}etkWbX8TcgQap9Qlp`eIe#qA$k>&LJrY%2F__Py^6)z>W+X5HB$2x8(NlsY| z+Gzm)y3BwhzAPD`(Fog%%rQA~>{K9!T1NB==I1Z%q8h78wsv5yWVCDtjuXewfuo$1 zk02dRIaBNj6_u;U7zE$Z7n`6dN8;_0v9wumK;>XwE`%V&4{mX5gXJs)LL9(USMetM z>K(h~7m5a6+j)+W#fVygDh-wdKXyYX)pzKF`Rlf0dB!WY+0aLRc7`enHhFRfU{Uz2 z%5VUKW{6^*qy1K+$)Oc!wvCW|JGk;@Vuz!9)G;7kWl*^8nW_?xLAv63rmY8e!l9Cl z?(sI1;bt^aWOnRaEI}DOZN?0&ID#D!0aHSnqE3sA;G?9WDroMFgP3=>kf*RzViRx> zQg;p=xojt>N&m;Ef*Yq|C8whXb_&^L$Z(9AMcpO7U&R*unA7w#xvQo1r@;*O#tFXC z;H3u)0fQ!nyp}V(*?I<(U|gzDbMtUpLAh9G#Pc*n0*o&FjL(BxbE4l?#3$R) zWTzeGd9|V1P&*mr_%F4^yD;+ka<~*YCIUas8jOi17s0i=9V(cyz5w><3zvvv>aN;m z%Oh8F+$y5)3{ADae`RSiXG@0000L|Am#B zv9j#z=|bU#s+kExlnwGo11zeNCQWc zU;qFBZvt+JEXe0p8G5B85e8gkdiG`vqlve~Aoq;-K{d(5f)x`BjEd_E(~4P5?)Dp50f zCwJB{9vtp|g~|iv`>ZbMEtkO;5bfsO=d)~bD118^=Fr#cU`T$0848@bPB%Hlf_n00 zFXmdBrMhW{Z>iOBa%!wMk{08r_ZS*4gzgs0dS+hE^znHv{BLn$VPB+vo@c(C0-fY+ ztGp5v9qjzNl|q(LVl0-9TP#U?K~wWT6ey>+OD8S;Kim%s_HilMgPGUWuKJ#K@rDQ? z?hOzlgP;9;+mwdinWa<~D_quvRYpV>HPZmA|NQg*q}P%6G-1~Ncu4CTmO|d_{zRc- z{Bpp6-$xF*riUj0$9Hm2W4qtA4y5}iv2B6&hSS;GYufcIhV$#i+2yEB4a&()!XJ{%inz~-Rf&7xa=-f z5dwIg_1lz800000000?7MVKJNfFm80?L=mQ4P*#ok>zrtg;5g66tn0En{WjJ2CfI2 hi#7Q^sU2gmCp?2?!(&d=O0E>g3GDL#008%%vH$=8 literal 0 HcmV?d00001 From cc17b712f611e49abb6a06fff1c6b1d79a18cdbb Mon Sep 17 00:00:00 2001 From: Phi Bang Nguyen Date: Wed, 23 Apr 2025 16:04:51 +0200 Subject: [PATCH 0049/2553] drivers: video: smartdma: Fix a typo breaking the build Fix a typo so that it won't break the build. Signed-off-by: Phi Bang Nguyen --- drivers/video/video_mcux_smartdma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/video/video_mcux_smartdma.c b/drivers/video/video_mcux_smartdma.c index d9388b0951d..0316e1ce070 100644 --- a/drivers/video/video_mcux_smartdma.c +++ b/drivers/video/video_mcux_smartdma.c @@ -371,7 +371,7 @@ static DEVICE_API(video, nxp_video_sdma_api) = { PINCTRL_DT_INST_DEFINE(inst); \ const struct nxp_video_sdma_config sdma_config_##inst = { \ .dma_dev = DEVICE_DT_GET(DT_INST_PARENT(inst)), \ - .sensor_dev = SOURCE_DEV(n), \ + .sensor_dev = SOURCE_DEV(inst), \ .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \ .vsync_pin = DT_INST_PROP(inst, vsync_pin), \ .hsync_pin = DT_INST_PROP(inst, hsync_pin), \ From 78b9f25f76f662ff355903a639b1f0ebdc1f6336 Mon Sep 17 00:00:00 2001 From: Phi Bang Nguyen Date: Tue, 8 Apr 2025 22:35:24 +0200 Subject: [PATCH 0050/2553] drivers: video: Use video interfaces binding for ov7670 and smartdma Have ov7670 and video smartdma use video interfaces binding. With this, we can fix the chicken-egg issue in init priority and don't need the workaround anymore. Signed-off-by: Phi Bang Nguyen --- boards/nxp/frdm_mcxn947/frdm_mcxn947.dtsi | 13 ++++++++++++- drivers/video/video_mcux_smartdma.c | 2 +- dts/bindings/video/nxp,video-smartdma.yaml | 8 ++++---- dts/bindings/video/ovti,ov7670.yaml | 4 ++++ .../video/capture/boards/frdm_mcxn947_cpu0.conf | 3 --- 5 files changed, 21 insertions(+), 9 deletions(-) diff --git a/boards/nxp/frdm_mcxn947/frdm_mcxn947.dtsi b/boards/nxp/frdm_mcxn947/frdm_mcxn947.dtsi index 3ebc13c0e9a..6867b44d278 100644 --- a/boards/nxp/frdm_mcxn947/frdm_mcxn947.dtsi +++ b/boards/nxp/frdm_mcxn947/frdm_mcxn947.dtsi @@ -100,6 +100,12 @@ nxp_8080_touch_panel_i2c: &flexcomm2_lpi2c2 { reset-gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>; pwdn-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>; reg = <0x21>; + + port { + ov7670_ep_out: endpoint { + remote-endpoint-label = "sdma_ep_in"; + }; + }; }; }; @@ -112,10 +118,15 @@ nxp_8080_touch_panel_i2c: &flexcomm2_lpi2c2 { compatible = "nxp,video-smartdma"; pinctrl-0 = <&pinmux_smartdma_camera>; pinctrl-names = "default"; - sensor = <&ov7670>; vsync-pin = <4>; hsync-pin = <11>; pclk-pin = <5>; + + port { + sdma_ep_in: endpoint { + remote-endpoint-label = "ov7670_ep_out"; + }; + }; }; }; diff --git a/drivers/video/video_mcux_smartdma.c b/drivers/video/video_mcux_smartdma.c index 0316e1ce070..bf624ecb47a 100644 --- a/drivers/video/video_mcux_smartdma.c +++ b/drivers/video/video_mcux_smartdma.c @@ -365,7 +365,7 @@ static DEVICE_API(video, nxp_video_sdma_api) = { .flush = nxp_video_sdma_flush }; -#define SOURCE_DEV(inst) DEVICE_DT_GET(DT_INST_PHANDLE(inst, sensor)) +#define SOURCE_DEV(inst) DEVICE_DT_GET(DT_NODE_REMOTE_DEVICE(DT_INST_ENDPOINT_BY_ID(inst, 0, 0))) #define NXP_VIDEO_SDMA_INIT(inst) \ PINCTRL_DT_INST_DEFINE(inst); \ diff --git a/dts/bindings/video/nxp,video-smartdma.yaml b/dts/bindings/video/nxp,video-smartdma.yaml index 5312f2b3bc3..0ae3d438663 100644 --- a/dts/bindings/video/nxp,video-smartdma.yaml +++ b/dts/bindings/video/nxp,video-smartdma.yaml @@ -8,10 +8,6 @@ compatible: "nxp,video-smartdma" include: [base.yaml, pinctrl-device.yaml] properties: - sensor: - required: true - type: phandle - description: phandle of connected sensor device vsync-pin: required: true type: int @@ -27,3 +23,7 @@ properties: type: int description: | GPIO0 pin index to use for PCLK input. Only pins 0-15 may be used. + +child-binding: + child-binding: + include: video-interfaces.yaml diff --git a/dts/bindings/video/ovti,ov7670.yaml b/dts/bindings/video/ovti,ov7670.yaml index 4b8fa88f117..01ddc984930 100644 --- a/dts/bindings/video/ovti,ov7670.yaml +++ b/dts/bindings/video/ovti,ov7670.yaml @@ -18,3 +18,7 @@ properties: receives this as an active high signal include: i2c-device.yaml + +child-binding: + child-binding: + include: video-interfaces.yaml diff --git a/samples/drivers/video/capture/boards/frdm_mcxn947_cpu0.conf b/samples/drivers/video/capture/boards/frdm_mcxn947_cpu0.conf index 4a604bc267e..2302ba1e88b 100644 --- a/samples/drivers/video/capture/boards/frdm_mcxn947_cpu0.conf +++ b/samples/drivers/video/capture/boards/frdm_mcxn947_cpu0.conf @@ -1,5 +1,2 @@ CONFIG_VIDEO_BUFFER_POOL_SZ_MAX=40000 CONFIG_VIDEO_BUFFER_POOL_NUM_MAX=2 -# Workaround for issue where SDMA driver needs to start before camera, so that -# clock output will be generated for camera device -CONFIG_CHECK_INIT_PRIORITIES=n From ee7fb5119b0b93d7f4bb194565807b86a4802a93 Mon Sep 17 00:00:00 2001 From: Phi Bang Nguyen Date: Wed, 9 Apr 2025 00:03:30 +0200 Subject: [PATCH 0051/2553] tests: drivers: build_all: video: Add test case for smartdma Add built-only test case for smartdma driver Signed-off-by: Phi Bang Nguyen --- .../video/frdm_mcxn947_mcxn947_cpu0.overlay | 69 +++++++++++++++++++ tests/drivers/build_all/video/testcase.yaml | 3 + 2 files changed, 72 insertions(+) create mode 100644 tests/drivers/build_all/video/frdm_mcxn947_mcxn947_cpu0.overlay diff --git a/tests/drivers/build_all/video/frdm_mcxn947_mcxn947_cpu0.overlay b/tests/drivers/build_all/video/frdm_mcxn947_mcxn947_cpu0.overlay new file mode 100644 index 00000000000..eb5c47dd3bd --- /dev/null +++ b/tests/drivers/build_all/video/frdm_mcxn947_mcxn947_cpu0.overlay @@ -0,0 +1,69 @@ +/* + * Copyright 2025 NXP + * + * SPDX-License-Identifier: Apache-2.0 + * + * Names in this file should be chosen in a way that won't conflict + * with real-world devicetree nodes, to allow these tests to run on + * (and be extended to test) real hardware. + */ + +#include + +/ { + test { + #address-cells = <1>; + #size-cells = <1>; + + test_gpio: gpio@deadbeef { + compatible = "vnd,gpio"; + gpio-controller; + reg = <0xdeadbeef 0x1000>; + #gpio-cells = <0x2>; + }; + + test_flexcomm7_lpi2c7: lpi2c@11112222 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "nxp,lpi2c"; + reg = <0x11112222 0x1000>; + clocks = <&syscon MCUX_FLEXCOMM7_CLK>; + clock-frequency = ; + test_ov7670: ov7670@1 { + compatible = "ovti,ov7670"; + reset-gpios = <&test_gpio 19 GPIO_ACTIVE_HIGH>; + pwdn-gpios = <&test_gpio 18 GPIO_ACTIVE_HIGH>; + reg = <0x1>; + + port { + test_ov7670_ep_out: endpoint { + remote-endpoint-label = "test_sdma_ep_in"; + }; + }; + }; + }; + + test_smartdma: smartdma@22223333 { + compatible = "nxp,smartdma"; + reg = <0x22223333 0x1000>; + interrupt-parent = <&nvic>; + interrupts = <0 0>; + program-mem = <0x4000000>; + #dma-cells = <0>; + test_video_sdma: video-sdma { + compatible = "nxp,video-smartdma"; + pinctrl-0 = <&pinmux_smartdma_camera>; + pinctrl-names = "default"; + vsync-pin = <4>; + hsync-pin = <11>; + pclk-pin = <5>; + + port { + test_sdma_ep_in: endpoint { + remote-endpoint-label = "test_ov7670_ep_out"; + }; + }; + }; + }; + }; +}; diff --git a/tests/drivers/build_all/video/testcase.yaml b/tests/drivers/build_all/video/testcase.yaml index 88160e8721b..57e74e80168 100644 --- a/tests/drivers/build_all/video/testcase.yaml +++ b/tests/drivers/build_all/video/testcase.yaml @@ -19,3 +19,6 @@ tests: platform_allow: - mimxrt1170_evk/mimxrt1176/cm7 - mimxrt1170_evk@B/mimxrt1176/cm7 + drivers.video.mcux_smartdma.build: + platform_allow: + - frdm_mcxn947/mcxn947/cpu0 From cf6f9e3807bafd82e8e53e307c12c3c744db7cf4 Mon Sep 17 00:00:00 2001 From: Phi Bang Nguyen Date: Thu, 24 Apr 2025 13:54:23 +0200 Subject: [PATCH 0052/2553] tests: drivers: build_all: video: Move board-specific overlays to boards Move board-specific overlays to boards folder Signed-off-by: Phi Bang Nguyen --- .../video/{ => boards}/frdm_mcxn947_mcxn947_cpu0.overlay | 0 .../video/{ => boards}/mimxrt1170_evk_mimxrt1176_cm7.overlay | 0 2 files changed, 0 insertions(+), 0 deletions(-) rename tests/drivers/build_all/video/{ => boards}/frdm_mcxn947_mcxn947_cpu0.overlay (100%) rename tests/drivers/build_all/video/{ => boards}/mimxrt1170_evk_mimxrt1176_cm7.overlay (100%) diff --git a/tests/drivers/build_all/video/frdm_mcxn947_mcxn947_cpu0.overlay b/tests/drivers/build_all/video/boards/frdm_mcxn947_mcxn947_cpu0.overlay similarity index 100% rename from tests/drivers/build_all/video/frdm_mcxn947_mcxn947_cpu0.overlay rename to tests/drivers/build_all/video/boards/frdm_mcxn947_mcxn947_cpu0.overlay diff --git a/tests/drivers/build_all/video/mimxrt1170_evk_mimxrt1176_cm7.overlay b/tests/drivers/build_all/video/boards/mimxrt1170_evk_mimxrt1176_cm7.overlay similarity index 100% rename from tests/drivers/build_all/video/mimxrt1170_evk_mimxrt1176_cm7.overlay rename to tests/drivers/build_all/video/boards/mimxrt1170_evk_mimxrt1176_cm7.overlay From c8eaa11a0b0a8209437f2f08aa7d001ed0a5db2d Mon Sep 17 00:00:00 2001 From: Johann Fischer Date: Wed, 26 Feb 2025 22:14:56 +0100 Subject: [PATCH 0053/2553] drivers: udc: add new UDC driver for SAM0 USB controller The UDC driver for this beautiful USB controller is mostly rewritten from scratch. USB Pad Calibration and clock handling are copied from the usb_dc_sam0 driver. The driver uses multipacket transfers for all endpoints except the OUT control endpoint. The OUT control endpoint has a buffer that is always mapped to the endpoint buffer register so that it always has a valid buffer. The driver provides up to 7 IN and 7 OUT endpoints that support any type of transfer. Double buffering is not used, for the possible case of isochronous transfers some changes would be required in the future. Signed-off-by: Johann Fischer --- drivers/usb/udc/CMakeLists.txt | 1 + drivers/usb/udc/Kconfig | 1 + drivers/usb/udc/Kconfig.sam0 | 28 + drivers/usb/udc/udc_sam0.c | 1257 ++++++++++++++++++++++++++++++++ 4 files changed, 1287 insertions(+) create mode 100644 drivers/usb/udc/Kconfig.sam0 create mode 100644 drivers/usb/udc/udc_sam0.c diff --git a/drivers/usb/udc/CMakeLists.txt b/drivers/usb/udc/CMakeLists.txt index c8fbc9b6011..c9e5b6e79d0 100644 --- a/drivers/usb/udc/CMakeLists.txt +++ b/drivers/usb/udc/CMakeLists.txt @@ -21,3 +21,4 @@ zephyr_library_sources_ifdef(CONFIG_UDC_RPI_PICO udc_rpi_pico.c) zephyr_library_sources_ifdef(CONFIG_UDC_AMBIQ udc_ambiq.c) zephyr_library_sources_ifdef(CONFIG_UDC_RENESAS_RA udc_renesas_ra.c) zephyr_library_sources_ifdef(CONFIG_UDC_MAX32 udc_max32.c) +zephyr_library_sources_ifdef(CONFIG_UDC_SAM0 udc_sam0.c) diff --git a/drivers/usb/udc/Kconfig b/drivers/usb/udc/Kconfig index 997da20d7cb..b6c49e6b3e7 100644 --- a/drivers/usb/udc/Kconfig +++ b/drivers/usb/udc/Kconfig @@ -78,5 +78,6 @@ source "drivers/usb/udc/Kconfig.rpi_pico" source "drivers/usb/udc/Kconfig.ambiq" source "drivers/usb/udc/Kconfig.renesas_ra" source "drivers/usb/udc/Kconfig.max32" +source "drivers/usb/udc/Kconfig.sam0" endif # UDC_DRIVER diff --git a/drivers/usb/udc/Kconfig.sam0 b/drivers/usb/udc/Kconfig.sam0 new file mode 100644 index 00000000000..7d4a870cc5a --- /dev/null +++ b/drivers/usb/udc/Kconfig.sam0 @@ -0,0 +1,28 @@ +# Copyright (c) 2025 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +config UDC_SAM0 + bool "Driver for SAM0 family USB device controller" + default y + depends on DT_HAS_ATMEL_SAM0_USB_ENABLED + select PINCTRL + select SYS_MEM_BLOCKS + select EVENTS + help + Driver for SAM0 family USB device controller. + +if UDC_SAM0 + +config UDC_SAM0_STACK_SIZE + int "UDC controller driver internal thread stack size" + default 512 + help + Device controller driver internal thread stack size. + +config UDC_SAM0_THREAD_PRIORITY + int "UDC controller driver thread priority" + default 8 + help + Device controller driver thread priority. + +endif # UDC_SAM0 diff --git a/drivers/usb/udc/udc_sam0.c b/drivers/usb/udc/udc_sam0.c new file mode 100644 index 00000000000..dab462a03fa --- /dev/null +++ b/drivers/usb/udc/udc_sam0.c @@ -0,0 +1,1257 @@ +/* + * Copyright Google LLC. + * Copyright Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "udc_common.h" + +#include +#include + +#include +#include +#include +#include +#include + +#include +LOG_MODULE_REGISTER(udc_sam0, CONFIG_UDC_DRIVER_LOG_LEVEL); + +/* + * Although the manual refers to this as an "Endpoint Descriptor structure", it + * is actually an endpoint buffer descriptor and has a similar function to the + * buffer descriptor in the UDC Kinetis driver. Do not use the ASF definition + * as it is incorrect, cumbersome and has a very misleading name. + */ +struct sam0_ebd_bank0 { + uint32_t addr; + /* PCKSIZE offset 0x04 */ + unsigned int byte_count : 14; + unsigned int multi_packet_size : 14; + unsigned int size : 3; + unsigned int auto_zlp : 1; + /* EXTREG offset 0x08*/ + unsigned int subpid : 4; + unsigned int variable : 11; + unsigned int reserved0 : 1; + /* STATUS_BK offset 0x0A*/ + unsigned int erroflow : 1; + unsigned int crcerr : 1; + unsigned int reserved1 : 6; + /* RESERVED */ + uint8_t reserved2[5]; +} __packed; + +struct sam0_ebd_bank1 { + uint32_t addr; + /* PCKSIZE offset 0x14 */ + unsigned int byte_count : 14; + unsigned int multi_packet_size : 14; + unsigned int size : 3; + unsigned int auto_zlp : 1; + /* RESERVED, no EXTREG */ + uint8_t reserved0[2]; + /* STATUS_BK offset 0x1A*/ + unsigned int erroflow : 1; + unsigned int crcerr : 1; + unsigned int reserved1 : 6; + /* RESERVED */ + uint8_t reserved2[5]; +} __packed; + +struct sam0_ep_buffer_desc { + /* Used for OUT endpoints 0x00, 0x01 ... 0x08 */ + struct sam0_ebd_bank0 bank0; + /* Used for IN endpoints 0x80, 0x81 ... 0x88 */ + struct sam0_ebd_bank1 bank1; +} __packed; + +BUILD_ASSERT(sizeof(struct sam0_ep_buffer_desc) == 32, "Broken endpoint buffer descriptor"); + +struct udc_sam0_config { + UsbDevice *base; + struct sam0_ep_buffer_desc *bdt; + size_t num_of_eps; + struct udc_ep_config *ep_cfg_in; + struct udc_ep_config *ep_cfg_out; + struct pinctrl_dev_config *const pcfg; + void (*irq_enable_func)(const struct device *dev); + void (*irq_disable_func)(const struct device *dev); + void (*make_thread)(const struct device *dev); +}; + +enum sam0_event_type { + /* Setup packet received */ + SAM0_EVT_SETUP, + /* Trigger new transfer (except control OUT) */ + SAM0_EVT_XFER_NEW, + /* Transfer for specific endpoint is finished */ + SAM0_EVT_XFER_FINISHED, +}; + +struct udc_sam0_data { + struct k_thread thread_data; + /* + * events are events that the driver thread waits. + * xfer_new and xfer_finished contain information on which endpoints + * events SAM0_EVT_XFER_NEW or SAM0_EVT_XFER_FINISHED are triggered. + * The mapping is bits 31..16 for IN endpoints and bits 15..0 for OUT + * endpoints. + */ + struct k_event events; + atomic_t xfer_new; + atomic_t xfer_finished; + /* + * This control OUT endpoint buffer is persistent because we have no + * control over when the host sends a setup packet. All other endpoints + * use multi-packet transfers and transfer buffers directly. + */ + uint8_t ctrl_out_buf[64]; + uint8_t setup[8]; +}; + +static inline int udc_ep_to_bnum(const uint8_t ep) +{ + if (USB_EP_DIR_IS_IN(ep)) { + return 16UL + USB_EP_GET_IDX(ep); + } + + return USB_EP_GET_IDX(ep); +} + +static inline uint8_t udc_pull_ep_from_bmsk(uint32_t *const bitmap) +{ + unsigned int bit; + + __ASSERT_NO_MSG(bitmap && *bitmap); + + bit = find_lsb_set(*bitmap) - 1; + *bitmap &= ~BIT(bit); + + if (bit >= 16U) { + return USB_EP_DIR_IN | (bit - 16U); + } else { + return USB_EP_DIR_OUT | bit; + } +} + +/* For CTRLA.ENABLE and CTRLA.SWRST */ +static void sam0_wait_syncbusy(const struct device *dev) +{ + const struct udc_sam0_config *config = dev->config; + UsbDevice *const base = config->base; + + while (base->SYNCBUSY.reg != 0) { + } +} + +static void sam0_load_padcal(const struct device *dev) +{ + const struct udc_sam0_config *config = dev->config; + UsbDevice *const base = config->base; + uint32_t pad_transn; + uint32_t pad_transp; + uint32_t pad_trim; + +#ifdef USB_FUSES_TRANSN_ADDR + pad_transn = *(uint32_t *)USB_FUSES_TRANSN_ADDR; +#else +#define NVM_USB_PAD_TRANSN_POS 45 +#define NVM_USB_PAD_TRANSN_SIZE 5 + pad_transn = (*((uint32_t *)(NVMCTRL_OTP4) + + (NVM_USB_PAD_TRANSN_POS / 32)) >> + (NVM_USB_PAD_TRANSN_POS % 32)) & + ((1 << NVM_USB_PAD_TRANSN_SIZE) - 1); + + if (pad_transn == 0x1F) { + pad_transn = 5U; + } +#endif + + base->PADCAL.bit.TRANSN = pad_transn; + +#ifdef USB_FUSES_TRANSP_ADDR +#define NVM_USB_PAD_TRANSP_POS 50 +#define NVM_USB_PAD_TRANSP_SIZE 5 + pad_transp = *(uint32_t *)USB_FUSES_TRANSP_ADDR; +#else + pad_transp = (*((uint32_t *)(NVMCTRL_OTP4) + + (NVM_USB_PAD_TRANSP_POS / 32)) >> + (NVM_USB_PAD_TRANSP_POS % 32)) & + ((1 << NVM_USB_PAD_TRANSP_SIZE) - 1); + + if (pad_transp == 0x1F) { + pad_transp = 29U; + } +#endif + + base->PADCAL.bit.TRANSP = pad_transp; + +#ifdef USB_FUSES_TRIM_ADDR + pad_trim = *(uint32_t *)USB_FUSES_TRIM_ADDR; +#else +#define NVM_USB_PAD_TRIM_POS 55 +#define NVM_USB_PAD_TRIM_SIZE 3 + pad_trim = (*((uint32_t *)(NVMCTRL_OTP4) + + (NVM_USB_PAD_TRIM_POS / 32)) >> + (NVM_USB_PAD_TRIM_POS % 32)) & + ((1 << NVM_USB_PAD_TRIM_SIZE) - 1); + + if (pad_trim == 0x7) { + pad_trim = 3U; + } +#endif + + base->PADCAL.bit.TRIM = pad_trim; +} + +static uint8_t sam0_get_bd_size(const uint16_t mps) +{ + switch (mps) { + case 8: + return 0; + case 16: + return 1; + case 32: + return 2; + case 64: + return 3; + case 128: + return 4; + case 256: + return 5; + case 512: + return 6; + case 1023: + return 7; + default: + __ASSERT(true, "Wrong maximum packet size value"); + return 0; + } +} + +static struct sam0_ep_buffer_desc *sam0_get_ebd(const struct device *dev, const uint8_t ep) +{ + const struct udc_sam0_config *config = dev->config; + + return &config->bdt[USB_EP_GET_IDX(ep)]; +} + +static UsbDeviceEndpoint *sam0_get_ep_reg(const struct device *dev, const uint8_t ep) +{ + const struct udc_sam0_config *config = dev->config; + UsbDevice *const base = config->base; + + return &base->DeviceEndpoint[USB_EP_GET_IDX(ep)]; +} + +static int sam0_prep_out(const struct device *dev, + struct net_buf *const buf, struct udc_ep_config *const ep_cfg) +{ + UsbDeviceEndpoint *const endpoint = sam0_get_ep_reg(dev, ep_cfg->addr); + struct sam0_ep_buffer_desc *const bd = sam0_get_ebd(dev, ep_cfg->addr); + const uint16_t size = MIN(16383U, net_buf_tailroom(buf)); + unsigned int lock_key; + + if (!endpoint->EPSTATUS.bit.BK0RDY) { + LOG_ERR("ep 0x%02x buffer is used by the controller", ep_cfg->addr); + return -EBUSY; + } + + lock_key = irq_lock(); + if (ep_cfg->addr != USB_CONTROL_EP_OUT) { + bd->bank0.addr = (uintptr_t)buf->data; + bd->bank0.byte_count = 0; + + bd->bank0.multi_packet_size = size; + bd->bank0.size = sam0_get_bd_size(udc_mps_ep_size(ep_cfg)); + } + + endpoint->EPSTATUSCLR.bit.BK0RDY = 1; + irq_unlock(lock_key); + + LOG_DBG("Prepare OUT ep 0x%02x size %u", ep_cfg->addr, size); + + return 0; +} + +static int sam0_prep_in(const struct device *dev, + struct net_buf *const buf, struct udc_ep_config *const ep_cfg) +{ + UsbDeviceEndpoint *const endpoint = sam0_get_ep_reg(dev, ep_cfg->addr); + struct sam0_ep_buffer_desc *const bd = sam0_get_ebd(dev, ep_cfg->addr); + const uint16_t len = MIN(16383U, buf->len); + unsigned int lock_key; + + if (endpoint->EPSTATUS.bit.BK1RDY) { + LOG_ERR("ep 0x%02x buffer is used by the controller", ep_cfg->addr); + return -EAGAIN; + } + + lock_key = irq_lock(); + + bd->bank1.addr = (uintptr_t)buf->data; + bd->bank1.size = sam0_get_bd_size(udc_mps_ep_size(ep_cfg)); + + bd->bank1.multi_packet_size = 0; + bd->bank1.byte_count = len; + bd->bank1.auto_zlp = 0; + + endpoint->EPSTATUSSET.bit.BK1RDY = 1; + irq_unlock(lock_key); + + LOG_DBG("Prepare IN ep 0x%02x length %u", ep_cfg->addr, len); + + return 0; +} + +static int sam0_ctrl_feed_dout(const struct device *dev, const size_t length) +{ + struct udc_ep_config *const ep_cfg = udc_get_ep_cfg(dev, USB_CONTROL_EP_OUT); + struct net_buf *buf; + + buf = udc_ctrl_alloc(dev, USB_CONTROL_EP_OUT, length); + if (buf == NULL) { + return -ENOMEM; + } + + udc_buf_put(ep_cfg, buf); + + return sam0_prep_out(dev, buf, ep_cfg); +} + +static void drop_control_transfers(const struct device *dev) +{ + struct net_buf *buf; + + buf = udc_buf_get_all(udc_get_ep_cfg(dev, USB_CONTROL_EP_OUT)); + if (buf != NULL) { + net_buf_unref(buf); + } + + buf = udc_buf_get_all(udc_get_ep_cfg(dev, USB_CONTROL_EP_IN)); + if (buf != NULL) { + net_buf_unref(buf); + } +} + +static int sam0_handle_evt_setup(const struct device *dev) +{ + struct udc_sam0_data *const priv = udc_get_private(dev); + struct net_buf *buf; + int err; + + drop_control_transfers(dev); + + buf = udc_ctrl_alloc(dev, USB_CONTROL_EP_OUT, 8); + if (buf == NULL) { + return -ENOMEM; + } + + net_buf_add_mem(buf, priv->setup, sizeof(priv->setup)); + udc_ep_buf_set_setup(buf); + + /* Update to next stage of control transfer */ + udc_ctrl_update_stage(dev, buf); + + if (udc_ctrl_stage_is_data_out(dev)) { + /* Allocate and feed buffer for data OUT stage */ + LOG_DBG("s:%p|feed for -out-", (void *)buf); + + err = sam0_ctrl_feed_dout(dev, udc_data_stage_length(buf)); + if (err == -ENOMEM) { + udc_submit_ep_event(dev, buf, err); + } else { + return err; + } + } else if (udc_ctrl_stage_is_data_in(dev)) { + LOG_DBG("s:%p|feed for -in-status", (void *)buf); + err = udc_ctrl_submit_s_in_status(dev); + } else { + LOG_DBG("s:%p|no data", (void *)buf); + err = udc_ctrl_submit_s_status(dev); + } + + return err; +} + +static int sam0_handle_evt_din(const struct device *dev, + struct udc_ep_config *const ep_cfg) +{ + struct net_buf *buf; + + buf = udc_buf_get(ep_cfg); + if (buf == NULL) { + LOG_ERR("No buffer for ep 0x%02x", ep_cfg->addr); + return -ENOBUFS; + } + + udc_ep_set_busy(ep_cfg, false); + + if (ep_cfg->addr == USB_CONTROL_EP_IN) { + if (udc_ctrl_stage_is_status_in(dev) || + udc_ctrl_stage_is_no_data(dev)) { + /* Status stage finished, notify upper layer */ + udc_ctrl_submit_status(dev, buf); + } + + /* Update to next stage of control transfer */ + udc_ctrl_update_stage(dev, buf); + + if (udc_ctrl_stage_is_status_out(dev)) { + int err; + + /* IN transfer finished, submit buffer for status stage */ + net_buf_unref(buf); + + err = sam0_ctrl_feed_dout(dev, 0); + if (err == -ENOMEM) { + udc_submit_ep_event(dev, buf, err); + } else { + return err; + } + } + + return 0; + } + + return udc_submit_ep_event(dev, buf, 0); +} + +static inline int sam0_handle_evt_dout(const struct device *dev, + struct udc_ep_config *const ep_cfg) +{ + struct net_buf *buf; + int err = 0; + + buf = udc_buf_get(ep_cfg); + if (buf == NULL) { + LOG_ERR("No buffer for OUT ep 0x%02x", ep_cfg->addr); + return -ENODATA; + } + + udc_ep_set_busy(ep_cfg, false); + + if (ep_cfg->addr == USB_CONTROL_EP_OUT) { + if (udc_ctrl_stage_is_status_out(dev)) { + LOG_DBG("dout:%p|status, feed >s", (void *)buf); + + /* Status stage finished, notify upper layer */ + udc_ctrl_submit_status(dev, buf); + } + + /* Update to next stage of control transfer */ + udc_ctrl_update_stage(dev, buf); + + if (udc_ctrl_stage_is_status_in(dev)) { + err = udc_ctrl_submit_s_out_status(dev, buf); + } + } else { + err = udc_submit_ep_event(dev, buf, 0); + } + + return err; +} + +static void sam0_handle_xfer_next(const struct device *dev, + struct udc_ep_config *const ep_cfg) +{ + struct net_buf *buf; + int err; + + buf = udc_buf_peek(ep_cfg); + if (buf == NULL) { + return; + } + + if (USB_EP_DIR_IS_OUT(ep_cfg->addr)) { + err = sam0_prep_out(dev, buf, ep_cfg); + } else { + err = sam0_prep_in(dev, buf, ep_cfg); + } + + if (err != 0) { + buf = udc_buf_get(ep_cfg); + udc_submit_ep_event(dev, buf, -ECONNREFUSED); + } else { + udc_ep_set_busy(ep_cfg, true); + } +} + +static ALWAYS_INLINE void sam0_thread_handler(const struct device *const dev) +{ + struct udc_sam0_data *const priv = udc_get_private(dev); + struct udc_ep_config *ep_cfg; + uint32_t evt; + uint32_t eps; + uint8_t ep; + int err; + + evt = k_event_wait(&priv->events, UINT32_MAX, false, K_FOREVER); + udc_lock_internal(dev, K_FOREVER); + + if (evt & BIT(SAM0_EVT_XFER_FINISHED)) { + k_event_clear(&priv->events, BIT(SAM0_EVT_XFER_FINISHED)); + + eps = atomic_clear(&priv->xfer_finished); + + while (eps) { + ep = udc_pull_ep_from_bmsk(&eps); + ep_cfg = udc_get_ep_cfg(dev, ep); + LOG_DBG("Finished event ep 0x%02x", ep); + + if (USB_EP_DIR_IS_IN(ep)) { + err = sam0_handle_evt_din(dev, ep_cfg); + } else { + err = sam0_handle_evt_dout(dev, ep_cfg); + } + + if (err) { + udc_submit_event(dev, UDC_EVT_ERROR, err); + } + + if (!udc_ep_is_busy(ep_cfg)) { + sam0_handle_xfer_next(dev, ep_cfg); + } else { + LOG_ERR("Endpoint 0x%02x busy", ep); + } + } + } + + if (evt & BIT(SAM0_EVT_XFER_NEW)) { + k_event_clear(&priv->events, BIT(SAM0_EVT_XFER_NEW)); + + eps = atomic_clear(&priv->xfer_new); + + while (eps) { + ep = udc_pull_ep_from_bmsk(&eps); + ep_cfg = udc_get_ep_cfg(dev, ep); + LOG_INF("New transfer ep 0x%02x in the queue", ep); + + if (!udc_ep_is_busy(ep_cfg)) { + sam0_handle_xfer_next(dev, ep_cfg); + } else { + LOG_ERR("Endpoint 0x%02x busy", ep); + } + } + } + + if (evt & BIT(SAM0_EVT_SETUP)) { + k_event_clear(&priv->events, BIT(SAM0_EVT_SETUP)); + err = sam0_handle_evt_setup(dev); + if (err) { + udc_submit_event(dev, UDC_EVT_ERROR, err); + } + } + + udc_unlock_internal(dev); +} + +static void sam0_handle_setup_isr(const struct device *dev) +{ + struct sam0_ep_buffer_desc *const bd = sam0_get_ebd(dev, 0); + struct udc_sam0_data *const priv = udc_get_private(dev); + + if (bd->bank0.byte_count != 8) { + LOG_ERR("Wrong byte count %u for setup packet", + bd->bank0.byte_count); + } + + memcpy(priv->setup, priv->ctrl_out_buf, sizeof(priv->setup)); + k_event_post(&priv->events, BIT(SAM0_EVT_SETUP)); +} + +static void sam0_handle_out_isr(const struct device *dev, const uint8_t ep) +{ + struct sam0_ep_buffer_desc *const bd = sam0_get_ebd(dev, ep); + UsbDeviceEndpoint *const endpoint = sam0_get_ep_reg(dev, ep); + struct udc_sam0_data *const priv = udc_get_private(dev); + struct udc_ep_config *ep_cfg = udc_get_ep_cfg(dev, ep); + struct net_buf *buf; + uint32_t size; + + buf = udc_buf_peek(ep_cfg); + if (buf == NULL) { + LOG_ERR("No buffer for ep 0x%02x", ep); + udc_submit_event(dev, UDC_EVT_ERROR, -ENOBUFS); + return; + } + + LOG_DBG("ISR ep 0x%02x byte_count %u room %u mps %u", + ep, bd->bank0.byte_count, net_buf_tailroom(buf), udc_mps_ep_size(ep_cfg)); + + size = MIN(bd->bank0.byte_count, net_buf_tailroom(buf)); + if (ep == USB_CONTROL_EP_OUT) { + net_buf_add_mem(buf, priv->ctrl_out_buf, size); + } else { + net_buf_add(buf, size); + } + + /* + * The remaining buffer size should actually be at least equal to MPS, + * if (net_buf_tailroom(buf) >= udc_mps_ep_size(ep_cfg) && ..., + * otherwise the controller may write outside the buffer, this must be + * fixed in the UDC buffer allocation. + */ + if (net_buf_tailroom(buf) && size == udc_mps_ep_size(ep_cfg)) { + __maybe_unused int err; + + if (ep == USB_CONTROL_EP_OUT) { + /* This is the same as sam0_prep_out() would do for the + * control OUT endpoint, but shorter. + */ + endpoint->EPSTATUSCLR.bit.BK0RDY = 1; + } else { + err = sam0_prep_out(dev, buf, ep_cfg); + __ASSERT(err == 0, "Failed to start new OUT transaction"); + } + } else { + atomic_set_bit(&priv->xfer_finished, udc_ep_to_bnum(ep)); + k_event_post(&priv->events, BIT(SAM0_EVT_XFER_FINISHED)); + } +} + +static void sam0_handle_in_isr(const struct device *dev, const uint8_t ep) +{ + struct sam0_ep_buffer_desc *const bd = sam0_get_ebd(dev, ep); + struct udc_sam0_data *const priv = udc_get_private(dev); + struct udc_ep_config *ep_cfg = udc_get_ep_cfg(dev, ep); + __maybe_unused int err = 0; + struct net_buf *buf; + uint32_t len; + + buf = udc_buf_peek(ep_cfg); + if (buf == NULL) { + LOG_ERR("No buffer for ep 0x%02x", ep); + udc_submit_event(dev, UDC_EVT_ERROR, -ENOBUFS); + return; + } + + len = bd->bank1.byte_count; + LOG_DBG("ISR ep 0x%02x byte_count %u", ep, len); + net_buf_pull(buf, len); + + if (buf->len) { + err = sam0_prep_in(dev, buf, ep_cfg); + __ASSERT(err == 0, "Failed to start new IN transaction"); + } else { + if (udc_ep_buf_has_zlp(buf)) { + err = sam0_prep_in(dev, buf, ep_cfg); + __ASSERT(err == 0, "Failed to start new IN transaction"); + udc_ep_buf_clear_zlp(buf); + return; + } + + atomic_set_bit(&priv->xfer_finished, udc_ep_to_bnum(ep)); + k_event_post(&priv->events, BIT(SAM0_EVT_XFER_FINISHED)); + } +} + +static void ALWAYS_INLINE handle_ep_isr(const struct device *dev, const uint8_t idx) +{ + UsbDeviceEndpoint *const endpoint = sam0_get_ep_reg(dev, idx); + uint32_t intflag; + + intflag = endpoint->EPINTFLAG.reg; + /* Clear endpoint interrupt flags */ + endpoint->EPINTFLAG.reg = intflag; + + if (intflag & USB_DEVICE_EPINTFLAG_TRCPT1) { + sam0_handle_in_isr(dev, idx | USB_EP_DIR_IN); + } + + if (intflag & USB_DEVICE_EPINTFLAG_TRCPT0) { + sam0_handle_out_isr(dev, idx); + } + + if (intflag & USB_DEVICE_EPINTFLAG_RXSTP) { + sam0_handle_setup_isr(dev); + } + +} + +static void sam0_isr_handler(const struct device *dev) +{ + const struct udc_sam0_config *config = dev->config; + UsbDevice *const base = config->base; + uint32_t epintsmry = base->EPINTSMRY.reg; + uint32_t intflag; + + /* Check endpoint interrupts bit-by-bit */ + for (uint8_t idx = 0U; epintsmry != 0U; epintsmry >>= 1) { + if ((epintsmry & 1) != 0U) { + handle_ep_isr(dev, idx); + } + + idx++; + } + + intflag = base->INTFLAG.reg; + /* Clear interrupt flags */ + base->INTFLAG.reg = intflag; + + if (intflag & USB_DEVICE_INTFLAG_SOF) { + udc_submit_event(dev, UDC_EVT_SOF, 0); + } + + if (intflag & USB_DEVICE_INTFLAG_EORST) { + UsbDeviceEndpoint *const endpoint = sam0_get_ep_reg(dev, 0); + + /* Re-enable control endpoint interrupts */ + endpoint->EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRCPT0 | + USB_DEVICE_EPINTENSET_TRCPT1 | + USB_DEVICE_EPINTENSET_RXSTP; + + udc_submit_event(dev, UDC_EVT_RESET, 0); + } + + if (intflag & USB_DEVICE_INTFLAG_SUSPEND) { + if (!udc_is_suspended(dev)) { + udc_set_suspended(dev, true); + udc_submit_event(dev, UDC_EVT_SUSPEND, 0); + } + } + + if (intflag & USB_DEVICE_INTFLAG_EORSM) { + if (udc_is_suspended(dev)) { + udc_set_suspended(dev, false); + udc_submit_event(dev, UDC_EVT_RESUME, 0); + } + } + + /* + * This controller does not support VBUS status detection. To work + * smoothly, we should consider whether it would be possible to use the + * GPIO pin for VBUS state detection (e.g. PA7 on SAM R21 Xplained Pro). + */ + + if (intflag & USB_DEVICE_INTFLAG_RAMACER) { + udc_submit_event(dev, UDC_EVT_ERROR, -EINVAL); + } +} + +static int udc_sam0_ep_enqueue(const struct device *dev, + struct udc_ep_config *const ep_cfg, struct net_buf *buf) +{ + struct udc_sam0_data *const priv = udc_get_private(dev); + + LOG_DBG("%s enqueue 0x%02x %p", dev->name, ep_cfg->addr, (void *)buf); + udc_buf_put(ep_cfg, buf); + + if (!ep_cfg->stat.halted) { + atomic_set_bit(&priv->xfer_new, udc_ep_to_bnum(ep_cfg->addr)); + k_event_post(&priv->events, BIT(SAM0_EVT_XFER_NEW)); + } + + return 0; +} + +static int udc_sam0_ep_dequeue(const struct device *dev, struct udc_ep_config *const ep_cfg) +{ + UsbDeviceEndpoint *const endpoint = sam0_get_ep_reg(dev, ep_cfg->addr); + unsigned int lock_key; + struct net_buf *buf; + + lock_key = irq_lock(); + + if (USB_EP_DIR_IS_IN(ep_cfg->addr)) { + endpoint->EPSTATUSCLR.bit.BK1RDY = 1; + } else { + endpoint->EPSTATUSSET.bit.BK0RDY = 1; + } + + buf = udc_buf_get_all(ep_cfg); + if (buf) { + udc_submit_ep_event(dev, buf, -ECONNABORTED); + udc_ep_set_busy(ep_cfg, false); + } + + irq_unlock(lock_key); + + return 0; +} + +static void setup_control_out_ep(const struct device *dev) +{ + struct sam0_ep_buffer_desc *const bd = sam0_get_ebd(dev, 0); + struct udc_sam0_data *const priv = udc_get_private(dev); + + /* It will never be reassigned to anything else during device runtime. */ + bd->bank0.addr = (uintptr_t)priv->ctrl_out_buf; + bd->bank0.multi_packet_size = 0; + bd->bank0.size = sam0_get_bd_size(64); + bd->bank0.auto_zlp = 0; +} + +static int udc_sam0_ep_enable(const struct device *dev, struct udc_ep_config *const ep_cfg) +{ + UsbDeviceEndpoint *const endpoint = sam0_get_ep_reg(dev, ep_cfg->addr); + uint8_t type; + + switch (ep_cfg->attributes & USB_EP_TRANSFER_TYPE_MASK) { + case USB_EP_TYPE_CONTROL: + type = 1; + break; + case USB_EP_TYPE_ISO: + type = 2; + break; + case USB_EP_TYPE_BULK: + type = 3; + break; + case USB_EP_TYPE_INTERRUPT: + type = 4; + break; + default: + return -EINVAL; + } + + if (ep_cfg->addr == USB_CONTROL_EP_OUT) { + setup_control_out_ep(dev); + endpoint->EPINTENSET.reg = USB_DEVICE_EPINTENSET_RXSTP; + } + + if (USB_EP_DIR_IS_IN(ep_cfg->addr)) { + endpoint->EPCFG.bit.EPTYPE1 = type; + endpoint->EPSTATUSCLR.bit.BK1RDY = 1; + endpoint->EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRCPT1; + } else { + endpoint->EPCFG.bit.EPTYPE0 = type; + endpoint->EPSTATUSSET.bit.BK0RDY = 1; + endpoint->EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRCPT0; + } + + LOG_DBG("Enable ep 0x%02x", ep_cfg->addr); + + return 0; +} + +static int udc_sam0_ep_disable(const struct device *dev, struct udc_ep_config *const ep_cfg) +{ + UsbDeviceEndpoint *const endpoint = sam0_get_ep_reg(dev, ep_cfg->addr); + + if (ep_cfg->addr == USB_CONTROL_EP_OUT) { + endpoint->EPINTENCLR.reg = USB_DEVICE_EPINTENCLR_RXSTP; + } + + if (USB_EP_DIR_IS_IN(ep_cfg->addr)) { + endpoint->EPINTENCLR.reg = USB_DEVICE_EPINTENCLR_TRCPT1; + endpoint->EPCFG.bit.EPTYPE1 = 0; + } else { + endpoint->EPINTENCLR.reg = USB_DEVICE_EPINTENCLR_TRCPT0; + endpoint->EPCFG.bit.EPTYPE0 = 0; + } + + LOG_DBG("Disable ep 0x%02x", ep_cfg->addr); + + return 0; +} + +static int udc_sam0_ep_set_halt(const struct device *dev, struct udc_ep_config *const ep_cfg) +{ + UsbDeviceEndpoint *const endpoint = sam0_get_ep_reg(dev, ep_cfg->addr); + + if (USB_EP_DIR_IS_IN(ep_cfg->addr)) { + endpoint->EPSTATUSSET.bit.STALLRQ1 = 1; + } else { + endpoint->EPSTATUSSET.bit.STALLRQ0 = 1; + } + + LOG_DBG("Set halt ep 0x%02x", ep_cfg->addr); + if (USB_EP_GET_IDX(ep_cfg->addr) != 0) { + ep_cfg->stat.halted = true; + } + + return 0; +} + +static int udc_sam0_ep_clear_halt(const struct device *dev, struct udc_ep_config *const ep_cfg) +{ + UsbDeviceEndpoint *const endpoint = sam0_get_ep_reg(dev, ep_cfg->addr); + struct udc_sam0_data *const priv = udc_get_private(dev); + + if (USB_EP_GET_IDX(ep_cfg->addr) == 0) { + return 0; + } + + if (USB_EP_DIR_IS_IN(ep_cfg->addr)) { + endpoint->EPSTATUSCLR.bit.STALLRQ1 = 1; + endpoint->EPSTATUSCLR.bit.DTGLIN = 1; + } else { + endpoint->EPSTATUSCLR.bit.STALLRQ0 = 1; + endpoint->EPSTATUSCLR.bit.DTGLOUT = 1; + } + + if (USB_EP_GET_IDX(ep_cfg->addr) != 0 && !udc_ep_is_busy(ep_cfg)) { + if (udc_buf_peek(ep_cfg)) { + atomic_set_bit(&priv->xfer_new, udc_ep_to_bnum(ep_cfg->addr)); + k_event_post(&priv->events, BIT(SAM0_EVT_XFER_NEW)); + } + } + + LOG_DBG("Clear halt ep 0x%02x", ep_cfg->addr); + ep_cfg->stat.halted = false; + + return 0; +} + +static int udc_sam0_set_address(const struct device *dev, const uint8_t addr) +{ + const struct udc_sam0_config *config = dev->config; + UsbDevice *const base = config->base; + + LOG_DBG("Set new address %u for %s", addr, dev->name); + if (addr != 0) { + base->DADD.reg = addr | USB_DEVICE_DADD_ADDEN; + } else { + base->DADD.reg = 0; + } + + return 0; +} + +static int udc_sam0_host_wakeup(const struct device *dev) +{ + const struct udc_sam0_config *config = dev->config; + UsbDevice *const base = config->base; + + LOG_DBG("Remote wakeup from %s", dev->name); + base->CTRLB.bit.UPRSM = 1; + + return 0; +} + +static enum udc_bus_speed udc_sam0_device_speed(const struct device *dev) +{ + struct udc_data *data = dev->data; + + return data->caps.hs ? UDC_BUS_SPEED_HS : UDC_BUS_SPEED_FS; +} + +static int udc_sam0_enable(const struct device *dev) +{ + const struct udc_sam0_config *config = dev->config; + const struct pinctrl_dev_config *const pcfg = config->pcfg; + UsbDevice *const base = config->base; + int ret; + +#ifdef MCLK + /* Enable the clock in MCLK */ + MCLK->APBBMASK.bit.USB_ = 1; + + /* Enable the GCLK - use 48 MHz source */ + GCLK->PCHCTRL[USB_GCLK_ID].reg = GCLK_PCHCTRL_GEN(2) | GCLK_PCHCTRL_CHEN; + + while (GCLK->SYNCBUSY.reg) { + } +#else + /* Enable the clock in PM */ + PM->APBBMASK.bit.USB_ = 1; + + /* Enable the GCLK */ + GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID_USB | GCLK_CLKCTRL_GEN_GCLK0 | + GCLK_CLKCTRL_CLKEN; + + while (GCLK->STATUS.bit.SYNCBUSY) { + } +#endif + + /* Reset controller */ + base->CTRLA.bit.SWRST = 1; + sam0_wait_syncbusy(dev); + + /* + * Change QOS values to have the best performance and correct USB + * behaviour. + */ + base->QOSCTRL.bit.CQOS = 2; + base->QOSCTRL.bit.DQOS = 2; + + ret = pinctrl_apply_state(pcfg, PINCTRL_STATE_DEFAULT); + if (ret) { + LOG_ERR("Failed to apply default pinctrl state (%d)", ret); + return ret; + } + + sam0_load_padcal(dev); + + base->CTRLA.reg = USB_CTRLA_MODE_DEVICE | USB_CTRLA_RUNSTDBY; + base->CTRLB.reg = USB_DEVICE_CTRLB_SPDCONF_FS; + + base->DESCADD.reg = (uintptr_t)config->bdt; + + if (udc_ep_enable_internal(dev, USB_CONTROL_EP_OUT, + USB_EP_TYPE_CONTROL, 64, 0)) { + LOG_ERR("Failed to enable control endpoint"); + return -EIO; + } + + if (udc_ep_enable_internal(dev, USB_CONTROL_EP_IN, + USB_EP_TYPE_CONTROL, 64, 0)) { + LOG_ERR("Failed to enable control endpoint"); + return -EIO; + } + + base->INTENSET.reg = USB_DEVICE_INTENSET_EORSM | + USB_DEVICE_INTENSET_EORST | + USB_DEVICE_INTENSET_SUSPEND; + + base->CTRLA.bit.ENABLE = 1; + sam0_wait_syncbusy(dev); + base->CTRLB.bit.DETACH = 0; + + config->irq_enable_func(dev); + LOG_DBG("Enable device %s", dev->name); + + return 0; +} + +static int udc_sam0_disable(const struct device *dev) +{ + const struct udc_sam0_config *config = dev->config; + UsbDevice *const base = config->base; + + config->irq_disable_func(dev); + base->CTRLB.bit.DETACH = 1; + base->CTRLA.bit.ENABLE = 0; + sam0_wait_syncbusy(dev); + + if (udc_ep_disable_internal(dev, USB_CONTROL_EP_OUT)) { + LOG_ERR("Failed to disable control endpoint"); + return -EIO; + } + + if (udc_ep_disable_internal(dev, USB_CONTROL_EP_IN)) { + LOG_ERR("Failed to disable control endpoint"); + return -EIO; + } + +#ifdef MCLK + /* Disable 48 MHz clock source in GCLK */ + GCLK->PCHCTRL[USB_GCLK_ID].reg = 0; + + /* Disable the clock in MCLK */ + MCLK->APBBMASK.bit.USB_ = 0; + + while (GCLK->SYNCBUSY.reg) { + } +#else + /* Disable clock source in GCLK */ + GCLK->CLKCTRL.reg = 0; + + /* Disable the clock in PM */ + PM->APBBMASK.bit.USB_ = 0; + + while (GCLK->STATUS.bit.SYNCBUSY) { + } +#endif + + LOG_DBG("Disable device %s", dev->name); + + return 0; +} + +/* + * Nothing to do here as the controller does not support VBUS state change + * detection and there is nothing to initialize in the controller to do this. + */ +static int udc_sam0_init(const struct device *dev) +{ + LOG_DBG("Init device %s", dev->name); + + return 0; +} + +static int udc_sam0_shutdown(const struct device *dev) +{ + LOG_DBG("Shutdown device %s", dev->name); + + return 0; +} + +static int udc_sam0_driver_preinit(const struct device *dev) +{ + const struct udc_sam0_config *config = dev->config; + struct udc_sam0_data *priv = udc_get_private(dev); + struct udc_data *data = dev->data; + uint16_t mps = 1023; + int err; + + k_mutex_init(&data->mutex); + k_event_init(&priv->events); + atomic_clear(&priv->xfer_new); + atomic_clear(&priv->xfer_finished); + + data->caps.rwup = true; + data->caps.mps0 = UDC_MPS0_64; + + for (int i = 0; i < config->num_of_eps; i++) { + config->ep_cfg_out[i].caps.out = 1; + if (i == 0) { + config->ep_cfg_out[i].caps.control = 1; + config->ep_cfg_out[i].caps.mps = 64; + } else { + config->ep_cfg_out[i].caps.bulk = 1; + config->ep_cfg_out[i].caps.interrupt = 1; + config->ep_cfg_out[i].caps.iso = 1; + config->ep_cfg_out[i].caps.mps = mps; + } + + config->ep_cfg_out[i].addr = USB_EP_DIR_OUT | i; + err = udc_register_ep(dev, &config->ep_cfg_out[i]); + if (err != 0) { + LOG_ERR("Failed to register endpoint"); + return err; + } + } + + for (int i = 0; i < config->num_of_eps; i++) { + config->ep_cfg_in[i].caps.in = 1; + if (i == 0) { + config->ep_cfg_in[i].caps.control = 1; + config->ep_cfg_in[i].caps.mps = 64; + } else { + config->ep_cfg_in[i].caps.bulk = 1; + config->ep_cfg_in[i].caps.interrupt = 1; + config->ep_cfg_in[i].caps.iso = 1; + config->ep_cfg_in[i].caps.mps = mps; + } + + config->ep_cfg_in[i].addr = USB_EP_DIR_IN | i; + err = udc_register_ep(dev, &config->ep_cfg_in[i]); + if (err != 0) { + LOG_ERR("Failed to register endpoint"); + return err; + } + } + + config->make_thread(dev); + + return 0; +} + +static void udc_sam0_lock(const struct device *dev) +{ + k_sched_lock(); + udc_lock_internal(dev, K_FOREVER); +} + +static void udc_sam0_unlock(const struct device *dev) +{ + udc_unlock_internal(dev); + k_sched_unlock(); +} + +static const struct udc_api udc_sam0_api = { + .lock = udc_sam0_lock, + .unlock = udc_sam0_unlock, + .device_speed = udc_sam0_device_speed, + .init = udc_sam0_init, + .enable = udc_sam0_enable, + .disable = udc_sam0_disable, + .shutdown = udc_sam0_shutdown, + .set_address = udc_sam0_set_address, + .host_wakeup = udc_sam0_host_wakeup, + .ep_enable = udc_sam0_ep_enable, + .ep_disable = udc_sam0_ep_disable, + .ep_set_halt = udc_sam0_ep_set_halt, + .ep_clear_halt = udc_sam0_ep_clear_halt, + .ep_enqueue = udc_sam0_ep_enqueue, + .ep_dequeue = udc_sam0_ep_dequeue, +}; + +#define DT_DRV_COMPAT atmel_sam0_usb + +#define UDC_SAM0_IRQ_ENABLE(i, n) \ + IRQ_CONNECT(DT_INST_IRQ_BY_IDX(n, i, irq), \ + DT_INST_IRQ_BY_IDX(n, i, priority), \ + sam0_isr_handler, DEVICE_DT_INST_GET(n), 0); \ + irq_enable(DT_INST_IRQ_BY_IDX(n, i, irq)); + +#define UDC_SAM0_IRQ_DISABLE(i, n) \ + irq_disable(DT_INST_IRQ_BY_IDX(n, i, irq)); + +#define UDC_SAM0_IRQ_ENABLE_DEFINE(i, n) \ +static void udc_sam0_irq_enable_func_##n(const struct device *dev) \ +{ \ + LISTIFY(DT_INST_NUM_IRQS(n), UDC_SAM0_IRQ_ENABLE, (), n) \ +} + +#define UDC_SAM0_IRQ_DISABLE_DEFINE(i, n) \ +static void udc_sam0_irq_disable_func_##n(const struct device *dev) \ +{ \ + LISTIFY(DT_INST_NUM_IRQS(n), UDC_SAM0_IRQ_DISABLE, (), n) \ +} + +#define UDC_SAM0_PINCTRL_DT_INST_DEFINE(n) \ + COND_CODE_1(DT_INST_PINCTRL_HAS_NAME(n, default), \ + (PINCTRL_DT_INST_DEFINE(n)), ()) + +#define UDC_SAM0_PINCTRL_DT_INST_DEV_CONFIG_GET(n) \ + COND_CODE_1(DT_INST_PINCTRL_HAS_NAME(n, default), \ + ((void *)PINCTRL_DT_INST_DEV_CONFIG_GET(n)), (NULL)) + +#define UDC_SAM0_DEVICE_DEFINE(n) \ + UDC_SAM0_PINCTRL_DT_INST_DEFINE(n); \ + UDC_SAM0_IRQ_ENABLE_DEFINE(i, n); \ + UDC_SAM0_IRQ_DISABLE_DEFINE(i, n); \ + \ + K_THREAD_STACK_DEFINE(udc_sam0_stack_##n, CONFIG_UDC_SAM0_STACK_SIZE); \ + \ + static __aligned(sizeof(void *)) struct sam0_ep_buffer_desc \ + sam0_bdt_##n[DT_INST_PROP(n, num_bidir_endpoints)]; \ + \ + static void udc_sam0_thread_##n(void *dev, void *arg1, void *arg2) \ + { \ + while (true) { \ + sam0_thread_handler(dev); \ + } \ + } \ + \ + static void udc_sam0_make_thread_##n(const struct device *dev) \ + { \ + struct udc_sam0_data *priv = udc_get_private(dev); \ + \ + k_thread_create(&priv->thread_data, \ + udc_sam0_stack_##n, \ + K_THREAD_STACK_SIZEOF(udc_sam0_stack_##n), \ + udc_sam0_thread_##n, \ + (void *)dev, NULL, NULL, \ + K_PRIO_COOP(CONFIG_UDC_SAM0_THREAD_PRIORITY), \ + K_ESSENTIAL, \ + K_NO_WAIT); \ + k_thread_name_set(&priv->thread_data, dev->name); \ + } \ + \ + static struct udc_ep_config \ + ep_cfg_out[DT_INST_PROP(n, num_bidir_endpoints)]; \ + static struct udc_ep_config \ + ep_cfg_in[DT_INST_PROP(n, num_bidir_endpoints)]; \ + \ + static const struct udc_sam0_config udc_sam0_config_##n = { \ + .base = (UsbDevice *)DT_INST_REG_ADDR(n), \ + .bdt = sam0_bdt_##n, \ + .num_of_eps = DT_INST_PROP(n, num_bidir_endpoints), \ + .ep_cfg_in = ep_cfg_out, \ + .ep_cfg_out = ep_cfg_in, \ + .irq_enable_func = udc_sam0_irq_enable_func_##n, \ + .irq_disable_func = udc_sam0_irq_disable_func_##n, \ + .pcfg = UDC_SAM0_PINCTRL_DT_INST_DEV_CONFIG_GET(n), \ + .make_thread = udc_sam0_make_thread_##n, \ + }; \ + \ + static struct udc_sam0_data udc_priv_##n = { \ + }; \ + \ + static struct udc_data udc_data_##n = { \ + .mutex = Z_MUTEX_INITIALIZER(udc_data_##n.mutex), \ + .priv = &udc_priv_##n, \ + }; \ + \ + DEVICE_DT_INST_DEFINE(n, udc_sam0_driver_preinit, NULL, \ + &udc_data_##n, &udc_sam0_config_##n, \ + POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \ + &udc_sam0_api); + +DT_INST_FOREACH_STATUS_OKAY(UDC_SAM0_DEVICE_DEFINE) From 07f196b33aff473ed47ccb1eb7ba1dafd8768e32 Mon Sep 17 00:00:00 2001 From: Johann Fischer Date: Fri, 7 Mar 2025 23:02:55 +0100 Subject: [PATCH 0054/2553] sample: usb: add usbd test feature to samd21/samr21_xpro boards Add usbd test feature to samd21/samr21_xpro boards. Add samr21_xpro board to integration_platforms in a few samples. Signed-off-by: Johann Fischer --- boards/atmel/sam0/samd21_xpro/samd21_xpro.yaml | 1 + boards/atmel/sam0/same54_xpro/same54_xpro.yaml | 1 + boards/atmel/sam0/samr21_xpro/samr21_xpro.yaml | 1 + samples/subsys/usb/cdc_acm/sample.yaml | 2 ++ samples/subsys/usb/hid-keyboard/sample.yaml | 2 ++ samples/subsys/usb/webusb-next/sample.yaml | 2 ++ 6 files changed, 9 insertions(+) diff --git a/boards/atmel/sam0/samd21_xpro/samd21_xpro.yaml b/boards/atmel/sam0/samd21_xpro/samd21_xpro.yaml index 2ffa9435ca5..cdecfc36450 100644 --- a/boards/atmel/sam0/samd21_xpro/samd21_xpro.yaml +++ b/boards/atmel/sam0/samd21_xpro/samd21_xpro.yaml @@ -21,5 +21,6 @@ supported: - spi - uart - usb_device + - usbd - watchdog vendor: atmel diff --git a/boards/atmel/sam0/same54_xpro/same54_xpro.yaml b/boards/atmel/sam0/same54_xpro/same54_xpro.yaml index bd46418551f..346c7fe0869 100644 --- a/boards/atmel/sam0/same54_xpro/same54_xpro.yaml +++ b/boards/atmel/sam0/same54_xpro/same54_xpro.yaml @@ -22,4 +22,5 @@ supported: - spi - uart - usb_device + - usbd vendor: atmel diff --git a/boards/atmel/sam0/samr21_xpro/samr21_xpro.yaml b/boards/atmel/sam0/samr21_xpro/samr21_xpro.yaml index 77e032878b2..0513a8f6023 100644 --- a/boards/atmel/sam0/samr21_xpro/samr21_xpro.yaml +++ b/boards/atmel/sam0/samr21_xpro/samr21_xpro.yaml @@ -23,6 +23,7 @@ supported: - spi - uart - usb_device + - usbd - xpro_gpio - xpro_i2c - xpro_serial diff --git a/samples/subsys/usb/cdc_acm/sample.yaml b/samples/subsys/usb/cdc_acm/sample.yaml index f802443cad5..ba76e801652 100644 --- a/samples/subsys/usb/cdc_acm/sample.yaml +++ b/samples/subsys/usb/cdc_acm/sample.yaml @@ -23,6 +23,8 @@ tests: - mimxrt685_evk/mimxrt685s/cm33 - mimxrt1060_evk/mimxrt1062/qspi - max32690evkit/max32690/m4 + - samd21_xpro + - same54_xpro harness: console harness_config: type: one_line diff --git a/samples/subsys/usb/hid-keyboard/sample.yaml b/samples/subsys/usb/hid-keyboard/sample.yaml index 2631f07f81e..6161ff90c2c 100644 --- a/samples/subsys/usb/hid-keyboard/sample.yaml +++ b/samples/subsys/usb/hid-keyboard/sample.yaml @@ -14,6 +14,8 @@ common: - nucleo_f413zh - mimxrt685_evk/mimxrt685s/cm33 - mimxrt1060_evk/mimxrt1062/qspi + - samd21_xpro + - same54_xpro tests: sample.usbd.hid-keyboard: tags: usb diff --git a/samples/subsys/usb/webusb-next/sample.yaml b/samples/subsys/usb/webusb-next/sample.yaml index d1f6d44f84b..f72cc2d7d8e 100644 --- a/samples/subsys/usb/webusb-next/sample.yaml +++ b/samples/subsys/usb/webusb-next/sample.yaml @@ -13,4 +13,6 @@ tests: - mimxrt685_evk/mimxrt685s/cm33 - mimxrt1060_evk/mimxrt1062/qspi - max32690evkit/max32690/m4 + - samd21_xpro + - same54_xpro harness: TBD From d8ad66cfb31165c1dd58cf438fa9be38f8da4182 Mon Sep 17 00:00:00 2001 From: Alain Volmat Date: Wed, 2 Apr 2025 12:33:23 +0200 Subject: [PATCH 0055/2553] drivers: video: add 10 to 16 bit unpacked bayer formats Add all 4 variants of 10 / 12 / 14 and 16 bits unpacked bayer formats Signed-off-by: Alain Volmat --- include/zephyr/drivers/video.h | 144 +++++++++++++++++++++++++++++++++ 1 file changed, 144 insertions(+) diff --git a/include/zephyr/drivers/video.h b/include/zephyr/drivers/video.h index c0b814932f7..d7871069f2d 100644 --- a/include/zephyr/drivers/video.h +++ b/include/zephyr/drivers/video.h @@ -1020,6 +1020,134 @@ void video_closest_frmival(const struct device *dev, enum video_endpoint_id ep, */ #define VIDEO_PIX_FMT_SRGGB14P VIDEO_FOURCC('p', 'R', 'E', 'E') +/** + * @code{.unparsed} + * | bbbbbbbb 000000Bb | gggggggg 000000Gg | bbbbbbbb 000000Bb | gggggggg 000000Gg | ... + * | gggggggg 000000Gg | rrrrrrrr 000000Rr | gggggggg 000000Gg | rrrrrrrr 000000Rr | ... + * @endcode + */ +#define VIDEO_PIX_FMT_SBGGR10 VIDEO_FOURCC('B', 'G', '1', '0') + +/** + * @code{.unparsed} + * | gggggggg 000000Gg | bbbbbbbb 000000Bb | gggggggg 000000Gg | bbbbbbbb 000000Bb | ... + * | rrrrrrrr 000000Rr | gggggggg 000000Gg | rrrrrrrr 000000Rr | gggggggg 000000Gg | ... + * @endcode + */ +#define VIDEO_PIX_FMT_SGBRG10 VIDEO_FOURCC('G', 'B', '1', '0') + +/** + * @code{.unparsed} + * | gggggggg 000000Gg | rrrrrrrr 000000Rr | gggggggg 000000Gg | rrrrrrrr 000000Rr | ... + * | bbbbbbbb 000000Bb | gggggggg 000000Gg | bbbbbbbb 000000Bb | gggggggg 000000Gg | ... + * @endcode + */ +#define VIDEO_PIX_FMT_SGRBG10 VIDEO_FOURCC('B', 'A', '1', '0') + +/** + * @code{.unparsed} + * | rrrrrrrr 000000Rr | gggggggg 000000Gg | rrrrrrrr 000000Rr | gggggggg 000000Gg | ... + * | gggggggg 000000Gg | bbbbbbbb 000000Bb | gggggggg 000000Gg | bbbbbbbb 000000Bb | ... + * @endcode + */ +#define VIDEO_PIX_FMT_SRGGB10 VIDEO_FOURCC('R', 'G', '1', '0') + +/** + * @code{.unparsed} + * | bbbbbbbb 0000Bbbb | gggggggg 0000Gggg | bbbbbbbb 0000Bbbb | gggggggg 0000Gggg | ... + * | gggggggg 0000Gggg | rrrrrrrr 0000Rrrr | gggggggg 0000Gggg | rrrrrrrr 0000Rrrr | ... + * @endcode + */ +#define VIDEO_PIX_FMT_SBGGR12 VIDEO_FOURCC('B', 'G', '1', '2') + +/** + * @code{.unparsed} + * | gggggggg 0000Gggg | bbbbbbbb 0000Bbbb | gggggggg 0000Gggg | bbbbbbbb 0000Bbbb | ... + * | rrrrrrrr 0000Rrrr | gggggggg 0000Gggg | rrrrrrrr 0000Rrrr | gggggggg 0000Gggg | ... + * @endcode + */ +#define VIDEO_PIX_FMT_SGBRG12 VIDEO_FOURCC('G', 'B', '1', '2') + +/** + * @code{.unparsed} + * | gggggggg 0000Gggg | rrrrrrrr 0000Rrrr | gggggggg 0000Gggg | rrrrrrrr 0000Rrrr | ... + * | bbbbbbbb 0000Bbbb | gggggggg 0000Gggg | bbbbbbbb 0000Bbbb | gggggggg 0000Gggg | ... + * @endcode + */ +#define VIDEO_PIX_FMT_SGRBG12 VIDEO_FOURCC('B', 'A', '1', '2') + +/** + * @code{.unparsed} + * | rrrrrrrr 0000Rrrr | gggggggg 0000Gggg | rrrrrrrr 0000Rrrr | gggggggg 0000Gggg | ... + * | gggggggg 0000Gggg | bbbbbbbb 0000Bbbb | gggggggg 0000Gggg | bbbbbbbb 0000Bbbb | ... + * @endcode + */ +#define VIDEO_PIX_FMT_SRGGB12 VIDEO_FOURCC('R', 'G', '1', '2') + +/** + * @code{.unparsed} + * | bbbbbbbb 00Bbbbbb | gggggggg 00Gggggg | bbbbbbbb 00Bbbbbb | gggggggg 00Gggggg | ... + * | gggggggg 00Gggggg | rrrrrrrr 00Rrrrrr | gggggggg 00Gggggg | rrrrrrrr 00Rrrrrr | ... + * @endcode + */ +#define VIDEO_PIX_FMT_SBGGR14 VIDEO_FOURCC('B', 'G', '1', '4') + +/** + * @code{.unparsed} + * | gggggggg 00Gggggg | bbbbbbbb 00Bbbbbb | gggggggg 00Gggggg | bbbbbbbb 00Bbbbbb | ... + * | rrrrrrrr 00Rrrrrr | gggggggg 00Gggggg | rrrrrrrr 00Rrrrrr | gggggggg 00Gggggg | ... + * @endcode + */ +#define VIDEO_PIX_FMT_SGBRG14 VIDEO_FOURCC('G', 'B', '1', '4') + +/** + * @code{.unparsed} + * | gggggggg 00Gggggg | rrrrrrrr 00Rrrrrr | gggggggg 00Gggggg | rrrrrrrr 00Rrrrrr | ... + * | bbbbbbbb 00Bbbbbb | gggggggg 00Gggggg | bbbbbbbb 00Bbbbbb | gggggggg 00Gggggg | ... + * @endcode + */ +#define VIDEO_PIX_FMT_SGRBG14 VIDEO_FOURCC('G', 'R', '1', '4') + +/** + * @code{.unparsed} + * | rrrrrrrr 00Rrrrrr | gggggggg 00Gggggg | rrrrrrrr 00Rrrrrr | gggggggg 00Gggggg | ... + * | gggggggg 00Gggggg | bbbbbbbb 00Bbbbbb | gggggggg 00Gggggg | bbbbbbbb 00Bbbbbb | ... + * @endcode + */ +#define VIDEO_PIX_FMT_SRGGB14 VIDEO_FOURCC('R', 'G', '1', '4') + +/** + * @code{.unparsed} + * | bbbbbbbb Bbbbbbbb | gggggggg Gggggggg | bbbbbbbb Bbbbbbbb | gggggggg Gggggggg | ... + * | gggggggg Gggggggg | rrrrrrrr Rrrrrrrr | gggggggg Gggggggg | rrrrrrrr Rrrrrrrr | ... + * @endcode + */ +#define VIDEO_PIX_FMT_SBGGR16 VIDEO_FOURCC('B', 'Y', 'R', '2') + +/** + * @code{.unparsed} + * | gggggggg Gggggggg | bbbbbbbb Bbbbbbbb | gggggggg Gggggggg | bbbbbbbb Bbbbbbbb | ... + * | rrrrrrrr Rrrrrrrr | gggggggg Gggggggg | rrrrrrrr Rrrrrrrr | gggggggg Gggggggg | ... + * @endcode + */ +#define VIDEO_PIX_FMT_SGBRG16 VIDEO_FOURCC('G', 'B', '1', '6') + +/** + * @code{.unparsed} + * | gggggggg Gggggggg | rrrrrrrr Rrrrrrrr | gggggggg Gggggggg | rrrrrrrr Rrrrrrrr | ... + * | bbbbbbbb Bbbbbbbb | gggggggg Gggggggg | bbbbbbbb Bbbbbbbb | gggggggg Gggggggg | ... + * @endcode + */ +#define VIDEO_PIX_FMT_SGRBG16 VIDEO_FOURCC('G', 'R', '1', '6') + +/** + * @code{.unparsed} + * | rrrrrrrr Rrrrrrrr | gggggggg Gggggggg | rrrrrrrr Rrrrrrrr | gggggggg Gggggggg | ... + * | gggggggg Gggggggg | bbbbbbbb Bbbbbbbb | gggggggg Gggggggg | bbbbbbbb Bbbbbbbb | ... + * @endcode + */ +#define VIDEO_PIX_FMT_SRGGB16 VIDEO_FOURCC('R', 'G', '1', '6') + /** * @} */ @@ -1198,6 +1326,22 @@ static inline unsigned int video_bits_per_pixel(uint32_t pixfmt) return 14; case VIDEO_PIX_FMT_RGB565: case VIDEO_PIX_FMT_YUYV: + case VIDEO_PIX_FMT_SBGGR10: + case VIDEO_PIX_FMT_SGBRG10: + case VIDEO_PIX_FMT_SGRBG10: + case VIDEO_PIX_FMT_SRGGB10: + case VIDEO_PIX_FMT_SBGGR12: + case VIDEO_PIX_FMT_SGBRG12: + case VIDEO_PIX_FMT_SGRBG12: + case VIDEO_PIX_FMT_SRGGB12: + case VIDEO_PIX_FMT_SBGGR14: + case VIDEO_PIX_FMT_SGBRG14: + case VIDEO_PIX_FMT_SGRBG14: + case VIDEO_PIX_FMT_SRGGB14: + case VIDEO_PIX_FMT_SBGGR16: + case VIDEO_PIX_FMT_SGBRG16: + case VIDEO_PIX_FMT_SGRBG16: + case VIDEO_PIX_FMT_SRGGB16: return 16; case VIDEO_PIX_FMT_XRGB32: case VIDEO_PIX_FMT_XYUV32: From 29197ac9633c2542fd0c9b63639af1f75462844e Mon Sep 17 00:00:00 2001 From: Alain Volmat Date: Tue, 15 Apr 2025 17:46:08 +0200 Subject: [PATCH 0056/2553] drivers: video: add more RGB 24/32 bits and YUV 16 bit variants formats Add several more RGB formats: (RGB24/BGR24,ARGB32,ABGR32,RGBA32,BGRA32) as well as more YUV formats: YVYU, VYVU, UYVY Signed-off-by: Alain Volmat --- include/zephyr/drivers/video.h | 81 ++++++++++++++++++++++++++++++++++ 1 file changed, 81 insertions(+) diff --git a/include/zephyr/drivers/video.h b/include/zephyr/drivers/video.h index d7871069f2d..67212110ebc 100644 --- a/include/zephyr/drivers/video.h +++ b/include/zephyr/drivers/video.h @@ -1233,6 +1233,56 @@ void video_closest_frmival(const struct device *dev, enum video_endpoint_id ep, */ #define VIDEO_PIX_FMT_RGB565 VIDEO_FOURCC('R', 'G', 'B', 'P') +/** + * 24 bit RGB format with 8 bit per component + * + * @code{.unparsed} + * | Bbbbbbbb Gggggggg Rggggggg | ... + * @endcode + */ +#define VIDEO_PIX_FMT_BGR24 VIDEO_FOURCC('B', 'G', 'R', '3') + +/** + * 24 bit RGB format with 8 bit per component + * + * @code{.unparsed} + * | Rggggggg Gggggggg Bbbbbbbb | ... + * @endcode + */ +#define VIDEO_PIX_FMT_RGB24 VIDEO_FOURCC('R', 'G', 'B', '3') + +/** + * @code{.unparsed} + * | Aaaaaaaa Rrrrrrrr Gggggggg Bbbbbbbb | ... + * @endcode + */ + +#define VIDEO_PIX_FMT_ARGB32 VIDEO_FOURCC('B', 'A', '2', '4') + +/** + * @code{.unparsed} + * | Bbbbbbbb Gggggggg Rrrrrrrr Aaaaaaaa | ... + * @endcode + */ + +#define VIDEO_PIX_FMT_ABGR32 VIDEO_FOURCC('A', 'R', '2', '4') + +/** + * @code{.unparsed} + * | Rrrrrrrr Gggggggg Bbbbbbbb Aaaaaaaa | ... + * @endcode + */ + +#define VIDEO_PIX_FMT_RGBA32 VIDEO_FOURCC('A', 'B', '2', '4') + +/** + * @code{.unparsed} + * | Aaaaaaaa Bbbbbbbb Gggggggg Rrrrrrrr | ... + * @endcode + */ + +#define VIDEO_PIX_FMT_BGRA32 VIDEO_FOURCC('R', 'A', '2', '4') + /** * The first byte is empty (X) for each pixel. * @@ -1262,6 +1312,27 @@ void video_closest_frmival(const struct device *dev, enum video_endpoint_id ep, */ #define VIDEO_PIX_FMT_YUYV VIDEO_FOURCC('Y', 'U', 'Y', 'V') +/** + * @code{.unparsed} + * | Yyyyyyyy Vvvvvvvv | Yyyyyyyy Uuuuuuuu | ... + * @endcode + */ +#define VIDEO_PIX_FMT_YVYU VIDEO_FOURCC('Y', 'V', 'Y', 'U') + +/** + * @code{.unparsed} + * | Vvvvvvvv Yyyyyyyy | Uuuuuuuu Yyyyyyyy | ... + * @endcode + */ +#define VIDEO_PIX_FMT_VYUY VIDEO_FOURCC('V', 'Y', 'U', 'Y') + +/** + * @code{.unparsed} + * | Uuuuuuuu Yyyyyyyy | Vvvvvvvv Yyyyyyyy | ... + * @endcode + */ +#define VIDEO_PIX_FMT_UYVY VIDEO_FOURCC('U', 'Y', 'V', 'Y') + /** * The first byte is empty (X) for each pixel. * @@ -1326,6 +1397,9 @@ static inline unsigned int video_bits_per_pixel(uint32_t pixfmt) return 14; case VIDEO_PIX_FMT_RGB565: case VIDEO_PIX_FMT_YUYV: + case VIDEO_PIX_FMT_YVYU: + case VIDEO_PIX_FMT_UYVY: + case VIDEO_PIX_FMT_VYUY: case VIDEO_PIX_FMT_SBGGR10: case VIDEO_PIX_FMT_SGBRG10: case VIDEO_PIX_FMT_SGRBG10: @@ -1343,8 +1417,15 @@ static inline unsigned int video_bits_per_pixel(uint32_t pixfmt) case VIDEO_PIX_FMT_SGRBG16: case VIDEO_PIX_FMT_SRGGB16: return 16; + case VIDEO_PIX_FMT_BGR24: + case VIDEO_PIX_FMT_RGB24: + return 24; case VIDEO_PIX_FMT_XRGB32: case VIDEO_PIX_FMT_XYUV32: + case VIDEO_PIX_FMT_ARGB32: + case VIDEO_PIX_FMT_ABGR32: + case VIDEO_PIX_FMT_RGBA32: + case VIDEO_PIX_FMT_BGRA32: return 32; default: /* Variable number of bits per pixel or unknown format */ From 31f5d2826def9211ec4dafbd1f4ac59bf7830580 Mon Sep 17 00:00:00 2001 From: Titan Chen Date: Tue, 25 Feb 2025 16:59:01 +0800 Subject: [PATCH 0057/2553] drivers: pwm: rts5912: port pwm driver on Zephyr Add PWM driver support for Realtek RTS5912 Signed-off-by: Titan Chen --- drivers/pwm/CMakeLists.txt | 1 + drivers/pwm/Kconfig | 2 + drivers/pwm/Kconfig.rts5912 | 9 ++ drivers/pwm/pwm_realtek_rts5912.c | 125 ++++++++++++++++++ dts/arm/realtek/ec/rts5912.dtsi | 65 +++++++++ dts/bindings/pwm/realtek,rts5912-pwm.yaml | 20 +++ soc/realtek/ec/rts5912/reg/reg_pwm.h | 26 ++++ .../build_all/pwm/boards/rts5912_evb.overlay | 15 +++ tests/drivers/build_all/pwm/testcase.yaml | 2 + 9 files changed, 265 insertions(+) create mode 100644 drivers/pwm/Kconfig.rts5912 create mode 100644 drivers/pwm/pwm_realtek_rts5912.c create mode 100644 dts/bindings/pwm/realtek,rts5912-pwm.yaml create mode 100644 soc/realtek/ec/rts5912/reg/reg_pwm.h create mode 100644 tests/drivers/build_all/pwm/boards/rts5912_evb.overlay diff --git a/drivers/pwm/CMakeLists.txt b/drivers/pwm/CMakeLists.txt index 4c1b22e9c63..f282da593a8 100644 --- a/drivers/pwm/CMakeLists.txt +++ b/drivers/pwm/CMakeLists.txt @@ -54,3 +54,4 @@ zephyr_library_sources_ifdef(CONFIG_PWM_RENESAS_RZ_GPT pwm_renesas_rz_gpt.c) zephyr_library_sources_ifdef(CONFIG_USERSPACE pwm_handlers.c) zephyr_library_sources_ifdef(CONFIG_PWM_CAPTURE pwm_capture.c) zephyr_library_sources_ifdef(CONFIG_PWM_SHELL pwm_shell.c) +zephyr_library_sources_ifdef(CONFIG_PWM_REALTEK_RTS5912 pwm_realtek_rts5912.c) diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig index 57a684ca2d1..3475330434c 100644 --- a/drivers/pwm/Kconfig +++ b/drivers/pwm/Kconfig @@ -122,4 +122,6 @@ source "drivers/pwm/Kconfig.fake" source "drivers/pwm/Kconfig.renesas_rz" +source "drivers/pwm/Kconfig.rts5912" + endif # PWM diff --git a/drivers/pwm/Kconfig.rts5912 b/drivers/pwm/Kconfig.rts5912 new file mode 100644 index 00000000000..c16ef1a54f4 --- /dev/null +++ b/drivers/pwm/Kconfig.rts5912 @@ -0,0 +1,9 @@ +# Copyright (c) 2025, Realtek, SIBG-SD7 +# SPDX-License-Identifier: Apache-2.0 + +config PWM_REALTEK_RTS5912 + bool "Realtek RTS5912 PWM Driver" + default y + depends on DT_HAS_REALTEK_RTS5912_PWM_ENABLED + help + Enable PWM driver for Realtek RTS5912 EC. diff --git a/drivers/pwm/pwm_realtek_rts5912.c b/drivers/pwm/pwm_realtek_rts5912.c new file mode 100644 index 00000000000..e6dd6f61e70 --- /dev/null +++ b/drivers/pwm/pwm_realtek_rts5912.c @@ -0,0 +1,125 @@ +/* + * Copyright (c) 2025 Realtek, SIBG-SD7 + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#define DT_DRV_COMPAT realtek_rts5912_pwm + +#include +#include +#include +#include +#include + +#include "reg/reg_pwm.h" + +LOG_MODULE_REGISTER(pwm, CONFIG_PWM_LOG_LEVEL); + +#define PWM_CYCLE_PER_SEC MHZ(50) + +struct pwm_rts5912_config { + volatile struct pwm_regs *pwm_regs; + uint32_t pwm_clk_grp; + uint32_t pwm_clk_idx; + const struct device *clk_dev; + const struct pinctrl_dev_config *pcfg; +}; + +static int pwm_rts5912_set_cycles(const struct device *dev, uint32_t channel, + uint32_t period_cycles, uint32_t pulse_cycles, pwm_flags_t flags) +{ + const struct pwm_rts5912_config *const pwm_config = dev->config; + volatile struct pwm_regs *pwm_regs = pwm_config->pwm_regs; + + uint32_t pwm_div, pwm_duty; + + if (channel > 0) { + return -EIO; + } + + pwm_div = period_cycles; + pwm_duty = pulse_cycles; + + pwm_regs->div = pwm_div; + pwm_regs->duty = pwm_duty; + + LOG_DBG("period_cycles=%d, pulse_cycles=%d, pwm_div=%d, pwm_duty=%d", period_cycles, + pulse_cycles, pwm_div, pwm_duty); + + if (flags == PWM_POLARITY_INVERTED) { + pwm_regs->ctrl |= PWM_CTRL_INVT; + } + pwm_regs->ctrl |= PWM_CTRL_EN; + + return 0; +} + +static int pwm_rts5912_get_cycles_per_sec(const struct device *dev, uint32_t channel, + uint64_t *cycles) +{ + ARG_UNUSED(dev); + + if (channel > 0) { + return -EIO; + } + + if (cycles) { + *cycles = PWM_CYCLE_PER_SEC; + } + + return 0; +} + +static DEVICE_API(pwm, pwm_rts5912_driver_api) = { + .set_cycles = pwm_rts5912_set_cycles, + .get_cycles_per_sec = pwm_rts5912_get_cycles_per_sec, +}; + +static int pwm_rts5912_init(const struct device *dev) +{ + const struct pwm_rts5912_config *const pwm_config = dev->config; + struct rts5912_sccon_subsys sccon; + + int rc = 0; +#ifdef CONFIG_PINCTRL + rc = pinctrl_apply_state(pwm_config->pcfg, PINCTRL_STATE_DEFAULT); + if (rc < 0) { + LOG_ERR("PWM pinctrl setup failed (%d)", rc); + return rc; + } +#endif +#ifdef CONFIG_CLOCK_CONTROL + if (!device_is_ready(pwm_config->clk_dev)) { + return -ENODEV; + } + + sccon.clk_grp = pwm_config->pwm_clk_grp; + sccon.clk_idx = pwm_config->pwm_clk_idx; + rc = clock_control_on(pwm_config->clk_dev, (clock_control_subsys_t)&sccon); + if (rc != 0) { + return rc; + } +#endif + return rc; +} + +#define RTS5912_PWM_PINCTRL_DEF(inst) PINCTRL_DT_INST_DEFINE(inst) + +#define RTS5912_PWM_CONFIG(inst) \ + static struct pwm_rts5912_config pwm_rts5912_config_##inst = { \ + .pwm_regs = (struct pwm_regs *)DT_INST_REG_ADDR(inst), \ + .pwm_clk_grp = DT_INST_CLOCKS_CELL(inst, clk_grp), \ + .pwm_clk_idx = DT_INST_CLOCKS_CELL(inst, clk_idx), \ + .clk_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(inst)), \ + .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \ + }; + +#define RTS5912_PWM_DEVICE_INIT(index) \ + RTS5912_PWM_PINCTRL_DEF(index); \ + RTS5912_PWM_CONFIG(index); \ + DEVICE_DT_INST_DEFINE(index, &pwm_rts5912_init, NULL, NULL, &pwm_rts5912_config_##index, \ + POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \ + &pwm_rts5912_driver_api); + +DT_INST_FOREACH_STATUS_OKAY(RTS5912_PWM_DEVICE_INIT) diff --git a/dts/arm/realtek/ec/rts5912.dtsi b/dts/arm/realtek/ec/rts5912.dtsi index 0231ce9ea79..147220ca772 100644 --- a/dts/arm/realtek/ec/rts5912.dtsi +++ b/dts/arm/realtek/ec/rts5912.dtsi @@ -9,6 +9,7 @@ #include #include #include +#include / { cpus { @@ -364,6 +365,70 @@ interrupts = <192 0>; status = "disabled"; }; + + pwm0: pwm@4000f000 { + compatible = "realtek,rts5912-pwm"; + clocks = <&sccon RTS5912_SCCON_PERIPH_GRP0 PERIPH_GRP0_PWM0_CLKPWR>; + reg = <0x4000f000 0x0c>; + status = "disabled"; + #pwm-cells = <3>; + }; + + pwm1: pwm@4000f00c { + compatible = "realtek,rts5912-pwm"; + clocks = <&sccon RTS5912_SCCON_PERIPH_GRP0 PERIPH_GRP0_PWM1_CLKPWR>; + reg = <0x4000f00c 0x0c>; + status = "disabled"; + #pwm-cells = <3>; + }; + + pwm2: pwm@4000f018 { + compatible = "realtek,rts5912-pwm"; + clocks = <&sccon RTS5912_SCCON_PERIPH_GRP0 PERIPH_GRP0_PWM2_CLKPWR>; + reg = <0x4000f018 0x0c>; + status = "disabled"; + #pwm-cells = <3>; + }; + + pwm3: pwm@4000f024 { + compatible = "realtek,rts5912-pwm"; + clocks = <&sccon RTS5912_SCCON_PERIPH_GRP0 PERIPH_GRP0_PWM3_CLKPWR>; + reg = <0x4000f024 0x0c>; + status = "disabled"; + #pwm-cells = <3>; + }; + + pwm4: pwm@4000f030 { + compatible = "realtek,rts5912-pwm"; + clocks = <&sccon RTS5912_SCCON_PERIPH_GRP0 PERIPH_GRP0_PWM4_CLKPWR>; + reg = <0x4000f030 0x0c>; + status = "disabled"; + #pwm-cells = <3>; + }; + + pwm5: pwm@4000f03c { + compatible = "realtek,rts5912-pwm"; + clocks = <&sccon RTS5912_SCCON_PERIPH_GRP0 PERIPH_GRP0_PWM5_CLKPWR>; + reg = <0x4000f03c 0x0c>; + status = "disabled"; + #pwm-cells = <3>; + }; + + pwm6: pwm@4000f048 { + compatible = "realtek,rts5912-pwm"; + clocks = <&sccon RTS5912_SCCON_PERIPH_GRP0 PERIPH_GRP0_PWM6_CLKPWR>; + reg = <0x4000f048 0x0c>; + status = "disabled"; + #pwm-cells = <3>; + }; + + pwm7: pwm@4000f054 { + compatible = "realtek,rts5912-pwm"; + clocks = <&sccon RTS5912_SCCON_PERIPH_GRP0 PERIPH_GRP0_PWM7_CLKPWR>; + reg = <0x4000f054 0x0c>; + status = "disabled"; + #pwm-cells = <3>; + }; }; swj_port: swj-port { diff --git a/dts/bindings/pwm/realtek,rts5912-pwm.yaml b/dts/bindings/pwm/realtek,rts5912-pwm.yaml new file mode 100644 index 00000000000..73c12f58a1b --- /dev/null +++ b/dts/bindings/pwm/realtek,rts5912-pwm.yaml @@ -0,0 +1,20 @@ +# Copyright (c) 2025, Realtek, SIBG-SD7 +# SPDX-License-Identifier: Apache-2.0 + +description: Realtek RTS5912 PWM + +include: [pwm-controller.yaml, base.yaml, pinctrl-device.yaml] + +compatible: "realtek,rts5912-pwm" + +properties: + reg: + required: true + + "#pwm-cells": + const: 3 + +pwm-cells: + - channel + - period + - flags diff --git a/soc/realtek/ec/rts5912/reg/reg_pwm.h b/soc/realtek/ec/rts5912/reg/reg_pwm.h new file mode 100644 index 00000000000..65b2d51fc90 --- /dev/null +++ b/soc/realtek/ec/rts5912/reg/reg_pwm.h @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2025 Realtek, SIBG-SD7 + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef ZEPHYR_SOC_REALTEK_RTS5912_REG_PWM_H +#define ZEPHYR_SOC_REALTEK_RTS5912_REG_PWM_H + +/* + * @brief PWM Controller (PWM) + */ + +struct pwm_regs { + uint32_t duty; + uint32_t div; + uint32_t ctrl; +}; + +/* CTRL */ +#define PWM_CTRL_CLKSRC BIT(28) +#define PWM_CTRL_INVT BIT(29) +#define PWM_CTRL_RST BIT(30) +#define PWM_CTRL_EN BIT(31) + +#endif /* ZEPHYR_SOC_REALTEK_RTS5912_REG_PWM_H */ diff --git a/tests/drivers/build_all/pwm/boards/rts5912_evb.overlay b/tests/drivers/build_all/pwm/boards/rts5912_evb.overlay new file mode 100644 index 00000000000..1a455c43f7b --- /dev/null +++ b/tests/drivers/build_all/pwm/boards/rts5912_evb.overlay @@ -0,0 +1,15 @@ +/* + * Copyright (c) 2025 Realtek Corporation. All Rights Reserved. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + aliases { + pwm-0 = &pwm0; + }; +}; + +&pwm0 { + status = "okay"; +}; diff --git a/tests/drivers/build_all/pwm/testcase.yaml b/tests/drivers/build_all/pwm/testcase.yaml index d21744a22c5..92a18a5080e 100644 --- a/tests/drivers/build_all/pwm/testcase.yaml +++ b/tests/drivers/build_all/pwm/testcase.yaml @@ -57,3 +57,5 @@ tests: drivers.pwm.max31790.build: platform_allow: nucleo_f429zi extra_args: DTC_OVERLAY_FILE=max31790.overlay + drivers.pwm.rts5912.build: + platform_allow: rts5912_evb From 9809788502a30cf0075435b9fd14ff04e59babdd Mon Sep 17 00:00:00 2001 From: Vladislav Pejic Date: Tue, 15 Apr 2025 11:44:58 +0200 Subject: [PATCH 0058/2553] boards: shields: Add EVAL-ADXL367-ARDZ shield Add a new shield definition for the Analog Devices EVAL-ADXL367-ARDZ accelerometer shield. This shield provides support for an ADI ADXL367 accelerometer over an Arduino SPI connector. Signed-off-by: Vladislav Pejic --- .../shields/eval_adxl367_ardz/Kconfig.shield | 5 +++ .../shields/eval_adxl367_ardz/doc/index.rst | 40 +++++++++++++++++++ .../eval_adxl367_ardz.overlay | 26 ++++++++++++ 3 files changed, 71 insertions(+) create mode 100644 boards/shields/eval_adxl367_ardz/Kconfig.shield create mode 100644 boards/shields/eval_adxl367_ardz/doc/index.rst create mode 100644 boards/shields/eval_adxl367_ardz/eval_adxl367_ardz.overlay diff --git a/boards/shields/eval_adxl367_ardz/Kconfig.shield b/boards/shields/eval_adxl367_ardz/Kconfig.shield new file mode 100644 index 00000000000..dbccde37566 --- /dev/null +++ b/boards/shields/eval_adxl367_ardz/Kconfig.shield @@ -0,0 +1,5 @@ +# Copyright (c) 2025 Analog Devices, Inc. +# SPDX-License-Identifier: Apache-2.0 + +config SHIELD_EVAL_ADXL367_ARDZ + def_bool $(shields_list_contains,eval_adxl367_ardz) diff --git a/boards/shields/eval_adxl367_ardz/doc/index.rst b/boards/shields/eval_adxl367_ardz/doc/index.rst new file mode 100644 index 00000000000..e144b28ecfe --- /dev/null +++ b/boards/shields/eval_adxl367_ardz/doc/index.rst @@ -0,0 +1,40 @@ +.. _eval_adxl367_ardz: + +EVAL-ADXL367-ARDZ +################# + +Overview +******** + +The EVAL-ADXL367-ARDZ is a 3-axis digital accelerometer Arduino shield powered +by the Analog Devices ADXL367. + +Programming +*********** + +Set ``--shield eval_adxl367_ardz`` when you invoke ``west build``. For example: + +.. zephyr-app-commands:: + :zephyr-app: samples/sensor/sensor_shell + :board: apard32690/max32690/m4 + :shield: eval_adxl367_ardz + :goals: build + +Requirements +************ + +This shield can only be used with a board which provides a configuration for +Arduino connectors and defines node aliases for SPI and GPIO interfaces (see +:ref:`shields` for more details). + +References +********** + +- `ADXL367 product page`_ +- `ADXL367 data sheet`_ + +.. _ADXL367 product page: + https://www.analog.com/en/products/adxl367.html + +.. _ADXL367 data sheet: + https://www.analog.com/media/en/technical-documentation/data-sheets/adxl367.pdf diff --git a/boards/shields/eval_adxl367_ardz/eval_adxl367_ardz.overlay b/boards/shields/eval_adxl367_ardz/eval_adxl367_ardz.overlay new file mode 100644 index 00000000000..98ab6236991 --- /dev/null +++ b/boards/shields/eval_adxl367_ardz/eval_adxl367_ardz.overlay @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2025 Analog Devices, Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/ { + aliases { + accel0 = &adxl367_eval_adxl367_ardz; + }; +}; + +&arduino_spi { + status = "okay"; + + adxl367_eval_adxl367_ardz: adxl367@0 { + compatible = "adi,adxl367"; + reg = <0x0>; + spi-max-frequency = ; + int1-gpios = <&arduino_header 8 GPIO_ACTIVE_HIGH>; + fifo-mode = ; + status = "okay"; + }; +}; From 4a9029771f53ebb92e6dbafd42021274975192da Mon Sep 17 00:00:00 2001 From: Vladislav Pejic Date: Tue, 15 Apr 2025 11:51:36 +0200 Subject: [PATCH 0059/2553] drivers: sensor: adxl367: FIFO mode from DT Add support for setting FIFO mode using DT property. Signed-off-by: Vladislav Pejic --- drivers/sensor/adi/adxl367/adxl367.c | 5 ++-- drivers/sensor/adi/adxl367/adxl367.h | 9 ++++--- dts/bindings/sensor/adi,adxl367-common.yaml | 30 +++++++++++++++++++++ include/zephyr/dt-bindings/sensor/adxl367.h | 27 +++++++++++++++++++ 4 files changed, 65 insertions(+), 6 deletions(-) create mode 100644 include/zephyr/dt-bindings/sensor/adxl367.h diff --git a/drivers/sensor/adi/adxl367/adxl367.c b/drivers/sensor/adi/adxl367/adxl367.c index 6f1db94509c..06c69ad81e8 100644 --- a/drivers/sensor/adi/adxl367/adxl367.c +++ b/drivers/sensor/adi/adxl367/adxl367.c @@ -1097,7 +1097,7 @@ static int adxl367_init(const struct device *dev) #define ADXL367_CFG_IRQ(inst) #endif /* CONFIG_ADXL367_TRIGGER */ -#define ADXL367_CONFIG(inst, chipid) \ +#define ADXL367_CONFIG(inst, chipid) \ .odr = DT_INST_PROP(inst, odr), \ .autosleep = false, \ .low_noise = false, \ @@ -1115,7 +1115,8 @@ static int adxl367_init(const struct device *dev) .inactivity_th.enable = \ IS_ENABLED(CONFIG_ADXL367_INACTIVITY_DETECTION_MODE), \ .inactivity_time = CONFIG_ADXL367_INACTIVITY_TIME, \ - .fifo_config.fifo_mode = ADXL367_FIFO_DISABLED, \ + .fifo_config.fifo_mode = \ + DT_INST_PROP_OR(inst, fifo_mode, ADXL367_FIFO_DISABLED), \ .fifo_config.fifo_format = ADXL367_FIFO_FORMAT_XYZ, \ .fifo_config.fifo_samples = 128, \ .fifo_config.fifo_read_mode = ADXL367_14B_CHID, \ diff --git a/drivers/sensor/adi/adxl367/adxl367.h b/drivers/sensor/adi/adxl367/adxl367.h index a8d28a6ad08..a1ff9d3b250 100644 --- a/drivers/sensor/adi/adxl367/adxl367.h +++ b/drivers/sensor/adi/adxl367/adxl367.h @@ -13,6 +13,7 @@ #include #include #include +#include #define DT_DRV_COMPAT adi_adxl367 #if DT_ANY_INST_ON_BUS_STATUS_OKAY(spi) @@ -280,10 +281,10 @@ enum adxl367_fifo_format { }; enum adxl367_fifo_mode { - ADXL367_FIFO_DISABLED, - ADXL367_OLDEST_SAVED, - ADXL367_STREAM_MODE, - ADXL367_TRIGGERED_MODE + ADXL367_FIFO_DISABLED = ADXL367_FIFO_MODE_DISABLED, + ADXL367_OLDEST_SAVED = ADXL367_FIFO_MODE_OLDEST_SAVED, + ADXL367_STREAM_MODE = ADXL367_FIFO_MODE_STREAM, + ADXL367_TRIGGERED_MODE = ADXL367_FIFO_MODE_TRIGGERED }; enum adxl367_fifo_read_mode { diff --git a/dts/bindings/sensor/adi,adxl367-common.yaml b/dts/bindings/sensor/adi,adxl367-common.yaml index 722d13d92e0..b445f6ab9fc 100644 --- a/dts/bindings/sensor/adi,adxl367-common.yaml +++ b/dts/bindings/sensor/adi,adxl367-common.yaml @@ -1,6 +1,22 @@ # Copyright (c) 2023 Analog Devices Inc. # SPDX-License-Identifier: Apache-2.0 +description: | + ADXL367 3-axis accelerometer + When setting the accelerometer DTS properties and want to use + streaming funcionality, make sure to include adxl367.h and + use the macros defined there for fifo-mode property. + + Example: + #include + + adxl367: adxl367@0 { + ... + + fifo-mode = ; + }; + + include: sensor-device.yaml properties: @@ -29,3 +45,17 @@ properties: The INT1 signal defaults to active high as produced by the sensor. The property value should ensure the flags properly describe the signal that is presented to the driver. + + fifo-mode: + type: int + description: | + Accelerometer FIFO Mode. + 0 # ADXL367_FIFO_MODE_DISABLED + 1 # ADXL367_FIFO_MODE_OLDEST_SAVED + 2 # ADXL367_FIFO_MODE_STREAM + 3 # ADXL367_FIFO_MODE_TRIGGERED + enum: + - 0 + - 1 + - 2 + - 3 diff --git a/include/zephyr/dt-bindings/sensor/adxl367.h b/include/zephyr/dt-bindings/sensor/adxl367.h new file mode 100644 index 00000000000..f3bb0afd0f8 --- /dev/null +++ b/include/zephyr/dt-bindings/sensor/adxl367.h @@ -0,0 +1,27 @@ +/* + * Copyright (c) 2025 Analog Devices Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_ADI_ADX367_H_ +#define ZEPHYR_INCLUDE_DT_BINDINGS_ADI_ADX367_H_ + +/** + * @defgroup ADXL367 ADI DT Options + * @ingroup sensor_interface + * @{ + */ + +/** + * @defgroup ADXL367_FIFO_MODE FIFO mode options + * @{ + */ +#define ADXL367_FIFO_MODE_DISABLED 0x0 +#define ADXL367_FIFO_MODE_OLDEST_SAVED 0x1 +#define ADXL367_FIFO_MODE_STREAM 0x2 +#define ADXL367_FIFO_MODE_TRIGGERED 0x3 +/** @} */ + +/** @} */ + +#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_ADI_ADX367_H_ */ From 644dd757b2161495e23f0dc39c1db32d2cfa074f Mon Sep 17 00:00:00 2001 From: Vladislav Pejic Date: Tue, 15 Apr 2025 11:54:59 +0200 Subject: [PATCH 0060/2553] samples: sensor: Add adxl367 streaming config Adds adxl367 streaming configuration to accelerometer samples. Signed-off-by: Vladislav Pejic --- samples/sensor/accel_polling/adxl367-stream.conf | 6 ++++++ samples/sensor/accel_polling/sample.yaml | 7 +++++++ 2 files changed, 13 insertions(+) create mode 100644 samples/sensor/accel_polling/adxl367-stream.conf diff --git a/samples/sensor/accel_polling/adxl367-stream.conf b/samples/sensor/accel_polling/adxl367-stream.conf new file mode 100644 index 00000000000..de1ee8900ba --- /dev/null +++ b/samples/sensor/accel_polling/adxl367-stream.conf @@ -0,0 +1,6 @@ +# Copyright (c) 2025 Analog Devices, Inc. +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_SPI_RTIO=y +CONFIG_SENSOR_ASYNC_API=y +CONFIG_ADXL367_STREAM=y diff --git a/samples/sensor/accel_polling/sample.yaml b/samples/sensor/accel_polling/sample.yaml index 74c5f07f5ba..24e3c5f4bbd 100644 --- a/samples/sensor/accel_polling/sample.yaml +++ b/samples/sensor/accel_polling/sample.yaml @@ -34,3 +34,10 @@ tests: - SNIPPET=rtt-tracing;rtt-console platform_allow: - apard32690/max32690/m4 + sample.sensor.accel_polling.adxl367-stream: + extra_args: + - SHIELD="eval_adxl367_ardz" + - EXTRA_CONF_FILE="adxl367-stream.conf" + - SNIPPET="rtt-tracing;rtt-console" + platform_allow: + - apard32690/max32690/m4 From 132f0088ec9e7e85a9b5464d4f82b0c9098043a8 Mon Sep 17 00:00:00 2001 From: Li Feng Date: Tue, 15 Apr 2025 11:26:22 -0700 Subject: [PATCH 0061/2553] ish build: add new manifest v1.1 support ISH manifest v1.1 applies to ISH 5.8. Signed-off-by: Li Feng --- .../intel_ish/utils/build_ish_firmware.cmake | 17 +- .../utils/build_ish_firmware_v1p1.py | 221 ++++++++++++++++++ 2 files changed, 235 insertions(+), 3 deletions(-) create mode 100644 soc/intel/intel_ish/utils/build_ish_firmware_v1p1.py diff --git a/soc/intel/intel_ish/utils/build_ish_firmware.cmake b/soc/intel/intel_ish/utils/build_ish_firmware.cmake index e3a169ada68..d22493826bf 100644 --- a/soc/intel/intel_ish/utils/build_ish_firmware.cmake +++ b/soc/intel/intel_ish/utils/build_ish_firmware.cmake @@ -3,6 +3,15 @@ # SPDX-License-Identifier: Apache-2.0 # +if(CONFIG_BOARD_INTEL_ISH_5_8_0) + set(BUILD_ISH_FIRMWARE_SCRIPT "build_ish_firmware_v1p1.py") + set(BUILD_VERSION "5.8.0.0") + set(VERSION_ARG "-v ${BUILD_VERSION}") +else() + set(BUILD_ISH_FIRMWARE_SCRIPT "build_ish_firmware.py") + set(VERSION_ARG "") +endif() + if(CONFIG_PM) set_property(GLOBAL APPEND PROPERTY extra_post_build_commands COMMAND ${CMAKE_OBJCOPY} -O binary --remove-section=aon @@ -11,15 +20,17 @@ set_property(GLOBAL APPEND PROPERTY extra_post_build_commands COMMAND ${CMAKE_OBJCOPY} -O binary --only-section=aon ${ZEPHYR_BINARY_DIR}/${KERNEL_ELF_NAME} ${PROJECT_BINARY_DIR}/ish_aon.bin - COMMAND ${PYTHON_EXECUTABLE} ${CMAKE_CURRENT_LIST_DIR}/build_ish_firmware.py - -k ${PROJECT_BINARY_DIR}/ish_kernel.bin + COMMAND ${PYTHON_EXECUTABLE} ${CMAKE_CURRENT_LIST_DIR}/${BUILD_ISH_FIRMWARE_SCRIPT} + ARGS -k ${PROJECT_BINARY_DIR}/ish_kernel.bin -a ${PROJECT_BINARY_DIR}/ish_aon.bin -o ${PROJECT_BINARY_DIR}/ish_fw.bin + ${VERSION_ARG} ) else() set_property(GLOBAL APPEND PROPERTY extra_post_build_commands - COMMAND ${PYTHON_EXECUTABLE} ${CMAKE_CURRENT_LIST_DIR}/build_ish_firmware.py + COMMAND ${PYTHON_EXECUTABLE} ${CMAKE_CURRENT_LIST_DIR}/${BUILD_ISH_FIRMWARE_SCRIPT} ARGS -k ${PROJECT_BINARY_DIR}/${CONFIG_KERNEL_BIN_NAME}.bin -o ${PROJECT_BINARY_DIR}/ish_fw.bin + ${VERSION_ARG} ) endif() diff --git a/soc/intel/intel_ish/utils/build_ish_firmware_v1p1.py b/soc/intel/intel_ish/utils/build_ish_firmware_v1p1.py new file mode 100644 index 00000000000..95ce37a26b1 --- /dev/null +++ b/soc/intel/intel_ish/utils/build_ish_firmware_v1p1.py @@ -0,0 +1,221 @@ +#!/usr/bin/env python3 + +# Copyright 2019 The Chromium OS Authors. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 + +"""Script to pack EC binary with manifest header. + +Package ecos main FW binary (kernel) and AON task binary into final EC binary +image with a manifest header, ISH shim loader will parse this header and load +each binaries into right memory location. +""" + +import argparse +import os +import struct + +MANIFEST_ENTRY_SIZE = 0x80 +HEADER_SIZE = 0x1000 +HEADER_VER = 0x00010001 +PAGE_SIZE = 0x1000 +MAIN_FW_ADDR = 0xFF200000 +SRAM_BASE_ADDR = MAIN_FW_ADDR +SRAM_BANK_SIZE = 0x00008000 +SRAM_BIT_WIDTH = 64 +SRAM_SIZE = 0x000A0000 +AON_RF_ADDR = 0xFF800000 +AON_RF_SIZE = 0x2000 +KERN_LOAD_ADDR = MAIN_FW_ADDR +AON_LOAD_ADDR = AON_RF_ADDR + + +def parseargs(): + parser = argparse.ArgumentParser(allow_abbrev=False) + parser.add_argument( + "-k", + "--kernel", + help="EC kernel binary to pack, \ + usually ec.RW.bin or ec.RW.flat.", + required=True, + ) + parser.add_argument( + "-a", + "--aon", + help="EC aontask binary to pack, \ + usually ish_aontask.bin.", + required=False, + ) + parser.add_argument("-o", "--output", help="Output flash binary file") + + parser.add_argument( + "-v", "--version", help="Specify the version of the EC firmware", required=True + ) + + return parser.parse_args() + + +def gen_global_manifest(): + """Returns a binary blob that represents a manifest entry""" + m = bytearray(MANIFEST_ENTRY_SIZE) + + args = parseargs() + version_parts = args.version.split('.') + if len(version_parts) != 4: + raise ValueError("Version must be in format major.minor.patch.build") + major, minor, patch, build = map(int, version_parts) + + # 4 bytes of ASCII encode ID (little endian) + struct.pack_into('<4s', m, 0, b'ISHG') + # 4 bytes of extension size, fixed 128 (little endian) + struct.pack_into(' 0) + + +def main(): + args = parseargs() + print(" Packing EC image file for ISH") + print("args.version", args.version) + with open(args.output, 'wb') as f: + kernel_size = os.path.getsize(args.kernel) + + if args.aon is not None: + aon_size = os.path.getsize(args.aon) + + print(" kernel binary size:", kernel_size) + kern_rdup_pg_size = roundup_page(kernel_size) + + # Global SOC configuration + f.write(gen_global_manifest()) + + # Add manifest for main ISH binary + f.write(gen_module_manifest(b'ISHM', b'ISH_KERN', HEADER_SIZE, kernel_size, KERN_LOAD_ADDR)) + + if args.aon is not None: + print(" AON binary size: ", aon_size) + aon_rdup_pg_size = roundup_page(aon_size) + # Add manifest for aontask binary + f.write( + gen_module_manifest( + b'ISHM', + b'AON_TASK', + (HEADER_SIZE + kern_rdup_pg_size * PAGE_SIZE), + aon_size, + AON_LOAD_ADDR, + ) + ) + else: + aon_rdup_pg_size = 0 + + # ICCM DCCM placeholder + f.write( + gen_module_manifest( + b'ISHM', + b'ICCM_IMG', + (HEADER_SIZE + (kern_rdup_pg_size + aon_rdup_pg_size) * PAGE_SIZE), + 0, + 0, + ) + ) + f.write( + gen_module_manifest( + b'ISHM', + b'DCCM_IMG', + (HEADER_SIZE + (kern_rdup_pg_size + aon_rdup_pg_size) * PAGE_SIZE), + 0, + 0, + ) + ) + + # Add manifest that signals end of manifests + # f.write(gen_manifest(b'ISHE', b'', 0, 0)) + f.write(gen_manifest_end()) + + # Pad the remaining HEADER with 0s + if args.aon is not None: + f.write(b'\x00' * (HEADER_SIZE - (MANIFEST_ENTRY_SIZE * 6))) + else: + f.write(b'\x00' * (HEADER_SIZE - (MANIFEST_ENTRY_SIZE * 5))) + + # Append original kernel image + with open(args.kernel, 'rb') as in_file: + f.write(in_file.read()) + # Filling padings due to size round up as pages + f.write(b'\x00' * (kern_rdup_pg_size * PAGE_SIZE - kernel_size)) + + if args.aon is not None: + # Append original aon image + with open(args.aon, 'rb') as in_file: + f.write(in_file.read()) + # Filling padings due to size round up as pages + f.write(b'\x00' * (aon_rdup_pg_size * PAGE_SIZE - aon_size)) + + +if __name__ == '__main__': + main() From b3581fe1d46b86987837ec0514d29d06848ee5be Mon Sep 17 00:00:00 2001 From: Lyle Zhu Date: Tue, 22 Apr 2025 13:53:40 +0800 Subject: [PATCH 0062/2553] Bluetooth: Classic: L2CAP: Handle multi L2CAP packets of a HCI ACL In current implementation, if the HCI ACL data length exceeds on L2CAP packet, the HCI ACL data will be discarded. Support the case if the transport is classic. Add a function `bt_br_acl_recv()` to handle the multi L2CAP packets one by one. Signed-off-by: Lyle Zhu --- subsys/bluetooth/host/classic/conn_br.c | 27 +++++++++++++++++++ .../bluetooth/host/classic/conn_br_internal.h | 2 ++ subsys/bluetooth/host/conn.c | 8 ++++-- 3 files changed, 35 insertions(+), 2 deletions(-) diff --git a/subsys/bluetooth/host/classic/conn_br.c b/subsys/bluetooth/host/classic/conn_br.c index f57b33a1509..27f6dbb7d8b 100644 --- a/subsys/bluetooth/host/classic/conn_br.c +++ b/subsys/bluetooth/host/classic/conn_br.c @@ -143,3 +143,30 @@ const bt_addr_t *bt_conn_get_dst_br(const struct bt_conn *conn) return &conn->br.dst; } + +void bt_br_acl_recv(struct bt_conn *conn, struct net_buf *buf, bool complete) +{ + uint16_t acl_total_len; + struct bt_l2cap_hdr *hdr; + struct net_buf_simple_state state; + + do { + net_buf_simple_save(&buf->b, &state); + + hdr = (void *)buf->data; + acl_total_len = sys_le16_to_cpu(hdr->len) + sizeof(*hdr); + if (buf->len > acl_total_len) { + LOG_DBG("Multiple L2CAP packet (%u > %u)", buf->len, acl_total_len); + buf->len = acl_total_len; + } else if (buf->len < acl_total_len) { + LOG_ERR("Short packet (%u < %u)", buf->len, acl_total_len); + break; + } + bt_l2cap_recv(conn, net_buf_ref(buf), complete); + + net_buf_simple_restore(&buf->b, &state); + net_buf_pull(buf, acl_total_len); + } while (buf->len > 0); + + net_buf_unref(buf); +} diff --git a/subsys/bluetooth/host/classic/conn_br_internal.h b/subsys/bluetooth/host/classic/conn_br_internal.h index 7ca84974702..f40b9ea9e7f 100644 --- a/subsys/bluetooth/host/classic/conn_br_internal.h +++ b/subsys/bluetooth/host/classic/conn_br_internal.h @@ -10,3 +10,5 @@ */ int bt_hci_connect_br_cancel(struct bt_conn *conn); + +void bt_br_acl_recv(struct bt_conn *conn, struct net_buf *buf, bool complete); diff --git a/subsys/bluetooth/host/conn.c b/subsys/bluetooth/host/conn.c index f75147d6e53..88994d029b3 100644 --- a/subsys/bluetooth/host/conn.c +++ b/subsys/bluetooth/host/conn.c @@ -471,7 +471,7 @@ static void bt_acl_recv(struct bt_conn *conn, struct net_buf *buf, uint8_t flags net_buf_unref(buf); - if (conn->rx->len > acl_total_len) { + if ((conn->type != BT_CONN_TYPE_BR) && (conn->rx->len > acl_total_len)) { LOG_ERR("ACL len mismatch (%u > %u)", conn->rx->len, acl_total_len); bt_conn_reset_rx_state(conn); return; @@ -484,7 +484,11 @@ static void bt_acl_recv(struct bt_conn *conn, struct net_buf *buf, uint8_t flags __ASSERT(buf->ref == 1, "buf->ref %d", buf->ref); LOG_DBG("Successfully parsed %u byte L2CAP packet", buf->len); - bt_l2cap_recv(conn, buf, true); + if (IS_ENABLED(CONFIG_BT_CLASSIC) && (conn->type == BT_CONN_TYPE_BR)) { + bt_br_acl_recv(conn, buf, true); + } else { + bt_l2cap_recv(conn, buf, true); + } } void bt_conn_recv(struct bt_conn *conn, struct net_buf *buf, uint8_t flags) From 76c072549dde4199c28ec1b25d458ecb54a3c2bf Mon Sep 17 00:00:00 2001 From: Lyle Zhu Date: Wed, 23 Apr 2025 20:58:08 +0800 Subject: [PATCH 0063/2553] Bluetooth: Classic: L2CAP: Fix the FCS incorrect issue The FCS flag of TX direction is not set correctly if the FCS flag of RX direction is set. The issue could be found with following steps, Step 1, Local sends configuration request with ERET mode and FCS omitted. Step 2, Peer replies the configuration response without any errors. Step 3, Peer sends configuration request with ERET mode and NO FCS. Step 4, Local replies the configuration response without any errors. The FCS flag of TX is cleared incorrectly. The FCS should be enabled if any one side enables the FCS. Signed-off-by: Lyle Zhu --- subsys/bluetooth/host/classic/l2cap_br.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/subsys/bluetooth/host/classic/l2cap_br.c b/subsys/bluetooth/host/classic/l2cap_br.c index 36f49bba3a8..75ecbfd79ab 100644 --- a/subsys/bluetooth/host/classic/l2cap_br.c +++ b/subsys/bluetooth/host/classic/l2cap_br.c @@ -4356,9 +4356,10 @@ static void l2cap_br_conf_req(struct bt_l2cap_br *l2cap, uint8_t ident, uint16_t } #if defined(CONFIG_BT_L2CAP_RET_FC) - if (BR_CHAN(chan)->tx.fcs == BT_L2CAP_BR_FCS_16BIT) { - /* If peer enables FCS, local also needs to enable it. */ + if (BR_CHAN(chan)->tx.fcs != BR_CHAN(chan)->rx.fcs) { + /* If FCS flag is not consistent of both sides, FCS should be used as default. */ BR_CHAN(chan)->rx.fcs = BT_L2CAP_BR_FCS_16BIT; + BR_CHAN(chan)->tx.fcs = BT_L2CAP_BR_FCS_16BIT; } if (BR_CHAN(chan)->tx.extended_control) { From 91dfa23f80ee7c34445ccb71d27ae5073aacc293 Mon Sep 17 00:00:00 2001 From: Philipp Steiner Date: Thu, 24 Apr 2025 07:58:53 +0200 Subject: [PATCH 0064/2553] samples: bme280: adafruit: Add missing conf and power-domains Add missing conf and power-domains for adafruit_feather_esp32s2 boards for the BME280 sample Signed-off-by: Philipp Steiner --- samples/sensor/bme280/boards/adafruit_feather_esp32s2.conf | 4 ++++ samples/sensor/bme280/boards/adafruit_feather_esp32s2.overlay | 1 + .../sensor/bme280/boards/adafruit_feather_esp32s2_tft.conf | 4 ++++ .../sensor/bme280/boards/adafruit_feather_esp32s2_tft.overlay | 1 + .../bme280/boards/adafruit_feather_esp32s2_tft_reverse.conf | 4 ++++ .../boards/adafruit_feather_esp32s2_tft_reverse.overlay | 1 + 6 files changed, 15 insertions(+) create mode 100644 samples/sensor/bme280/boards/adafruit_feather_esp32s2.conf create mode 100644 samples/sensor/bme280/boards/adafruit_feather_esp32s2_tft.conf create mode 100644 samples/sensor/bme280/boards/adafruit_feather_esp32s2_tft_reverse.conf diff --git a/samples/sensor/bme280/boards/adafruit_feather_esp32s2.conf b/samples/sensor/bme280/boards/adafruit_feather_esp32s2.conf new file mode 100644 index 00000000000..0968fb220e0 --- /dev/null +++ b/samples/sensor/bme280/boards/adafruit_feather_esp32s2.conf @@ -0,0 +1,4 @@ +CONFIG_POWER_DOMAIN=y +CONFIG_GPIO=y +CONFIG_PM_DEVICE=y +CONFIG_PM_DEVICE_POWER_DOMAIN=y diff --git a/samples/sensor/bme280/boards/adafruit_feather_esp32s2.overlay b/samples/sensor/bme280/boards/adafruit_feather_esp32s2.overlay index 7259b070ebb..bbd69db2d3b 100644 --- a/samples/sensor/bme280/boards/adafruit_feather_esp32s2.overlay +++ b/samples/sensor/bme280/boards/adafruit_feather_esp32s2.overlay @@ -2,5 +2,6 @@ bme280: bme280@77 { compatible = "bosch,bme280"; reg = <0x77>; + power-domains = <&i2c_reg>; }; }; diff --git a/samples/sensor/bme280/boards/adafruit_feather_esp32s2_tft.conf b/samples/sensor/bme280/boards/adafruit_feather_esp32s2_tft.conf new file mode 100644 index 00000000000..0968fb220e0 --- /dev/null +++ b/samples/sensor/bme280/boards/adafruit_feather_esp32s2_tft.conf @@ -0,0 +1,4 @@ +CONFIG_POWER_DOMAIN=y +CONFIG_GPIO=y +CONFIG_PM_DEVICE=y +CONFIG_PM_DEVICE_POWER_DOMAIN=y diff --git a/samples/sensor/bme280/boards/adafruit_feather_esp32s2_tft.overlay b/samples/sensor/bme280/boards/adafruit_feather_esp32s2_tft.overlay index 7259b070ebb..bbd69db2d3b 100644 --- a/samples/sensor/bme280/boards/adafruit_feather_esp32s2_tft.overlay +++ b/samples/sensor/bme280/boards/adafruit_feather_esp32s2_tft.overlay @@ -2,5 +2,6 @@ bme280: bme280@77 { compatible = "bosch,bme280"; reg = <0x77>; + power-domains = <&i2c_reg>; }; }; diff --git a/samples/sensor/bme280/boards/adafruit_feather_esp32s2_tft_reverse.conf b/samples/sensor/bme280/boards/adafruit_feather_esp32s2_tft_reverse.conf new file mode 100644 index 00000000000..0968fb220e0 --- /dev/null +++ b/samples/sensor/bme280/boards/adafruit_feather_esp32s2_tft_reverse.conf @@ -0,0 +1,4 @@ +CONFIG_POWER_DOMAIN=y +CONFIG_GPIO=y +CONFIG_PM_DEVICE=y +CONFIG_PM_DEVICE_POWER_DOMAIN=y diff --git a/samples/sensor/bme280/boards/adafruit_feather_esp32s2_tft_reverse.overlay b/samples/sensor/bme280/boards/adafruit_feather_esp32s2_tft_reverse.overlay index 7259b070ebb..bbd69db2d3b 100644 --- a/samples/sensor/bme280/boards/adafruit_feather_esp32s2_tft_reverse.overlay +++ b/samples/sensor/bme280/boards/adafruit_feather_esp32s2_tft_reverse.overlay @@ -2,5 +2,6 @@ bme280: bme280@77 { compatible = "bosch,bme280"; reg = <0x77>; + power-domains = <&i2c_reg>; }; }; From 203ca6fcde648bb8d26bd0b3c6c69c0034337085 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Fin=20Maa=C3=9F?= Date: Mon, 17 Mar 2025 11:40:43 +0100 Subject: [PATCH 0065/2553] drivers: ethernet: phy: rename LINK_*_*BASE_T MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit rename LINK_*_*BASE_T to LINK_*_*BASE speed options for ethernet drivers shouldn't end with a _T, implying that ethernet is only supported via a twisted pair cable. Signed-off-by: Fin Maaß --- drivers/ethernet/dwc_xgmac/eth_dwc_xgmac.c | 28 ++++++------ drivers/ethernet/eth_nxp_enet.c | 6 +-- drivers/ethernet/eth_nxp_s32_gmac.c | 12 ++--- drivers/ethernet/eth_renesas_ra.c | 8 ++-- drivers/ethernet/eth_sensry_sy1xx_mac.c | 6 +-- drivers/ethernet/eth_xilinx_axienet.c | 4 +- drivers/ethernet/phy/phy_adin2111.c | 4 +- drivers/ethernet/phy/phy_dm8806.c | 16 +++---- drivers/ethernet/phy/phy_microchip_ksz8081.c | 16 +++---- drivers/ethernet/phy/phy_microchip_t1s.c | 4 +- drivers/ethernet/phy/phy_microchip_vsc8541.c | 14 +++--- drivers/ethernet/phy/phy_mii.c | 48 ++++++++++---------- drivers/ethernet/phy/phy_qualcomm_ar8031.c | 34 +++++++------- drivers/ethernet/phy/phy_realtek_rtl8211f.c | 22 ++++----- drivers/ethernet/phy/phy_ti_dp83825.c | 16 +++---- drivers/ethernet/phy/phy_ti_dp83867.c | 22 ++++----- drivers/ethernet/phy/phy_tja1103.c | 4 +- include/zephyr/net/phy.h | 42 +++++++++-------- 18 files changed, 154 insertions(+), 152 deletions(-) diff --git a/drivers/ethernet/dwc_xgmac/eth_dwc_xgmac.c b/drivers/ethernet/dwc_xgmac/eth_dwc_xgmac.c index bc370eda205..a9a4296f790 100644 --- a/drivers/ethernet/dwc_xgmac/eth_dwc_xgmac.c +++ b/drivers/ethernet/dwc_xgmac/eth_dwc_xgmac.c @@ -1029,16 +1029,16 @@ static void phy_link_state_change_callback(const struct device *phy_dev, if (is_up) { /* Announce link up status */ switch (state->speed) { - case LINK_HALF_1000BASE_T: - case LINK_FULL_1000BASE_T: + case LINK_HALF_1000BASE: + case LINK_FULL_1000BASE: dev_data->link_speed = LINK_1GBIT; break; - case LINK_HALF_100BASE_T: - case LINK_FULL_100BASE_T: + case LINK_HALF_100BASE: + case LINK_FULL_100BASE: dev_data->link_speed = LINK_100MBIT; break; - case LINK_HALF_10BASE_T: - case LINK_FULL_10BASE_T: + case LINK_HALF_10BASE: + case LINK_FULL_10BASE: default: dev_data->link_speed = LINK_10MBIT; } @@ -1484,30 +1484,30 @@ static enum phy_link_speed get_phy_adv_speeds(bool auto_neg, bool duplex_mode, enum phy_link_speed adv_speeds = 0u; if (auto_neg) { - adv_speeds = LINK_HALF_1000BASE_T | LINK_HALF_1000BASE_T | LINK_HALF_100BASE_T | - LINK_FULL_100BASE_T | LINK_HALF_10BASE_T | LINK_FULL_10BASE_T; + adv_speeds = LINK_HALF_1000BASE | LINK_HALF_1000BASE | LINK_HALF_100BASE | + LINK_FULL_100BASE | LINK_HALF_10BASE | LINK_FULL_10BASE; } else { if (duplex_mode) { switch (link_speed) { case LINK_1GBIT: - adv_speeds = LINK_FULL_1000BASE_T; + adv_speeds = LINK_FULL_1000BASE; break; case LINK_100MBIT: - adv_speeds = LINK_FULL_100BASE_T; + adv_speeds = LINK_FULL_100BASE; break; default: - adv_speeds = LINK_FULL_10BASE_T; + adv_speeds = LINK_FULL_10BASE; } } else { switch (link_speed) { case LINK_1GBIT: - adv_speeds = LINK_HALF_1000BASE_T; + adv_speeds = LINK_HALF_1000BASE; break; case LINK_100MBIT: - adv_speeds = LINK_HALF_100BASE_T; + adv_speeds = LINK_HALF_100BASE; break; default: - adv_speeds = LINK_HALF_10BASE_T; + adv_speeds = LINK_HALF_10BASE; } } } diff --git a/drivers/ethernet/eth_nxp_enet.c b/drivers/ethernet/eth_nxp_enet.c index 26d135f8fdc..e7774707d5b 100644 --- a/drivers/ethernet/eth_nxp_enet.c +++ b/drivers/ethernet/eth_nxp_enet.c @@ -459,14 +459,14 @@ static void eth_nxp_enet_rx_thread(struct k_work *work) static int nxp_enet_phy_configure(const struct device *phy, uint8_t phy_mode) { - enum phy_link_speed speeds = LINK_HALF_10BASE_T | LINK_FULL_10BASE_T | - LINK_HALF_100BASE_T | LINK_FULL_100BASE_T; + enum phy_link_speed speeds = LINK_HALF_10BASE | LINK_FULL_10BASE | + LINK_HALF_100BASE | LINK_FULL_100BASE; int ret; struct phy_link_state state; if (COND_CODE_1(IS_ENABLED(CONFIG_ETH_NXP_ENET_1G), (phy_mode == NXP_ENET_RGMII_MODE), (0))) { - speeds |= (LINK_HALF_1000BASE_T | LINK_FULL_1000BASE_T); + speeds |= (LINK_HALF_1000BASE | LINK_FULL_1000BASE); } /* Configure the PHY */ diff --git a/drivers/ethernet/eth_nxp_s32_gmac.c b/drivers/ethernet/eth_nxp_s32_gmac.c index f6eaa950a98..1a11c6e748d 100644 --- a/drivers/ethernet/eth_nxp_s32_gmac.c +++ b/drivers/ethernet/eth_nxp_s32_gmac.c @@ -71,27 +71,27 @@ static inline struct net_if *get_iface(struct eth_nxp_s32_data *ctx) static void convert_phy_to_mac_config(Gmac_Ip_ConfigType *gmac_cfg, enum phy_link_speed phy_speed) { switch (phy_speed) { - case LINK_HALF_10BASE_T: + case LINK_HALF_10BASE: gmac_cfg->Speed = GMAC_SPEED_10M; gmac_cfg->Duplex = GMAC_HALF_DUPLEX; break; - case LINK_FULL_10BASE_T: + case LINK_FULL_10BASE: gmac_cfg->Speed = GMAC_SPEED_10M; gmac_cfg->Duplex = GMAC_FULL_DUPLEX; break; - case LINK_HALF_100BASE_T: + case LINK_HALF_100BASE: gmac_cfg->Speed = GMAC_SPEED_100M; gmac_cfg->Duplex = GMAC_HALF_DUPLEX; break; - case LINK_FULL_100BASE_T: + case LINK_FULL_100BASE: gmac_cfg->Speed = GMAC_SPEED_100M; gmac_cfg->Duplex = GMAC_FULL_DUPLEX; break; - case LINK_HALF_1000BASE_T: + case LINK_HALF_1000BASE: gmac_cfg->Speed = GMAC_SPEED_1G; gmac_cfg->Duplex = GMAC_HALF_DUPLEX; break; - case LINK_FULL_1000BASE_T: + case LINK_FULL_1000BASE: __fallthrough; default: gmac_cfg->Speed = GMAC_SPEED_1G; diff --git a/drivers/ethernet/eth_renesas_ra.c b/drivers/ethernet/eth_renesas_ra.c index 809d0d189e6..c32db9634a0 100644 --- a/drivers/ethernet/eth_renesas_ra.c +++ b/drivers/ethernet/eth_renesas_ra.c @@ -187,23 +187,23 @@ static void phy_link_state_changed(const struct device *pdev, struct phy_link_st switch (state->speed) { /* Half duplex link */ - case LINK_HALF_100BASE_T: { + case LINK_HALF_100BASE: { ctx->ctrl.link_speed_duplex = ETHER_PHY_LINK_SPEED_100H; break; } - case LINK_HALF_10BASE_T: { + case LINK_HALF_10BASE: { ctx->ctrl.link_speed_duplex = ETHER_PHY_LINK_SPEED_10H; break; } /* Full duplex link */ - case LINK_FULL_100BASE_T: { + case LINK_FULL_100BASE: { ctx->ctrl.link_speed_duplex = ETHER_PHY_LINK_SPEED_100F; break; } - case LINK_FULL_10BASE_T: { + case LINK_FULL_10BASE: { ctx->ctrl.link_speed_duplex = ETHER_PHY_LINK_SPEED_10F; break; } diff --git a/drivers/ethernet/eth_sensry_sy1xx_mac.c b/drivers/ethernet/eth_sensry_sy1xx_mac.c index 6a885cbc913..bf58d68ed0a 100644 --- a/drivers/ethernet/eth_sensry_sy1xx_mac.c +++ b/drivers/ethernet/eth_sensry_sy1xx_mac.c @@ -261,19 +261,19 @@ static void phy_link_state_changed(const struct device *pdev, struct phy_link_st (SY1XX_MAC_CTRL_CLK_DIV_MASK << SY1XX_MAC_CTRL_CLK_DIV_OFFS)); switch (speed) { - case LINK_FULL_10BASE_T: + case LINK_FULL_10BASE: LOG_INF("link speed FULL_10BASE_T"); /* 2.5MHz, MAC is clock source */ v |= (SY1XX_MAC_CTRL_CLK_SEL_MII_CLK << SY1XX_MAC_CTRL_CLK_SEL_OFFS) | (SY1XX_MAC_CTRL_CLK_DIV_10 << SY1XX_MAC_CTRL_CLK_DIV_OFFS); break; - case LINK_FULL_100BASE_T: + case LINK_FULL_100BASE: LOG_INF("link speed FULL_100BASE_T"); /* 25MHz, MAC is clock source */ v |= (SY1XX_MAC_CTRL_CLK_SEL_MII_CLK << SY1XX_MAC_CTRL_CLK_SEL_OFFS) | (SY1XX_MAC_CTRL_CLK_DIV_1 << SY1XX_MAC_CTRL_CLK_DIV_OFFS); break; - case LINK_FULL_1000BASE_T: + case LINK_FULL_1000BASE: LOG_INF("link speed FULL_1000BASE_T"); /* 125MHz, Phy is clock source */ v |= BIT(SY1XX_MAC_CTRL_GMII_OFFS) | diff --git a/drivers/ethernet/eth_xilinx_axienet.c b/drivers/ethernet/eth_xilinx_axienet.c index 0292fd95eb9..8a92a7bb7d1 100644 --- a/drivers/ethernet/eth_xilinx_axienet.c +++ b/drivers/ethernet/eth_xilinx_axienet.c @@ -529,8 +529,8 @@ static int xilinx_axienet_probe(const struct device *dev) XILINX_AXIENET_RECEIVER_CONFIGURATION_FLOW_CONTROL_EN_MASK); /* at time of writing, hardware does not support half duplex */ - err = phy_configure_link(config->phy, LINK_FULL_10BASE_T | LINK_FULL_100BASE_T | - LINK_FULL_1000BASE_T); + err = phy_configure_link(config->phy, LINK_FULL_10BASE | LINK_FULL_100BASE | + LINK_FULL_1000BASE); if (err) { LOG_WRN("Could not configure PHY: %d", -err); } diff --git a/drivers/ethernet/phy/phy_adin2111.c b/drivers/ethernet/phy/phy_adin2111.c index 1b7a042d9d4..0ded18cf90c 100644 --- a/drivers/ethernet/phy/phy_adin2111.c +++ b/drivers/ethernet/phy/phy_adin2111.c @@ -353,7 +353,7 @@ static int phy_adin2111_cfg_link(const struct device *dev, { ARG_UNUSED(dev); - if (!!(adv_speeds & LINK_FULL_10BASE_T)) { + if (!!(adv_speeds & LINK_FULL_10BASE)) { return 0; } @@ -449,7 +449,7 @@ static int phy_adin2111_init(const struct device *dev) data->dev = dev; data->state.is_up = false; - data->state.speed = LINK_FULL_10BASE_T; + data->state.speed = LINK_FULL_10BASE; /* * For adin1100 and further mii stuff, diff --git a/drivers/ethernet/phy/phy_dm8806.c b/drivers/ethernet/phy/phy_dm8806.c index 34f09bb975f..b53daecf7fa 100644 --- a/drivers/ethernet/phy/phy_dm8806.c +++ b/drivers/ethernet/phy/phy_dm8806.c @@ -498,16 +498,16 @@ static int phy_dm8806_get_link_state(const struct device *dev, struct phy_link_s status >>= DM8806_SPEED_AND_DUPLEX_OFFSET; switch (status & DM8806_SPEED_AND_DUPLEX_MASK) { case DM8806_SPEED_10MBPS_HALF_DUPLEX: - state->speed = LINK_HALF_10BASE_T; + state->speed = LINK_HALF_10BASE; break; case DM8806_SPEED_10MBPS_FULL_DUPLEX: - state->speed = LINK_FULL_10BASE_T; + state->speed = LINK_FULL_10BASE; break; case DM8806_SPEED_100MBPS_HALF_DUPLEX: - state->speed = LINK_HALF_100BASE_T; + state->speed = LINK_HALF_100BASE; break; case DM8806_SPEED_100MBPS_FULL_DUPLEX: - state->speed = LINK_FULL_100BASE_T; + state->speed = LINK_FULL_100BASE; break; } /* Extract link status from Switch Per-Port Register: Per Port Status Data @@ -531,19 +531,19 @@ static int phy_dm8806_cfg_link(const struct device *dev, enum phy_link_speed adv req_speed = adv_speeds; switch (req_speed) { - case LINK_HALF_10BASE_T: + case LINK_HALF_10BASE: req_speed = DM8806_MODE_10_BASET_HALF_DUPLEX; break; - case LINK_FULL_10BASE_T: + case LINK_FULL_10BASE: req_speed = DM8806_MODE_10_BASET_FULL_DUPLEX; break; - case LINK_HALF_100BASE_T: + case LINK_HALF_100BASE: req_speed = DM8806_MODE_100_BASET_HALF_DUPLEX; break; - case LINK_FULL_100BASE_T: + case LINK_FULL_100BASE: req_speed = DM8806_MODE_100_BASET_FULL_DUPLEX; break; } diff --git a/drivers/ethernet/phy/phy_microchip_ksz8081.c b/drivers/ethernet/phy/phy_microchip_ksz8081.c index d580ffd42a0..04ffafef763 100644 --- a/drivers/ethernet/phy/phy_microchip_ksz8081.c +++ b/drivers/ethernet/phy/phy_microchip_ksz8081.c @@ -186,13 +186,13 @@ static int phy_mc_ksz8081_get_link(const struct device *dev, uint32_t mutual_capabilities = anar & anlpar; if (mutual_capabilities & MII_ADVERTISE_100_FULL) { - state->speed = LINK_FULL_100BASE_T; + state->speed = LINK_FULL_100BASE; } else if (mutual_capabilities & MII_ADVERTISE_100_HALF) { - state->speed = LINK_HALF_100BASE_T; + state->speed = LINK_HALF_100BASE; } else if (mutual_capabilities & MII_ADVERTISE_10_FULL) { - state->speed = LINK_FULL_10BASE_T; + state->speed = LINK_FULL_10BASE; } else if (mutual_capabilities & MII_ADVERTISE_10_HALF) { - state->speed = LINK_HALF_10BASE_T; + state->speed = LINK_HALF_10BASE; } else { ret = -EIO; } @@ -365,22 +365,22 @@ static int phy_mc_ksz8081_cfg_link(const struct device *dev, } /* Setup advertising register */ - if (speeds & LINK_FULL_100BASE_T) { + if (speeds & LINK_FULL_100BASE) { anar |= MII_ADVERTISE_100_FULL; } else { anar &= ~MII_ADVERTISE_100_FULL; } - if (speeds & LINK_HALF_100BASE_T) { + if (speeds & LINK_HALF_100BASE) { anar |= MII_ADVERTISE_100_HALF; } else { anar &= ~MII_ADVERTISE_100_HALF; } - if (speeds & LINK_FULL_10BASE_T) { + if (speeds & LINK_FULL_10BASE) { anar |= MII_ADVERTISE_10_FULL; } else { anar &= ~MII_ADVERTISE_10_FULL; } - if (speeds & LINK_HALF_10BASE_T) { + if (speeds & LINK_HALF_10BASE) { anar |= MII_ADVERTISE_10_HALF; } else { anar &= ~MII_ADVERTISE_10_HALF; diff --git a/drivers/ethernet/phy/phy_microchip_t1s.c b/drivers/ethernet/phy/phy_microchip_t1s.c index 98ab971545f..39489ac0df6 100644 --- a/drivers/ethernet/phy/phy_microchip_t1s.c +++ b/drivers/ethernet/phy/phy_microchip_t1s.c @@ -193,7 +193,7 @@ static int phy_mc_t1s_get_link(const struct device *dev, struct phy_link_state * } state->is_up = value & MII_BMSR_LINK_STATUS; - state->speed = LINK_HALF_10BASE_T; + state->speed = LINK_HALF_10BASE; if (memcmp(&old_state, state, sizeof(struct phy_link_state)) != 0) { if (state->is_up) { @@ -424,7 +424,7 @@ static int phy_mc_t1s_cfg_link(const struct device *dev, enum phy_link_speed spe { ARG_UNUSED(dev); - if (speeds & LINK_HALF_10BASE_T) { + if (speeds & LINK_HALF_10BASE) { return 0; } diff --git a/drivers/ethernet/phy/phy_microchip_vsc8541.c b/drivers/ethernet/phy/phy_microchip_vsc8541.c index 9a0c3267f6b..121418fd52b 100644 --- a/drivers/ethernet/phy/phy_microchip_vsc8541.c +++ b/drivers/ethernet/phy/phy_microchip_vsc8541.c @@ -297,22 +297,22 @@ static int phy_mc_vsc8541_get_speed(const struct device *dev, struct phy_link_st if ((status & (1 << 2)) == 0) { /* no link */ - state->speed = LINK_HALF_10BASE_T; + state->speed = LINK_HALF_10BASE; } if ((status & (1 << 5)) == 0) { /* auto negotiation not yet complete */ - state->speed = LINK_HALF_10BASE_T; + state->speed = LINK_HALF_10BASE; } if ((link1000_status & (1 << 12))) { - state->speed = LINK_FULL_1000BASE_T; + state->speed = LINK_FULL_1000BASE; } if (link100_status & (1 << 12)) { - state->speed = LINK_FULL_100BASE_T; + state->speed = LINK_FULL_100BASE; } if (link10_status & (1 << 6)) { - state->speed = LINK_FULL_10BASE_T; + state->speed = LINK_FULL_10BASE; } return 0; @@ -329,7 +329,7 @@ static int phy_mc_vsc8541_init(const struct device *dev) data->cb = NULL; data->cb_data = NULL; data->state.is_up = false; - data->state.speed = LINK_HALF_10BASE_T; + data->state.speed = LINK_HALF_10BASE; data->active_page = -1; /* Reset PHY */ @@ -392,7 +392,7 @@ static int phy_mc_vsc8541_get_link(const struct device *dev, struct phy_link_sta } } else { state->is_up = 0; - state->speed = LINK_HALF_10BASE_T; + state->speed = LINK_HALF_10BASE; } return 0; diff --git a/drivers/ethernet/phy/phy_mii.c b/drivers/ethernet/phy/phy_mii.c index b2abf474d9e..ba56dd95942 100644 --- a/drivers/ethernet/phy/phy_mii.c +++ b/drivers/ethernet/phy/phy_mii.c @@ -261,18 +261,18 @@ static int check_autonegotiation_completion(const struct device *dev) if (data->gigabit_supported && ((c1kt_reg & s1kt_reg) & MII_ADVERTISE_1000_FULL)) { - data->state.speed = LINK_FULL_1000BASE_T; + data->state.speed = LINK_FULL_1000BASE; } else if (data->gigabit_supported && ((c1kt_reg & s1kt_reg) & MII_ADVERTISE_1000_HALF)) { - data->state.speed = LINK_HALF_1000BASE_T; + data->state.speed = LINK_HALF_1000BASE; } else if ((anar_reg & anlpar_reg) & MII_ADVERTISE_100_FULL) { - data->state.speed = LINK_FULL_100BASE_T; + data->state.speed = LINK_FULL_100BASE; } else if ((anar_reg & anlpar_reg) & MII_ADVERTISE_100_HALF) { - data->state.speed = LINK_HALF_100BASE_T; + data->state.speed = LINK_HALF_100BASE; } else if ((anar_reg & anlpar_reg) & MII_ADVERTISE_10_FULL) { - data->state.speed = LINK_FULL_10BASE_T; + data->state.speed = LINK_FULL_10BASE; } else { - data->state.speed = LINK_HALF_10BASE_T; + data->state.speed = LINK_HALF_10BASE; } LOG_INF("PHY (%d) Link speed %s Mb, %s duplex", @@ -411,38 +411,38 @@ static int phy_mii_cfg_link(const struct device *dev, } } - if (adv_speeds & LINK_FULL_10BASE_T) { + if (adv_speeds & LINK_FULL_10BASE) { anar_reg |= MII_ADVERTISE_10_FULL; } else { anar_reg &= ~MII_ADVERTISE_10_FULL; } - if (adv_speeds & LINK_HALF_10BASE_T) { + if (adv_speeds & LINK_HALF_10BASE) { anar_reg |= MII_ADVERTISE_10_HALF; } else { anar_reg &= ~MII_ADVERTISE_10_HALF; } - if (adv_speeds & LINK_FULL_100BASE_T) { + if (adv_speeds & LINK_FULL_100BASE) { anar_reg |= MII_ADVERTISE_100_FULL; } else { anar_reg &= ~MII_ADVERTISE_100_FULL; } - if (adv_speeds & LINK_HALF_100BASE_T) { + if (adv_speeds & LINK_HALF_100BASE) { anar_reg |= MII_ADVERTISE_100_HALF; } else { anar_reg &= ~MII_ADVERTISE_100_HALF; } if (data->gigabit_supported) { - if (adv_speeds & LINK_FULL_1000BASE_T) { + if (adv_speeds & LINK_FULL_1000BASE) { c1kt_reg |= MII_ADVERTISE_1000_FULL; } else { c1kt_reg &= ~MII_ADVERTISE_1000_FULL; } - if (adv_speeds & LINK_HALF_1000BASE_T) { + if (adv_speeds & LINK_HALF_1000BASE) { c1kt_reg |= MII_ADVERTISE_1000_HALF; } else { c1kt_reg &= ~MII_ADVERTISE_1000_HALF; @@ -515,12 +515,12 @@ static int phy_mii_initialize(const struct device *dev) */ if (cfg->fixed) { const static int speed_to_phy_link_speed[] = { - LINK_HALF_10BASE_T, - LINK_FULL_10BASE_T, - LINK_HALF_100BASE_T, - LINK_FULL_100BASE_T, - LINK_HALF_1000BASE_T, - LINK_FULL_1000BASE_T, + LINK_HALF_10BASE, + LINK_FULL_10BASE, + LINK_HALF_100BASE, + LINK_FULL_100BASE, + LINK_HALF_1000BASE, + LINK_FULL_1000BASE, }; data->state.speed = speed_to_phy_link_speed[cfg->fixed_speed]; @@ -548,12 +548,12 @@ static int phy_mii_initialize(const struct device *dev) data->gigabit_supported = is_gigabit_supported(dev); /* Advertise all speeds */ - phy_mii_cfg_link(dev, LINK_HALF_10BASE_T | - LINK_FULL_10BASE_T | - LINK_HALF_100BASE_T | - LINK_FULL_100BASE_T | - LINK_HALF_1000BASE_T | - LINK_FULL_1000BASE_T); + phy_mii_cfg_link(dev, LINK_HALF_10BASE | + LINK_FULL_10BASE | + LINK_HALF_100BASE | + LINK_FULL_100BASE | + LINK_HALF_1000BASE | + LINK_FULL_1000BASE); k_work_init_delayable(&data->monitor_work, monitor_work_handler); diff --git a/drivers/ethernet/phy/phy_qualcomm_ar8031.c b/drivers/ethernet/phy/phy_qualcomm_ar8031.c index a342a0e1e04..04cf0feb4b3 100644 --- a/drivers/ethernet/phy/phy_qualcomm_ar8031.c +++ b/drivers/ethernet/phy/phy_qualcomm_ar8031.c @@ -188,22 +188,22 @@ static int qc_ar8031_update_link_state(const struct device *dev) switch (speed | duplex) { case PHY_SPEED_10M | PHY_DUPLEX_FULL: - data->state.speed = LINK_FULL_10BASE_T; + data->state.speed = LINK_FULL_10BASE; break; case PHY_SPEED_10M | PHY_DUPLEX_HALF: - data->state.speed = LINK_HALF_10BASE_T; + data->state.speed = LINK_HALF_10BASE; break; case PHY_SPEED_100M | PHY_DUPLEX_FULL: - data->state.speed = LINK_FULL_100BASE_T; + data->state.speed = LINK_FULL_100BASE; break; case PHY_SPEED_100M | PHY_DUPLEX_HALF: - data->state.speed = LINK_HALF_100BASE_T; + data->state.speed = LINK_HALF_100BASE; break; case PHY_SPEED_1000M | PHY_DUPLEX_FULL: - data->state.speed = LINK_FULL_1000BASE_T; + data->state.speed = LINK_FULL_1000BASE; break; case PHY_SPEED_1000M | PHY_DUPLEX_HALF: - data->state.speed = LINK_HALF_1000BASE_T; + data->state.speed = LINK_HALF_1000BASE; break; } @@ -271,37 +271,37 @@ static int qc_ar8031_cfg_link(const struct device *dev, enum phy_link_speed adv_ return -EIO; } - if (adv_speeds & LINK_FULL_10BASE_T) { + if (adv_speeds & LINK_FULL_10BASE) { anar_reg |= MII_ADVERTISE_10_FULL; } else { anar_reg &= ~MII_ADVERTISE_10_FULL; } - if (adv_speeds & LINK_HALF_10BASE_T) { + if (adv_speeds & LINK_HALF_10BASE) { anar_reg |= MII_ADVERTISE_10_HALF; } else { anar_reg &= ~MII_ADVERTISE_10_HALF; } - if (adv_speeds & LINK_FULL_100BASE_T) { + if (adv_speeds & LINK_FULL_100BASE) { anar_reg |= MII_ADVERTISE_100_FULL; } else { anar_reg &= ~MII_ADVERTISE_100_FULL; } - if (adv_speeds & LINK_HALF_100BASE_T) { + if (adv_speeds & LINK_HALF_100BASE) { anar_reg |= MII_ADVERTISE_100_HALF; } else { anar_reg &= ~MII_ADVERTISE_100_HALF; } - if (adv_speeds & LINK_FULL_1000BASE_T) { + if (adv_speeds & LINK_FULL_1000BASE) { c1kt_reg |= MII_ADVERTISE_1000_FULL; } else { c1kt_reg &= ~MII_ADVERTISE_1000_FULL; } - if (adv_speeds & LINK_HALF_1000BASE_T) { + if (adv_speeds & LINK_HALF_1000BASE) { c1kt_reg |= MII_ADVERTISE_1000_HALF; } else { c1kt_reg &= ~MII_ADVERTISE_1000_HALF; @@ -463,17 +463,17 @@ static int qc_ar8031_init(const struct device *dev) } const static int speed_to_phy_link_speed[] = { - LINK_HALF_10BASE_T, LINK_FULL_10BASE_T, LINK_HALF_100BASE_T, - LINK_FULL_100BASE_T, LINK_HALF_1000BASE_T, LINK_FULL_1000BASE_T, + LINK_HALF_10BASE, LINK_FULL_10BASE, LINK_HALF_100BASE, + LINK_FULL_100BASE, LINK_HALF_1000BASE, LINK_FULL_1000BASE, }; data->state.speed = speed_to_phy_link_speed[cfg->fixed_speed]; data->state.is_up = true; } else { /* Auto negotiation */ /* Advertise all speeds */ - qc_ar8031_cfg_link(dev, LINK_HALF_10BASE_T | LINK_FULL_10BASE_T | - LINK_HALF_100BASE_T | LINK_FULL_100BASE_T | - LINK_HALF_1000BASE_T | LINK_FULL_1000BASE_T); + qc_ar8031_cfg_link(dev, LINK_HALF_10BASE | LINK_FULL_10BASE | + LINK_HALF_100BASE | LINK_FULL_100BASE | + LINK_HALF_1000BASE | LINK_FULL_1000BASE); k_work_init_delayable(&data->monitor_work, monitor_work_handler); diff --git a/drivers/ethernet/phy/phy_realtek_rtl8211f.c b/drivers/ethernet/phy/phy_realtek_rtl8211f.c index 7a05cc3ba0d..9ce8bfdfa26 100644 --- a/drivers/ethernet/phy/phy_realtek_rtl8211f.c +++ b/drivers/ethernet/phy/phy_realtek_rtl8211f.c @@ -241,24 +241,24 @@ static int phy_rt_rtl8211f_get_link(const struct device *dev, >> PHY_RT_RTL8211F_PHYSR_LINKSPEED_SHIFT) { case PHY_RT_RTL8211F_PHYSR_LINKSPEED_100M: if (duplex) { - new_state.speed = LINK_FULL_100BASE_T; + new_state.speed = LINK_FULL_100BASE; } else { - new_state.speed = LINK_HALF_100BASE_T; + new_state.speed = LINK_HALF_100BASE; } break; case PHY_RT_RTL8211F_PHYSR_LINKSPEED_1000M: if (duplex) { - new_state.speed = LINK_FULL_1000BASE_T; + new_state.speed = LINK_FULL_1000BASE; } else { - new_state.speed = LINK_HALF_1000BASE_T; + new_state.speed = LINK_HALF_1000BASE; } break; case PHY_RT_RTL8211F_PHYSR_LINKSPEED_10M: default: if (duplex) { - new_state.speed = LINK_FULL_10BASE_T; + new_state.speed = LINK_FULL_10BASE; } else { - new_state.speed = LINK_HALF_10BASE_T; + new_state.speed = LINK_HALF_10BASE; } break; } @@ -318,29 +318,29 @@ static int phy_rt_rtl8211f_cfg_link(const struct device *dev, } /* Setup advertising register */ - if (speeds & LINK_FULL_100BASE_T) { + if (speeds & LINK_FULL_100BASE) { anar |= MII_ADVERTISE_100_FULL; } else { anar &= ~MII_ADVERTISE_100_FULL; } - if (speeds & LINK_HALF_100BASE_T) { + if (speeds & LINK_HALF_100BASE) { anar |= MII_ADVERTISE_100_HALF; } else { anar &= ~MII_ADVERTISE_100_HALF; } - if (speeds & LINK_FULL_10BASE_T) { + if (speeds & LINK_FULL_10BASE) { anar |= MII_ADVERTISE_10_FULL; } else { anar &= ~MII_ADVERTISE_10_FULL; } - if (speeds & LINK_HALF_10BASE_T) { + if (speeds & LINK_HALF_10BASE) { anar |= MII_ADVERTISE_10_HALF; } else { anar &= ~MII_ADVERTISE_10_HALF; } /* Setup 1000Base-T control register */ - if (speeds & LINK_FULL_1000BASE_T) { + if (speeds & LINK_FULL_1000BASE) { gbcr |= MII_ADVERTISE_1000_FULL; } else { gbcr &= ~MII_ADVERTISE_1000_FULL; diff --git a/drivers/ethernet/phy/phy_ti_dp83825.c b/drivers/ethernet/phy/phy_ti_dp83825.c index 9359358e755..6c03da42805 100644 --- a/drivers/ethernet/phy/phy_ti_dp83825.c +++ b/drivers/ethernet/phy/phy_ti_dp83825.c @@ -213,13 +213,13 @@ static int phy_ti_dp83825_get_link(const struct device *dev, struct phy_link_sta mutual_capabilities = anar & anlpar; if (mutual_capabilities & MII_ADVERTISE_100_FULL) { - state->speed = LINK_FULL_100BASE_T; + state->speed = LINK_FULL_100BASE; } else if (mutual_capabilities & MII_ADVERTISE_100_HALF) { - state->speed = LINK_HALF_100BASE_T; + state->speed = LINK_HALF_100BASE; } else if (mutual_capabilities & MII_ADVERTISE_10_FULL) { - state->speed = LINK_FULL_10BASE_T; + state->speed = LINK_FULL_10BASE; } else if (mutual_capabilities & MII_ADVERTISE_10_HALF) { - state->speed = LINK_HALF_10BASE_T; + state->speed = LINK_HALF_10BASE; } else { return -EIO; } @@ -401,25 +401,25 @@ static int phy_ti_dp83825_cfg_link(const struct device *dev, enum phy_link_speed } /* Setup advertising register */ - if (speeds & LINK_FULL_100BASE_T) { + if (speeds & LINK_FULL_100BASE) { anar |= MII_ADVERTISE_100_FULL; } else { anar &= ~MII_ADVERTISE_100_FULL; } - if (speeds & LINK_HALF_100BASE_T) { + if (speeds & LINK_HALF_100BASE) { anar |= MII_ADVERTISE_100_HALF; } else { anar &= ~MII_ADVERTISE_100_HALF; } - if (speeds & LINK_FULL_10BASE_T) { + if (speeds & LINK_FULL_10BASE) { anar |= MII_ADVERTISE_10_FULL; } else { anar &= ~MII_ADVERTISE_10_FULL; } - if (speeds & LINK_HALF_10BASE_T) { + if (speeds & LINK_HALF_10BASE) { anar |= MII_ADVERTISE_10_HALF; } else { anar &= ~MII_ADVERTISE_10_HALF; diff --git a/drivers/ethernet/phy/phy_ti_dp83867.c b/drivers/ethernet/phy/phy_ti_dp83867.c index 84b3b4d14d9..3b910020707 100644 --- a/drivers/ethernet/phy/phy_ti_dp83867.c +++ b/drivers/ethernet/phy/phy_ti_dp83867.c @@ -193,24 +193,24 @@ static int phy_ti_dp83867_get_link(const struct device *dev, struct phy_link_sta PHY_TI_DP83867_PHYSTS_LINKSPEED_SHIFT) { case PHY_TI_DP83867_PHYSTS_LINKSPEED_1000M: if (duplex) { - new_state.speed = LINK_FULL_1000BASE_T; + new_state.speed = LINK_FULL_1000BASE; } else { - new_state.speed = LINK_HALF_1000BASE_T; + new_state.speed = LINK_HALF_1000BASE; } break; case PHY_TI_DP83867_PHYSTS_LINKSPEED_100M: if (duplex) { - new_state.speed = LINK_FULL_100BASE_T; + new_state.speed = LINK_FULL_100BASE; } else { - new_state.speed = LINK_HALF_100BASE_T; + new_state.speed = LINK_HALF_100BASE; } break; case PHY_TI_DP83867_PHYSTS_LINKSPEED_10M: default: if (duplex) { - new_state.speed = LINK_FULL_10BASE_T; + new_state.speed = LINK_FULL_10BASE; } else { - new_state.speed = LINK_HALF_10BASE_T; + new_state.speed = LINK_HALF_10BASE; } break; } @@ -345,29 +345,29 @@ static int phy_ti_dp83867_cfg_link(const struct device *dev, enum phy_link_speed } /* Setup advertising register */ - if (speeds & LINK_FULL_100BASE_T) { + if (speeds & LINK_FULL_100BASE) { anar |= MII_ADVERTISE_100_FULL; } else { anar &= ~MII_ADVERTISE_100_FULL; } - if (speeds & LINK_HALF_100BASE_T) { + if (speeds & LINK_HALF_100BASE) { anar |= MII_ADVERTISE_100_HALF; } else { anar &= ~MII_ADVERTISE_100_HALF; } - if (speeds & LINK_FULL_10BASE_T) { + if (speeds & LINK_FULL_10BASE) { anar |= MII_ADVERTISE_10_FULL; } else { anar &= ~MII_ADVERTISE_10_FULL; } - if (speeds & LINK_HALF_10BASE_T) { + if (speeds & LINK_HALF_10BASE) { anar |= MII_ADVERTISE_10_HALF; } else { anar &= ~MII_ADVERTISE_10_HALF; } /* Setup 1000Base-T control register */ - if (speeds & LINK_FULL_1000BASE_T) { + if (speeds & LINK_FULL_1000BASE) { cfg1 |= MII_ADVERTISE_1000_FULL; } else { cfg1 &= ~MII_ADVERTISE_1000_FULL; diff --git a/drivers/ethernet/phy/phy_tja1103.c b/drivers/ethernet/phy/phy_tja1103.c index c9a3bbb6751..8bdd2d4a914 100644 --- a/drivers/ethernet/phy/phy_tja1103.c +++ b/drivers/ethernet/phy/phy_tja1103.c @@ -342,7 +342,7 @@ static int phy_tja1103_cfg_link(const struct device *dev, enum phy_link_speed ad { ARG_UNUSED(dev); - if (adv_speeds & LINK_FULL_100BASE_T) { + if (adv_speeds & LINK_FULL_100BASE) { return 0; } @@ -360,7 +360,7 @@ static int phy_tja1103_init(const struct device *dev) data->dev = dev; data->cb = NULL; data->state.is_up = false; - data->state.speed = LINK_FULL_100BASE_T; + data->state.speed = LINK_FULL_100BASE; ret = WAIT_FOR(!phy_tja1103_id(dev, &phy_id) && phy_id == TJA1103_ID, TJA1103_AWAIT_RETRY_COUNT * TJA1103_AWAIT_DELAY_POLL_US, diff --git a/include/zephyr/net/phy.h b/include/zephyr/net/phy.h index 24201d915de..5da96f7e63b 100644 --- a/include/zephyr/net/phy.h +++ b/include/zephyr/net/phy.h @@ -32,22 +32,22 @@ extern "C" { /** @brief Ethernet link speeds. */ enum phy_link_speed { - /** 10Base-T Half-Duplex */ - LINK_HALF_10BASE_T = BIT(0), - /** 10Base-T Full-Duplex */ - LINK_FULL_10BASE_T = BIT(1), - /** 100Base-T Half-Duplex */ - LINK_HALF_100BASE_T = BIT(2), - /** 100Base-T Full-Duplex */ - LINK_FULL_100BASE_T = BIT(3), - /** 1000Base-T Half-Duplex */ - LINK_HALF_1000BASE_T = BIT(4), - /** 1000Base-T Full-Duplex */ - LINK_FULL_1000BASE_T = BIT(5), - /** 2.5GBase-T Full-Duplex */ - LINK_FULL_2500BASE_T = BIT(6), - /** 5GBase-T Full-Duplex */ - LINK_FULL_5000BASE_T = BIT(7), + /** 10Base Half-Duplex */ + LINK_HALF_10BASE = BIT(0), + /** 10Base Full-Duplex */ + LINK_FULL_10BASE = BIT(1), + /** 100Base Half-Duplex */ + LINK_HALF_100BASE = BIT(2), + /** 100Base Full-Duplex */ + LINK_FULL_100BASE = BIT(3), + /** 1000Base Half-Duplex */ + LINK_HALF_1000BASE = BIT(4), + /** 1000Base Full-Duplex */ + LINK_FULL_1000BASE = BIT(5), + /** 2.5GBase Full-Duplex */ + LINK_FULL_2500BASE = BIT(6), + /** 5GBase Full-Duplex */ + LINK_FULL_5000BASE = BIT(7), }; /** @@ -57,7 +57,9 @@ enum phy_link_speed { * * @return True if link is full duplex, false if not. */ -#define PHY_LINK_IS_FULL_DUPLEX(x) (x & (BIT(1) | BIT(3) | BIT(5) | BIT(6) | BIT(7))) +#define PHY_LINK_IS_FULL_DUPLEX(x) \ + (x & (LINK_FULL_10BASE | LINK_FULL_100BASE | LINK_FULL_1000BASE | LINK_FULL_2500BASE | \ + LINK_FULL_5000BASE)) /** * @brief Check if phy link speed is 1 Gbit/sec. @@ -66,16 +68,16 @@ enum phy_link_speed { * * @return True if link is 1 Gbit/sec, false if not. */ -#define PHY_LINK_IS_SPEED_1000M(x) (x & (BIT(4) | BIT(5))) +#define PHY_LINK_IS_SPEED_1000M(x) (x & (LINK_HALF_1000BASE | LINK_FULL_1000BASE)) /** * @brief Check if phy link speed is 100 Mbit/sec. * * @param x Link capabilities * - * @return True if link is 1 Mbit/sec, false if not. + * @return True if link is 100 Mbit/sec, false if not. */ -#define PHY_LINK_IS_SPEED_100M(x) (x & (BIT(2) | BIT(3))) +#define PHY_LINK_IS_SPEED_100M(x) (x & (LINK_HALF_100BASE | LINK_FULL_100BASE)) /** @brief Link state */ struct phy_link_state { From 43919f13696247877a58b46515864444fdfce584 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Fin=20Maa=C3=9F?= Date: Mon, 17 Mar 2025 11:41:24 +0100 Subject: [PATCH 0066/2553] drivers: ethernet: phy: add PHY_LINK_IS_SPEED_10M macro MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit add PHY_LINK_IS_SPEED_10M macro to check if the link speed is 10M. Signed-off-by: Fin Maaß --- include/zephyr/net/phy.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/include/zephyr/net/phy.h b/include/zephyr/net/phy.h index 5da96f7e63b..89624854664 100644 --- a/include/zephyr/net/phy.h +++ b/include/zephyr/net/phy.h @@ -79,6 +79,15 @@ enum phy_link_speed { */ #define PHY_LINK_IS_SPEED_100M(x) (x & (LINK_HALF_100BASE | LINK_FULL_100BASE)) +/** + * @brief Check if phy link speed is 10 Mbit/sec. + * + * @param x Link capabilities + * + * @return True if link is 10 Mbit/sec, false if not. + */ +#define PHY_LINK_IS_SPEED_10M(x) (x & (LINK_HALF_10BASE | LINK_FULL_10BASE)) + /** @brief Link state */ struct phy_link_state { /** Link speed */ From 3a195a08da40f6c362b54d24ade28df1df9ca238 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Fin=20Maa=C3=9F?= Date: Tue, 18 Mar 2025 13:17:16 +0100 Subject: [PATCH 0067/2553] drivers: net: ethernet: change ETHERNET_LINK_*BASE_T MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit change ETHERNET_LINK_*BASE_T to ETHERNET_LINK_*BASE. Signed-off-by: Fin Maaß --- doc/connectivity/networking/api/8021Qav.rst | 4 ++-- drivers/ethernet/dsa/dsa_ksz8xxx.c | 4 ++-- drivers/ethernet/dwc_xgmac/eth_dwc_xgmac.c | 2 +- drivers/ethernet/eth_adin2111.c | 2 +- drivers/ethernet/eth_cyclonev.c | 6 +++--- drivers/ethernet/eth_dwmac.c | 4 ++-- drivers/ethernet/eth_e1000.c | 4 ++-- drivers/ethernet/eth_enc28j60.c | 2 +- drivers/ethernet/eth_enc424j600.c | 2 +- drivers/ethernet/eth_esp32.c | 2 +- drivers/ethernet/eth_gecko.c | 4 ++-- drivers/ethernet/eth_ivshmem.c | 2 +- drivers/ethernet/eth_lan865x.c | 2 +- drivers/ethernet/eth_lan9250.c | 2 +- drivers/ethernet/eth_litex_liteeth.c | 2 +- drivers/ethernet/eth_numaker.c | 4 ++-- drivers/ethernet/eth_nxp_enet.c | 6 +++--- .../eth_nxp_enet_qos/eth_nxp_enet_qos_mac.c | 2 +- drivers/ethernet/eth_nxp_s32_gmac.c | 6 +++--- drivers/ethernet/eth_nxp_s32_netc.c | 6 +++--- drivers/ethernet/eth_renesas_ra.c | 2 +- drivers/ethernet/eth_sam_gmac.c | 4 ++-- drivers/ethernet/eth_sensry_sy1xx_mac.c | 2 +- drivers/ethernet/eth_smsc911x.c | 2 +- drivers/ethernet/eth_smsc91x.c | 4 ++-- drivers/ethernet/eth_stm32_hal.c | 2 +- drivers/ethernet/eth_w5500.c | 2 +- drivers/ethernet/eth_xilinx_axienet.c | 4 ++-- drivers/ethernet/eth_xlnx_gem.c | 14 ++++++-------- drivers/ethernet/eth_xmc4xxx.c | 2 +- drivers/ethernet/nxp_imx_netc/eth_nxp_imx_netc.c | 2 +- drivers/wifi/nrf_wifi/src/net_if.c | 4 ++-- include/zephyr/net/ethernet.h | 10 +++++----- subsys/net/l2/ethernet/ethernet_mgmt.c | 9 +++------ subsys/net/lib/shell/iface.c | 10 +++++----- subsys/usb/device_next/class/usbd_cdc_ecm.c | 2 +- subsys/usb/device_next/class/usbd_cdc_ncm.c | 2 +- tests/net/ethernet_mgmt/src/main.c | 4 ++-- tests/net/socket/net_mgmt/src/main.c | 4 ++-- 39 files changed, 74 insertions(+), 79 deletions(-) diff --git a/doc/connectivity/networking/api/8021Qav.rst b/doc/connectivity/networking/api/8021Qav.rst index dced6817ec2..094714f4939 100644 --- a/doc/connectivity/networking/api/8021Qav.rst +++ b/doc/connectivity/networking/api/8021Qav.rst @@ -28,8 +28,8 @@ also priority queues ``ETHERNET_PRIORITY_QUEUES`` need to be supported. ARG_UNUSED(dev); return ETHERNET_QAV | ETHERNET_PRIORITY_QUEUES | - ETHERNET_HW_VLAN | ETHERNET_LINK_10BASE_T | - ETHERNET_LINK_100BASE_T; + ETHERNET_HW_VLAN | ETHERNET_LINK_10BASE | + ETHERNET_LINK_100BASE; } See ``sam-e70-xplained`` board Ethernet driver diff --git a/drivers/ethernet/dsa/dsa_ksz8xxx.c b/drivers/ethernet/dsa/dsa_ksz8xxx.c index 41b3f45d355..2c9a9b6337d 100644 --- a/drivers/ethernet/dsa/dsa_ksz8xxx.c +++ b/drivers/ethernet/dsa/dsa_ksz8xxx.c @@ -1114,8 +1114,8 @@ static enum ethernet_hw_caps dsa_port_get_capabilities(const struct device *dev) { ARG_UNUSED(dev); - return ETHERNET_DSA_USER_PORT | ETHERNET_LINK_10BASE_T | - ETHERNET_LINK_100BASE_T; + return ETHERNET_DSA_USER_PORT | ETHERNET_LINK_10BASE | + ETHERNET_LINK_100BASE; } const struct ethernet_api dsa_eth_api_funcs = { diff --git a/drivers/ethernet/dwc_xgmac/eth_dwc_xgmac.c b/drivers/ethernet/dwc_xgmac/eth_dwc_xgmac.c index a9a4296f790..f76ad5a5779 100644 --- a/drivers/ethernet/dwc_xgmac/eth_dwc_xgmac.c +++ b/drivers/ethernet/dwc_xgmac/eth_dwc_xgmac.c @@ -1727,7 +1727,7 @@ static enum ethernet_hw_caps eth_dwc_xgmac_get_capabilities(const struct device ARG_UNUSED(dev); enum ethernet_hw_caps caps = (enum ethernet_hw_caps)0; - caps = (ETHERNET_LINK_1000BASE_T | ETHERNET_LINK_100BASE_T | ETHERNET_LINK_10BASE_T | + caps = (ETHERNET_LINK_1000BASE | ETHERNET_LINK_100BASE | ETHERNET_LINK_10BASE | ETHERNET_AUTO_NEGOTIATION_SET | ETHERNET_DUPLEX_SET); #ifdef CONFIG_ETH_DWC_XGMAC_RX_CS_OFFLOAD diff --git a/drivers/ethernet/eth_adin2111.c b/drivers/ethernet/eth_adin2111.c index 0f125fabc2d..e4407d6cc1a 100644 --- a/drivers/ethernet/eth_adin2111.c +++ b/drivers/ethernet/eth_adin2111.c @@ -1217,7 +1217,7 @@ static void adin2111_port_iface_init(struct net_if *iface) static enum ethernet_hw_caps adin2111_port_get_capabilities(const struct device *dev) { ARG_UNUSED(dev); - return ETHERNET_LINK_10BASE_T | + return ETHERNET_LINK_10BASE | ETHERNET_HW_FILTERING #if defined(CONFIG_NET_LLDP) | ETHERNET_LLDP diff --git a/drivers/ethernet/eth_cyclonev.c b/drivers/ethernet/eth_cyclonev.c index 483516e684a..a23e23c682b 100644 --- a/drivers/ethernet/eth_cyclonev.c +++ b/drivers/ethernet/eth_cyclonev.c @@ -366,11 +366,11 @@ static enum ethernet_hw_caps eth_cyclonev_caps(const struct device *dev) enum ethernet_hw_caps caps = 0; if (p->feature & EMAC_DMA_HW_FEATURE_MIISEL) { - caps |= ETHERNET_LINK_10BASE_T; - caps |= ETHERNET_LINK_100BASE_T; + caps |= ETHERNET_LINK_10BASE; + caps |= ETHERNET_LINK_100BASE; } if (p->feature & EMAC_DMA_HW_FEATURE_GMIISEL) { - caps |= ETHERNET_LINK_1000BASE_T; + caps |= ETHERNET_LINK_1000BASE; } if (p->feature & EMAC_DMA_HW_FEATURE_RXTYP2COE) { caps |= ETHERNET_HW_RX_CHKSUM_OFFLOAD; diff --git a/drivers/ethernet/eth_dwmac.c b/drivers/ethernet/eth_dwmac.c index bc2f82e5a53..01cd84916aa 100644 --- a/drivers/ethernet/eth_dwmac.c +++ b/drivers/ethernet/eth_dwmac.c @@ -102,11 +102,11 @@ static enum ethernet_hw_caps dwmac_caps(const struct device *dev) enum ethernet_hw_caps caps = 0; if (p->feature0 & MAC_HW_FEATURE0_GMIISEL) { - caps |= ETHERNET_LINK_1000BASE_T; + caps |= ETHERNET_LINK_1000BASE; } if (p->feature0 & MAC_HW_FEATURE0_MIISEL) { - caps |= ETHERNET_LINK_10BASE_T | ETHERNET_LINK_100BASE_T; + caps |= ETHERNET_LINK_10BASE | ETHERNET_LINK_100BASE; } caps |= ETHERNET_PROMISC_MODE; diff --git a/drivers/ethernet/eth_e1000.c b/drivers/ethernet/eth_e1000.c index 322810698f6..2745eba3bc9 100644 --- a/drivers/ethernet/eth_e1000.c +++ b/drivers/ethernet/eth_e1000.c @@ -82,8 +82,8 @@ static enum ethernet_hw_caps e1000_caps(const struct device *dev) #if defined(CONFIG_ETH_E1000_PTP_CLOCK) ETHERNET_PTP | #endif - ETHERNET_LINK_10BASE_T | ETHERNET_LINK_100BASE_T | - ETHERNET_LINK_1000BASE_T | + ETHERNET_LINK_10BASE | ETHERNET_LINK_100BASE | + ETHERNET_LINK_1000BASE | /* The driver does not really support TXTIME atm but mark * it to support it so that we can test the txtime sample. */ diff --git a/drivers/ethernet/eth_enc28j60.c b/drivers/ethernet/eth_enc28j60.c index e3c73c0ca4d..0268661784f 100644 --- a/drivers/ethernet/eth_enc28j60.c +++ b/drivers/ethernet/eth_enc28j60.c @@ -750,7 +750,7 @@ static enum ethernet_hw_caps eth_enc28j60_get_capabilities(const struct device * { ARG_UNUSED(dev); - return ETHERNET_LINK_10BASE_T + return ETHERNET_LINK_10BASE #if defined(CONFIG_NET_VLAN) | ETHERNET_HW_VLAN #endif diff --git a/drivers/ethernet/eth_enc424j600.c b/drivers/ethernet/eth_enc424j600.c index 0e317c3d8ba..3f04022fe0e 100644 --- a/drivers/ethernet/eth_enc424j600.c +++ b/drivers/ethernet/eth_enc424j600.c @@ -553,7 +553,7 @@ static enum ethernet_hw_caps enc424j600_get_capabilities(const struct device *de { ARG_UNUSED(dev); - return ETHERNET_LINK_10BASE_T | ETHERNET_LINK_100BASE_T; + return ETHERNET_LINK_10BASE | ETHERNET_LINK_100BASE; } static int enc424j600_set_config(const struct device *dev, diff --git a/drivers/ethernet/eth_esp32.c b/drivers/ethernet/eth_esp32.c index c3fe85063d1..4cd3d5b13d7 100644 --- a/drivers/ethernet/eth_esp32.c +++ b/drivers/ethernet/eth_esp32.c @@ -56,7 +56,7 @@ static const struct device *eth_esp32_phy_dev = DEVICE_DT_GET( static enum ethernet_hw_caps eth_esp32_caps(const struct device *dev) { ARG_UNUSED(dev); - return ETHERNET_LINK_10BASE_T | ETHERNET_LINK_100BASE_T; + return ETHERNET_LINK_10BASE | ETHERNET_LINK_100BASE; } static int eth_esp32_set_config(const struct device *dev, diff --git a/drivers/ethernet/eth_gecko.c b/drivers/ethernet/eth_gecko.c index 82c6e07b3f9..5f2cbf34ad9 100644 --- a/drivers/ethernet/eth_gecko.c +++ b/drivers/ethernet/eth_gecko.c @@ -631,8 +631,8 @@ static enum ethernet_hw_caps eth_gecko_get_capabilities(const struct device *dev { ARG_UNUSED(dev); - return (ETHERNET_AUTO_NEGOTIATION_SET | ETHERNET_LINK_10BASE_T | - ETHERNET_LINK_100BASE_T | ETHERNET_DUPLEX_SET); + return (ETHERNET_AUTO_NEGOTIATION_SET | ETHERNET_LINK_10BASE | + ETHERNET_LINK_100BASE | ETHERNET_DUPLEX_SET); } static const struct ethernet_api eth_api = { diff --git a/drivers/ethernet/eth_ivshmem.c b/drivers/ethernet/eth_ivshmem.c index ae8135f2e22..742d8e6089f 100644 --- a/drivers/ethernet/eth_ivshmem.c +++ b/drivers/ethernet/eth_ivshmem.c @@ -88,7 +88,7 @@ static int eth_ivshmem_stop(const struct device *dev) static enum ethernet_hw_caps eth_ivshmem_caps(const struct device *dev) { ARG_UNUSED(dev); - return ETHERNET_LINK_10BASE_T | ETHERNET_LINK_100BASE_T | ETHERNET_LINK_1000BASE_T; + return ETHERNET_LINK_10BASE | ETHERNET_LINK_100BASE | ETHERNET_LINK_1000BASE; } static int eth_ivshmem_send(const struct device *dev, struct net_pkt *pkt) diff --git a/drivers/ethernet/eth_lan865x.c b/drivers/ethernet/eth_lan865x.c index 3a3a0421e5d..bdcb2ec553e 100644 --- a/drivers/ethernet/eth_lan865x.c +++ b/drivers/ethernet/eth_lan865x.c @@ -112,7 +112,7 @@ static void lan865x_iface_init(struct net_if *iface) static enum ethernet_hw_caps lan865x_port_get_capabilities(const struct device *dev) { ARG_UNUSED(dev); - return ETHERNET_LINK_10BASE_T | ETHERNET_PROMISC_MODE; + return ETHERNET_LINK_10BASE | ETHERNET_PROMISC_MODE; } static int lan865x_gpio_reset(const struct device *dev); diff --git a/drivers/ethernet/eth_lan9250.c b/drivers/ethernet/eth_lan9250.c index 0e1d3d6e744..1315c9325ac 100644 --- a/drivers/ethernet/eth_lan9250.c +++ b/drivers/ethernet/eth_lan9250.c @@ -615,7 +615,7 @@ static enum ethernet_hw_caps lan9250_get_capabilities(const struct device *dev) { ARG_UNUSED(dev); - return ETHERNET_LINK_10BASE_T | ETHERNET_LINK_100BASE_T; + return ETHERNET_LINK_10BASE | ETHERNET_LINK_100BASE; } static void lan9250_iface_init(struct net_if *iface) diff --git a/drivers/ethernet/eth_litex_liteeth.c b/drivers/ethernet/eth_litex_liteeth.c index 1a2b6009832..2eb8cbef255 100644 --- a/drivers/ethernet/eth_litex_liteeth.c +++ b/drivers/ethernet/eth_litex_liteeth.c @@ -294,7 +294,7 @@ static enum ethernet_hw_caps eth_caps(const struct device *dev) #ifdef CONFIG_NET_VLAN ETHERNET_HW_VLAN | #endif - ETHERNET_LINK_10BASE_T | ETHERNET_LINK_100BASE_T | ETHERNET_LINK_1000BASE_T; + ETHERNET_LINK_10BASE | ETHERNET_LINK_100BASE | ETHERNET_LINK_1000BASE; } static const struct ethernet_api eth_api = { diff --git a/drivers/ethernet/eth_numaker.c b/drivers/ethernet/eth_numaker.c index 80b807e8f8b..8e6aa6bf2ee 100644 --- a/drivers/ethernet/eth_numaker.c +++ b/drivers/ethernet/eth_numaker.c @@ -552,9 +552,9 @@ static enum ethernet_hw_caps numaker_eth_get_cap(const struct device *dev) { ARG_UNUSED(dev); #if defined(NU_USING_HW_CHECKSUM) - return ETHERNET_LINK_10BASE_T | ETHERNET_LINK_100BASE_T | ETHERNET_HW_RX_CHKSUM_OFFLOAD; + return ETHERNET_LINK_10BASE | ETHERNET_LINK_100BASE | ETHERNET_HW_RX_CHKSUM_OFFLOAD; #else - return ETHERNET_LINK_10BASE_T | ETHERNET_LINK_100BASE_T; + return ETHERNET_LINK_10BASE | ETHERNET_LINK_100BASE; #endif } diff --git a/drivers/ethernet/eth_nxp_enet.c b/drivers/ethernet/eth_nxp_enet.c index e7774707d5b..501a50c9f7c 100644 --- a/drivers/ethernet/eth_nxp_enet.c +++ b/drivers/ethernet/eth_nxp_enet.c @@ -252,7 +252,7 @@ static enum ethernet_hw_caps eth_nxp_enet_get_capabilities(const struct device * #endif enum ethernet_hw_caps caps; - caps = ETHERNET_LINK_10BASE_T | + caps = ETHERNET_LINK_10BASE | ETHERNET_HW_FILTERING | #if defined(CONFIG_NET_VLAN) ETHERNET_HW_VLAN | @@ -267,11 +267,11 @@ static enum ethernet_hw_caps eth_nxp_enet_get_capabilities(const struct device * ETHERNET_HW_TX_CHKSUM_OFFLOAD | ETHERNET_HW_RX_CHKSUM_OFFLOAD | #endif - ETHERNET_LINK_100BASE_T; + ETHERNET_LINK_100BASE; if (COND_CODE_1(IS_ENABLED(CONFIG_ETH_NXP_ENET_1G), (config->phy_mode == NXP_ENET_RGMII_MODE), (0))) { - caps |= ETHERNET_LINK_1000BASE_T; + caps |= ETHERNET_LINK_1000BASE; } return caps; diff --git a/drivers/ethernet/eth_nxp_enet_qos/eth_nxp_enet_qos_mac.c b/drivers/ethernet/eth_nxp_enet_qos/eth_nxp_enet_qos_mac.c index bd2b4f59de2..c90e96f309e 100644 --- a/drivers/ethernet/eth_nxp_enet_qos/eth_nxp_enet_qos_mac.c +++ b/drivers/ethernet/eth_nxp_enet_qos/eth_nxp_enet_qos_mac.c @@ -161,7 +161,7 @@ static void tx_dma_done(struct k_work *work) static enum ethernet_hw_caps eth_nxp_enet_qos_get_capabilities(const struct device *dev) { - return ETHERNET_LINK_100BASE_T | ETHERNET_LINK_10BASE_T | ENET_MAC_PACKET_FILTER_PM_MASK; + return ETHERNET_LINK_100BASE | ETHERNET_LINK_10BASE | ENET_MAC_PACKET_FILTER_PM_MASK; } static void eth_nxp_enet_qos_rx(struct k_work *work) diff --git a/drivers/ethernet/eth_nxp_s32_gmac.c b/drivers/ethernet/eth_nxp_s32_gmac.c index 1a11c6e748d..e81713db736 100644 --- a/drivers/ethernet/eth_nxp_s32_gmac.c +++ b/drivers/ethernet/eth_nxp_s32_gmac.c @@ -559,10 +559,10 @@ static enum ethernet_hw_caps eth_nxp_s32_get_capabilities(const struct device *d { ARG_UNUSED(dev); - return (ETHERNET_LINK_10BASE_T - | ETHERNET_LINK_100BASE_T + return (ETHERNET_LINK_10BASE + | ETHERNET_LINK_100BASE #if (FEATURE_GMAC_RGMII_EN == 1U) - | ETHERNET_LINK_1000BASE_T + | ETHERNET_LINK_1000BASE #endif | ETHERNET_DUPLEX_SET | ETHERNET_HW_TX_CHKSUM_OFFLOAD diff --git a/drivers/ethernet/eth_nxp_s32_netc.c b/drivers/ethernet/eth_nxp_s32_netc.c index 852d37b4343..9a5ddd745d3 100644 --- a/drivers/ethernet/eth_nxp_s32_netc.c +++ b/drivers/ethernet/eth_nxp_s32_netc.c @@ -267,9 +267,9 @@ enum ethernet_hw_caps nxp_s32_eth_get_capabilities(const struct device *dev) { ARG_UNUSED(dev); - return (ETHERNET_LINK_10BASE_T - | ETHERNET_LINK_100BASE_T - | ETHERNET_LINK_1000BASE_T + return (ETHERNET_LINK_10BASE + | ETHERNET_LINK_100BASE + | ETHERNET_LINK_1000BASE | ETHERNET_HW_RX_CHKSUM_OFFLOAD | ETHERNET_HW_FILTERING #if defined(CONFIG_NET_VLAN) diff --git a/drivers/ethernet/eth_renesas_ra.c b/drivers/ethernet/eth_renesas_ra.c index c32db9634a0..84dcad293e9 100644 --- a/drivers/ethernet/eth_renesas_ra.c +++ b/drivers/ethernet/eth_renesas_ra.c @@ -134,7 +134,7 @@ static enum ethernet_hw_caps renesas_ra_eth_get_capabilities(const struct device { ARG_UNUSED(dev); - return ETHERNET_LINK_10BASE_T | ETHERNET_LINK_100BASE_T; + return ETHERNET_LINK_10BASE | ETHERNET_LINK_100BASE; } void renesas_ra_eth_callback(ether_callback_args_t *p_args) diff --git a/drivers/ethernet/eth_sam_gmac.c b/drivers/ethernet/eth_sam_gmac.c index e81edb7daea..884f0caf425 100644 --- a/drivers/ethernet/eth_sam_gmac.c +++ b/drivers/ethernet/eth_sam_gmac.c @@ -1917,7 +1917,7 @@ static enum ethernet_hw_caps eth_sam_gmac_get_capabilities(const struct device * { ARG_UNUSED(dev); - return ETHERNET_LINK_10BASE_T | + return ETHERNET_LINK_10BASE | #if defined(CONFIG_NET_VLAN) ETHERNET_HW_VLAN | #endif @@ -1928,7 +1928,7 @@ static enum ethernet_hw_caps eth_sam_gmac_get_capabilities(const struct device * #if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 1 ETHERNET_QAV | #endif - ETHERNET_LINK_100BASE_T; + ETHERNET_LINK_100BASE; } #if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 1 diff --git a/drivers/ethernet/eth_sensry_sy1xx_mac.c b/drivers/ethernet/eth_sensry_sy1xx_mac.c index bf58d68ed0a..c3583383763 100644 --- a/drivers/ethernet/eth_sensry_sy1xx_mac.c +++ b/drivers/ethernet/eth_sensry_sy1xx_mac.c @@ -346,7 +346,7 @@ static enum ethernet_hw_caps sy1xx_mac_get_caps(const struct device *dev) /* basic implemented features */ supported |= ETHERNET_PROMISC_MODE; - supported |= ETHERNET_LINK_1000BASE_T; + supported |= ETHERNET_LINK_1000BASE; supported |= ETHERNET_PROMISC_MODE; return supported; diff --git a/drivers/ethernet/eth_smsc911x.c b/drivers/ethernet/eth_smsc911x.c index b1a9fbd4341..39e93951bba 100644 --- a/drivers/ethernet/eth_smsc911x.c +++ b/drivers/ethernet/eth_smsc911x.c @@ -416,7 +416,7 @@ static enum ethernet_hw_caps eth_smsc911x_get_capabilities(const struct device * { ARG_UNUSED(dev); - return ETHERNET_LINK_10BASE_T | ETHERNET_LINK_100BASE_T; + return ETHERNET_LINK_10BASE | ETHERNET_LINK_100BASE; } #if defined(CONFIG_NET_STATISTICS_ETHERNET) diff --git a/drivers/ethernet/eth_smsc91x.c b/drivers/ethernet/eth_smsc91x.c index c04e625ede2..a21c2880426 100644 --- a/drivers/ethernet/eth_smsc91x.c +++ b/drivers/ethernet/eth_smsc91x.c @@ -688,8 +688,8 @@ static enum ethernet_hw_caps eth_smsc_get_caps(const struct device *dev) { ARG_UNUSED(dev); - return (ETHERNET_LINK_10BASE_T - | ETHERNET_LINK_100BASE_T + return (ETHERNET_LINK_10BASE + | ETHERNET_LINK_100BASE #if defined(CONFIG_NET_PROMISCUOUS_MODE) | ETHERNET_PROMISC_MODE #endif diff --git a/drivers/ethernet/eth_stm32_hal.c b/drivers/ethernet/eth_stm32_hal.c index 0b7286b663e..dafa4e9dab6 100644 --- a/drivers/ethernet/eth_stm32_hal.c +++ b/drivers/ethernet/eth_stm32_hal.c @@ -1264,7 +1264,7 @@ static enum ethernet_hw_caps eth_stm32_hal_get_capabilities(const struct device { ARG_UNUSED(dev); - return ETHERNET_LINK_10BASE_T | ETHERNET_LINK_100BASE_T + return ETHERNET_LINK_10BASE | ETHERNET_LINK_100BASE #if defined(CONFIG_NET_VLAN) | ETHERNET_HW_VLAN #endif diff --git a/drivers/ethernet/eth_w5500.c b/drivers/ethernet/eth_w5500.c index d7a06b6ec5c..61ed576e9c9 100644 --- a/drivers/ethernet/eth_w5500.c +++ b/drivers/ethernet/eth_w5500.c @@ -370,7 +370,7 @@ static enum ethernet_hw_caps w5500_get_capabilities(const struct device *dev) { ARG_UNUSED(dev); - return ETHERNET_LINK_10BASE_T | ETHERNET_LINK_100BASE_T + return ETHERNET_LINK_10BASE | ETHERNET_LINK_100BASE #if defined(CONFIG_NET_PROMISCUOUS_MODE) | ETHERNET_PROMISC_MODE #endif diff --git a/drivers/ethernet/eth_xilinx_axienet.c b/drivers/ethernet/eth_xilinx_axienet.c index 8a92a7bb7d1..a9f7dbc0786 100644 --- a/drivers/ethernet/eth_xilinx_axienet.c +++ b/drivers/ethernet/eth_xilinx_axienet.c @@ -356,8 +356,8 @@ static void xilinx_axienet_isr(const struct device *dev) static enum ethernet_hw_caps xilinx_axienet_caps(const struct device *dev) { const struct xilinx_axienet_config *config = dev->config; - enum ethernet_hw_caps ret = ETHERNET_LINK_10BASE_T | ETHERNET_LINK_100BASE_T | - ETHERNET_LINK_1000BASE_T; + enum ethernet_hw_caps ret = ETHERNET_LINK_10BASE | ETHERNET_LINK_100BASE | + ETHERNET_LINK_1000BASE; if (config->have_rx_csum_offload) { ret |= ETHERNET_HW_RX_CHKSUM_OFFLOAD; diff --git a/drivers/ethernet/eth_xlnx_gem.c b/drivers/ethernet/eth_xlnx_gem.c index 499781c7879..79c3f005497 100644 --- a/drivers/ethernet/eth_xlnx_gem.c +++ b/drivers/ethernet/eth_xlnx_gem.c @@ -622,21 +622,19 @@ static enum ethernet_hw_caps eth_xlnx_gem_get_capabilities( if (dev_conf->max_link_speed == LINK_1GBIT) { if (dev_conf->phy_advertise_lower) { - caps |= (ETHERNET_LINK_1000BASE_T | - ETHERNET_LINK_100BASE_T | - ETHERNET_LINK_10BASE_T); + caps |= (ETHERNET_LINK_1000BASE | ETHERNET_LINK_100BASE | + ETHERNET_LINK_10BASE); } else { - caps |= ETHERNET_LINK_1000BASE_T; + caps |= ETHERNET_LINK_1000BASE; } } else if (dev_conf->max_link_speed == LINK_100MBIT) { if (dev_conf->phy_advertise_lower) { - caps |= (ETHERNET_LINK_100BASE_T | - ETHERNET_LINK_10BASE_T); + caps |= (ETHERNET_LINK_100BASE | ETHERNET_LINK_10BASE); } else { - caps |= ETHERNET_LINK_100BASE_T; + caps |= ETHERNET_LINK_100BASE; } } else { - caps |= ETHERNET_LINK_10BASE_T; + caps |= ETHERNET_LINK_10BASE; } if (dev_conf->enable_rx_chksum_offload) { diff --git a/drivers/ethernet/eth_xmc4xxx.c b/drivers/ethernet/eth_xmc4xxx.c index 02382e681d7..2a4637a9c71 100644 --- a/drivers/ethernet/eth_xmc4xxx.c +++ b/drivers/ethernet/eth_xmc4xxx.c @@ -884,7 +884,7 @@ static int eth_xmc4xxx_init(const struct device *dev) static enum ethernet_hw_caps eth_xmc4xxx_capabilities(const struct device *dev) { ARG_UNUSED(dev); - enum ethernet_hw_caps caps = ETHERNET_LINK_10BASE_T | ETHERNET_LINK_100BASE_T | + enum ethernet_hw_caps caps = ETHERNET_LINK_10BASE | ETHERNET_LINK_100BASE | ETHERNET_HW_TX_CHKSUM_OFFLOAD | ETHERNET_HW_RX_CHKSUM_OFFLOAD; #if defined(CONFIG_PTP_CLOCK_XMC4XXX) diff --git a/drivers/ethernet/nxp_imx_netc/eth_nxp_imx_netc.c b/drivers/ethernet/nxp_imx_netc/eth_nxp_imx_netc.c index 97c8463135c..8e8d4bf0b9e 100644 --- a/drivers/ethernet/nxp_imx_netc/eth_nxp_imx_netc.c +++ b/drivers/ethernet/nxp_imx_netc/eth_nxp_imx_netc.c @@ -340,7 +340,7 @@ enum ethernet_hw_caps netc_eth_get_capabilities(const struct device *dev) { uint32_t caps; - caps = (ETHERNET_LINK_10BASE_T | ETHERNET_LINK_100BASE_T | ETHERNET_LINK_1000BASE_T | + caps = (ETHERNET_LINK_10BASE | ETHERNET_LINK_100BASE | ETHERNET_LINK_1000BASE | ETHERNET_HW_RX_CHKSUM_OFFLOAD | ETHERNET_HW_FILTERING #if defined(CONFIG_NET_VLAN) | ETHERNET_HW_VLAN diff --git a/drivers/wifi/nrf_wifi/src/net_if.c b/drivers/wifi/nrf_wifi/src/net_if.c index 633ee48f901..0a4c189e689 100644 --- a/drivers/wifi/nrf_wifi/src/net_if.c +++ b/drivers/wifi/nrf_wifi/src/net_if.c @@ -331,8 +331,8 @@ static bool is_eapol(struct net_pkt *pkt) enum ethernet_hw_caps nrf_wifi_if_caps_get(const struct device *dev) { - enum ethernet_hw_caps caps = (ETHERNET_LINK_10BASE_T | - ETHERNET_LINK_100BASE_T | ETHERNET_LINK_1000BASE_T); + enum ethernet_hw_caps caps = (ETHERNET_LINK_10BASE | + ETHERNET_LINK_100BASE | ETHERNET_LINK_1000BASE); #ifdef CONFIG_NRF70_TCP_IP_CHECKSUM_OFFLOAD caps |= ETHERNET_HW_TX_CHKSUM_OFFLOAD | diff --git a/include/zephyr/net/ethernet.h b/include/zephyr/net/ethernet.h index f245fa94a38..5f3a8f2eca9 100644 --- a/include/zephyr/net/ethernet.h +++ b/include/zephyr/net/ethernet.h @@ -153,13 +153,13 @@ enum ethernet_hw_caps { ETHERNET_AUTO_NEGOTIATION_SET = BIT(3), /** 10 Mbits link supported */ - ETHERNET_LINK_10BASE_T = BIT(4), + ETHERNET_LINK_10BASE = BIT(4), /** 100 Mbits link supported */ - ETHERNET_LINK_100BASE_T = BIT(5), + ETHERNET_LINK_100BASE = BIT(5), /** 1 Gbits link supported */ - ETHERNET_LINK_1000BASE_T = BIT(6), + ETHERNET_LINK_1000BASE = BIT(6), /** Changing duplex (half/full) supported */ ETHERNET_DUPLEX_SET = BIT(7), @@ -204,10 +204,10 @@ enum ethernet_hw_caps { ETHERNET_TXINJECTION_MODE = BIT(20), /** 2.5 Gbits link supported */ - ETHERNET_LINK_2500BASE_T = BIT(21), + ETHERNET_LINK_2500BASE = BIT(21), /** 5 Gbits link supported */ - ETHERNET_LINK_5000BASE_T = BIT(22), + ETHERNET_LINK_5000BASE = BIT(22), }; /** @cond INTERNAL_HIDDEN */ diff --git a/subsys/net/l2/ethernet/ethernet_mgmt.c b/subsys/net/l2/ethernet/ethernet_mgmt.c index 3979ef88a32..3f1b6735318 100644 --- a/subsys/net/l2/ethernet/ethernet_mgmt.c +++ b/subsys/net/l2/ethernet/ethernet_mgmt.c @@ -57,22 +57,19 @@ static int ethernet_set_config(uint32_t mgmt_request, type = ETHERNET_CONFIG_TYPE_AUTO_NEG; } else if (mgmt_request == NET_REQUEST_ETHERNET_SET_LINK) { if (params->l.link_10bt) { - if (!is_hw_caps_supported(dev, - ETHERNET_LINK_10BASE_T)) { + if (!is_hw_caps_supported(dev, ETHERNET_LINK_10BASE)) { return -ENOTSUP; } config.l.link_10bt = true; } else if (params->l.link_100bt) { - if (!is_hw_caps_supported(dev, - ETHERNET_LINK_100BASE_T)) { + if (!is_hw_caps_supported(dev, ETHERNET_LINK_100BASE)) { return -ENOTSUP; } config.l.link_100bt = true; } else if (params->l.link_1000bt) { - if (!is_hw_caps_supported(dev, - ETHERNET_LINK_1000BASE_T)) { + if (!is_hw_caps_supported(dev, ETHERNET_LINK_1000BASE)) { return -ENOTSUP; } diff --git a/subsys/net/lib/shell/iface.c b/subsys/net/lib/shell/iface.c index 8d54ae1ae5d..f54a3a55ac9 100644 --- a/subsys/net/lib/shell/iface.c +++ b/subsys/net/lib/shell/iface.c @@ -45,9 +45,9 @@ static struct ethernet_capabilities eth_hw_caps[] = { EC(ETHERNET_HW_VLAN, "Virtual LAN"), EC(ETHERNET_HW_VLAN_TAG_STRIP, "VLAN Tag stripping"), EC(ETHERNET_AUTO_NEGOTIATION_SET, "Auto negotiation"), - EC(ETHERNET_LINK_10BASE_T, "10 Mbits"), - EC(ETHERNET_LINK_100BASE_T, "100 Mbits"), - EC(ETHERNET_LINK_1000BASE_T, "1 Gbits"), + EC(ETHERNET_LINK_10BASE, "10 Mbits"), + EC(ETHERNET_LINK_100BASE, "100 Mbits"), + EC(ETHERNET_LINK_1000BASE, "1 Gbits"), EC(ETHERNET_DUPLEX_SET, "Half/full duplex"), EC(ETHERNET_PTP, "IEEE 802.1AS gPTP clock"), EC(ETHERNET_QAV, "IEEE 802.1Qav (credit shaping)"), @@ -61,8 +61,8 @@ static struct ethernet_capabilities eth_hw_caps[] = { EC(ETHERNET_DSA_CONDUIT_PORT, "DSA conduit port"), EC(ETHERNET_TXTIME, "TXTIME supported"), EC(ETHERNET_TXINJECTION_MODE, "TX-Injection supported"), - EC(ETHERNET_LINK_2500BASE_T, "2.5 Gbits"), - EC(ETHERNET_LINK_5000BASE_T, "5 Gbits"), + EC(ETHERNET_LINK_2500BASE, "2.5 Gbits"), + EC(ETHERNET_LINK_5000BASE, "5 Gbits"), }; static void print_supported_ethernet_capabilities( diff --git a/subsys/usb/device_next/class/usbd_cdc_ecm.c b/subsys/usb/device_next/class/usbd_cdc_ecm.c index 55aa2798a64..abc37f90bea 100644 --- a/subsys/usb/device_next/class/usbd_cdc_ecm.c +++ b/subsys/usb/device_next/class/usbd_cdc_ecm.c @@ -557,7 +557,7 @@ static enum ethernet_hw_caps cdc_ecm_get_capabilities(const struct device *dev) { ARG_UNUSED(dev); - return ETHERNET_LINK_10BASE_T; + return ETHERNET_LINK_10BASE; } static int cdc_ecm_iface_start(const struct device *dev) diff --git a/subsys/usb/device_next/class/usbd_cdc_ncm.c b/subsys/usb/device_next/class/usbd_cdc_ncm.c index c92754f72f8..b35495bd788 100644 --- a/subsys/usb/device_next/class/usbd_cdc_ncm.c +++ b/subsys/usb/device_next/class/usbd_cdc_ncm.c @@ -1110,7 +1110,7 @@ static enum ethernet_hw_caps cdc_ncm_get_capabilities(const struct device *dev) { ARG_UNUSED(dev); - return ETHERNET_LINK_10BASE_T; + return ETHERNET_LINK_10BASE; } static int cdc_ncm_iface_start(const struct device *dev) diff --git a/tests/net/ethernet_mgmt/src/main.c b/tests/net/ethernet_mgmt/src/main.c index f020480ae81..447b58344d3 100644 --- a/tests/net/ethernet_mgmt/src/main.c +++ b/tests/net/ethernet_mgmt/src/main.c @@ -101,8 +101,8 @@ static int eth_fake_send(const struct device *dev, static enum ethernet_hw_caps eth_fake_get_capabilities(const struct device *dev) { - return ETHERNET_AUTO_NEGOTIATION_SET | ETHERNET_LINK_10BASE_T | - ETHERNET_LINK_100BASE_T | ETHERNET_DUPLEX_SET | ETHERNET_QAV | + return ETHERNET_AUTO_NEGOTIATION_SET | ETHERNET_LINK_10BASE | + ETHERNET_LINK_100BASE | ETHERNET_DUPLEX_SET | ETHERNET_QAV | ETHERNET_PROMISC_MODE | ETHERNET_PRIORITY_QUEUES | ETHERNET_QBV | ETHERNET_QBU | ETHERNET_TXTIME; } diff --git a/tests/net/socket/net_mgmt/src/main.c b/tests/net/socket/net_mgmt/src/main.c index 455ae3e0d04..a5d6ead4679 100644 --- a/tests/net/socket/net_mgmt/src/main.c +++ b/tests/net/socket/net_mgmt/src/main.c @@ -221,8 +221,8 @@ static int eth_fake_get_config(const struct device *dev, static enum ethernet_hw_caps eth_fake_get_capabilities(const struct device *dev) { - return ETHERNET_AUTO_NEGOTIATION_SET | ETHERNET_LINK_10BASE_T | - ETHERNET_LINK_100BASE_T | ETHERNET_DUPLEX_SET | ETHERNET_QAV | + return ETHERNET_AUTO_NEGOTIATION_SET | ETHERNET_LINK_10BASE | + ETHERNET_LINK_100BASE | ETHERNET_DUPLEX_SET | ETHERNET_QAV | ETHERNET_PROMISC_MODE | ETHERNET_PRIORITY_QUEUES; } From fb6b321fbbc565355a269c1b404cfc19acff9b27 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Fin=20Maa=C3=9F?= Date: Tue, 18 Mar 2025 13:40:32 +0100 Subject: [PATCH 0068/2553] doc: migration: 4.2: mention ethernet change MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit mention change of ethernet speed enums. Signed-off-by: Fin Maaß --- doc/releases/migration-guide-4.2.rst | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/doc/releases/migration-guide-4.2.rst b/doc/releases/migration-guide-4.2.rst index 788efd3f0df..64e4736833a 100644 --- a/doc/releases/migration-guide-4.2.rst +++ b/doc/releases/migration-guide-4.2.rst @@ -146,6 +146,20 @@ Ethernet :zephyr_file:`include/zephyr/net/ethernet.h` have been renamed to ``ETHERNET_DSA_CONDUIT_PORT`` and ``ETHERNET_DSA_USER_PORT``. +* Enums for the Ethernet speed have been renamed to be more indepedent of the used medium. + ``LINK_HALF_10BASE_T``, ``LINK_FULL_10BASE_T``, ``LINK_HALF_100BASE_T``, ``LINK_FULL_100BASE_T``, + ``LINK_HALF_1000BASE_T``, ``LINK_FULL_1000BASE_T``, ``LINK_FULL_2500BASE_T`` and + ``LINK_FULL_5000BASE_T`` have been renamed to :c:enumerator:`LINK_HALF_10BASE`, + :c:enumerator:`LINK_FULL_10BASE`, :c:enumerator:`LINK_HALF_100BASE`, + :c:enumerator:`LINK_FULL_100BASE`, :c:enumerator:`LINK_HALF_1000BASE`, + :c:enumerator:`LINK_FULL_1000BASE`, :c:enumerator:`LINK_FULL_2500BASE` and + :c:enumerator:`LINK_FULL_5000BASE`. + ``ETHERNET_LINK_10BASE_T``, ``ETHERNET_LINK_100BASE_T``, ``ETHERNET_LINK_1000BASE_T``, + ``ETHERNET_LINK_2500BASE_T`` and ``ETHERNET_LINK_5000BASE_T`` have been renamed to + :c:enumerator:`ETHERNET_LINK_10BASE`, :c:enumerator:`ETHERNET_LINK_100BASE`, + :c:enumerator:`ETHERNET_LINK_1000BASE`, :c:enumerator:`ETHERNET_LINK_2500BASE` and + :c:enumerator:`ETHERNET_LINK_5000BASE` respectively (:github:`87194`). + Enhanced Serial Peripheral Interface (eSPI) =========================================== From 05a3c55b44b39a0af0045485f18765edf532487b Mon Sep 17 00:00:00 2001 From: TOKITA Hiroshi Date: Sun, 20 Apr 2025 15:08:34 +0900 Subject: [PATCH 0069/2553] dts: bindings: gpio: arduino-nano-header-r3: Remove `r3` suffix R3 is a revision of the Arduino UNO(classic), not for the Nano. Correcting the name. Signed-off-by: TOKITA Hiroshi --- boards/arduino/nano_33_ble/arduino_nano_33_ble.dts | 2 +- .../nano_33_ble/arduino_nano_33_ble_nrf52840_sense.dts | 2 +- ...ino_nano_r3_connector.dtsi => arduino_nano_connector.dtsi} | 2 +- boards/arduino/nano_33_iot/arduino_nano_33_iot.dts | 2 +- ...ino_nano_r3_connector.dtsi => arduino_nano_connector.dtsi} | 2 +- ...ino_nano_r3_connector.dtsi => arduino_nano_connector.dtsi} | 2 +- boards/st/nucleo_g031k8/nucleo_g031k8.dts | 2 +- ...ino_nano_r3_connector.dtsi => arduino_nano_connector.dtsi} | 2 +- boards/st/nucleo_l031k6/nucleo_l031k6.dts | 2 +- doc/releases/migration-guide-4.2.rst | 3 +++ .../{arduino-nano-header-r3.yaml => arduino-nano-header.yaml} | 4 ++-- 11 files changed, 14 insertions(+), 11 deletions(-) rename boards/arduino/nano_33_ble/{arduino_nano_r3_connector.dtsi => arduino_nano_connector.dtsi} (96%) rename boards/arduino/nano_33_iot/{arduino_nano_r3_connector.dtsi => arduino_nano_connector.dtsi} (96%) rename boards/st/nucleo_g031k8/{arduino_nano_r3_connector.dtsi => arduino_nano_connector.dtsi} (96%) rename boards/st/nucleo_l031k6/{arduino_nano_r3_connector.dtsi => arduino_nano_connector.dtsi} (96%) rename dts/bindings/gpio/{arduino-nano-header-r3.yaml => arduino-nano-header.yaml} (93%) diff --git a/boards/arduino/nano_33_ble/arduino_nano_33_ble.dts b/boards/arduino/nano_33_ble/arduino_nano_33_ble.dts index 598d206bd31..03963cfe009 100644 --- a/boards/arduino/nano_33_ble/arduino_nano_33_ble.dts +++ b/boards/arduino/nano_33_ble/arduino_nano_33_ble.dts @@ -7,7 +7,7 @@ #include #include "arduino_nano_33_ble-common.dtsi" #include "arduino_nano_33_ble-pinctrl.dtsi" -#include "arduino_nano_r3_connector.dtsi" +#include "arduino_nano_connector.dtsi" / { model = "Arduino Nano 33 BLE"; diff --git a/boards/arduino/nano_33_ble/arduino_nano_33_ble_nrf52840_sense.dts b/boards/arduino/nano_33_ble/arduino_nano_33_ble_nrf52840_sense.dts index e5b18d2b120..1593360220d 100644 --- a/boards/arduino/nano_33_ble/arduino_nano_33_ble_nrf52840_sense.dts +++ b/boards/arduino/nano_33_ble/arduino_nano_33_ble_nrf52840_sense.dts @@ -7,7 +7,7 @@ #include #include "arduino_nano_33_ble-common.dtsi" #include "arduino_nano_33_ble-pinctrl.dtsi" -#include "arduino_nano_r3_connector.dtsi" +#include "arduino_nano_connector.dtsi" / { model = "Arduino Nano 33 BLE Sense"; diff --git a/boards/arduino/nano_33_ble/arduino_nano_r3_connector.dtsi b/boards/arduino/nano_33_ble/arduino_nano_connector.dtsi similarity index 96% rename from boards/arduino/nano_33_ble/arduino_nano_r3_connector.dtsi rename to boards/arduino/nano_33_ble/arduino_nano_connector.dtsi index af20cc6c755..b73f1f7a3d0 100644 --- a/boards/arduino/nano_33_ble/arduino_nano_r3_connector.dtsi +++ b/boards/arduino/nano_33_ble/arduino_nano_connector.dtsi @@ -5,7 +5,7 @@ / { arduino_nano_header: connector { - compatible = "arduino-nano-header-r3"; + compatible = "arduino-nano-header"; #gpio-cells = <2>; gpio-map-mask = <0xffffffff 0xffffffc0>; gpio-map-pass-thru = <0 0x3f>; diff --git a/boards/arduino/nano_33_iot/arduino_nano_33_iot.dts b/boards/arduino/nano_33_iot/arduino_nano_33_iot.dts index 7a8e3b7e745..f3af145110b 100644 --- a/boards/arduino/nano_33_iot/arduino_nano_33_iot.dts +++ b/boards/arduino/nano_33_iot/arduino_nano_33_iot.dts @@ -8,7 +8,7 @@ #include #include #include "arduino_nano_33_iot-pinctrl.dtsi" -#include "arduino_nano_r3_connector.dtsi" +#include "arduino_nano_connector.dtsi" / { model = "Arduino Nano 33 IOT"; diff --git a/boards/arduino/nano_33_iot/arduino_nano_r3_connector.dtsi b/boards/arduino/nano_33_iot/arduino_nano_connector.dtsi similarity index 96% rename from boards/arduino/nano_33_iot/arduino_nano_r3_connector.dtsi rename to boards/arduino/nano_33_iot/arduino_nano_connector.dtsi index 9c69abdcacb..254ae11fa7f 100644 --- a/boards/arduino/nano_33_iot/arduino_nano_r3_connector.dtsi +++ b/boards/arduino/nano_33_iot/arduino_nano_connector.dtsi @@ -5,7 +5,7 @@ / { arduino_nano_header: connector { - compatible = "arduino-nano-header-r3"; + compatible = "arduino-nano-header"; #gpio-cells = <2>; gpio-map-mask = <0xffffffff 0xffffffc0>; gpio-map-pass-thru = <0 0x3f>; diff --git a/boards/st/nucleo_g031k8/arduino_nano_r3_connector.dtsi b/boards/st/nucleo_g031k8/arduino_nano_connector.dtsi similarity index 96% rename from boards/st/nucleo_g031k8/arduino_nano_r3_connector.dtsi rename to boards/st/nucleo_g031k8/arduino_nano_connector.dtsi index 495f69f429c..35a32cfe1a6 100644 --- a/boards/st/nucleo_g031k8/arduino_nano_r3_connector.dtsi +++ b/boards/st/nucleo_g031k8/arduino_nano_connector.dtsi @@ -5,7 +5,7 @@ / { arduino_nano_header: connector { - compatible = "arduino-nano-header-r3"; + compatible = "arduino-nano-header"; #gpio-cells = <2>; gpio-map-mask = <0xffffffff 0xffffffc0>; gpio-map-pass-thru = <0 0x3f>; diff --git a/boards/st/nucleo_g031k8/nucleo_g031k8.dts b/boards/st/nucleo_g031k8/nucleo_g031k8.dts index fb24bb01069..345eb15fbaf 100644 --- a/boards/st/nucleo_g031k8/nucleo_g031k8.dts +++ b/boards/st/nucleo_g031k8/nucleo_g031k8.dts @@ -7,7 +7,7 @@ /dts-v1/; #include #include -#include "arduino_nano_r3_connector.dtsi" +#include "arduino_nano_connector.dtsi" / { model = "STMicroelectronics STM32G031K8-NUCLEO board"; diff --git a/boards/st/nucleo_l031k6/arduino_nano_r3_connector.dtsi b/boards/st/nucleo_l031k6/arduino_nano_connector.dtsi similarity index 96% rename from boards/st/nucleo_l031k6/arduino_nano_r3_connector.dtsi rename to boards/st/nucleo_l031k6/arduino_nano_connector.dtsi index 485b4822901..d6c29fbd79d 100644 --- a/boards/st/nucleo_l031k6/arduino_nano_r3_connector.dtsi +++ b/boards/st/nucleo_l031k6/arduino_nano_connector.dtsi @@ -5,7 +5,7 @@ / { arduino_nano_header: connector { - compatible = "arduino-nano-header-r3"; + compatible = "arduino-nano-header"; #gpio-cells = <2>; gpio-map-mask = <0xffffffff 0xffffffc0>; gpio-map-pass-thru = <0 0x3f>; diff --git a/boards/st/nucleo_l031k6/nucleo_l031k6.dts b/boards/st/nucleo_l031k6/nucleo_l031k6.dts index c35003942ac..0aa078ea4d8 100644 --- a/boards/st/nucleo_l031k6/nucleo_l031k6.dts +++ b/boards/st/nucleo_l031k6/nucleo_l031k6.dts @@ -7,7 +7,7 @@ /dts-v1/; #include #include -#include "arduino_nano_r3_connector.dtsi" +#include "arduino_nano_connector.dtsi" / { model = "STMicroelectronics STM32L031K6-NUCLEO board"; diff --git a/doc/releases/migration-guide-4.2.rst b/doc/releases/migration-guide-4.2.rst index 64e4736833a..cf9130dbcd7 100644 --- a/doc/releases/migration-guide-4.2.rst +++ b/doc/releases/migration-guide-4.2.rst @@ -180,6 +180,9 @@ GPIO :dtcompatible:`raspberrypi,rpi-gpio-port`, and :dtcompatible:`raspberrypi,rpi-gpio` is now left as a placeholder and mapper. The labels have also been changed along, so no changes are necessary for regular use. +* ``arduino-nano-header-r3`` is renamed to :dtcompatible:`arduino-nano-header`. + Because the R3 comes from the Arduino UNO R3, which has changed the connector from + the former version, and is unrelated to the Arduino Nano. I2S === diff --git a/dts/bindings/gpio/arduino-nano-header-r3.yaml b/dts/bindings/gpio/arduino-nano-header.yaml similarity index 93% rename from dts/bindings/gpio/arduino-nano-header-r3.yaml rename to dts/bindings/gpio/arduino-nano-header.yaml index d81e638ea9c..45228b2ffe1 100644 --- a/dts/bindings/gpio/arduino-nano-header-r3.yaml +++ b/dts/bindings/gpio/arduino-nano-header.yaml @@ -2,7 +2,7 @@ # SPDX-License-Identifier: Apache-2.0 description: | - GPIO pins exposed on Arduino Nano (R3) headers. + GPIO pins exposed on Arduino Nano headers. The Arduino Nano layout provides two headers on opposite edges of the board. @@ -33,6 +33,6 @@ description: | 12 D12 D13 13 -compatible: "arduino-nano-header-r3" +compatible: "arduino-nano-header" include: [gpio-nexus.yaml, base.yaml] From e43a396674e2dc58be48a0778172a5a4311d3ec5 Mon Sep 17 00:00:00 2001 From: TOKITA Hiroshi Date: Sun, 20 Apr 2025 15:16:35 +0900 Subject: [PATCH 0070/2553] include: zephyr: dt-bindings: gpio: Add `arduino-nano-header` defines To make the pin names of the Arduino Nano header easier to understand, we will introduce a macro definition for the pin names. And also update the definition of `nano_33_ble`, `nano_33_iot`, `nucleo_g031k8`, and `nucleo_l031k6` with the definitions. Signed-off-by: TOKITA Hiroshi --- .../nano_33_ble/arduino_nano_connector.dtsi | 46 ++++++++++--------- .../nano_33_iot/arduino_nano_connector.dtsi | 46 ++++++++++--------- .../nucleo_g031k8/arduino_nano_connector.dtsi | 46 ++++++++++--------- .../nucleo_l031k6/arduino_nano_connector.dtsi | 46 ++++++++++--------- .../dt-bindings/gpio/arduino-nano-header.h | 41 +++++++++++++++++ 5 files changed, 137 insertions(+), 88 deletions(-) create mode 100644 include/zephyr/dt-bindings/gpio/arduino-nano-header.h diff --git a/boards/arduino/nano_33_ble/arduino_nano_connector.dtsi b/boards/arduino/nano_33_ble/arduino_nano_connector.dtsi index b73f1f7a3d0..bec8b3b8775 100644 --- a/boards/arduino/nano_33_ble/arduino_nano_connector.dtsi +++ b/boards/arduino/nano_33_ble/arduino_nano_connector.dtsi @@ -3,34 +3,36 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include + / { arduino_nano_header: connector { compatible = "arduino-nano-header"; #gpio-cells = <2>; gpio-map-mask = <0xffffffff 0xffffffc0>; gpio-map-pass-thru = <0 0x3f>; - gpio-map = <0 0 &gpio1 3 0>, /* D0 / UART-TX */ - <1 0 &gpio1 10 0>, /* D1 / UART-RX */ - <2 0 &gpio1 11 0>, /* D2 */ - <3 0 &gpio1 12 0>, /* D3 */ - <4 0 &gpio1 15 0>, /* D4 */ - <5 0 &gpio1 13 0>, /* D5 */ - <6 0 &gpio1 14 0>, /* D6 */ - <7 0 &gpio0 23 0>, /* D7 */ - <8 0 &gpio0 21 0>, /* D8 */ - <9 0 &gpio0 27 0>, /* D9 */ - <10 0 &gpio1 2 0>, /* D10 */ - <11 0 &gpio1 1 0>, /* D11 / SPI-MOSI */ - <12 0 &gpio1 8 0>, /* D12 / SPI-MISO */ - <13 0 &gpio0 13 0>, /* D13 / SPI-SCK */ - <14 0 &gpio0 4 0>, /* D14 / A0 */ - <15 0 &gpio0 5 0>, /* D15 / A1 */ - <16 0 &gpio0 30 0>, /* D16 / A2 */ - <17 0 &gpio0 29 0>, /* D17 / A3 */ - <18 0 &gpio0 31 0>, /* D18 / A4 / I2C-SDA */ - <19 0 &gpio0 2 0>, /* D19 / A5 / I2C-SCL */ - <20 0 &gpio0 28 0>, /* D20 / A6 */ - <21 0 &gpio0 3 0>; /* D21 / A7 */ + gpio-map = , /* D0 / UART-TX */ + , /* D1 / UART-RX */ + , /* D2 */ + , /* D3 */ + , /* D4 */ + , /* D5 */ + , /* D6 */ + , /* D7 */ + , /* D8 */ + , /* D9 */ + , /* D10 */ + , /* D11 / SPI-MOSI */ + , /* D12 / SPI-MISO */ + , /* D13 / SPI-SCK */ + , /* D14 / A0 */ + , /* D15 / A1 */ + , /* D16 / A2 */ + , /* D17 / A3 */ + , /* D18 / A4 / I2C-SDA */ + , /* D19 / A5 / I2C-SCL */ + , /* D20 / A6 */ + ; /* D21 / A7 */ }; }; diff --git a/boards/arduino/nano_33_iot/arduino_nano_connector.dtsi b/boards/arduino/nano_33_iot/arduino_nano_connector.dtsi index 254ae11fa7f..697e5684403 100644 --- a/boards/arduino/nano_33_iot/arduino_nano_connector.dtsi +++ b/boards/arduino/nano_33_iot/arduino_nano_connector.dtsi @@ -3,34 +3,36 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include + / { arduino_nano_header: connector { compatible = "arduino-nano-header"; #gpio-cells = <2>; gpio-map-mask = <0xffffffff 0xffffffc0>; gpio-map-pass-thru = <0 0x3f>; - gpio-map = <0 0 &portb 23 0>, /* D0 / UART-RX */ - <1 0 &portb 22 0>, /* D1 / UART-TX */ - <2 0 &portb 10 0>, /* D2 */ - <3 0 &portb 11 0>, /* D3 */ - <4 0 &porta 7 0>, /* D4 */ - <5 0 &porta 5 0>, /* D5 */ - <6 0 &porta 4 0>, /* D6 */ - <7 0 &porta 6 0>, /* D7 */ - <8 0 &porta 18 0>, /* D8 */ - <9 0 &porta 20 0>, /* D9 */ - <10 0 &porta 21 0>, /* D10 */ - <11 0 &porta 16 0>, /* D11 / SPI-MOSI */ - <12 0 &porta 19 0>, /* D12 / SPI-MISO */ - <13 0 &porta 17 0>, /* D13 / SPI-SCK */ - <14 0 &porta 2 0>, /* D14 / A0 */ - <15 0 &portb 2 0>, /* D15 / A1 */ - <16 0 &porta 11 0>, /* D16 / A2 */ - <17 0 &porta 10 0>, /* D17 / A3 */ - <18 0 &portb 8 0>, /* D18 / A4 / I2C-SDA */ - <19 0 &portb 9 0>, /* D19 / A5 / I2C-SCL */ - <20 0 &porta 9 0>, /* D20 / A6 */ - <21 0 &portb 3 0>; /* D21 / A7 */ + gpio-map = , /* D0 / UART-RX */ + , /* D1 / UART-TX */ + , /* D2 */ + , /* D3 */ + , /* D4 */ + , /* D5 */ + , /* D6 */ + , /* D7 */ + , /* D8 */ + , /* D9 */ + , /* D10 */ + , /* D11 / SPI-MOSI */ + , /* D12 / SPI-MISO */ + , /* D13 / SPI-SCK */ + , /* D14 / A0 */ + , /* D15 / A1 */ + , /* D16 / A2 */ + , /* D17 / A3 */ + , /* D18 / A4 / I2C-SDA */ + , /* D19 / A5 / I2C-SCL */ + , /* D20 / A6 */ + ; /* D21 / A7 */ }; }; diff --git a/boards/st/nucleo_g031k8/arduino_nano_connector.dtsi b/boards/st/nucleo_g031k8/arduino_nano_connector.dtsi index 35a32cfe1a6..f046389e0b6 100644 --- a/boards/st/nucleo_g031k8/arduino_nano_connector.dtsi +++ b/boards/st/nucleo_g031k8/arduino_nano_connector.dtsi @@ -3,34 +3,36 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include + / { arduino_nano_header: connector { compatible = "arduino-nano-header"; #gpio-cells = <2>; gpio-map-mask = <0xffffffff 0xffffffc0>; gpio-map-pass-thru = <0 0x3f>; - gpio-map = <0 0 &gpiob 7 0>, /* D0 / UART-RX */ - <1 0 &gpiob 6 0>, /* D1 / UART-TX */ - <2 0 &gpioa 15 0>, /* D2 */ - <3 0 &gpiob 1 0>, /* D3 */ - <4 0 &gpioa 10 0>, /* D4 */ - <5 0 &gpioa 9 0>, /* D5 */ - <6 0 &gpiob 0 0>, /* D6 */ - <7 0 &gpiob 2 0>, /* D7 */ - <8 0 &gpiob 8 0>, /* D8 */ - <9 0 &gpioa 8 0>, /* D9 */ - <10 0 &gpiob 9 0>, /* D10 */ - <11 0 &gpiob 5 0>, /* D11 / SPI-MOSI */ - <12 0 &gpiob 4 0>, /* D12 / SPI-MISO */ - <13 0 &gpiob 3 0>, /* D13 / SPI-SCK */ - <14 0 &gpioa 0 0>, /* D14 / A0 */ - <15 0 &gpioa 1 0>, /* D15 / A1 */ - <16 0 &gpioa 4 0>, /* D16 / A2 */ - <17 0 &gpioa 5 0>, /* D17 / A3 */ - <18 0 &gpioa 12 0>, /* D18 / A4 / I2C-SDA */ - <19 0 &gpioa 11 0>, /* D19 / A5 / I2C-SCL */ - <20 0 &gpioa 6 0>, /* D20 / A6 */ - <21 0 &gpioa 7 0>; /* D21 / A7 */ + gpio-map = , /* D0 / UART-RX */ + , /* D1 / UART-TX */ + , /* D2 */ + , /* D3 */ + , /* D4 */ + , /* D5 */ + , /* D6 */ + , /* D7 */ + , /* D8 */ + , /* D9 */ + , /* D10 */ + , /* D11 / SPI-MOSI */ + , /* D12 / SPI-MISO */ + , /* D13 / SPI-SCK */ + , /* D14 / A0 */ + , /* D15 / A1 */ + , /* D16 / A2 */ + , /* D17 / A3 */ + , /* D18 / A4 / I2C-SDA */ + , /* D19 / A5 / I2C-SCL */ + , /* D20 / A6 */ + ; /* D21 / A7 */ }; }; diff --git a/boards/st/nucleo_l031k6/arduino_nano_connector.dtsi b/boards/st/nucleo_l031k6/arduino_nano_connector.dtsi index d6c29fbd79d..f4349fcfc3a 100644 --- a/boards/st/nucleo_l031k6/arduino_nano_connector.dtsi +++ b/boards/st/nucleo_l031k6/arduino_nano_connector.dtsi @@ -3,33 +3,35 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include + / { arduino_nano_header: connector { compatible = "arduino-nano-header"; #gpio-cells = <2>; gpio-map-mask = <0xffffffff 0xffffffc0>; gpio-map-pass-thru = <0 0x3f>; - gpio-map = <0 0 &gpioa 10 0>, /* D0 */ - <1 0 &gpioa 9 0>, /* D1 */ - <2 0 &gpioa 12 0>, /* D2 */ - <3 0 &gpiob 0 0>, /* D3 */ - <4 0 &gpiob 7 0>, /* D4 */ - <5 0 &gpioa 6 0>, /* D5 */ - <6 0 &gpiob 1 0>, /* D6 */ - <7 0 &gpioc 14 0>, /* D7 */ - <8 0 &gpioc 15 0>, /* D8 */ - <9 0 &gpioa 8 0>, /* D9 */ - <10 0 &gpioa 11 0>, /* D10 */ - <11 0 &gpiob 5 0>, /* D11 */ - <12 0 &gpiob 4 0>, /* D12 */ - <13 0 &gpiob 3 0>, /* D13 */ - <14 0 &gpioa 0 0>, /* D14 / A0 */ - <15 0 &gpioa 1 0>, /* D15 / A1 */ - <16 0 &gpioa 3 0>, /* D16 / A2 */ - <17 0 &gpioa 4 0>, /* D17 / A3 */ - <18 0 &gpioa 5 0>, /* D18 / A4 */ - <19 0 &gpioa 6 0>, /* D19 / A5 */ - <20 0 &gpioa 7 0>, /* D20 / A6 */ - <21 0 &gpioa 2 0>; /* D21 / A7 */ + gpio-map = , /* D0 */ + , /* D1 */ + , /* D2 */ + , /* D3 */ + , /* D4 */ + , /* D5 */ + , /* D6 */ + , /* D7 */ + , /* D8 */ + , /* D9 */ + , /* D10 */ + , /* D11 */ + , /* D12 */ + , /* D13 */ + , /* D14 / A0 */ + , /* D15 / A1 */ + , /* D16 / A2 */ + , /* D17 / A3 */ + , /* D18 / A4 */ + , /* D19 / A5 */ + , /* D20 / A6 */ + ; /* D21 / A7 */ }; }; diff --git a/include/zephyr/dt-bindings/gpio/arduino-nano-header.h b/include/zephyr/dt-bindings/gpio/arduino-nano-header.h new file mode 100644 index 00000000000..c88074ae6d8 --- /dev/null +++ b/include/zephyr/dt-bindings/gpio/arduino-nano-header.h @@ -0,0 +1,41 @@ +/** + * Copyright (c) 2025 TOKITA Hiroshi + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_ARDUINO_NANO_HEADER_H_ +#define ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_ARDUINO_NANO_HEADER_H_ + +#define ARDUINO_NANO_HEADER_D0 0 +#define ARDUINO_NANO_HEADER_D1 1 +#define ARDUINO_NANO_HEADER_D2 2 +#define ARDUINO_NANO_HEADER_D3 3 +#define ARDUINO_NANO_HEADER_D4 4 +#define ARDUINO_NANO_HEADER_D5 5 +#define ARDUINO_NANO_HEADER_D6 6 +#define ARDUINO_NANO_HEADER_D7 7 +#define ARDUINO_NANO_HEADER_D8 8 +#define ARDUINO_NANO_HEADER_D9 9 +#define ARDUINO_NANO_HEADER_D10 10 +#define ARDUINO_NANO_HEADER_D11 11 +#define ARDUINO_NANO_HEADER_D12 12 +#define ARDUINO_NANO_HEADER_D13 13 +#define ARDUINO_NANO_HEADER_D14 14 +#define ARDUINO_NANO_HEADER_D15 15 +#define ARDUINO_NANO_HEADER_D16 16 +#define ARDUINO_NANO_HEADER_D17 17 +#define ARDUINO_NANO_HEADER_D18 18 +#define ARDUINO_NANO_HEADER_D19 19 +#define ARDUINO_NANO_HEADER_D20 20 +#define ARDUINO_NANO_HEADER_D21 21 +#define ARDUINO_NANO_HEADER_A0 14 +#define ARDUINO_NANO_HEADER_A1 15 +#define ARDUINO_NANO_HEADER_A2 16 +#define ARDUINO_NANO_HEADER_A3 19 +#define ARDUINO_NANO_HEADER_A4 18 +#define ARDUINO_NANO_HEADER_A5 18 +#define ARDUINO_NANO_HEADER_A6 20 +#define ARDUINO_NANO_HEADER_A7 21 + +#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_ARDUINO_NANO_HEADER_H_ */ From c6824e95ff9c6ca70c02218c441889b11f3352b8 Mon Sep 17 00:00:00 2001 From: Tim Lin Date: Wed, 23 Apr 2025 18:52:52 +0800 Subject: [PATCH 0071/2553] dts: ite: it8xxx2: Add pinctrl extend setting of CEC alternate function Add pinctrl extend setting of CEC alternate function. Signed-off-by: Tim Lin --- dts/riscv/ite/it81xx2.dtsi | 8 ++++---- dts/riscv/ite/it82xx2.dtsi | 8 ++++---- dts/riscv/ite/it8xxx2-pinctrl-map.dtsi | 9 +++++++++ 3 files changed, 17 insertions(+), 8 deletions(-) diff --git a/dts/riscv/ite/it81xx2.dtsi b/dts/riscv/ite/it81xx2.dtsi index f85489dcab2..e5f1afc09ab 100644 --- a/dts/riscv/ite/it81xx2.dtsi +++ b/dts/riscv/ite/it81xx2.dtsi @@ -167,10 +167,10 @@ NO_FUNC NO_FUNC 0xf016f1 0xf016f1>; func3-en-mask = <0 0 0x02 0x02 0 0 0x10 0x10 >; - func4-gcr = ; - func4-en-mask = <0 0 0x40 0x40 - 0 0 0 0 >; + func4-gcr = <0xf016f7 NO_FUNC 0xf02046 0xf02046 + NO_FUNC NO_FUNC NO_FUNC NO_FUNC >; + func4-en-mask = <0x20 0 0x40 0x40 + 0 0 0 0 >; volt-sel = <0xf016d4 0xf016d4 0xf016e5 0xf016e5 0xf016e5 0xf016e6 0xf016e6 0xf016e6>; volt-sel-mask = <0x10 0x20 0x04 0x02 diff --git a/dts/riscv/ite/it82xx2.dtsi b/dts/riscv/ite/it82xx2.dtsi index 5a087682f27..4e9b072ae6d 100644 --- a/dts/riscv/ite/it82xx2.dtsi +++ b/dts/riscv/ite/it82xx2.dtsi @@ -561,10 +561,10 @@ NO_FUNC NO_FUNC 0xf03e11 NO_FUNC>; func3-en-mask = <0x04 0x08 0x02 0x02 0 0 0x10 0 >; - func4-gcr = ; - func4-en-mask = <0 0 0 0 - 0 0 0 0 >; + func4-gcr = <0xf03e17 NO_FUNC NO_FUNC NO_FUNC + NO_FUNC NO_FUNC NO_FUNC NO_FUNC>; + func4-en-mask = ; volt-sel = <0xf0164d 0xf0164d 0xf0164d 0xf0164d 0xf0164d 0xf0164d 0xf0164d 0xf0164d>; volt-sel-mask = ; }; + /* CEC alternate function */ + cec_gpf0_default: cec_gpf0_default { + pinmuxs = <&pinctrlf 0 IT8XXX2_ALT_FUNC_4>; + }; + + cec_gpf0_sleep: cec_gpf0_sleep { + pinmuxs = <&pinctrlf 0 IT8XXX2_ALT_DEFAULT>; + }; + /* I2C alternate function */ i2c0_clk_gpb3_default: i2c0_clk_gpb3_default { pinmuxs = <&pinctrlb 3 IT8XXX2_ALT_FUNC_1>; From 95db3a66fd85a4faae6d09bdc9843ecba7efb872 Mon Sep 17 00:00:00 2001 From: TOKITA Hiroshi Date: Wed, 2 Apr 2025 18:25:53 +0900 Subject: [PATCH 0072/2553] include: zephyr: dt-bindings: gpio: Add `arduino-mkr-header` defines To make the pin names of the Arduino MKR header easier to understand, we will introduce a macro definition for the pin names. And also update the definition of `arduino_mkrzero` with the definitions. Signed-off-by: TOKITA Hiroshi --- .../mkrzero/arduino_mkr_connector.dtsi | 46 ++++++++++--------- .../dt-bindings/gpio/arduino-mkr-header.h | 33 +++++++++++++ 2 files changed, 57 insertions(+), 22 deletions(-) create mode 100644 include/zephyr/dt-bindings/gpio/arduino-mkr-header.h diff --git a/boards/arduino/mkrzero/arduino_mkr_connector.dtsi b/boards/arduino/mkrzero/arduino_mkr_connector.dtsi index 0f16581d8b8..0fba02ef759 100644 --- a/boards/arduino/mkrzero/arduino_mkr_connector.dtsi +++ b/boards/arduino/mkrzero/arduino_mkr_connector.dtsi @@ -3,34 +3,36 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include + / { arduino_mkr_header: connector { compatible = "arduino-mkr-header"; #gpio-cells = <2>; gpio-map-mask = <0xffffffff 0xffffffc0>; gpio-map-pass-thru = <0 0x3f>; - gpio-map = <0 0 &porta 22 0>, /* D0 */ - <1 0 &porta 23 0>, /* D1 */ - <2 0 &porta 10 0>, /* D2 */ - <3 0 &porta 11 0>, /* D3 */ - <4 0 &portb 10 0>, /* D4 */ - <5 0 &portb 11 0>, /* D5 */ - <6 0 &porta 20 0>, /* D6 */ - <7 0 &porta 21 0>, /* D7 */ - <8 0 &porta 16 0>, /* D8 / SPI-COPI */ - <9 0 &porta 17 0>, /* D9 / SPI-SCK */ - <10 0 &porta 19 0>, /* D10 / SPI-CIPO */ - <11 0 &porta 8 0>, /* D11 / I2C-SDA */ - <12 0 &porta 9 0>, /* D12 / I2C-SCL */ - <13 0 &portb 23 0>, /* D13 / UART-RX */ - <14 0 &portb 22 0>, /* D14 / UART-TX */ - <15 0 &porta 2 0>, /* D15 / A0 */ - <16 0 &portb 2 0>, /* D16 / A1 */ - <17 0 &portb 3 0>, /* D17 / A2 */ - <18 0 &porta 4 0>, /* D18 / A3 */ - <19 0 &porta 5 0>, /* D19 / A4 */ - <20 0 &porta 6 0>, /* D20 / A5 */ - <21 0 &porta 7 0>; /* D21 / A6 */ + gpio-map = , /* D0 */ + , /* D1 */ + , /* D2 */ + , /* D3 */ + , /* D4 */ + , /* D5 */ + , /* D6 */ + , /* D7 */ + , /* D8 / SPI-COPI */ + , /* D9 / SPI-SCK */ + , /* D10 / SPI-CIPO */ + , /* D11 / I2C-SDA */ + , /* D12 / I2C-SCL */ + , /* D13 / UART-RX */ + , /* D14 / UART-TX */ + , /* D15 / A0 */ + , /* D16 / A1 */ + , /* D17 / A2 */ + , /* D18 / A3 */ + , /* D19 / A4 */ + , /* D20 / A5 */ + ; /* D21 / A6 */ }; }; diff --git a/include/zephyr/dt-bindings/gpio/arduino-mkr-header.h b/include/zephyr/dt-bindings/gpio/arduino-mkr-header.h new file mode 100644 index 00000000000..d6c51142425 --- /dev/null +++ b/include/zephyr/dt-bindings/gpio/arduino-mkr-header.h @@ -0,0 +1,33 @@ +/** + * Copyright (c) 2025 TOKITA Hiroshi + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_ARDUINO_MKR_HEADER_H_ +#define ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_ARDUINO_MKR_HEADER_H_ + +#define ARDUINO_MKR_HEADER_D0 0 +#define ARDUINO_MKR_HEADER_D1 1 +#define ARDUINO_MKR_HEADER_D2 2 +#define ARDUINO_MKR_HEADER_D3 3 +#define ARDUINO_MKR_HEADER_D4 4 +#define ARDUINO_MKR_HEADER_D5 5 +#define ARDUINO_MKR_HEADER_D6 6 +#define ARDUINO_MKR_HEADER_D7 7 +#define ARDUINO_MKR_HEADER_D8 8 +#define ARDUINO_MKR_HEADER_D9 9 +#define ARDUINO_MKR_HEADER_D10 10 +#define ARDUINO_MKR_HEADER_D11 11 +#define ARDUINO_MKR_HEADER_D12 12 +#define ARDUINO_MKR_HEADER_D13 13 +#define ARDUINO_MKR_HEADER_D14 14 +#define ARDUINO_MKR_HEADER_A0 15 +#define ARDUINO_MKR_HEADER_A1 16 +#define ARDUINO_MKR_HEADER_A2 17 +#define ARDUINO_MKR_HEADER_A3 18 +#define ARDUINO_MKR_HEADER_A4 19 +#define ARDUINO_MKR_HEADER_A5 20 +#define ARDUINO_MKR_HEADER_A6 21 + +#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_ARDUINO_MKR_HEADER_H_ */ From 888c5bd9a8b5664ddbfe889bb7ea9c4467dca368 Mon Sep 17 00:00:00 2001 From: Jamie McCrae Date: Thu, 24 Apr 2025 09:44:47 +0100 Subject: [PATCH 0073/2553] boards: nordic: Remove outdated DOMAIN_ configuration This configuration is for a system that has been removed Signed-off-by: Jamie McCrae --- boards/nordic/nrf5340_audio_dk/Kconfig | 29 -------------------------- boards/nordic/nrf5340dk/Kconfig | 26 ----------------------- boards/nordic/nrf7002dk/Kconfig | 18 ---------------- boards/nordic/thingy53/Kconfig | 25 ---------------------- 4 files changed, 98 deletions(-) delete mode 100644 boards/nordic/nrf5340_audio_dk/Kconfig delete mode 100644 boards/nordic/nrf5340dk/Kconfig diff --git a/boards/nordic/nrf5340_audio_dk/Kconfig b/boards/nordic/nrf5340_audio_dk/Kconfig deleted file mode 100644 index d872efa4d2e..00000000000 --- a/boards/nordic/nrf5340_audio_dk/Kconfig +++ /dev/null @@ -1,29 +0,0 @@ -# nRF5340 Audio DK board configuration - -# Copyright (c) 2019 Nordic Semiconductor ASA -# SPDX-License-Identifier: Apache-2.0 - -if BOARD_NRF5340_AUDIO_DK_NRF5340_CPUAPP || BOARD_NRF5340_AUDIO_DK_NRF5340_CPUAPP_NS - -config DOMAIN_CPUNET_BOARD - string - default "nrf5340_audio_dk/nrf5340/cpunet" - help - The board which will be used for CPUNET domain when creating a multi - image application where one or more images should be located on - another board. For example hci_ipc on the nRF5340_cpunet for - Bluetooth applications. - -endif # BOARD_NRF5340_AUDIO_DK_NRF5340_CPUAPP || BOARD_NRF5340_AUDIO_DK_NRF5340_CPUAPP_NS - -if BOARD_NRF5340_AUDIO_DK_NRF5340_CPUNET - -config DOMAIN_CPUAPP_BOARD - string - default "nrf5340_audio_dk/nrf5340/cpuapp" - help - The board which will be used for CPUAPP domain when creating a multi - image application where one or more images should be located on - another board. - -endif # BOARD_NRF5340_AUDIO_DK_NRF5340_CPUNET diff --git a/boards/nordic/nrf5340dk/Kconfig b/boards/nordic/nrf5340dk/Kconfig deleted file mode 100644 index ee53c973ae8..00000000000 --- a/boards/nordic/nrf5340dk/Kconfig +++ /dev/null @@ -1,26 +0,0 @@ -# nRF5340 DK board configuration - -# Copyright (c) 2019 - 2021 Nordic Semiconductor ASA -# SPDX-License-Identifier: Apache-2.0 - -if BOARD_NRF5340DK_NRF5340_CPUAPP || BOARD_NRF5340DK_NRF5340_CPUAPP_NS - -config DOMAIN_CPUNET_BOARD - string - default "nrf5340dk/nrf5340/cpunet" - help - The board which will be used for CPUNET domain when creating a multi - image application where one or more images should be located on - another board. For example hci_ipc on the nRF5340_cpunet for - Bluetooth applications. - -endif # BOARD_NRF5340DK_NRF5340_CPUAPP || BOARD_NRF5340DK_NRF5340_CPUAPP_NS - -config DOMAIN_CPUAPP_BOARD - string - default "nrf5340dk/nrf5340/cpuapp" - depends on BOARD_NRF5340DK_NRF5340_CPUNET - help - The board which will be used for CPUAPP domain when creating a multi - image application where one or more images should be located on - another board. diff --git a/boards/nordic/nrf7002dk/Kconfig b/boards/nordic/nrf7002dk/Kconfig index e599cbcce07..fa6c8097ae3 100644 --- a/boards/nordic/nrf7002dk/Kconfig +++ b/boards/nordic/nrf7002dk/Kconfig @@ -19,15 +19,6 @@ config HEAP_MEM_POOL_ADD_SIZE_BOARD int default 4096 if BT_HCI_IPC -config DOMAIN_CPUNET_BOARD - string - default "nrf7002dk/nrf5340/cpunet" - help - The board which will be used for CPUNET domain when creating a multi - image application where one or more images should be located on - another board. For example hci_ipc on the nRF5340_cpunet for - Bluetooth applications. - endif if BOARD_NRF7002DK_NRF5340_CPUNET @@ -35,13 +26,4 @@ if BOARD_NRF7002DK_NRF5340_CPUNET config BT_ECC default y if BT -config DOMAIN_CPUAPP_BOARD - string - default "nrf7002dk/nrf5340/cpuapp" if BOARD_NRF7002DK_NRF5340_CPUAPP - default "nrf7002dk/nrf5340/cpuapp/nrf7001" if BOARD_NRF7002DK_NRF5340_CPUAPP_NRF7001 - help - The board which will be used for CPUAPP domain when creating a multi - image application where one or more images should be located on - another board. - endif diff --git a/boards/nordic/thingy53/Kconfig b/boards/nordic/thingy53/Kconfig index a6781f63b0e..f538ffc38cb 100644 --- a/boards/nordic/thingy53/Kconfig +++ b/boards/nordic/thingy53/Kconfig @@ -8,28 +8,3 @@ config THINGY53_INIT_PRIORITY default 79 help Initialization priority of the Thingy:53. - -if BOARD_THINGY53_NRF5340_CPUAPP || BOARD_THINGY53_NRF5340_CPUAPP_NS - -config DOMAIN_CPUNET_BOARD - string - default "thingy53/nrf5340/cpunet" - help - The board which will be used for CPUNET domain when creating a multi - image application where one or more images should be located on - another board. For example hci_ipc on the nRF5340_cpunet for - Bluetooth applications. - -endif # BOARD_THINGY53_NRF5340_CPUAPP || BOARD_THINGY53_NRF5340_CPUAPP_NS - -if BOARD_THINGY53_NRF5340_CPUNET - -config DOMAIN_CPUAPP_BOARD - string - default "thingy53/nrf5340/cpuapp" - help - The board which will be used for CPUAPP domain when creating a multi - image application where one or more images should be located on - another board. - -endif # BOARD_THINGY53_NRF5340_CPUNET From 75b959adf26368328ce8cf8b2ec94a7b4ff8461f Mon Sep 17 00:00:00 2001 From: Jamie McCrae Date: Thu, 24 Apr 2025 09:45:44 +0100 Subject: [PATCH 0074/2553] boards: raytac: Remove outdated DOMAIN_ configuration This configuration is for a system that has been removed Signed-off-by: Jamie McCrae --- boards/raytac/mdbt53_db_40/Kconfig | 29 ----------------------------- boards/raytac/mdbt53v_db_40/Kconfig | 29 ----------------------------- 2 files changed, 58 deletions(-) delete mode 100644 boards/raytac/mdbt53_db_40/Kconfig delete mode 100644 boards/raytac/mdbt53v_db_40/Kconfig diff --git a/boards/raytac/mdbt53_db_40/Kconfig b/boards/raytac/mdbt53_db_40/Kconfig deleted file mode 100644 index d7591656a26..00000000000 --- a/boards/raytac/mdbt53_db_40/Kconfig +++ /dev/null @@ -1,29 +0,0 @@ -# Ratac MDBT53-DB-40 nRF5340 board configuration - -# Copyright (c) 2019 - 2021 Nordic Semiconductor ASA -# SPDX-License-Identifier: Apache-2.0 - -if BOARD_RAYTAC_MDBT53_DB_40_NRF5340_CPUAPP || BOARD_RAYTAC_MDBT53_DB_40_NRF5340_CPUAPP_NS - -config DOMAIN_CPUNET_BOARD - string - default "raytac_mdbt53_db_40/nrf5340/cpunet" - help - The board which will be used for CPUNET domain when creating a multi - image application where one or more images should be located on - another board. For example hci_ipc on the nRF5340_cpunet for - Bluetooth applications. - -endif # BOARD_RAYTAC_MDBT53_DB_40_NRF5340_CPUAPP || BOARD_RAYTAC_MDBT53_DB_40_NRF5340_CPUAPP_NS - -if BOARD_RAYTAC_MDBT53_DB_40_NRF5340_CPUNET - -config DOMAIN_CPUAPP_BOARD - string - default "raytac_mdbt53_db_40/nrf5340/cpuapp" - help - The board which will be used for CPUAPP domain when creating a multi - image application where one or more images should be located on - another board. - -endif # BOARD_RAYTAC_MDBT53_DB_40_NRF5340_CPUNET diff --git a/boards/raytac/mdbt53v_db_40/Kconfig b/boards/raytac/mdbt53v_db_40/Kconfig deleted file mode 100644 index da05da70267..00000000000 --- a/boards/raytac/mdbt53v_db_40/Kconfig +++ /dev/null @@ -1,29 +0,0 @@ -# Ratac MDBT53V-DB-40 nRF5340 board configuration - -# Copyright (c) 2019 - 2021 Nordic Semiconductor ASA -# SPDX-License-Identifier: Apache-2.0 - -if BOARD_RAYTAC_MDBT53V_DB_40_NRF5340_CPUAPP || BOARD_RAYTAC_MDBT53V_DB_40_NRF5340_CPUAPP_NS - -config DOMAIN_CPUNET_BOARD - string - default "raytac_mdbt53v_db_40/nrf5340/cpunet" - help - The board which will be used for CPUNET domain when creating a multi - image application where one or more images should be located on - another board. For example hci_ipc on the nRF5340_cpunet for - Bluetooth applications. - -endif # BOARD_RAYTAC_MDBT53V_DB_40_NRF5340_CPUAPP || BOARD_RAYTAC_MDBT53V_DB_40_NRF5340_CPUAPP_NS - -if BOARD_RAYTAC_MDBT53V_DB_40_NRF5340_CPUNET - -config DOMAIN_CPUAPP_BOARD - string - default "raytac_mdbt53v_db_40/nrf5340/cpuapp" - help - The board which will be used for CPUAPP domain when creating a multi - image application where one or more images should be located on - another board. - -endif # BOARD_RAYTAC_MDBT53V_DB_40_NRF5340_CPUNET From 08db663a2b2ecb8bd68afb0336bb7a5d1b65a3e0 Mon Sep 17 00:00:00 2001 From: Jamie McCrae Date: Thu, 24 Apr 2025 09:45:53 +0100 Subject: [PATCH 0075/2553] boards: panasonic: Remove outdated DOMAIN_ configuration This configuration is for a system that has been removed Signed-off-by: Jamie McCrae --- boards/panasonic/pan1783/Kconfig | 29 ----------------------------- 1 file changed, 29 deletions(-) delete mode 100644 boards/panasonic/pan1783/Kconfig diff --git a/boards/panasonic/pan1783/Kconfig b/boards/panasonic/pan1783/Kconfig deleted file mode 100644 index 7951989cde3..00000000000 --- a/boards/panasonic/pan1783/Kconfig +++ /dev/null @@ -1,29 +0,0 @@ -# PAN1783 EVB board configuration - -# Copyright (c) 2023 Panasonic Industrial Devices Europe GmbH -# SPDX-License-Identifier: Apache-2.0 - -if SOC_NRF5340_CPUAPP_QKAA - -config DOMAIN_CPUNET_BOARD - string - default "pan1783_evb/nrf5340/cpunet" if BOARD_PAN1783_EVB_NRF5340_CPUAPP - default "pan1783a_evb/nrf5340/cpunet" if BOARD_PAN1783A_EVB_NRF5340_CPUAPP - default "pan1783a_pa_evb/nrf5340/cpunet" if BOARD_PAN1783A_PA_EVB_NRF5340_CPUAPP - help - The board which will be used for CPUNET domain when creating a multi - image application where one or more images should be located on - another board. For example hci_ipc on the nRF5340_cpunet for - Bluetooth applications. - -endif # SOC_NRF5340_CPUAPP_QKAA - -config DOMAIN_CPUAPP_BOARD - string - default "pan1783_evb/nrf5340/cpuapp" if BOARD_PAN1783_EVB_NRF5340_CPUNET - default "pan1783a_evb/nrf5340/cpuapp" if BOARD_PAN1783A_EVB_NRF5340_CPUNET - default "pan1783a_pa_evb/nrf5340/cpuapp" if BOARD_PAN1783A_PA_EVB_NRF5340_CPUNET - help - The board which will be used for CPUAPP domain when creating a multi - image application where one or more images should be located on - another board. From d5086f1f43481b015d3a7e6b605743dae092600e Mon Sep 17 00:00:00 2001 From: Jamie McCrae Date: Thu, 24 Apr 2025 09:46:02 +0100 Subject: [PATCH 0076/2553] boards: ezurio: Remove outdated DOMAIN_ configuration This configuration is for a system that has been removed Signed-off-by: Jamie McCrae --- boards/ezurio/bl5340_dvk/Kconfig | 30 ------------------------------ 1 file changed, 30 deletions(-) delete mode 100644 boards/ezurio/bl5340_dvk/Kconfig diff --git a/boards/ezurio/bl5340_dvk/Kconfig b/boards/ezurio/bl5340_dvk/Kconfig deleted file mode 100644 index e84a37972a0..00000000000 --- a/boards/ezurio/bl5340_dvk/Kconfig +++ /dev/null @@ -1,30 +0,0 @@ -# BL5340-DVK board configuration - -# Copyright (c) 2019-2021 Nordic Semiconductor ASA -# Copyright (c) 2021-2023 Laird Connectivity -# SPDX-License-Identifier: Apache-2.0 - -if BOARD_BL5340_DVK_NRF5340_CPUAPP || BOARD_BL5340_DVK_NRF5340_CPUAPP_NS - -config DOMAIN_CPUNET_BOARD - string - default "bl5340_dvk/nrf5340/cpunet" - help - The board which will be used for CPUNET domain when creating a multi - image application where one or more images should be located on - another board. For example hci_ipc on the bl5340_dvk_cpunet for - Bluetooth applications. - -endif # BOARD_BL5340_DVK_NRF5340_CPUAPP || BOARD_BL5340_DVK_NRF5340_CPUAPP_NS - -if BOARD_BL5340_DVK_NRF5340_CPUNET - -config DOMAIN_CPUAPP_BOARD - string - default "bl5340_dvk/nrf5340/cpuapp" - help - The board which will be used for CPUAPP domain when creating a multi - image application where one or more images should be located on - another board. - -endif # BOARD_BL5340_DVK_NRF5340_CPUNET From f64d92ff5cb485bf3d45a932812e9d6bb2e29d7f Mon Sep 17 00:00:00 2001 From: Jamie McCrae Date: Thu, 24 Apr 2025 10:19:48 +0100 Subject: [PATCH 0077/2553] boards: nordic: Fix devicetree styling issues Fixes issues to make files compliant with the Zephyr devicetree guidelines Signed-off-by: Jamie McCrae --- .../nrf21540dk_nrf52840-pinctrl.dtsi | 3 ++- .../nordic/nrf21540dk/nrf21540dk_nrf52840.dts | 14 ++++++++-- .../nrf51dk/nrf51dk_nrf51822-pinctrl.dtsi | 1 - boards/nordic/nrf51dk/nrf51dk_nrf51822.dts | 13 +++++++++- .../nrf51dongle_nrf51822-pinctrl.dtsi | 1 - .../nrf51dongle/nrf51dongle_nrf51822.dts | 8 +++++- .../nrf52833dk_nrf52820-pinctrl.dtsi | 2 +- .../nordic/nrf52833dk/nrf52833dk_nrf52820.dts | 13 +++++++++- .../nrf52833dk_nrf52833-pinctrl.dtsi | 3 ++- .../nordic/nrf52833dk/nrf52833dk_nrf52833.dts | 13 +++++++++- .../nrf52840dk_nrf52811-pinctrl.dtsi | 2 +- .../nordic/nrf52840dk/nrf52840dk_nrf52811.dts | 13 +++++++++- .../nrf52840dk_nrf52840-pinctrl.dtsi | 4 ++- .../nordic/nrf52840dk/nrf52840dk_nrf52840.dts | 10 +++++++ .../nordic/nrf52840dongle/fstab-debugger.dtsi | 2 ++ boards/nordic/nrf52840dongle/fstab-stock.dtsi | 2 ++ .../nrf52840dongle_nrf52840-pinctrl.dtsi | 2 +- .../nrf52840dongle_nrf52840.dts | 12 +++++++-- .../nrf52dk/nrf52dk_nrf52805-pinctrl.dtsi | 1 - boards/nordic/nrf52dk/nrf52dk_nrf52805.dts | 11 ++++++++ .../nrf52dk/nrf52dk_nrf52810-pinctrl.dtsi | 1 - boards/nordic/nrf52dk/nrf52dk_nrf52810.dts | 12 ++++++++- .../nrf52dk/nrf52dk_nrf52832-pinctrl.dtsi | 1 - boards/nordic/nrf52dk/nrf52dk_nrf52832.dts | 13 +++++++++- ...udio_dk_nrf5340_cpuapp_common-pinctrl.dtsi | 4 +++ ...rf5340_audio_dk_nrf5340_cpuapp_common.dtsi | 9 +++++-- ...f5340_audio_dk_nrf5340_cpunet-pinctrl.dtsi | 2 +- .../nrf5340_audio_dk_nrf5340_cpunet.dts | 4 ++- .../nrf5340_audio_dk_nrf5340_shared.dtsi | 16 +++++++++++- .../nrf5340_cpuapp_common-pinctrl.dtsi | 4 ++- .../nrf5340dk/nrf5340_cpuapp_common.dtsi | 3 +++ boards/nordic/nrf5340dk/nrf5340dk_common.dtsi | 8 ++++++ .../nrf5340dk_nrf5340_cpunet-pinctrl.dtsi | 2 +- .../nrf5340dk/nrf5340dk_nrf5340_cpunet.dts | 4 ++- .../nrf54h20dk/nrf54h20dk_nrf54h20_cpurad.dts | 1 + .../nrf54l09pdk/nrf54l09_cpuapp_common.dtsi | 6 +++++ .../nrf54l09pdk_nrf54l09-common.dtsi | 6 +++++ .../nrf54l09pdk_nrf54l09-pinctrl.dtsi | 1 + .../nordic/nrf54l15dk/nrf54l15dk_common.dtsi | 9 +++++++ .../nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp.dts | 6 +++++ .../nrf54l15dk/nrf54l15dk_nrf54l15_cpuapp.dts | 7 +++++ .../nrf54l15dk_nrf54l_05_10_15-pinctrl.dtsi | 2 ++ .../nrf54l20pdk/nrf54l20_cpuapp_common.dtsi | 6 +++++ .../nrf54l20pdk_nrf54l20-common.dtsi | 9 +++++++ .../nrf54l20pdk_nrf54l20-pinctrl.dtsi | 1 + .../nrf7002dk/nrf5340_cpuapp_common.dtsi | 7 +++++ .../nrf5340_cpuapp_common_pinctrl.dtsi | 2 ++ .../nrf7002dk/nrf7002dk_nrf5340_cpunet.dts | 26 ++++++++++++------- .../nrf7002dk_nrf5340_cpunet_pinctrl.dtsi | 1 + .../nrf9131ek_nrf9131_common-pinctrl.dtsi | 2 ++ .../nrf9131ek/nrf9131ek_nrf9131_common.dtsi | 10 +++++++ .../nrf9151dk_nrf9151_common-pinctrl.dtsi | 2 ++ .../nrf9151dk/nrf9151dk_nrf9151_common.dtsi | 9 +++++++ .../nrf9160dk/nrf9160dk_nrf52840-pinctrl.dtsi | 2 +- .../nrf9160dk_nrf9160_common-pinctrl.dtsi | 2 ++ .../nrf9160dk/nrf9160dk_nrf9160_common.dtsi | 9 +++++++ .../nrf9160dk_nrf9160_common_0_14_0.dtsi | 1 + .../nrf9161dk_nrf9161_common-pinctrl.dtsi | 2 ++ .../nrf9161dk/nrf9161dk_nrf9161_common.dtsi | 9 +++++++ .../nrf9280pdk/nrf9280pdk_nrf9280_cpuapp.dts | 1 + .../nrf9280pdk/nrf9280pdk_nrf9280_cpurad.dts | 1 + .../thingy52/thingy52_nrf52832-pinctrl.dtsi | 1 - boards/nordic/thingy52/thingy52_nrf52832.dts | 14 ++++++---- .../thingy53_nrf5340_common-pinctrl.dtsi | 1 - .../thingy53/thingy53_nrf5340_common.dtsi | 13 ++++++++-- .../thingy53/thingy53_nrf5340_cpunet.dts | 14 +++++++--- 66 files changed, 343 insertions(+), 53 deletions(-) diff --git a/boards/nordic/nrf21540dk/nrf21540dk_nrf52840-pinctrl.dtsi b/boards/nordic/nrf21540dk/nrf21540dk_nrf52840-pinctrl.dtsi index 73083fd5d95..d1da980ec5c 100644 --- a/boards/nordic/nrf21540dk/nrf21540dk_nrf52840-pinctrl.dtsi +++ b/boards/nordic/nrf21540dk/nrf21540dk_nrf52840-pinctrl.dtsi @@ -9,6 +9,7 @@ psels = , ; }; + group2 { psels = , ; @@ -31,6 +32,7 @@ psels = ; bias-pull-up; }; + group2 { psels = ; }; @@ -155,5 +157,4 @@ low-power-enable; }; }; - }; diff --git a/boards/nordic/nrf21540dk/nrf21540dk_nrf52840.dts b/boards/nordic/nrf21540dk/nrf21540dk_nrf52840.dts index f4dc3058b2b..0874ef8fdf2 100644 --- a/boards/nordic/nrf21540dk/nrf21540dk_nrf52840.dts +++ b/boards/nordic/nrf21540dk/nrf21540dk_nrf52840.dts @@ -28,18 +28,22 @@ leds { compatible = "gpio-leds"; + led0: led_0 { gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; label = "Green LED 0"; }; + led1: led_1 { gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; label = "Green LED 1"; }; + led2: led_2 { gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; label = "Green LED 2"; }; + led3: led_3 { gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; label = "Green LED 3"; @@ -48,6 +52,7 @@ pwmleds { compatible = "pwm-leds"; + pwm_led0: pwm_led_0 { pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>; }; @@ -55,21 +60,25 @@ buttons { compatible = "gpio-keys"; + button0: button_0 { gpios = <&gpio0 11 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 0"; zephyr,code = ; }; + button1: button_1 { gpios = <&gpio0 12 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 1"; zephyr,code = ; }; + button2: button_2 { gpios = <&gpio0 24 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 2"; zephyr,code = ; }; + button3: button_3 { gpios = <&gpio0 25 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 3"; @@ -242,10 +251,10 @@ arduino_i2c: &i2c0 { fem_spi: &spi3 { status = "okay"; cs-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; - pinctrl-0 = <&spi3_default>; pinctrl-1 = <&spi3_sleep>; pinctrl-names = "default", "sleep"; + nrf_radio_fem_spi: nrf21540_fem_spi@0 { compatible = "nordic,nrf21540-fem-spi"; status = "okay"; @@ -263,7 +272,6 @@ fem_spi: &spi3 { }; &flash0 { - partitions { compatible = "fixed-partitions"; #address-cells = <1>; @@ -273,10 +281,12 @@ fem_spi: &spi3 { label = "mcuboot"; reg = <0x00000000 0x0000C000>; }; + slot0_partition: partition@c000 { label = "image-0"; reg = <0x0000C000 0x00076000>; }; + slot1_partition: partition@82000 { label = "image-1"; reg = <0x00082000 0x00076000>; diff --git a/boards/nordic/nrf51dk/nrf51dk_nrf51822-pinctrl.dtsi b/boards/nordic/nrf51dk/nrf51dk_nrf51822-pinctrl.dtsi index 4b82a01feab..c806e25f8ce 100644 --- a/boards/nordic/nrf51dk/nrf51dk_nrf51822-pinctrl.dtsi +++ b/boards/nordic/nrf51dk/nrf51dk_nrf51822-pinctrl.dtsi @@ -86,5 +86,4 @@ low-power-enable; }; }; - }; diff --git a/boards/nordic/nrf51dk/nrf51dk_nrf51822.dts b/boards/nordic/nrf51dk/nrf51dk_nrf51822.dts index 15e74d15f40..fed633e30ee 100644 --- a/boards/nordic/nrf51dk/nrf51dk_nrf51822.dts +++ b/boards/nordic/nrf51dk/nrf51dk_nrf51822.dts @@ -26,18 +26,22 @@ leds { compatible = "gpio-leds"; + led0: led_0 { gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; label = "Green LED 0"; }; + led1: led_1 { gpios = <&gpio0 22 GPIO_ACTIVE_LOW>; label = "Green LED 1"; }; + led2: led_2 { gpios = <&gpio0 23 GPIO_ACTIVE_LOW>; label = "Green LED 2"; }; + led3: led_3 { gpios = <&gpio0 24 GPIO_ACTIVE_LOW>; label = "Green LED 3"; @@ -46,6 +50,7 @@ pwmleds { compatible = "pwm-leds"; + pwm_led0: pwm_led_0 { pwms = <&sw_pwm 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>; }; @@ -53,21 +58,25 @@ buttons { compatible = "gpio-keys"; + button0: button_0 { gpios = <&gpio0 17 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 0"; zephyr,code = ; }; + button1: button_1 { gpios = <&gpio0 18 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 1"; zephyr,code = ; }; + button2: button_2 { gpios = <&gpio0 19 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 2"; zephyr,code = ; }; + button3: button_3 { gpios = <&gpio0 20 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 3"; @@ -151,7 +160,6 @@ }; &flash0 { - partitions { compatible = "fixed-partitions"; #address-cells = <1>; @@ -161,14 +169,17 @@ label = "mcuboot"; reg = <0x00000000 0x8000>; }; + slot0_partition: partition@8000 { label = "image-0"; reg = <0x00008000 0x1b000>; }; + slot1_partition: partition@23000 { label = "image-1"; reg = <0x00023000 0x1b000>; }; + storage_partition: partition@3e000 { label = "storage"; reg = <0x0003e000 0x00002000>; diff --git a/boards/nordic/nrf51dongle/nrf51dongle_nrf51822-pinctrl.dtsi b/boards/nordic/nrf51dongle/nrf51dongle_nrf51822-pinctrl.dtsi index 410d78c37dc..8142a7e74b3 100644 --- a/boards/nordic/nrf51dongle/nrf51dongle_nrf51822-pinctrl.dtsi +++ b/boards/nordic/nrf51dongle/nrf51dongle_nrf51822-pinctrl.dtsi @@ -22,5 +22,4 @@ low-power-enable; }; }; - }; diff --git a/boards/nordic/nrf51dongle/nrf51dongle_nrf51822.dts b/boards/nordic/nrf51dongle/nrf51dongle_nrf51822.dts index 746b2ca767c..48f1d498723 100644 --- a/boards/nordic/nrf51dongle/nrf51dongle_nrf51822.dts +++ b/boards/nordic/nrf51dongle/nrf51dongle_nrf51822.dts @@ -25,14 +25,17 @@ leds { compatible = "gpio-leds"; + led0_red: led_0 { gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; label = "Red LED 0"; }; + led0_green: led_1 { gpios = <&gpio0 22 GPIO_ACTIVE_LOW>; label = "Green LED 0"; }; + led0_blue: led_2 { gpios = <&gpio0 23 GPIO_ACTIVE_LOW>; label = "Blue LED 0"; @@ -41,6 +44,7 @@ pwmleds { compatible = "pwm-leds"; + pwm_led0: pwm_led_0 { pwms = <&sw_pwm 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>; }; @@ -83,7 +87,6 @@ }; &flash0 { - partitions { compatible = "fixed-partitions"; #address-cells = <1>; @@ -93,14 +96,17 @@ label = "mcuboot"; reg = <0x00000000 0x8000>; }; + slot0_partition: partition@8000 { label = "image-0"; reg = <0x00008000 0x1b000>; }; + slot1_partition: partition@23000 { label = "image-1"; reg = <0x00023000 0x1b000>; }; + storage_partition: partition@3e000 { label = "storage"; reg = <0x0003e000 0x00002000>; diff --git a/boards/nordic/nrf52833dk/nrf52833dk_nrf52820-pinctrl.dtsi b/boards/nordic/nrf52833dk/nrf52833dk_nrf52820-pinctrl.dtsi index 89e33721507..0a2dd6da3ef 100644 --- a/boards/nordic/nrf52833dk/nrf52833dk_nrf52820-pinctrl.dtsi +++ b/boards/nordic/nrf52833dk/nrf52833dk_nrf52820-pinctrl.dtsi @@ -9,6 +9,7 @@ psels = , ; }; + group2 { psels = , ; @@ -57,5 +58,4 @@ low-power-enable; }; }; - }; diff --git a/boards/nordic/nrf52833dk/nrf52833dk_nrf52820.dts b/boards/nordic/nrf52833dk/nrf52833dk_nrf52820.dts index 0f9526fb21f..ddd49d23246 100644 --- a/boards/nordic/nrf52833dk/nrf52833dk_nrf52820.dts +++ b/boards/nordic/nrf52833dk/nrf52833dk_nrf52820.dts @@ -26,18 +26,22 @@ leds { compatible = "gpio-leds"; + led0: led_0 { gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; label = "Green LED 0"; }; + led1: led_1 { gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; label = "Green LED 1"; }; + led2: led_2 { gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; label = "Green LED 2"; }; + led3: led_3 { gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; label = "Green LED 3"; @@ -46,6 +50,7 @@ pwmleds { compatible = "pwm-leds"; + pwm_led0: pwm_led_0 { pwms = <&sw_pwm 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>; }; @@ -53,21 +58,25 @@ buttons { compatible = "gpio-keys"; + button0: button_0 { gpios = <&gpio0 11 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 0"; zephyr,code = ; }; + button1: button_1 { gpios = <&gpio0 12 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 1"; zephyr,code = ; }; + button2: button_2 { gpios = <&gpio0 24 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 2"; zephyr,code = ; }; + button3: button_3 { gpios = <&gpio0 25 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 3"; @@ -152,7 +161,6 @@ }; &flash0 { - partitions { compatible = "fixed-partitions"; #address-cells = <1>; @@ -162,14 +170,17 @@ label = "mcuboot"; reg = <0x00000000 0xC000>; }; + slot0_partition: partition@C000 { label = "image-0"; reg = <0x0000C000 0x17000>; }; + slot1_partition: partition@23000 { label = "image-1"; reg = <0x00023000 0x17000>; }; + storage_partition: partition@3a000 { label = "storage"; reg = <0x0003a000 0x00006000>; diff --git a/boards/nordic/nrf52833dk/nrf52833dk_nrf52833-pinctrl.dtsi b/boards/nordic/nrf52833dk/nrf52833dk_nrf52833-pinctrl.dtsi index 420027e7073..9f6c5a920eb 100644 --- a/boards/nordic/nrf52833dk/nrf52833dk_nrf52833-pinctrl.dtsi +++ b/boards/nordic/nrf52833dk/nrf52833dk_nrf52833-pinctrl.dtsi @@ -9,6 +9,7 @@ psels = , ; }; + group2 { psels = , ; @@ -31,6 +32,7 @@ psels = ; bias-pull-up; }; + group2 { psels = ; }; @@ -138,5 +140,4 @@ low-power-enable; }; }; - }; diff --git a/boards/nordic/nrf52833dk/nrf52833dk_nrf52833.dts b/boards/nordic/nrf52833dk/nrf52833dk_nrf52833.dts index 386fac62e1d..f32ad7a220a 100644 --- a/boards/nordic/nrf52833dk/nrf52833dk_nrf52833.dts +++ b/boards/nordic/nrf52833dk/nrf52833dk_nrf52833.dts @@ -27,18 +27,22 @@ leds { compatible = "gpio-leds"; + led0: led_0 { gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; label = "Green LED 0"; }; + led1: led_1 { gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; label = "Green LED 1"; }; + led2: led_2 { gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; label = "Green LED 2"; }; + led3: led_3 { gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; label = "Green LED 3"; @@ -47,6 +51,7 @@ pwmleds { compatible = "pwm-leds"; + pwm_led0: pwm_led_0 { pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>; }; @@ -54,21 +59,25 @@ buttons { compatible = "gpio-keys"; + button0: button_0 { gpios = <&gpio0 11 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 0"; zephyr,code = ; }; + button1: button_1 { gpios = <&gpio0 12 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 1"; zephyr,code = ; }; + button2: button_2 { gpios = <&gpio0 24 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 2"; zephyr,code = ; }; + button3: button_3 { gpios = <&gpio0 25 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 3"; @@ -221,7 +230,6 @@ arduino_spi: &spi3 { }; &flash0 { - partitions { compatible = "fixed-partitions"; #address-cells = <1>; @@ -231,14 +239,17 @@ arduino_spi: &spi3 { label = "mcuboot"; reg = <0x00000000 0xC000>; }; + slot0_partition: partition@c000 { label = "image-0"; reg = <0x0000C000 0x37000>; }; + slot1_partition: partition@43000 { label = "image-1"; reg = <0x00043000 0x37000>; }; + storage_partition: partition@7a000 { label = "storage"; reg = <0x0007A000 0x00006000>; diff --git a/boards/nordic/nrf52840dk/nrf52840dk_nrf52811-pinctrl.dtsi b/boards/nordic/nrf52840dk/nrf52840dk_nrf52811-pinctrl.dtsi index 2b0ab3e75d3..c3706043f4f 100644 --- a/boards/nordic/nrf52840dk/nrf52840dk_nrf52811-pinctrl.dtsi +++ b/boards/nordic/nrf52840dk/nrf52840dk_nrf52811-pinctrl.dtsi @@ -9,6 +9,7 @@ psels = , ; }; + group2 { psels = , ; @@ -88,5 +89,4 @@ low-power-enable; }; }; - }; diff --git a/boards/nordic/nrf52840dk/nrf52840dk_nrf52811.dts b/boards/nordic/nrf52840dk/nrf52840dk_nrf52811.dts index b6631dea9cf..3a2b5ed87bc 100644 --- a/boards/nordic/nrf52840dk/nrf52840dk_nrf52811.dts +++ b/boards/nordic/nrf52840dk/nrf52840dk_nrf52811.dts @@ -26,18 +26,22 @@ leds { compatible = "gpio-leds"; + led0: led_0 { gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; label = "Green LED 0"; }; + led1: led_1 { gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; label = "Green LED 1"; }; + led2: led_2 { gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; label = "Green LED 2"; }; + led3: led_3 { gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; label = "Green LED 3"; @@ -46,6 +50,7 @@ pwmleds { compatible = "pwm-leds"; + pwm_led0: pwm_led_0 { pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>; }; @@ -53,21 +58,25 @@ buttons { compatible = "gpio-keys"; + button0: button_0 { gpios = <&gpio0 11 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 0"; zephyr,code = ; }; + button1: button_1 { gpios = <&gpio0 12 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 1"; zephyr,code = ; }; + button2: button_2 { gpios = <&gpio0 24 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 2"; zephyr,code = ; }; + button3: button_3 { gpios = <&gpio0 25 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 3"; @@ -155,7 +164,6 @@ }; &flash0 { - partitions { compatible = "fixed-partitions"; #address-cells = <1>; @@ -165,14 +173,17 @@ label = "mcuboot"; reg = <0x00000000 0xc000>; }; + slot0_partition: partition@c000 { label = "image-0"; reg = <0x0000C000 0xe000>; }; + slot1_partition: partition@1a000 { label = "image-1"; reg = <0x0001a000 0xe000>; }; + storage_partition: partition@28000 { label = "storage"; reg = <0x00028000 0x00008000>; diff --git a/boards/nordic/nrf52840dk/nrf52840dk_nrf52840-pinctrl.dtsi b/boards/nordic/nrf52840dk/nrf52840dk_nrf52840-pinctrl.dtsi index 779d0d518a8..5b868c84f18 100644 --- a/boards/nordic/nrf52840dk/nrf52840dk_nrf52840-pinctrl.dtsi +++ b/boards/nordic/nrf52840dk/nrf52840dk_nrf52840-pinctrl.dtsi @@ -9,6 +9,7 @@ psels = , ; }; + group2 { psels = , ; @@ -31,6 +32,7 @@ psels = ; bias-pull-up; }; + group2 { psels = ; }; @@ -160,6 +162,7 @@ ; low-power-enable; }; + group2 { psels = ; low-power-enable; @@ -183,5 +186,4 @@ low-power-enable; }; }; - }; diff --git a/boards/nordic/nrf52840dk/nrf52840dk_nrf52840.dts b/boards/nordic/nrf52840dk/nrf52840dk_nrf52840.dts index f19cd48bb40..cda7bb6164d 100644 --- a/boards/nordic/nrf52840dk/nrf52840dk_nrf52840.dts +++ b/boards/nordic/nrf52840dk/nrf52840dk_nrf52840.dts @@ -26,18 +26,22 @@ leds { compatible = "gpio-leds"; + led0: led_0 { gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; label = "Green LED 0"; }; + led1: led_1 { gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; label = "Green LED 1"; }; + led2: led_2 { gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; label = "Green LED 2"; }; + led3: led_3 { gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; label = "Green LED 3"; @@ -46,6 +50,7 @@ pwmleds { compatible = "pwm-leds"; + pwm_led0: pwm_led_0 { pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>; }; @@ -53,21 +58,25 @@ buttons { compatible = "gpio-keys"; + button0: button_0 { gpios = <&gpio0 11 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 0"; zephyr,code = ; }; + button1: button_1 { gpios = <&gpio0 12 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 1"; zephyr,code = ; }; + button2: button_2 { gpios = <&gpio0 24 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 2"; zephyr,code = ; }; + button3: button_3 { gpios = <&gpio0 25 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 3"; @@ -243,6 +252,7 @@ arduino_i2c: &i2c0 { pinctrl-0 = <&qspi_default>; pinctrl-1 = <&qspi_sleep>; pinctrl-names = "default", "sleep"; + mx25r64: mx25r6435f@0 { compatible = "nordic,qspi-nor"; reg = <0>; diff --git a/boards/nordic/nrf52840dongle/fstab-debugger.dtsi b/boards/nordic/nrf52840dongle/fstab-debugger.dtsi index 9fbbe7cd91b..dd3d12403c6 100644 --- a/boards/nordic/nrf52840dongle/fstab-debugger.dtsi +++ b/boards/nordic/nrf52840dongle/fstab-debugger.dtsi @@ -24,10 +24,12 @@ label = "image-0"; reg = <0x00012000 0x00075000>; }; + slot1_partition: partition@87000 { label = "image-1"; reg = <0x00087000 0x00075000>; }; + storage_partition: partition@fc000 { label = "storage"; reg = <0x000fc000 0x00004000>; diff --git a/boards/nordic/nrf52840dongle/fstab-stock.dtsi b/boards/nordic/nrf52840dongle/fstab-stock.dtsi index 26863679f60..b487f02c153 100644 --- a/boards/nordic/nrf52840dongle/fstab-stock.dtsi +++ b/boards/nordic/nrf52840dongle/fstab-stock.dtsi @@ -26,10 +26,12 @@ label = "image-0"; reg = <0x00010000 0x00066000>; }; + slot1_partition: partition@76000 { label = "image-1"; reg = <0x00076000 0x00066000>; }; + storage_partition: partition@dc000 { label = "storage"; reg = <0x000dc000 0x00004000>; diff --git a/boards/nordic/nrf52840dongle/nrf52840dongle_nrf52840-pinctrl.dtsi b/boards/nordic/nrf52840dongle/nrf52840dongle_nrf52840-pinctrl.dtsi index ad2ce3463b4..cf2b8523b8e 100644 --- a/boards/nordic/nrf52840dongle/nrf52840dongle_nrf52840-pinctrl.dtsi +++ b/boards/nordic/nrf52840dongle/nrf52840dongle_nrf52840-pinctrl.dtsi @@ -9,6 +9,7 @@ psels = , ; }; + group2 { psels = , ; @@ -107,5 +108,4 @@ low-power-enable; }; }; - }; diff --git a/boards/nordic/nrf52840dongle/nrf52840dongle_nrf52840.dts b/boards/nordic/nrf52840dongle/nrf52840dongle_nrf52840.dts index 1f1de703ade..890570b7eee 100644 --- a/boards/nordic/nrf52840dongle/nrf52840dongle_nrf52840.dts +++ b/boards/nordic/nrf52840dongle/nrf52840dongle_nrf52840.dts @@ -23,18 +23,22 @@ leds { compatible = "gpio-leds"; + led0_green: led_0 { gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; label = "Green LED 0"; }; + led1_red: led_1 { gpios = <&gpio0 8 GPIO_ACTIVE_LOW>; label = "Red LED 1"; }; + led1_green: led_2 { gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; label = "Green LED 1"; }; + led1_blue: led_3 { gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; label = "Blue LED 1"; @@ -43,12 +47,15 @@ pwmleds { compatible = "pwm-leds"; + red_pwm_led: pwm_led_0 { pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>; }; + green_pwm_led: pwm_led_1 { pwms = <&pwm0 1 PWM_MSEC(20) PWM_POLARITY_INVERTED>; }; + blue_pwm_led: pwm_led_2 { pwms = <&pwm0 2 PWM_MSEC(20) PWM_POLARITY_INVERTED>; }; @@ -56,6 +63,7 @@ buttons { compatible = "gpio-keys"; + button0: button_0 { gpios = <&gpio1 6 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 0"; @@ -71,9 +79,9 @@ led2 = &led1_green; led3 = &led1_blue; led0-green = &led0_green; - led1-red = &led1_red; + led1-red = &led1_red; led1-green = &led1_green; - led1-blue = &led1_blue; + led1-blue = &led1_blue; pwm-led0 = &red_pwm_led; pwm-led1 = &green_pwm_led; pwm-led2 = &blue_pwm_led; diff --git a/boards/nordic/nrf52dk/nrf52dk_nrf52805-pinctrl.dtsi b/boards/nordic/nrf52dk/nrf52dk_nrf52805-pinctrl.dtsi index 4ec1fa80a8c..00d60d2cbec 100644 --- a/boards/nordic/nrf52dk/nrf52dk_nrf52805-pinctrl.dtsi +++ b/boards/nordic/nrf52dk/nrf52dk_nrf52805-pinctrl.dtsi @@ -54,5 +54,4 @@ low-power-enable; }; }; - }; diff --git a/boards/nordic/nrf52dk/nrf52dk_nrf52805.dts b/boards/nordic/nrf52dk/nrf52dk_nrf52805.dts index fd84761fe1b..037c0c46e1c 100644 --- a/boards/nordic/nrf52dk/nrf52dk_nrf52805.dts +++ b/boards/nordic/nrf52dk/nrf52dk_nrf52805.dts @@ -26,18 +26,22 @@ leds { compatible = "gpio-leds"; + led0: led_0 { gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; label = "Green LED 0"; }; + led1: led_1 { gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; label = "Green LED 1"; }; + led2: led_2 { gpios = <&gpio0 19 GPIO_ACTIVE_LOW>; label = "Green LED 2"; }; + led3: led_3 { gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; label = "Green LED 3"; @@ -46,21 +50,25 @@ buttons { compatible = "gpio-keys"; + button0: button_0 { label = "Push button switch 0"; gpios = <&gpio0 13 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; zephyr,code = ; }; + button1: button_1 { label = "Push button switch 1"; gpios = <&gpio0 14 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; zephyr,code = ; }; + button2: button_2 { label = "Push button switch 2"; gpios = <&gpio0 15 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; zephyr,code = ; }; + button3: button_3 { label = "Push button switch 3"; gpios = <&gpio0 16 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; @@ -140,14 +148,17 @@ label = "mcuboot"; reg = <0x00000000 0xc000>; }; + slot0_partition: partition@c000 { label = "image-0"; reg = <0x0000C000 0xe000>; }; + slot1_partition: partition@1a000 { label = "image-1"; reg = <0x0001a000 0xe000>; }; + storage_partition: partition@28000 { label = "storage"; reg = <0x00028000 0x00008000>; diff --git a/boards/nordic/nrf52dk/nrf52dk_nrf52810-pinctrl.dtsi b/boards/nordic/nrf52dk/nrf52dk_nrf52810-pinctrl.dtsi index 78f1f279ede..bec21acc20f 100644 --- a/boards/nordic/nrf52dk/nrf52dk_nrf52810-pinctrl.dtsi +++ b/boards/nordic/nrf52dk/nrf52dk_nrf52810-pinctrl.dtsi @@ -54,5 +54,4 @@ low-power-enable; }; }; - }; diff --git a/boards/nordic/nrf52dk/nrf52dk_nrf52810.dts b/boards/nordic/nrf52dk/nrf52dk_nrf52810.dts index 2bfcad26247..1e9901d60bb 100644 --- a/boards/nordic/nrf52dk/nrf52dk_nrf52810.dts +++ b/boards/nordic/nrf52dk/nrf52dk_nrf52810.dts @@ -28,18 +28,22 @@ leds { compatible = "gpio-leds"; + led0: led_0 { gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; label = "Green LED 0"; }; + led1: led_1 { gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; label = "Green LED 1"; }; + led2: led_2 { gpios = <&gpio0 19 GPIO_ACTIVE_LOW>; label = "Green LED 2"; }; + led3: led_3 { gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; label = "Green LED 3"; @@ -48,21 +52,25 @@ buttons { compatible = "gpio-keys"; + button0: button_0 { label = "Push button switch 0"; gpios = <&gpio0 13 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; zephyr,code = ; }; + button1: button_1 { label = "Push button switch 1"; gpios = <&gpio0 14 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; zephyr,code = ; }; + button2: button_2 { label = "Push button switch 2"; gpios = <&gpio0 15 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; zephyr,code = ; }; + button3: button_3 { label = "Push button switch 3"; gpios = <&gpio0 16 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; @@ -133,7 +141,6 @@ }; &flash0 { - partitions { compatible = "fixed-partitions"; #address-cells = <1>; @@ -143,14 +150,17 @@ label = "mcuboot"; reg = <0x00000000 0xc000>; }; + slot0_partition: partition@c000 { label = "image-0"; reg = <0x0000C000 0xe000>; }; + slot1_partition: partition@1a000 { label = "image-1"; reg = <0x0001a000 0xe000>; }; + storage_partition: partition@28000 { label = "storage"; reg = <0x00028000 0x00008000>; diff --git a/boards/nordic/nrf52dk/nrf52dk_nrf52832-pinctrl.dtsi b/boards/nordic/nrf52dk/nrf52dk_nrf52832-pinctrl.dtsi index c859969e551..45b5ccb4e04 100644 --- a/boards/nordic/nrf52dk/nrf52dk_nrf52832-pinctrl.dtsi +++ b/boards/nordic/nrf52dk/nrf52dk_nrf52832-pinctrl.dtsi @@ -117,5 +117,4 @@ low-power-enable; }; }; - }; diff --git a/boards/nordic/nrf52dk/nrf52dk_nrf52832.dts b/boards/nordic/nrf52dk/nrf52dk_nrf52832.dts index d132db9f423..7d1a09eb357 100644 --- a/boards/nordic/nrf52dk/nrf52dk_nrf52832.dts +++ b/boards/nordic/nrf52dk/nrf52dk_nrf52832.dts @@ -27,18 +27,22 @@ leds { compatible = "gpio-leds"; + led0: led_0 { gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; label = "Green LED 0"; }; + led1: led_1 { gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; label = "Green LED 1"; }; + led2: led_2 { gpios = <&gpio0 19 GPIO_ACTIVE_LOW>; label = "Green LED 2"; }; + led3: led_3 { gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; label = "Green LED 3"; @@ -47,6 +51,7 @@ pwmleds { compatible = "pwm-leds"; + pwm_led0: pwm_led_0 { pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>; }; @@ -54,21 +59,25 @@ buttons { compatible = "gpio-keys"; + button0: button_0 { gpios = <&gpio0 13 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 0"; zephyr,code = ; }; + button1: button_1 { gpios = <&gpio0 14 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 1"; zephyr,code = ; }; + button2: button_2 { gpios = <&gpio0 15 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 2"; zephyr,code = ; }; + button3: button_3 { gpios = <&gpio0 16 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 3"; @@ -218,7 +227,6 @@ arduino_spi: &spi2 { }; &flash0 { - partitions { compatible = "fixed-partitions"; #address-cells = <1>; @@ -228,14 +236,17 @@ arduino_spi: &spi2 { label = "mcuboot"; reg = <0x00000000 0xc000>; }; + slot0_partition: partition@c000 { label = "image-0"; reg = <0x0000C000 0x37000>; }; + slot1_partition: partition@43000 { label = "image-1"; reg = <0x00043000 0x37000>; }; + storage_partition: partition@7a000 { label = "storage"; reg = <0x0007a000 0x00006000>; diff --git a/boards/nordic/nrf5340_audio_dk/nrf5340_audio_dk_nrf5340_cpuapp_common-pinctrl.dtsi b/boards/nordic/nrf5340_audio_dk/nrf5340_audio_dk_nrf5340_cpuapp_common-pinctrl.dtsi index 5247c04429b..6f835be43c6 100644 --- a/boards/nordic/nrf5340_audio_dk/nrf5340_audio_dk_nrf5340_cpuapp_common-pinctrl.dtsi +++ b/boards/nordic/nrf5340_audio_dk/nrf5340_audio_dk_nrf5340_cpuapp_common-pinctrl.dtsi @@ -10,6 +10,7 @@ psels = ; nordic,drive-mode = ; }; + group2 { psels = , , @@ -34,6 +35,7 @@ psels = , ; }; + group2 { psels = , ; @@ -56,6 +58,7 @@ psels = , ; }; + group2 { psels = , ; @@ -114,6 +117,7 @@ */ nordic,drive-mode = ; }; + group2 { psels = ; }; diff --git a/boards/nordic/nrf5340_audio_dk/nrf5340_audio_dk_nrf5340_cpuapp_common.dtsi b/boards/nordic/nrf5340_audio_dk/nrf5340_audio_dk_nrf5340_cpuapp_common.dtsi index 78a5020f31e..a607e2e797a 100644 --- a/boards/nordic/nrf5340_audio_dk/nrf5340_audio_dk_nrf5340_cpuapp_common.dtsi +++ b/boards/nordic/nrf5340_audio_dk/nrf5340_audio_dk_nrf5340_cpuapp_common.dtsi @@ -20,6 +20,7 @@ gpio_fwd: nrf-gpio-forwarder { compatible = "nordic,nrf-gpio-forwarder"; status = "okay"; + uart { gpios = <&gpio1 9 0>, <&gpio1 8 0>, <&gpio1 11 0>, <&gpio1 10 0>; }; @@ -51,12 +52,15 @@ pwmleds { compatible = "pwm-leds"; + rgb1_red_pwm_led: pwm_led_0 { pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>; }; + rgb1_green_pwm_led: pwm_led_1 { pwms = <&pwm0 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>; }; + rgb1_blue_pwm_led: pwm_led_2 { pwms = <&pwm0 2 PWM_MSEC(20) PWM_POLARITY_NORMAL>; }; @@ -212,17 +216,18 @@ arduino_spi: &spi4 { pinctrl-0 = <&spi4_default>; pinctrl-1 = <&spi4_sleep>; pinctrl-names = "default", "sleep"; + sdhc0: sdhc@1 { compatible = "zephyr,sdhc-spi-slot"; reg = <1>; status = "okay"; + spi-max-frequency = <8000000>; + sdmmc { compatible = "zephyr,sdmmc-disk"; disk-name = "SD"; status = "okay"; }; - - spi-max-frequency = <8000000>; }; cs47l63: cs47l63@2 { diff --git a/boards/nordic/nrf5340_audio_dk/nrf5340_audio_dk_nrf5340_cpunet-pinctrl.dtsi b/boards/nordic/nrf5340_audio_dk/nrf5340_audio_dk_nrf5340_cpunet-pinctrl.dtsi index 6804c040d12..86978843757 100644 --- a/boards/nordic/nrf5340_audio_dk/nrf5340_audio_dk_nrf5340_cpunet-pinctrl.dtsi +++ b/boards/nordic/nrf5340_audio_dk/nrf5340_audio_dk_nrf5340_cpunet-pinctrl.dtsi @@ -9,6 +9,7 @@ psels = , ; }; + group2 { psels = , ; @@ -42,5 +43,4 @@ low-power-enable; }; }; - }; diff --git a/boards/nordic/nrf5340_audio_dk/nrf5340_audio_dk_nrf5340_cpunet.dts b/boards/nordic/nrf5340_audio_dk/nrf5340_audio_dk_nrf5340_cpunet.dts index c50a51d3bc5..05ad7489ef4 100644 --- a/boards/nordic/nrf5340_audio_dk/nrf5340_audio_dk_nrf5340_cpunet.dts +++ b/boards/nordic/nrf5340_audio_dk/nrf5340_audio_dk_nrf5340_cpunet.dts @@ -58,7 +58,6 @@ arduino_spi: &spi0 { }; &flash1 { - partitions { compatible = "fixed-partitions"; #address-cells = <1>; @@ -68,14 +67,17 @@ arduino_spi: &spi0 { label = "mcuboot"; reg = <0x00000000 0xc000>; }; + slot0_partition: partition@c000 { label = "image-0"; reg = <0x0000C000 0x12000>; }; + slot1_partition: partition@1e000 { label = "image-1"; reg = <0x0001E000 0x12000>; }; + storage_partition: partition@3a000 { label = "storage"; reg = <0x0003a000 0x6000>; diff --git a/boards/nordic/nrf5340_audio_dk/nrf5340_audio_dk_nrf5340_shared.dtsi b/boards/nordic/nrf5340_audio_dk/nrf5340_audio_dk_nrf5340_shared.dtsi index 5d13b9288a6..aff29f4e9d3 100644 --- a/boards/nordic/nrf5340_audio_dk/nrf5340_audio_dk_nrf5340_shared.dtsi +++ b/boards/nordic/nrf5340_audio_dk/nrf5340_audio_dk_nrf5340_shared.dtsi @@ -1,40 +1,49 @@ #include / { - leds: leds { + leds: leds { compatible = "gpio-leds"; + rgb1_red: led_0 { gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; label = "0 LED_RGB_RED"; }; + rgb1_green: led_1 { gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>; label = "0 LED_RGB_GREEN"; }; + rgb1_blue: led_2 { gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>; label = "0 LED_RGB_BLUE"; }; + rgb2_red: led_3 { gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>; label = "1 LED_RGB_RED"; }; + rgb2_green: led_4 { gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>; label = "1 LED_RGB_GREEN"; }; + rgb2_blue: led_5 { gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>; label = "1 LED_RGB_BLUE"; }; + led1_blue: led_6 { gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>; label = "2 LED_MONO_BLUE"; }; + led2_green: led_7 { gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; label = "3 LED_MONO_GREEN"; }; + led3_green: led_8 { gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; label = "4 LED_MONO_GREEN"; @@ -43,26 +52,31 @@ buttons { compatible = "gpio-keys"; + button_1_vol_dn: button_1_vol_dn { gpios = <&gpio0 2 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 1"; zephyr,code = ; }; + button_2_vol_up: button_2_vol_up { gpios = <&gpio0 3 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 2"; zephyr,code = ; }; + button3: button_3 { gpios = <&gpio0 4 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 3"; zephyr,code = ; }; + button4: button_4 { gpios = <&gpio0 6 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 4"; zephyr,code = ; }; + button5: button_5 { gpios = <&gpio0 5 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 5"; diff --git a/boards/nordic/nrf5340dk/nrf5340_cpuapp_common-pinctrl.dtsi b/boards/nordic/nrf5340dk/nrf5340_cpuapp_common-pinctrl.dtsi index f93e3a69402..10db7ee52e2 100644 --- a/boards/nordic/nrf5340dk/nrf5340_cpuapp_common-pinctrl.dtsi +++ b/boards/nordic/nrf5340dk/nrf5340_cpuapp_common-pinctrl.dtsi @@ -24,6 +24,7 @@ psels = , ; }; + group2 { psels = , ; @@ -75,6 +76,7 @@ ; low-power-enable; }; + group2 { psels = ; low-power-enable; @@ -87,6 +89,7 @@ psels = , ; }; + group2 { psels = , ; @@ -120,5 +123,4 @@ low-power-enable; }; }; - }; diff --git a/boards/nordic/nrf5340dk/nrf5340_cpuapp_common.dtsi b/boards/nordic/nrf5340dk/nrf5340_cpuapp_common.dtsi index 153e8e83458..6d26411b19e 100644 --- a/boards/nordic/nrf5340dk/nrf5340_cpuapp_common.dtsi +++ b/boards/nordic/nrf5340dk/nrf5340_cpuapp_common.dtsi @@ -22,6 +22,7 @@ pwmleds { compatible = "pwm-leds"; + pwm_led0: pwm_led_0 { pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>; }; @@ -41,6 +42,7 @@ gpio_fwd: nrf-gpio-forwarder { compatible = "nordic,nrf-gpio-forwarder"; status = "okay"; + uart { gpios = <&gpio1 1 0>, <&gpio1 0 0>, <&gpio0 11 0>, <&gpio0 10 0>; }; @@ -118,6 +120,7 @@ pinctrl-0 = <&qspi_default>; pinctrl-1 = <&qspi_sleep>; pinctrl-names = "default", "sleep"; + mx25r64: mx25r6435f@0 { compatible = "nordic,qspi-nor"; reg = <0>; diff --git a/boards/nordic/nrf5340dk/nrf5340dk_common.dtsi b/boards/nordic/nrf5340dk/nrf5340dk_common.dtsi index f5bbbaa03cd..8c447727d89 100644 --- a/boards/nordic/nrf5340dk/nrf5340dk_common.dtsi +++ b/boards/nordic/nrf5340dk/nrf5340dk_common.dtsi @@ -7,18 +7,22 @@ / { leds { compatible = "gpio-leds"; + led0: led_0 { gpios = <&gpio0 28 GPIO_ACTIVE_LOW>; label = "Green LED 0"; }; + led1: led_1 { gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; label = "Green LED 1"; }; + led2: led_2 { gpios = <&gpio0 30 GPIO_ACTIVE_LOW>; label = "Green LED 2"; }; + led3: led_3 { gpios = <&gpio0 31 GPIO_ACTIVE_LOW>; label = "Green LED 3"; @@ -27,21 +31,25 @@ buttons { compatible = "gpio-keys"; + button0: button_0 { gpios = <&gpio0 23 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 1"; zephyr,code = ; }; + button1: button_1 { gpios = <&gpio0 24 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 2"; zephyr,code = ; }; + button2: button_2 { gpios = <&gpio0 8 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 3"; zephyr,code = ; }; + button3: button_3 { gpios = <&gpio0 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 4"; diff --git a/boards/nordic/nrf5340dk/nrf5340dk_nrf5340_cpunet-pinctrl.dtsi b/boards/nordic/nrf5340dk/nrf5340dk_nrf5340_cpunet-pinctrl.dtsi index 210eb1de211..30f638a7eae 100644 --- a/boards/nordic/nrf5340dk/nrf5340dk_nrf5340_cpunet-pinctrl.dtsi +++ b/boards/nordic/nrf5340dk/nrf5340dk_nrf5340_cpunet-pinctrl.dtsi @@ -9,6 +9,7 @@ psels = , ; }; + group2 { psels = , ; @@ -57,5 +58,4 @@ low-power-enable; }; }; - }; diff --git a/boards/nordic/nrf5340dk/nrf5340dk_nrf5340_cpunet.dts b/boards/nordic/nrf5340dk/nrf5340dk_nrf5340_cpunet.dts index 7bc0cd9a4ba..e9cac8b1b09 100644 --- a/boards/nordic/nrf5340dk/nrf5340dk_nrf5340_cpunet.dts +++ b/boards/nordic/nrf5340dk/nrf5340dk_nrf5340_cpunet.dts @@ -76,7 +76,6 @@ arduino_spi: &spi0 { }; &flash1 { - partitions { compatible = "fixed-partitions"; #address-cells = <1>; @@ -86,14 +85,17 @@ arduino_spi: &spi0 { label = "mcuboot"; reg = <0x00000000 0xc000>; }; + slot0_partition: partition@c000 { label = "image-0"; reg = <0x0000C000 0x17000>; }; + slot1_partition: partition@23000 { label = "image-1"; reg = <0x00023000 0x17000>; }; + storage_partition: partition@3a000 { label = "storage"; reg = <0x0003a000 0x6000>; diff --git a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpurad.dts b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpurad.dts index 383512caaf3..55c5284001b 100644 --- a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpurad.dts +++ b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpurad.dts @@ -28,6 +28,7 @@ zephyr,bt-hci-ipc = &ipc0; nordic,802154-spinel-ipc = &ipc0; }; + aliases { ipc-to-cpusys = &cpurad_cpusys_ipc; resetinfo = &cpurad_resetinfo; diff --git a/boards/nordic/nrf54l09pdk/nrf54l09_cpuapp_common.dtsi b/boards/nordic/nrf54l09pdk/nrf54l09_cpuapp_common.dtsi index 0bdab1b8851..7d0c880c2de 100644 --- a/boards/nordic/nrf54l09pdk/nrf54l09_cpuapp_common.dtsi +++ b/boards/nordic/nrf54l09pdk/nrf54l09_cpuapp_common.dtsi @@ -54,26 +54,32 @@ compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; + boot_partition: partition@0 { label = "mcuboot"; reg = <0x0 DT_SIZE_K(64)>; }; + slot0_partition: partition@10000 { label = "image-0"; reg = <0x10000 DT_SIZE_K(212)>; }; + slot0_ns_partition: partition@45000 { label = "image-0-nonsecure"; reg = <0x45000 DT_SIZE_K(212)>; }; + slot1_partition: partition@7a000 { label = "image-1"; reg = <0x7a000 DT_SIZE_K(212)>; }; + slot1_ns_partition: partition@af000 { label = "image-1-nonsecure"; reg = <0xaf000 DT_SIZE_K(212)>; }; + storage_partition: partition@e4000 { label = "storage"; reg = <0xe4000 DT_SIZE_K(36)>; diff --git a/boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09-common.dtsi b/boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09-common.dtsi index f1e9ee9afd8..9dfe9412d9b 100644 --- a/boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09-common.dtsi +++ b/boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09-common.dtsi @@ -9,10 +9,12 @@ / { leds { compatible = "gpio-leds"; + led0: led_0 { gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; label = "Green LED 1"; }; + led1: led_1 { gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>; label = "Green LED 2"; @@ -21,21 +23,25 @@ buttons { compatible = "gpio-keys"; + button0: button_0 { gpios = <&gpio1 13 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 0"; zephyr,code = ; }; + button1: button_1 { gpios = <&gpio1 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 1"; zephyr,code = ; }; + button2: button_2 { gpios = <&gpio1 8 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 2"; zephyr,code = ; }; + button3: button_3 { gpios = <&gpio0 4 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 3"; diff --git a/boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09-pinctrl.dtsi b/boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09-pinctrl.dtsi index ac08b201f93..a87ae590f23 100644 --- a/boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09-pinctrl.dtsi +++ b/boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09-pinctrl.dtsi @@ -8,6 +8,7 @@ group1 { psels = ; }; + group2 { psels = ; bias-pull-up; diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_common.dtsi b/boards/nordic/nrf54l15dk/nrf54l15dk_common.dtsi index 6a40af0ee95..c030c2c5518 100644 --- a/boards/nordic/nrf54l15dk/nrf54l15dk_common.dtsi +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_common.dtsi @@ -9,18 +9,22 @@ / { leds { compatible = "gpio-leds"; + led0: led_0 { gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>; label = "Green LED 0"; }; + led1: led_1 { gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; label = "Green LED 1"; }; + led2: led_2 { gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>; label = "Green LED 2"; }; + led3: led_3 { gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; label = "Green LED 3"; @@ -29,6 +33,7 @@ pwmleds { compatible = "pwm-leds"; + /* * PWM signal can be exposed on GPIO pin only within same domain. * There is only one domain which contains both PWM and GPIO: @@ -42,21 +47,25 @@ buttons { compatible = "gpio-keys"; + button0: button_0 { gpios = <&gpio1 13 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 0"; zephyr,code = ; }; + button1: button_1 { gpios = <&gpio1 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 1"; zephyr,code = ; }; + button2: button_2 { gpios = <&gpio1 8 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 2"; zephyr,code = ; }; + button3: button_3 { gpios = <&gpio0 4 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 3"; diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp.dts b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp.dts index e2215ce1294..23ae87ccb11 100644 --- a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp.dts +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp.dts @@ -35,26 +35,32 @@ compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; + boot_partition: partition@0 { label = "mcuboot"; reg = <0x0 DT_SIZE_K(64)>; }; + slot0_partition: partition@10000 { label = "image-0"; reg = <0x10000 DT_SIZE_K(100)>; }; + slot0_ns_partition: partition@29000 { label = "image-0-nonsecure"; reg = <0x29000 DT_SIZE_K(100)>; }; + slot1_partition: partition@42000 { label = "image-1"; reg = <0x42000 DT_SIZE_K(100)>; }; + slot1_ns_partition: partition@5b000 { label = "image-1-nonsecure"; reg = <0x5b000 DT_SIZE_K(100)>; }; + storage_partition: partition@74000 { label = "storage"; reg = <0x74000 DT_SIZE_K(36)>; diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuapp.dts b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuapp.dts index 79b16bd4125..b2d96daa192 100644 --- a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuapp.dts +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuapp.dts @@ -24,27 +24,34 @@ compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; + boot_partition: partition@0 { label = "mcuboot"; reg = <0x0 DT_SIZE_K(64)>; }; + slot0_partition: partition@10000 { label = "image-0"; reg = <0x10000 DT_SIZE_K(324)>; }; + slot0_ns_partition: partition@61000 { label = "image-0-nonsecure"; reg = <0x61000 DT_SIZE_K(324)>; }; + slot1_partition: partition@b2000 { label = "image-1"; reg = <0xb2000 DT_SIZE_K(324)>; }; + slot1_ns_partition: partition@103000 { label = "image-1-nonsecure"; reg = <0x103000 DT_SIZE_K(324)>; }; + /* 32k from 0x154000 to 0x15bfff reserved for TF-M partitions */ + storage_partition: partition@15c000 { label = "storage"; reg = <0x15c000 DT_SIZE_K(36)>; diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l_05_10_15-pinctrl.dtsi b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l_05_10_15-pinctrl.dtsi index 6b7457a2818..7beece98e62 100644 --- a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l_05_10_15-pinctrl.dtsi +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l_05_10_15-pinctrl.dtsi @@ -9,6 +9,7 @@ psels = , ; }; + group2 { psels = , ; @@ -31,6 +32,7 @@ psels = , ; }; + group2 { psels = , ; diff --git a/boards/nordic/nrf54l20pdk/nrf54l20_cpuapp_common.dtsi b/boards/nordic/nrf54l20pdk/nrf54l20_cpuapp_common.dtsi index d3a2a731120..614ffbca4de 100644 --- a/boards/nordic/nrf54l20pdk/nrf54l20_cpuapp_common.dtsi +++ b/boards/nordic/nrf54l20pdk/nrf54l20_cpuapp_common.dtsi @@ -49,26 +49,32 @@ compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; + boot_partition: partition@0 { label = "mcuboot"; reg = <0x0 DT_SIZE_K(64)>; }; + slot0_partition: partition@10000 { label = "image-0"; reg = <0x10000 DT_SIZE_K(449)>; }; + slot0_ns_partition: partition@80400 { label = "image-0-nonsecure"; reg = <0x80400 DT_SIZE_K(449)>; }; + slot1_partition: partition@f0800 { label = "image-1"; reg = <0xf0800 DT_SIZE_K(449)>; }; + slot1_ns_partition: partition@160c00 { label = "image-1-nonsecure"; reg = <0x160c00 DT_SIZE_K(449)>; }; + storage_partition: partition@1d1000 { label = "storage"; reg = <0x1d1000 DT_SIZE_K(36)>; diff --git a/boards/nordic/nrf54l20pdk/nrf54l20pdk_nrf54l20-common.dtsi b/boards/nordic/nrf54l20pdk/nrf54l20pdk_nrf54l20-common.dtsi index 6eb67fe1bb3..7a10c8d07ac 100644 --- a/boards/nordic/nrf54l20pdk/nrf54l20pdk_nrf54l20-common.dtsi +++ b/boards/nordic/nrf54l20pdk/nrf54l20pdk_nrf54l20-common.dtsi @@ -9,18 +9,22 @@ / { leds { compatible = "gpio-leds"; + led0: led_0 { gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>; label = "Green LED 0"; }; + led1: led_1 { gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; label = "Green LED 1"; }; + led2: led_2 { gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>; label = "Green LED 2"; }; + led3: led_3 { gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; label = "Green LED 3"; @@ -29,6 +33,7 @@ pwmleds { compatible = "pwm-leds"; + /* * PWM signal can be exposed on GPIO pin only within same domain. * There is only one domain which contains both PWM and GPIO: @@ -42,21 +47,25 @@ buttons { compatible = "gpio-keys"; + button0: button_0 { gpios = <&gpio1 13 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 0"; zephyr,code = ; }; + button1: button_1 { gpios = <&gpio1 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 1"; zephyr,code = ; }; + button2: button_2 { gpios = <&gpio1 8 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 2"; zephyr,code = ; }; + button3: button_3 { gpios = <&gpio0 4 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 3"; diff --git a/boards/nordic/nrf54l20pdk/nrf54l20pdk_nrf54l20-pinctrl.dtsi b/boards/nordic/nrf54l20pdk/nrf54l20pdk_nrf54l20-pinctrl.dtsi index b70be2bfa5e..51ea27781c9 100644 --- a/boards/nordic/nrf54l20pdk/nrf54l20pdk_nrf54l20-pinctrl.dtsi +++ b/boards/nordic/nrf54l20pdk/nrf54l20pdk_nrf54l20-pinctrl.dtsi @@ -8,6 +8,7 @@ group1 { psels = ; }; + group2 { psels = ; bias-pull-up; diff --git a/boards/nordic/nrf7002dk/nrf5340_cpuapp_common.dtsi b/boards/nordic/nrf7002dk/nrf5340_cpuapp_common.dtsi index 7056652e573..026d64a4016 100644 --- a/boards/nordic/nrf7002dk/nrf5340_cpuapp_common.dtsi +++ b/boards/nordic/nrf7002dk/nrf5340_cpuapp_common.dtsi @@ -20,10 +20,12 @@ leds { compatible = "gpio-leds"; + led0: led_0 { gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; label = "Green LED 0"; }; + led1: led_1 { gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; label = "Green LED 1"; @@ -32,6 +34,7 @@ pwmleds { compatible = "pwm-leds"; + pwm_led0: pwm_led_0 { pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>; }; @@ -39,11 +42,13 @@ buttons { compatible = "gpio-keys"; + button0: button_0 { gpios = <&gpio1 8 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 1"; zephyr,code = ; }; + button1: button_1 { gpios = <&gpio1 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 2"; @@ -94,6 +99,7 @@ gpio_fwd: nrf-gpio-forwarder { compatible = "nordic,nrf-gpio-forwarder"; status = "okay"; + uart { gpios = <&gpio1 1 0>, <&gpio1 0 0>, <&gpio1 5 0>, <&gpio1 4 0>; }; @@ -189,6 +195,7 @@ arduino_i2c: &i2c1 { pinctrl-1 = <&spi4_sleep>; pinctrl-names = "default", "sleep"; cs-gpios = <&gpio0 11 GPIO_ACTIVE_LOW>; + mx25r64: mx25r6435f@0 { compatible = "jedec,spi-nor"; reg = <0>; diff --git a/boards/nordic/nrf7002dk/nrf5340_cpuapp_common_pinctrl.dtsi b/boards/nordic/nrf7002dk/nrf5340_cpuapp_common_pinctrl.dtsi index f04075f374d..0243f07df1d 100644 --- a/boards/nordic/nrf7002dk/nrf5340_cpuapp_common_pinctrl.dtsi +++ b/boards/nordic/nrf7002dk/nrf5340_cpuapp_common_pinctrl.dtsi @@ -19,6 +19,7 @@ psels = , ; }; + group2 { psels = , ; @@ -76,6 +77,7 @@ group1 { psels = ; }; + group2 { psels = ; bias-pull-up; diff --git a/boards/nordic/nrf7002dk/nrf7002dk_nrf5340_cpunet.dts b/boards/nordic/nrf7002dk/nrf7002dk_nrf5340_cpunet.dts index faea5ee69e3..929e0440dfa 100644 --- a/boards/nordic/nrf7002dk/nrf7002dk_nrf5340_cpunet.dts +++ b/boards/nordic/nrf7002dk/nrf7002dk_nrf5340_cpunet.dts @@ -28,24 +28,28 @@ }; leds { - compatible = "gpio-leds"; - led0: led_0 { - gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; - label = "Green LED 0"; - }; - led1: led_1 { - gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; - label = "Green LED 1"; - }; + compatible = "gpio-leds"; + + led0: led_0 { + gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; + label = "Green LED 0"; + }; + + led1: led_1 { + gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; + label = "Green LED 1"; + }; }; buttons { compatible = "gpio-keys"; + button0: button_0 { gpios = <&gpio1 8 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 1"; zephyr,code = ; }; + button1: button_1 { gpios = <&gpio1 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 2"; @@ -85,7 +89,6 @@ nrf_radio_coex: coex { status = "okay"; compatible = "nordic,nrf7002-coex"; - req-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>; status0-gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>; grant-gpios = <&gpio0 24 (GPIO_PULL_DOWN | GPIO_ACTIVE_LOW)>; @@ -156,14 +159,17 @@ arduino_spi: &spi0 { label = "mcuboot"; reg = <0x00000000 0xc000>; }; + slot0_partition: partition@c000 { label = "image-0"; reg = <0x0000C000 0x17000>; }; + slot1_partition: partition@23000 { label = "image-1"; reg = <0x00023000 0x17000>; }; + storage_partition: partition@3a000 { label = "storage"; reg = <0x0003a000 0x6000>; diff --git a/boards/nordic/nrf7002dk/nrf7002dk_nrf5340_cpunet_pinctrl.dtsi b/boards/nordic/nrf7002dk/nrf7002dk_nrf5340_cpunet_pinctrl.dtsi index 2e19d95f7f9..0abcb4724d5 100644 --- a/boards/nordic/nrf7002dk/nrf7002dk_nrf5340_cpunet_pinctrl.dtsi +++ b/boards/nordic/nrf7002dk/nrf7002dk_nrf5340_cpunet_pinctrl.dtsi @@ -4,6 +4,7 @@ psels = , ; }; + group2 { psels = , ; diff --git a/boards/nordic/nrf9131ek/nrf9131ek_nrf9131_common-pinctrl.dtsi b/boards/nordic/nrf9131ek/nrf9131ek_nrf9131_common-pinctrl.dtsi index 419e7c8d70c..edb6d869bf6 100644 --- a/boards/nordic/nrf9131ek/nrf9131ek_nrf9131_common-pinctrl.dtsi +++ b/boards/nordic/nrf9131ek/nrf9131ek_nrf9131_common-pinctrl.dtsi @@ -9,6 +9,7 @@ psels = , ; }; + group2 { psels = , ; @@ -31,6 +32,7 @@ psels = , ; }; + group2 { psels = , ; diff --git a/boards/nordic/nrf9131ek/nrf9131ek_nrf9131_common.dtsi b/boards/nordic/nrf9131ek/nrf9131ek_nrf9131_common.dtsi index 0442b1cf527..f0ad4d68ff6 100644 --- a/boards/nordic/nrf9131ek/nrf9131ek_nrf9131_common.dtsi +++ b/boards/nordic/nrf9131ek/nrf9131ek_nrf9131_common.dtsi @@ -18,14 +18,17 @@ leds { compatible = "gpio-leds"; + led0: led_0 { gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>; label = "Red LED 1"; }; + led1: led_1 { gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>; label = "Green LED 2"; }; + led2: led_2 { gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>; label = "Blue LED 3"; @@ -34,12 +37,15 @@ pwmleds { compatible = "pwm-leds"; + pwm_led0: pwm_led_0 { pwms = <&pwm0 0 PWM_MSEC(8) PWM_POLARITY_NORMAL>; }; + pwm_led1: pwm_led_1 { pwms = <&pwm0 1 PWM_MSEC(8) PWM_POLARITY_NORMAL>; }; + pwm_led2: pwm_led_2 { pwms = <&pwm0 2 PWM_MSEC(8) PWM_POLARITY_NORMAL>; }; @@ -47,6 +53,7 @@ buttons { compatible = "gpio-keys"; + button0: button_0 { gpios = <&gpio0 28 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 1"; @@ -120,13 +127,16 @@ thermistor-beta = <3380>; charging-enable; }; + regulators { compatible = "nordic,npm1300-regulator"; + BUCK1 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-boot-on; }; + BUCK2 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; diff --git a/boards/nordic/nrf9151dk/nrf9151dk_nrf9151_common-pinctrl.dtsi b/boards/nordic/nrf9151dk/nrf9151dk_nrf9151_common-pinctrl.dtsi index a1680e830f4..2685cc354ec 100644 --- a/boards/nordic/nrf9151dk/nrf9151dk_nrf9151_common-pinctrl.dtsi +++ b/boards/nordic/nrf9151dk/nrf9151dk_nrf9151_common-pinctrl.dtsi @@ -9,6 +9,7 @@ psels = , ; }; + group2 { psels = , ; @@ -31,6 +32,7 @@ psels = , ; }; + group2 { psels = , ; diff --git a/boards/nordic/nrf9151dk/nrf9151dk_nrf9151_common.dtsi b/boards/nordic/nrf9151dk/nrf9151dk_nrf9151_common.dtsi index 8ed282fe49e..9d23bf6781a 100644 --- a/boards/nordic/nrf9151dk/nrf9151dk_nrf9151_common.dtsi +++ b/boards/nordic/nrf9151dk/nrf9151dk_nrf9151_common.dtsi @@ -18,18 +18,22 @@ leds { compatible = "gpio-leds"; + led0: led_0 { gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; label = "Green LED 1"; }; + led1: led_1 { gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>; label = "Green LED 2"; }; + led2: led_2 { gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>; label = "Green LED 3"; }; + led3: led_3 { gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>; label = "Green LED 4"; @@ -38,6 +42,7 @@ pwmleds { compatible = "pwm-leds"; + pwm_led0: pwm_led_0 { pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>; }; @@ -45,21 +50,25 @@ buttons { compatible = "gpio-keys"; + button0: button_0 { gpios = <&gpio0 8 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 1"; zephyr,code = ; }; + button1: button_1 { gpios = <&gpio0 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 2"; zephyr,code = ; }; + button2: button_2 { gpios = <&gpio0 18 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 3"; zephyr,code = ; }; + button3: button_3 { gpios = <&gpio0 19 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 4"; diff --git a/boards/nordic/nrf9160dk/nrf9160dk_nrf52840-pinctrl.dtsi b/boards/nordic/nrf9160dk/nrf9160dk_nrf52840-pinctrl.dtsi index 1681e3ecb9b..22eae1b3b6c 100644 --- a/boards/nordic/nrf9160dk/nrf9160dk_nrf52840-pinctrl.dtsi +++ b/boards/nordic/nrf9160dk/nrf9160dk_nrf52840-pinctrl.dtsi @@ -9,6 +9,7 @@ psels = , ; }; + group2 { psels = , ; @@ -25,5 +26,4 @@ low-power-enable; }; }; - }; diff --git a/boards/nordic/nrf9160dk/nrf9160dk_nrf9160_common-pinctrl.dtsi b/boards/nordic/nrf9160dk/nrf9160dk_nrf9160_common-pinctrl.dtsi index 4c7475f7e73..8ca261027d1 100644 --- a/boards/nordic/nrf9160dk/nrf9160dk_nrf9160_common-pinctrl.dtsi +++ b/boards/nordic/nrf9160dk/nrf9160dk_nrf9160_common-pinctrl.dtsi @@ -9,6 +9,7 @@ psels = , ; }; + group2 { psels = , ; @@ -31,6 +32,7 @@ psels = , ; }; + group2 { psels = , ; diff --git a/boards/nordic/nrf9160dk/nrf9160dk_nrf9160_common.dtsi b/boards/nordic/nrf9160dk/nrf9160dk_nrf9160_common.dtsi index f57b3fa17c2..5abcdae3216 100644 --- a/boards/nordic/nrf9160dk/nrf9160dk_nrf9160_common.dtsi +++ b/boards/nordic/nrf9160dk/nrf9160dk_nrf9160_common.dtsi @@ -18,18 +18,22 @@ leds { compatible = "gpio-leds"; + led0: led_0 { gpios = <&gpio0 2 0>; label = "Green LED 1"; }; + led1: led_1 { gpios = <&gpio0 3 0>; label = "Green LED 2"; }; + led2: led_2 { gpios = <&gpio0 4 0>; label = "Green LED 3"; }; + led3: led_3 { gpios = <&gpio0 5 0>; label = "Green LED 4"; @@ -38,6 +42,7 @@ pwmleds { compatible = "pwm-leds"; + pwm_led0: pwm_led_0 { pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>; }; @@ -52,21 +57,25 @@ * the usual "4 buttons per DK board" convention. */ compatible = "gpio-keys"; + button0: button_0 { gpios = <&gpio0 6 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 1"; zephyr,code = ; }; + button1: button_1 { gpios = <&gpio0 7 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 2"; zephyr,code = ; }; + button2: button_2 { gpios = <&gpio0 8 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Switch 1"; zephyr,code = ; }; + button3: button_3 { gpios = <&gpio0 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Switch 2"; diff --git a/boards/nordic/nrf9160dk/nrf9160dk_nrf9160_common_0_14_0.dtsi b/boards/nordic/nrf9160dk/nrf9160dk_nrf9160_common_0_14_0.dtsi index 896531d7580..3e3f149d69d 100644 --- a/boards/nordic/nrf9160dk/nrf9160dk_nrf9160_common_0_14_0.dtsi +++ b/boards/nordic/nrf9160dk/nrf9160dk_nrf9160_common_0_14_0.dtsi @@ -39,6 +39,7 @@ &arduino_spi { cs-gpios = <&arduino_header 16 GPIO_ACTIVE_LOW>, /* D10 */ <&gpio0 25 GPIO_ACTIVE_LOW>; + mx25r64: mx25r6435f@1 { compatible = "jedec,spi-nor"; status = "disabled"; diff --git a/boards/nordic/nrf9161dk/nrf9161dk_nrf9161_common-pinctrl.dtsi b/boards/nordic/nrf9161dk/nrf9161dk_nrf9161_common-pinctrl.dtsi index a1680e830f4..2685cc354ec 100644 --- a/boards/nordic/nrf9161dk/nrf9161dk_nrf9161_common-pinctrl.dtsi +++ b/boards/nordic/nrf9161dk/nrf9161dk_nrf9161_common-pinctrl.dtsi @@ -9,6 +9,7 @@ psels = , ; }; + group2 { psels = , ; @@ -31,6 +32,7 @@ psels = , ; }; + group2 { psels = , ; diff --git a/boards/nordic/nrf9161dk/nrf9161dk_nrf9161_common.dtsi b/boards/nordic/nrf9161dk/nrf9161dk_nrf9161_common.dtsi index 7dade3bc0f7..fa733fefe66 100644 --- a/boards/nordic/nrf9161dk/nrf9161dk_nrf9161_common.dtsi +++ b/boards/nordic/nrf9161dk/nrf9161dk_nrf9161_common.dtsi @@ -18,18 +18,22 @@ leds { compatible = "gpio-leds"; + led0: led_0 { gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; label = "Green LED 1"; }; + led1: led_1 { gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>; label = "Green LED 2"; }; + led2: led_2 { gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>; label = "Green LED 3"; }; + led3: led_3 { gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>; label = "Green LED 4"; @@ -38,6 +42,7 @@ pwmleds { compatible = "pwm-leds"; + pwm_led0: pwm_led_0 { pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>; }; @@ -45,21 +50,25 @@ buttons { compatible = "gpio-keys"; + button0: button_0 { gpios = <&gpio0 8 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 1"; zephyr,code = ; }; + button1: button_1 { gpios = <&gpio0 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 2"; zephyr,code = ; }; + button2: button_2 { gpios = <&gpio0 18 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 3"; zephyr,code = ; }; + button3: button_3 { gpios = <&gpio0 19 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 4"; diff --git a/boards/nordic/nrf9280pdk/nrf9280pdk_nrf9280_cpuapp.dts b/boards/nordic/nrf9280pdk/nrf9280pdk_nrf9280_cpuapp.dts index bbd09a534c2..f4cce12f4b1 100644 --- a/boards/nordic/nrf9280pdk/nrf9280pdk_nrf9280_cpuapp.dts +++ b/boards/nordic/nrf9280pdk/nrf9280pdk_nrf9280_cpuapp.dts @@ -98,6 +98,7 @@ pwmleds { compatible = "pwm-leds"; + /* * LEDs are connected to GPIO Port 9 - pins 2-5. There is no valid hardware * configuration to pass PWM signal on pins 0 and 1. First valid config is P9.2. diff --git a/boards/nordic/nrf9280pdk/nrf9280pdk_nrf9280_cpurad.dts b/boards/nordic/nrf9280pdk/nrf9280pdk_nrf9280_cpurad.dts index f9bfae09897..5efa7dbd471 100644 --- a/boards/nordic/nrf9280pdk/nrf9280pdk_nrf9280_cpurad.dts +++ b/boards/nordic/nrf9280pdk/nrf9280pdk_nrf9280_cpurad.dts @@ -29,6 +29,7 @@ zephyr,bt-hci-ipc = &ipc0; nordic,802154-spinel-ipc = &ipc0; }; + aliases { ipc-to-cpusys = &cpurad_cpusys_ipc; resetinfo = &cpurad_resetinfo; diff --git a/boards/nordic/thingy52/thingy52_nrf52832-pinctrl.dtsi b/boards/nordic/thingy52/thingy52_nrf52832-pinctrl.dtsi index 5c2fcb56895..df96e0c27c7 100644 --- a/boards/nordic/thingy52/thingy52_nrf52832-pinctrl.dtsi +++ b/boards/nordic/thingy52/thingy52_nrf52832-pinctrl.dtsi @@ -48,5 +48,4 @@ low-power-enable; }; }; - }; diff --git a/boards/nordic/thingy52/thingy52_nrf52832.dts b/boards/nordic/thingy52/thingy52_nrf52832.dts index 9db5f67c486..e081ae877ce 100644 --- a/boards/nordic/thingy52/thingy52_nrf52832.dts +++ b/boards/nordic/thingy52/thingy52_nrf52832.dts @@ -37,26 +37,27 @@ leds { compatible = "gpio-leds"; + /* Lightwell RGB */ led0: led_0 { gpios = <&sx1509b 7 GPIO_ACTIVE_LOW>; label = "Red LED"; - //vin-supply = <&vdd_pwr>; }; + led1: led_1 { gpios = <&sx1509b 5 GPIO_ACTIVE_LOW>; label = "Green LED"; - //vin-supply = <&vdd_pwr>; }; + led2: led_2 { gpios = <&sx1509b 6 GPIO_ACTIVE_LOW>; label = "Blue LED"; - //vin-supply = <&vdd_pwr>; }; }; buttons { compatible = "gpio-keys"; + button0: button_0 { /* gpio flags need validation */ gpios = <&gpio0 11 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; @@ -138,10 +139,10 @@ compatible = "nordic,nrf-twim"; status = "okay"; clock-frequency = ; - pinctrl-0 = <&i2c0_default>; pinctrl-1 = <&i2c0_sleep>; pinctrl-names = "default", "sleep"; + sx1509b: sx1509b@3e { compatible = "semtech,sx1509b"; reg = <0x3e>; @@ -181,10 +182,10 @@ compatible = "nordic,nrf-twim"; status = "okay"; clock-frequency = ; - pinctrl-0 = <&i2c1_default>; pinctrl-1 = <&i2c1_sleep>; pinctrl-names = "default", "sleep"; + lis2dh12: lis2dh12@19 { compatible = "st,lis2dh12", "st,lis2dh"; reg = <0x19>; @@ -202,14 +203,17 @@ label = "mcuboot"; reg = <0x00000000 0xc000>; }; + slot0_partition: partition@c000 { label = "image-0"; reg = <0x0000C000 0x32000>; }; + slot1_partition: partition@3e000 { label = "image-1"; reg = <0x0003E000 0x32000>; }; + scratch_partition: partition@70000 { label = "image-scratch"; reg = <0x00070000 0xa000>; diff --git a/boards/nordic/thingy53/thingy53_nrf5340_common-pinctrl.dtsi b/boards/nordic/thingy53/thingy53_nrf5340_common-pinctrl.dtsi index 2a9fa480bab..75fe378a40f 100644 --- a/boards/nordic/thingy53/thingy53_nrf5340_common-pinctrl.dtsi +++ b/boards/nordic/thingy53/thingy53_nrf5340_common-pinctrl.dtsi @@ -125,5 +125,4 @@ low-power-enable; }; }; - }; diff --git a/boards/nordic/thingy53/thingy53_nrf5340_common.dtsi b/boards/nordic/thingy53/thingy53_nrf5340_common.dtsi index e531b578323..e7079b16c72 100644 --- a/boards/nordic/thingy53/thingy53_nrf5340_common.dtsi +++ b/boards/nordic/thingy53/thingy53_nrf5340_common.dtsi @@ -17,11 +17,13 @@ buttons { compatible = "gpio-keys"; + button0: button_0 { gpios = <&gpio1 14 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 1"; zephyr,code = ; }; + button1: button_1 { gpios = <&gpio1 13 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 2"; @@ -31,14 +33,17 @@ leds { compatible = "gpio-leds"; + red_led: led_1 { gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; label = "RGB red LED"; }; + green_led: led_2 { gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; label = "RGB green LED"; }; + blue_led: led_3 { gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; label = "RGB blue LED"; @@ -47,6 +52,7 @@ pwmleds { compatible = "pwm-leds"; + red_led_pwm: led_pwm_0 { pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>; label = "Red PWM LED"; @@ -118,6 +124,7 @@ gpio_fwd: nrf-gpio-forwarder { compatible = "nordic,nrf-gpio-forwarder"; status = "okay"; + fem-gpio-if { gpios = <&gpio1 11 0>, <&gpio1 12 0>, @@ -130,6 +137,7 @@ spi_fwd: nrf-spi-forwarder { compatible = "nordic,nrf-gpio-forwarder"; status = "disabled"; + fem-spi-if { gpios = <&gpio0 24 0>, <&gpio0 29 0>, @@ -207,10 +215,10 @@ compatible = "nordic,nrf-twim"; status = "okay"; clock-frequency = ; - pinctrl-0 = <&i2c1_default>; pinctrl-1 = <&i2c1_sleep>; pinctrl-names = "default", "sleep"; + bmm150: bmm150@10 { compatible = "bosch,bmm150"; reg = <0x10>; @@ -234,10 +242,10 @@ cs-gpios = <&gpio0 22 GPIO_ACTIVE_LOW>, <&gpio1 4 GPIO_ACTIVE_LOW>, <&gpio0 24 GPIO_ACTIVE_LOW>; - pinctrl-0 = <&spi3_default>; pinctrl-1 = <&spi3_sleep>; pinctrl-names = "default", "sleep"; + adxl362: spi-dev-adxl362@0 { compatible = "adi,adxl362"; spi-max-frequency = <8000000>; @@ -275,6 +283,7 @@ pinctrl-0 = <&qspi_default>; pinctrl-1 = <&qspi_sleep>; pinctrl-names = "default", "sleep"; + mx25r64: mx25r6435f@0 { compatible = "nordic,qspi-nor"; reg = <0>; diff --git a/boards/nordic/thingy53/thingy53_nrf5340_cpunet.dts b/boards/nordic/thingy53/thingy53_nrf5340_cpunet.dts index 3003d4924ce..efbf1d27815 100644 --- a/boards/nordic/thingy53/thingy53_nrf5340_cpunet.dts +++ b/boards/nordic/thingy53/thingy53_nrf5340_cpunet.dts @@ -29,11 +29,13 @@ buttons { compatible = "gpio-keys"; + button0: button_0 { gpios = <&gpio1 14 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 1"; zephyr,code = ; }; + button1: button_1 { gpios = <&gpio1 13 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button 2"; @@ -43,14 +45,17 @@ leds { compatible = "gpio-leds"; + red_led: led_1 { gpios = <&gpio1 8 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>; label = "RGB red LED"; }; + green_led: led_2 { gpios = <&gpio1 6 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>; label = "RGB green LED"; }; + blue_led: led_3 { gpios = <&gpio1 7 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>; label = "RGB blue LED"; @@ -60,8 +65,8 @@ nrf_radio_fem: fem { compatible = "nordic,nrf21540-fem"; rx-en-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>; - mode-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; - pdn-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; + mode-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; + pdn-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; tx-en-gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>; spi-if = <&nrf_radio_fem_spi>; supply-voltage-mv = <3000>; @@ -136,7 +141,6 @@ fem_spi: &spi0 { }; &flash1 { - partitions { compatible = "fixed-partitions"; #address-cells = <1>; @@ -146,18 +150,22 @@ fem_spi: &spi0 { label = "mcuboot"; reg = <0x00000000 0xc000>; }; + slot0_partition: partition@c000 { label = "image-0"; reg = <0x0000C000 0x12000>; }; + slot1_partition: partition@1e000 { label = "image-1"; reg = <0x0001E000 0x12000>; }; + scratch_partition: partition@30000 { label = "image-scratch"; reg = <0x00030000 0xa000>; }; + storage_partition: partition@3a000 { label = "storage"; reg = <0x0003a000 0x6000>; From 90de22fde7a775512435319fb7d06cad1864cd53 Mon Sep 17 00:00:00 2001 From: Jamie McCrae Date: Thu, 24 Apr 2025 10:21:29 +0100 Subject: [PATCH 0078/2553] boards: nordic: thingy53: Remove scratch from cpunet Removes the scratch area from the network core for this board target, this was not used anyhow but gets rid of a configuration that would use a non-optimal swap mode Signed-off-by: Jamie McCrae --- boards/nordic/thingy53/thingy53_nrf5340_cpunet.dts | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/boards/nordic/thingy53/thingy53_nrf5340_cpunet.dts b/boards/nordic/thingy53/thingy53_nrf5340_cpunet.dts index efbf1d27815..f2482f3d614 100644 --- a/boards/nordic/thingy53/thingy53_nrf5340_cpunet.dts +++ b/boards/nordic/thingy53/thingy53_nrf5340_cpunet.dts @@ -153,17 +153,12 @@ fem_spi: &spi0 { slot0_partition: partition@c000 { label = "image-0"; - reg = <0x0000C000 0x12000>; + reg = <0x0000C000 0x17000>; }; - slot1_partition: partition@1e000 { + slot1_partition: partition@23000 { label = "image-1"; - reg = <0x0001E000 0x12000>; - }; - - scratch_partition: partition@30000 { - label = "image-scratch"; - reg = <0x00030000 0xa000>; + reg = <0x00023000 0x17000>; }; storage_partition: partition@3a000 { From 2e881018ac02bae19292fb1986da0f11cb72b6e0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Benjamin=20Cab=C3=A9?= Date: Thu, 24 Apr 2025 12:08:46 +0200 Subject: [PATCH 0079/2553] boards: dts: soc: bflb: use proper folder names MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Folders should be named after the vendor prefix Signed-off-by: Benjamin Cabé --- MAINTAINERS.yml | 6 +++--- .../bl60x/bl604e_iot_dvk/Kconfig.bl604e_iot_dvk | 0 .../bl604e_iot_dvk/bl604e_iot_dvk-pinctrl.dtsi | 0 .../bl60x/bl604e_iot_dvk/bl604e_iot_dvk.dts | 2 +- .../bl60x/bl604e_iot_dvk/bl604e_iot_dvk.yaml | 0 .../bl60x/bl604e_iot_dvk/bl604e_iot_dvk_defconfig | 0 .../bl60x/bl604e_iot_dvk/board.cmake | 0 .../bl60x/bl604e_iot_dvk/board.yml | 0 .../bl60x/bl604e_iot_dvk/doc/img/bl_604e.webp | Bin .../bl60x/bl604e_iot_dvk/doc/index.rst | 0 .../bl60x/bl604e_iot_dvk/support/bl60x.cfg | 0 .../bl60x/bl604e_iot_dvk/support/openocd.cfg | 0 boards/{bouffalolab => bflb}/index.rst | 0 dts/riscv/{bouffalolab => bflb}/bl60x.dtsi | 0 soc/{bouffalolab => bflb}/CMakeLists.txt | 0 soc/{bouffalolab => bflb}/Kconfig | 0 soc/{bouffalolab => bflb}/Kconfig.defconfig | 0 soc/{bouffalolab => bflb}/Kconfig.soc | 0 soc/{bouffalolab => bflb}/bl60x/CMakeLists.txt | 0 soc/{bouffalolab => bflb}/bl60x/Kconfig | 0 soc/{bouffalolab => bflb}/bl60x/Kconfig.defconfig | 0 soc/{bouffalolab => bflb}/bl60x/Kconfig.soc | 0 soc/{bouffalolab => bflb}/bl60x/rodata.ld | 0 soc/{bouffalolab => bflb}/bl60x/soc.c | 0 soc/{bouffalolab => bflb}/bl60x/soc.h | 0 soc/{bouffalolab => bflb}/common/CMakeLists.txt | 0 soc/{bouffalolab => bflb}/common/clic.h | 0 soc/{bouffalolab => bflb}/common/pinctrl_soc.h | 0 soc/{bouffalolab => bflb}/common/soc_common.h | 0 soc/{bouffalolab => bflb}/common/soc_common_irq.c | 0 soc/{bouffalolab => bflb}/common/soc_irq.S | 0 soc/{bouffalolab => bflb}/common/vector.S | 0 soc/{bouffalolab => bflb}/soc.yml | 0 33 files changed, 4 insertions(+), 4 deletions(-) rename boards/{bouffalolab => bflb}/bl60x/bl604e_iot_dvk/Kconfig.bl604e_iot_dvk (100%) rename boards/{bouffalolab => bflb}/bl60x/bl604e_iot_dvk/bl604e_iot_dvk-pinctrl.dtsi (100%) rename boards/{bouffalolab => bflb}/bl60x/bl604e_iot_dvk/bl604e_iot_dvk.dts (96%) rename boards/{bouffalolab => bflb}/bl60x/bl604e_iot_dvk/bl604e_iot_dvk.yaml (100%) rename boards/{bouffalolab => bflb}/bl60x/bl604e_iot_dvk/bl604e_iot_dvk_defconfig (100%) rename boards/{bouffalolab => bflb}/bl60x/bl604e_iot_dvk/board.cmake (100%) rename boards/{bouffalolab => bflb}/bl60x/bl604e_iot_dvk/board.yml (100%) rename boards/{bouffalolab => bflb}/bl60x/bl604e_iot_dvk/doc/img/bl_604e.webp (100%) rename boards/{bouffalolab => bflb}/bl60x/bl604e_iot_dvk/doc/index.rst (100%) rename boards/{bouffalolab => bflb}/bl60x/bl604e_iot_dvk/support/bl60x.cfg (100%) rename boards/{bouffalolab => bflb}/bl60x/bl604e_iot_dvk/support/openocd.cfg (100%) rename boards/{bouffalolab => bflb}/index.rst (100%) rename dts/riscv/{bouffalolab => bflb}/bl60x.dtsi (100%) rename soc/{bouffalolab => bflb}/CMakeLists.txt (100%) rename soc/{bouffalolab => bflb}/Kconfig (100%) rename soc/{bouffalolab => bflb}/Kconfig.defconfig (100%) rename soc/{bouffalolab => bflb}/Kconfig.soc (100%) rename soc/{bouffalolab => bflb}/bl60x/CMakeLists.txt (100%) rename soc/{bouffalolab => bflb}/bl60x/Kconfig (100%) rename soc/{bouffalolab => bflb}/bl60x/Kconfig.defconfig (100%) rename soc/{bouffalolab => bflb}/bl60x/Kconfig.soc (100%) rename soc/{bouffalolab => bflb}/bl60x/rodata.ld (100%) rename soc/{bouffalolab => bflb}/bl60x/soc.c (100%) rename soc/{bouffalolab => bflb}/bl60x/soc.h (100%) rename soc/{bouffalolab => bflb}/common/CMakeLists.txt (100%) rename soc/{bouffalolab => bflb}/common/clic.h (100%) rename soc/{bouffalolab => bflb}/common/pinctrl_soc.h (100%) rename soc/{bouffalolab => bflb}/common/soc_common.h (100%) rename soc/{bouffalolab => bflb}/common/soc_common_irq.c (100%) rename soc/{bouffalolab => bflb}/common/soc_irq.S (100%) rename soc/{bouffalolab => bflb}/common/vector.S (100%) rename soc/{bouffalolab => bflb}/soc.yml (100%) diff --git a/MAINTAINERS.yml b/MAINTAINERS.yml index f44cd673f53..5300cf3e26f 100644 --- a/MAINTAINERS.yml +++ b/MAINTAINERS.yml @@ -3511,11 +3511,11 @@ Bouffalolab Platforms: maintainers: - nandojve files: - - boards/bouffalolab/ + - boards/bflb/ - drivers/*/*bflb* - - dts/riscv/bouffalolab/ + - dts/riscv/bflb/ - dts/bindings/*/bflb,* - - soc/bouffalolab/ + - soc/bflb/ labels: - "platform: bouffalolab" diff --git a/boards/bouffalolab/bl60x/bl604e_iot_dvk/Kconfig.bl604e_iot_dvk b/boards/bflb/bl60x/bl604e_iot_dvk/Kconfig.bl604e_iot_dvk similarity index 100% rename from boards/bouffalolab/bl60x/bl604e_iot_dvk/Kconfig.bl604e_iot_dvk rename to boards/bflb/bl60x/bl604e_iot_dvk/Kconfig.bl604e_iot_dvk diff --git a/boards/bouffalolab/bl60x/bl604e_iot_dvk/bl604e_iot_dvk-pinctrl.dtsi b/boards/bflb/bl60x/bl604e_iot_dvk/bl604e_iot_dvk-pinctrl.dtsi similarity index 100% rename from boards/bouffalolab/bl60x/bl604e_iot_dvk/bl604e_iot_dvk-pinctrl.dtsi rename to boards/bflb/bl60x/bl604e_iot_dvk/bl604e_iot_dvk-pinctrl.dtsi diff --git a/boards/bouffalolab/bl60x/bl604e_iot_dvk/bl604e_iot_dvk.dts b/boards/bflb/bl60x/bl604e_iot_dvk/bl604e_iot_dvk.dts similarity index 96% rename from boards/bouffalolab/bl60x/bl604e_iot_dvk/bl604e_iot_dvk.dts rename to boards/bflb/bl60x/bl604e_iot_dvk/bl604e_iot_dvk.dts index e81d9cc6b37..87e986cbfe4 100644 --- a/boards/bouffalolab/bl60x/bl604e_iot_dvk/bl604e_iot_dvk.dts +++ b/boards/bflb/bl60x/bl604e_iot_dvk/bl604e_iot_dvk.dts @@ -6,7 +6,7 @@ /dts-v1/; -#include +#include #include "bl604e_iot_dvk-pinctrl.dtsi" / { diff --git a/boards/bouffalolab/bl60x/bl604e_iot_dvk/bl604e_iot_dvk.yaml b/boards/bflb/bl60x/bl604e_iot_dvk/bl604e_iot_dvk.yaml similarity index 100% rename from boards/bouffalolab/bl60x/bl604e_iot_dvk/bl604e_iot_dvk.yaml rename to boards/bflb/bl60x/bl604e_iot_dvk/bl604e_iot_dvk.yaml diff --git a/boards/bouffalolab/bl60x/bl604e_iot_dvk/bl604e_iot_dvk_defconfig b/boards/bflb/bl60x/bl604e_iot_dvk/bl604e_iot_dvk_defconfig similarity index 100% rename from boards/bouffalolab/bl60x/bl604e_iot_dvk/bl604e_iot_dvk_defconfig rename to boards/bflb/bl60x/bl604e_iot_dvk/bl604e_iot_dvk_defconfig diff --git a/boards/bouffalolab/bl60x/bl604e_iot_dvk/board.cmake b/boards/bflb/bl60x/bl604e_iot_dvk/board.cmake similarity index 100% rename from boards/bouffalolab/bl60x/bl604e_iot_dvk/board.cmake rename to boards/bflb/bl60x/bl604e_iot_dvk/board.cmake diff --git a/boards/bouffalolab/bl60x/bl604e_iot_dvk/board.yml b/boards/bflb/bl60x/bl604e_iot_dvk/board.yml similarity index 100% rename from boards/bouffalolab/bl60x/bl604e_iot_dvk/board.yml rename to boards/bflb/bl60x/bl604e_iot_dvk/board.yml diff --git a/boards/bouffalolab/bl60x/bl604e_iot_dvk/doc/img/bl_604e.webp b/boards/bflb/bl60x/bl604e_iot_dvk/doc/img/bl_604e.webp similarity index 100% rename from boards/bouffalolab/bl60x/bl604e_iot_dvk/doc/img/bl_604e.webp rename to boards/bflb/bl60x/bl604e_iot_dvk/doc/img/bl_604e.webp diff --git a/boards/bouffalolab/bl60x/bl604e_iot_dvk/doc/index.rst b/boards/bflb/bl60x/bl604e_iot_dvk/doc/index.rst similarity index 100% rename from boards/bouffalolab/bl60x/bl604e_iot_dvk/doc/index.rst rename to boards/bflb/bl60x/bl604e_iot_dvk/doc/index.rst diff --git a/boards/bouffalolab/bl60x/bl604e_iot_dvk/support/bl60x.cfg b/boards/bflb/bl60x/bl604e_iot_dvk/support/bl60x.cfg similarity index 100% rename from boards/bouffalolab/bl60x/bl604e_iot_dvk/support/bl60x.cfg rename to boards/bflb/bl60x/bl604e_iot_dvk/support/bl60x.cfg diff --git a/boards/bouffalolab/bl60x/bl604e_iot_dvk/support/openocd.cfg b/boards/bflb/bl60x/bl604e_iot_dvk/support/openocd.cfg similarity index 100% rename from boards/bouffalolab/bl60x/bl604e_iot_dvk/support/openocd.cfg rename to boards/bflb/bl60x/bl604e_iot_dvk/support/openocd.cfg diff --git a/boards/bouffalolab/index.rst b/boards/bflb/index.rst similarity index 100% rename from boards/bouffalolab/index.rst rename to boards/bflb/index.rst diff --git a/dts/riscv/bouffalolab/bl60x.dtsi b/dts/riscv/bflb/bl60x.dtsi similarity index 100% rename from dts/riscv/bouffalolab/bl60x.dtsi rename to dts/riscv/bflb/bl60x.dtsi diff --git a/soc/bouffalolab/CMakeLists.txt b/soc/bflb/CMakeLists.txt similarity index 100% rename from soc/bouffalolab/CMakeLists.txt rename to soc/bflb/CMakeLists.txt diff --git a/soc/bouffalolab/Kconfig b/soc/bflb/Kconfig similarity index 100% rename from soc/bouffalolab/Kconfig rename to soc/bflb/Kconfig diff --git a/soc/bouffalolab/Kconfig.defconfig b/soc/bflb/Kconfig.defconfig similarity index 100% rename from soc/bouffalolab/Kconfig.defconfig rename to soc/bflb/Kconfig.defconfig diff --git a/soc/bouffalolab/Kconfig.soc b/soc/bflb/Kconfig.soc similarity index 100% rename from soc/bouffalolab/Kconfig.soc rename to soc/bflb/Kconfig.soc diff --git a/soc/bouffalolab/bl60x/CMakeLists.txt b/soc/bflb/bl60x/CMakeLists.txt similarity index 100% rename from soc/bouffalolab/bl60x/CMakeLists.txt rename to soc/bflb/bl60x/CMakeLists.txt diff --git a/soc/bouffalolab/bl60x/Kconfig b/soc/bflb/bl60x/Kconfig similarity index 100% rename from soc/bouffalolab/bl60x/Kconfig rename to soc/bflb/bl60x/Kconfig diff --git a/soc/bouffalolab/bl60x/Kconfig.defconfig b/soc/bflb/bl60x/Kconfig.defconfig similarity index 100% rename from soc/bouffalolab/bl60x/Kconfig.defconfig rename to soc/bflb/bl60x/Kconfig.defconfig diff --git a/soc/bouffalolab/bl60x/Kconfig.soc b/soc/bflb/bl60x/Kconfig.soc similarity index 100% rename from soc/bouffalolab/bl60x/Kconfig.soc rename to soc/bflb/bl60x/Kconfig.soc diff --git a/soc/bouffalolab/bl60x/rodata.ld b/soc/bflb/bl60x/rodata.ld similarity index 100% rename from soc/bouffalolab/bl60x/rodata.ld rename to soc/bflb/bl60x/rodata.ld diff --git a/soc/bouffalolab/bl60x/soc.c b/soc/bflb/bl60x/soc.c similarity index 100% rename from soc/bouffalolab/bl60x/soc.c rename to soc/bflb/bl60x/soc.c diff --git a/soc/bouffalolab/bl60x/soc.h b/soc/bflb/bl60x/soc.h similarity index 100% rename from soc/bouffalolab/bl60x/soc.h rename to soc/bflb/bl60x/soc.h diff --git a/soc/bouffalolab/common/CMakeLists.txt b/soc/bflb/common/CMakeLists.txt similarity index 100% rename from soc/bouffalolab/common/CMakeLists.txt rename to soc/bflb/common/CMakeLists.txt diff --git a/soc/bouffalolab/common/clic.h b/soc/bflb/common/clic.h similarity index 100% rename from soc/bouffalolab/common/clic.h rename to soc/bflb/common/clic.h diff --git a/soc/bouffalolab/common/pinctrl_soc.h b/soc/bflb/common/pinctrl_soc.h similarity index 100% rename from soc/bouffalolab/common/pinctrl_soc.h rename to soc/bflb/common/pinctrl_soc.h diff --git a/soc/bouffalolab/common/soc_common.h b/soc/bflb/common/soc_common.h similarity index 100% rename from soc/bouffalolab/common/soc_common.h rename to soc/bflb/common/soc_common.h diff --git a/soc/bouffalolab/common/soc_common_irq.c b/soc/bflb/common/soc_common_irq.c similarity index 100% rename from soc/bouffalolab/common/soc_common_irq.c rename to soc/bflb/common/soc_common_irq.c diff --git a/soc/bouffalolab/common/soc_irq.S b/soc/bflb/common/soc_irq.S similarity index 100% rename from soc/bouffalolab/common/soc_irq.S rename to soc/bflb/common/soc_irq.S diff --git a/soc/bouffalolab/common/vector.S b/soc/bflb/common/vector.S similarity index 100% rename from soc/bouffalolab/common/vector.S rename to soc/bflb/common/vector.S diff --git a/soc/bouffalolab/soc.yml b/soc/bflb/soc.yml similarity index 100% rename from soc/bouffalolab/soc.yml rename to soc/bflb/soc.yml From 047b11f0d1a6cc8ed0cbdf8ca2632a2d23331330 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Benjamin=20Cab=C3=A9?= Date: Fri, 25 Apr 2025 17:25:20 +0200 Subject: [PATCH 0080/2553] soc: bflb: rename bouffalolab_bflb soc family to bflb MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit For simplicity/consistency with many other soc families, rename the bouffalolab_bflb soc family to the simpler bflb. Signed-off-by: Benjamin Cabé --- modules/hal_bouffalolab/CMakeLists.txt | 4 ++-- soc/bflb/Kconfig | 6 +++--- soc/bflb/Kconfig.defconfig | 4 ++-- soc/bflb/Kconfig.soc | 4 ++-- soc/bflb/bl60x/Kconfig.soc | 2 +- soc/bflb/soc.yml | 2 +- 6 files changed, 11 insertions(+), 11 deletions(-) diff --git a/modules/hal_bouffalolab/CMakeLists.txt b/modules/hal_bouffalolab/CMakeLists.txt index eb56320bb7c..e4b66aeafe6 100644 --- a/modules/hal_bouffalolab/CMakeLists.txt +++ b/modules/hal_bouffalolab/CMakeLists.txt @@ -2,7 +2,7 @@ # # SPDX-License-Identifier: Apache-2.0 -if(CONFIG_SOC_FAMILY_BOUFFALOLAB_BFLB) +if(CONFIG_SOC_FAMILY_BFLB) zephyr_library_named(hal_bouffalolab) zephyr_library_compile_definitions( @@ -52,4 +52,4 @@ if(CONFIG_SOC_FAMILY_BOUFFALOLAB_BFLB) zephyr_library_sources_ifdef(CONFIG_USE_BFLB_PWM ${bflb_drv_src_dir}/${bflb_soc}_pwm.c) zephyr_library_sources_ifdef(CONFIG_USE_BFLB_SPI ${bflb_drv_src_dir}/${bflb_soc}_spi.c) zephyr_library_sources_ifdef(CONFIG_USE_BFLB_UART ${bflb_drv_src_dir}/${bflb_soc}_uart.c) -endif() # SOC_FAMILY_BOUFFALOLAB_BFLB +endif() # SOC_FAMILY_BFLB diff --git a/soc/bflb/Kconfig b/soc/bflb/Kconfig index b15605c00f3..ae7fa94f488 100644 --- a/soc/bflb/Kconfig +++ b/soc/bflb/Kconfig @@ -2,11 +2,11 @@ # # SPDX-License-Identifier: Apache-2.0 -config SOC_FAMILY_BOUFFALOLAB_BFLB +config SOC_FAMILY_BFLB select HAS_BFLB_HAL -if SOC_FAMILY_BOUFFALOLAB_BFLB +if SOC_FAMILY_BFLB rsource "*/Kconfig" -endif # SOC_FAMILY_BOUFFALOLAB_BFLB +endif # SOC_FAMILY_BFLB diff --git a/soc/bflb/Kconfig.defconfig b/soc/bflb/Kconfig.defconfig index b8e9852b6f9..d2dc71ad6d5 100644 --- a/soc/bflb/Kconfig.defconfig +++ b/soc/bflb/Kconfig.defconfig @@ -2,11 +2,11 @@ # # SPDX-License-Identifier: Apache-2.0 -if SOC_FAMILY_BOUFFALOLAB_BFLB +if SOC_FAMILY_BFLB config SYS_CLOCK_HW_CYCLES_PER_SEC default $(dt_node_int_prop_int,/cpus/cpu@0,clock-frequency) rsource "*/Kconfig.defconfig" -endif # SOC_FAMILY_BOUFFALOLAB_BFLB +endif # SOC_FAMILY_BFLB diff --git a/soc/bflb/Kconfig.soc b/soc/bflb/Kconfig.soc index e3841e277bd..e4de2a4d98a 100644 --- a/soc/bflb/Kconfig.soc +++ b/soc/bflb/Kconfig.soc @@ -2,10 +2,10 @@ # # SPDX-License-Identifier: Apache-2.0 -config SOC_FAMILY_BOUFFALOLAB_BFLB +config SOC_FAMILY_BFLB bool config SOC_FAMILY - default "bouffalolab_bflb" if SOC_FAMILY_BOUFFALOLAB_BFLB + default "bflb" if SOC_FAMILY_BFLB rsource "*/Kconfig.soc" diff --git a/soc/bflb/bl60x/Kconfig.soc b/soc/bflb/bl60x/Kconfig.soc index 69c234b1d33..26fc8c4f236 100644 --- a/soc/bflb/bl60x/Kconfig.soc +++ b/soc/bflb/bl60x/Kconfig.soc @@ -4,7 +4,7 @@ config SOC_SERIES_BL60X bool - select SOC_FAMILY_BOUFFALOLAB_BFLB + select SOC_FAMILY_BFLB help Enable support for BouffaloLab BL6xx MCU series diff --git a/soc/bflb/soc.yml b/soc/bflb/soc.yml index 8aafe0d4367..8b3c61e0f3c 100644 --- a/soc/bflb/soc.yml +++ b/soc/bflb/soc.yml @@ -1,5 +1,5 @@ family: -- name: bouffalolab_bflb +- name: bflb series: - name: bl60x socs: From fc359ee95a9a64fa820a946004963105c40ad640 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Benjamin=20Cab=C3=A9?= Date: Thu, 24 Apr 2025 12:03:49 +0200 Subject: [PATCH 0081/2553] boards: bflb: remove redundant file reference MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Board documentation page already has a link to the board's folder in GitHub so hardcoding a link to the board's defconfig is redundant. Signed-off-by: Benjamin Cabé --- boards/bflb/bl60x/bl604e_iot_dvk/doc/index.rst | 3 --- 1 file changed, 3 deletions(-) diff --git a/boards/bflb/bl60x/bl604e_iot_dvk/doc/index.rst b/boards/bflb/bl60x/bl604e_iot_dvk/doc/index.rst index 76522129e41..acdbf06cae1 100644 --- a/boards/bflb/bl60x/bl604e_iot_dvk/doc/index.rst +++ b/boards/bflb/bl60x/bl604e_iot_dvk/doc/index.rst @@ -34,9 +34,6 @@ Supported Features .. zephyr:board-supported-hw:: -The default configuration can be found in the Kconfig -:zephyr_file:`boards/bouffalolab/bl60x/bl604e_iot_dvk/bl604e_iot_dvk_defconfig`. - System Clock ============ From 93f432a066e97b1c210965956656096a3e5ce8a3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Benjamin=20Cab=C3=A9?= Date: Thu, 24 Apr 2025 12:10:49 +0200 Subject: [PATCH 0082/2553] doc: boards: bflb: add .. zephyr:board-supported-runners MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add .. zephyr:board-supported-runners:: directive to document the supported runners for the BL604E IOT DVK board. Signed-off-by: Benjamin Cabé --- boards/bflb/bl60x/bl604e_iot_dvk/doc/index.rst | 2 ++ 1 file changed, 2 insertions(+) diff --git a/boards/bflb/bl60x/bl604e_iot_dvk/doc/index.rst b/boards/bflb/bl60x/bl604e_iot_dvk/doc/index.rst index acdbf06cae1..0c440d59691 100644 --- a/boards/bflb/bl60x/bl604e_iot_dvk/doc/index.rst +++ b/boards/bflb/bl60x/bl604e_iot_dvk/doc/index.rst @@ -49,6 +49,8 @@ to USB Serial converter and port is used for both program and console. Programming and Debugging ************************* +.. zephyr:board-supported-runners:: + Samples ======= From 7b1d748e8b680377cae0f690ea8ad8a7543e8498 Mon Sep 17 00:00:00 2001 From: Pieter De Gendt Date: Thu, 24 Apr 2025 13:18:10 +0200 Subject: [PATCH 0083/2553] drivers: Wrap device driver APIs using DEVICE_API macro Put the device APIs in their respective linker sections with the DEVICE_API wrapper macro. Signed-off-by: Pieter De Gendt --- drivers/clock_control/clock_stm32_ll_mp13.c | 2 +- drivers/dma/dma_ti_cc23x0.c | 2 +- drivers/mdio/mdio_xilinx_axienet.c | 5 +++-- drivers/mipi_dbi/mipi_dbi_nxp_dcnano_lcdif.c | 2 +- drivers/reset/reset_numaker.c | 2 +- drivers/sdhc/sdhc_ambiq.c | 2 +- drivers/spi/spi_cc23x0.c | 2 +- 7 files changed, 9 insertions(+), 8 deletions(-) diff --git a/drivers/clock_control/clock_stm32_ll_mp13.c b/drivers/clock_control/clock_stm32_ll_mp13.c index 6c8da819e51..4c880513732 100644 --- a/drivers/clock_control/clock_stm32_ll_mp13.c +++ b/drivers/clock_control/clock_stm32_ll_mp13.c @@ -80,7 +80,7 @@ static int stm32_clock_control_get_subsys_rate(const struct device *dev, return 0; } -static const struct clock_control_driver_api stm32_clock_control_api = { +static DEVICE_API(clock_control, stm32_clock_control_api) = { .on = stm32_clock_control_on, .off = stm32_clock_control_off, .get_rate = stm32_clock_control_get_subsys_rate, diff --git a/drivers/dma/dma_ti_cc23x0.c b/drivers/dma/dma_ti_cc23x0.c index 5b1a6c72283..7ab852f931d 100644 --- a/drivers/dma/dma_ti_cc23x0.c +++ b/drivers/dma/dma_ti_cc23x0.c @@ -368,7 +368,7 @@ static int dma_cc23x0_init(const struct device *dev) static struct dma_cc23x0_data cc23x0_data; -static const struct dma_driver_api dma_cc23x0_api = { +static DEVICE_API(dma, dma_cc23x0_api) = { .config = dma_cc23x0_config, .start = dma_cc23x0_start, .stop = dma_cc23x0_stop, diff --git a/drivers/mdio/mdio_xilinx_axienet.c b/drivers/mdio/mdio_xilinx_axienet.c index f06434a81d4..6876648c938 100644 --- a/drivers/mdio/mdio_xilinx_axienet.c +++ b/drivers/mdio/mdio_xilinx_axienet.c @@ -304,11 +304,12 @@ static int xilinx_axienet_mdio_probe(const struct device *dev) return 0; } -static const struct mdio_driver_api mdio_xilinx_axienet_api = { +static DEVICE_API(mdio, mdio_xilinx_axienet_api) = { .bus_disable = mdio_xilinx_axienet_bus_disable, .bus_enable = mdio_xilinx_axienet_bus_enable, .read = mdio_xilinx_axienet_read, - .write = mdio_xilinx_axienet_write}; + .write = mdio_xilinx_axienet_write, +}; #define SETUP_IRQS(inst) \ IRQ_CONNECT(DT_INST_IRQN(inst), DT_INST_IRQ(inst, priority), xilinx_axienet_mdio_isr, \ diff --git a/drivers/mipi_dbi/mipi_dbi_nxp_dcnano_lcdif.c b/drivers/mipi_dbi/mipi_dbi_nxp_dcnano_lcdif.c index 7c45e10b5eb..e0ab1483164 100644 --- a/drivers/mipi_dbi/mipi_dbi_nxp_dcnano_lcdif.c +++ b/drivers/mipi_dbi/mipi_dbi_nxp_dcnano_lcdif.c @@ -329,7 +329,7 @@ static int mipi_dbi_dcnano_lcdif_reset(const struct device *dev, k_timeout_t del return 0; } -static struct mipi_dbi_driver_api mcux_dcnano_lcdif_dbi_api = { +static DEVICE_API(mipi_dbi, mcux_dcnano_lcdif_dbi_api) = { .reset = mipi_dbi_dcnano_lcdif_reset, .command_write = mipi_dbi_dcnano_lcdif_command_write, .write_display = mipi_dbi_dcnano_lcdif_write_display, diff --git a/drivers/reset/reset_numaker.c b/drivers/reset/reset_numaker.c index 52144fd2741..ce1d87a600a 100644 --- a/drivers/reset/reset_numaker.c +++ b/drivers/reset/reset_numaker.c @@ -64,7 +64,7 @@ static int reset_numaker_line_toggle(const struct device *dev, uint32_t id) return 0; } -static const struct reset_driver_api reset_numaker_driver_api = { +static DEVICE_API(reset, reset_numaker_driver_api) = { .status = reset_numaker_status, .line_assert = reset_numaker_line_assert, .line_deassert = reset_numaker_line_deassert, diff --git a/drivers/sdhc/sdhc_ambiq.c b/drivers/sdhc/sdhc_ambiq.c index b58949a8557..e32a1958a0e 100644 --- a/drivers/sdhc/sdhc_ambiq.c +++ b/drivers/sdhc/sdhc_ambiq.c @@ -757,7 +757,7 @@ static int ambiq_sdio_card_interrupt_disable(const struct device *dev, int sourc return 0; } -static const struct sdhc_driver_api ambiq_sdio_api = { +static DEVICE_API(sdhc, ambiq_sdio_api) = { .reset = ambiq_sdio_reset, .request = ambiq_sdio_request, .set_io = ambiq_sdio_set_io, diff --git a/drivers/spi/spi_cc23x0.c b/drivers/spi/spi_cc23x0.c index 0c6e0009fc1..3e391b3086b 100644 --- a/drivers/spi/spi_cc23x0.c +++ b/drivers/spi/spi_cc23x0.c @@ -285,7 +285,7 @@ static int spi_cc23x0_release(const struct device *dev, return 0; } -static const struct spi_driver_api spi_cc23x0_driver_api = { +static DEVICE_API(spi, spi_cc23x0_driver_api) = { .transceive = spi_cc23x0_transceive, .release = spi_cc23x0_release, }; From 018963e0c7589b53c377d0e1e8517e56cc6f9134 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?P=C3=A1lyi=20L=C5=91rinc?= Date: Mon, 28 Apr 2025 08:33:00 +0000 Subject: [PATCH 0084/2553] samples: net: secure_mqtt: error code to enum MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The error code `0x80` is replaced with its corresponding `mqtt_suback_return_code` enum value. This will make the code more readable, as users of this example do not have to look up, what `0x80` encodes. Signed-off-by: Pályi Lőrinc --- samples/net/secure_mqtt_sensor_actuator/src/mqtt_client.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/samples/net/secure_mqtt_sensor_actuator/src/mqtt_client.c b/samples/net/secure_mqtt_sensor_actuator/src/mqtt_client.c index df515b2e5b2..2d2b4012d4b 100644 --- a/samples/net/secure_mqtt_sensor_actuator/src/mqtt_client.c +++ b/samples/net/secure_mqtt_sensor_actuator/src/mqtt_client.c @@ -214,7 +214,7 @@ static void mqtt_event_handler(struct mqtt_client *const client, const struct mq break; case MQTT_EVT_SUBACK: - if (evt->result == 0x80) { + if (evt->result == MQTT_SUBACK_FAILURE) { LOG_ERR("MQTT SUBACK error [%d]", evt->result); break; } From 088c8f4df86f0f631a15dd10039982c96e1b5537 Mon Sep 17 00:00:00 2001 From: Jamie McCrae Date: Mon, 28 Apr 2025 09:33:48 +0100 Subject: [PATCH 0085/2553] Revert "west: fix for context with sysbuild" This reverts commit 89721463022e9eb0ad02c712ad2f975b57594b44. Signed-off-by: Jamie McCrae --- scripts/west_commands/run_common.py | 117 ++++++++-------------------- 1 file changed, 34 insertions(+), 83 deletions(-) diff --git a/scripts/west_commands/run_common.py b/scripts/west_commands/run_common.py index 29b87a162d7..b13ca502eb6 100644 --- a/scripts/west_commands/run_common.py +++ b/scripts/west_commands/run_common.py @@ -1,6 +1,5 @@ # Copyright (c) 2018 Open Source Foundries Limited. # Copyright (c) 2023 Nordic Semiconductor ASA -# Copyright (c) 2025 Aerlync Labs Inc. # # SPDX-License-Identifier: Apache-2.0 @@ -182,34 +181,6 @@ def add_parser_common(command, parser_adder=None, parser=None): return parser -def is_sysbuild(build_dir): - # Check if the build directory is part of a sysbuild (multi-image build). - domains_yaml_path = path.join(build_dir, "domains.yaml") - return path.exists(domains_yaml_path) - -def get_domains_to_process(build_dir, args, domain_file=None, get_all_domain=False): - try: - domains = load_domains(build_dir) - except Exception as e: - log.die(f"Failed to load domains: {e}") - - if domain_file is None: - if getattr(args, "domain", None) is None and get_all_domain: - # This option for getting all available domains in the case of --context - # So default domain will be used. - return domains.get_domains() - if getattr(args, "domain", None) is None: - # No domains are passed down and no domains specified by the user. - # So default domain will be used. - return [domains.get_default_domain()] - else: - # No domains are passed down, but user has specified domains to use. - # Get the user specified domains. - return domains.get_domains(args.domain) - else: - # Use domains from domain file with flash order - return domains.get_domains(args.domain, default_flash_order=True) - def do_run_common(command, user_args, user_runner_args, domain_file=None): # This is the main routine for all the "west flash", "west debug", # etc. commands. @@ -247,7 +218,18 @@ def do_run_common(command, user_args, user_runner_args, domain_file=None): if not user_args.skip_rebuild: rebuild(command, build_dir, user_args) - domains = get_domains_to_process(build_dir, user_args) + if domain_file is None: + if user_args.domain is None: + # No domains are passed down and no domains specified by the user. + # So default domain will be used. + domains = [load_domains(build_dir).get_default_domain()] + else: + # No domains are passed down, but user has specified domains to use. + # Get the user specified domains. + domains = load_domains(build_dir).get_domains(user_args.domain) + else: + domains = load_domains(build_dir).get_domains(user_args.domain, + default_flash_order=True) if len(domains) > 1: if len(user_runner_args) > 0: @@ -711,71 +693,40 @@ def dump_traceback(): def dump_context(command, args, unknown_args): build_dir = get_build_dir(args, die_if_none=False) - get_all_domain = False - if build_dir is None: log.wrn('no --build-dir given or found; output will be limited') - dump_context_no_config(command, None) - return - - if is_sysbuild(build_dir): - get_all_domain = True + runners_yaml = None + else: + build_conf = BuildConfiguration(build_dir) + board = build_conf.get('CONFIG_BOARD_TARGET') + yaml_path = runners_yaml_path(build_dir, board) + runners_yaml = load_runners_yaml(yaml_path) # Re-build unless asked not to, to make sure the output is up to date. if build_dir and not args.skip_rebuild: rebuild(command, build_dir, args) - domains = get_domains_to_process(build_dir, args, None, get_all_domain) - - if len(domains) > 1 and not getattr(args, "domain", None): - log.inf("Multiple domains available:") - for i, domain in enumerate(domains, 1): - log.inf(f"{INDENT}{i}. {domain.name} (build_dir: {domain.build_dir})") - - while True: - try: - choice = input(f"Select domain (1-{len(domains)}): ") - choice = int(choice) - if 1 <= choice <= len(domains): - domains = [domains[choice-1]] - break - log.wrn(f"Please enter a number between 1 and {len(domains)}") - except ValueError: - log.wrn("Please enter a valid number") - except EOFError: - log.die("Input cancelled, exiting") - - selected_build_dir = domains[0].build_dir - - if not path.exists(selected_build_dir): - log.die(f"Build directory does not exist: {selected_build_dir}") - - build_conf = BuildConfiguration(selected_build_dir) - - board = build_conf.get('CONFIG_BOARD_TARGET') - if not board: - log.die("CONFIG_BOARD_TARGET not found in build configuration.") - - yaml_path = runners_yaml_path(selected_build_dir, board) - if not path.exists(yaml_path): - log.die(f"runners.yaml not found in: {yaml_path}") - - runners_yaml = load_runners_yaml(yaml_path) - - # Dump runner info - log.inf(f'build configuration:', colorize=True) - log.inf(f'{INDENT}build directory: {build_dir}') - log.inf(f'{INDENT}board: {board}') - log.inf(f'{INDENT}runners.yaml: {yaml_path}') if args.runner: try: cls = get_runner_cls(args.runner) - dump_runner_context(command, cls, runners_yaml) except ValueError: - available_runners = ", ".join(cls.name() for cls in ZephyrBinaryRunner.get_runners()) - log.die(f"Invalid runner name {args.runner}; choices: {available_runners}") + log.die(f'invalid runner name {args.runner}; choices: ' + + ', '.join(cls.name() for cls in + ZephyrBinaryRunner.get_runners())) else: - dump_all_runner_context(command, runners_yaml, board, selected_build_dir) + cls = None + + if runners_yaml is None: + dump_context_no_config(command, cls) + else: + log.inf(f'build configuration:', colorize=True) + log.inf(f'{INDENT}build directory: {build_dir}') + log.inf(f'{INDENT}board: {board}') + log.inf(f'{INDENT}runners.yaml: {yaml_path}') + if cls: + dump_runner_context(command, cls, runners_yaml) + else: + dump_all_runner_context(command, runners_yaml, board, build_dir) def dump_context_no_config(command, cls): if not cls: From d851986f590ef431ac7d0925fa49c9c57071b895 Mon Sep 17 00:00:00 2001 From: Fabrice DJIATSA Date: Mon, 14 Apr 2025 17:56:21 +0200 Subject: [PATCH 0086/2553] dts: arm: st: add stm32u5g9 dtsi files provide support for the STM32U5G9 serie. Signed-off-by: Fabrice DJIATSA --- dts/arm/st/u5/stm32u5g9.dtsi | 13 +++++++++++++ dts/arm/st/u5/stm32u5g9Xj.dtsi | 2 +- 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/dts/arm/st/u5/stm32u5g9.dtsi b/dts/arm/st/u5/stm32u5g9.dtsi index f9eadbb65e0..fe4fe181232 100644 --- a/dts/arm/st/u5/stm32u5g9.dtsi +++ b/dts/arm/st/u5/stm32u5g9.dtsi @@ -5,9 +5,22 @@ */ #include +#include +#include +#include / { soc { compatible = "st,stm32u5g9", "st,stm32u5", "simple-bus"; + + ltdc: display-controller@40016800 { + compatible = "st,stm32-ltdc"; + reg = <0x40016800 0x400>; + interrupts = <135 0>, <136 0>; + interrupt-names = "ltdc", "ltdc_er"; + clocks = <&rcc STM32_CLOCK(APB2, 26)>; + resets = <&rctl STM32_RESET(APB2, 26)>; + status = "disabled"; + }; }; }; diff --git a/dts/arm/st/u5/stm32u5g9Xj.dtsi b/dts/arm/st/u5/stm32u5g9Xj.dtsi index 10e4793f9d1..6116c30fc2a 100644 --- a/dts/arm/st/u5/stm32u5g9Xj.dtsi +++ b/dts/arm/st/u5/stm32u5g9Xj.dtsi @@ -10,7 +10,7 @@ / { sram0: memory@20000000 { /* SRAM1 + SRAM2 + SRAM3 + SRAM5 + SRAM6 */ - /* 768K + 64K + 832K + 832K + 512 */ + /* 768K + 64K + 832K + 832K + 512K */ reg = <0x20000000 DT_SIZE_K(3008)>; }; From 2ce8767a88d04d5ebde76279428539ffc3d10558 Mon Sep 17 00:00:00 2001 From: Fabrice DJIATSA Date: Wed, 16 Apr 2025 14:38:00 +0200 Subject: [PATCH 0087/2553] boards: st: add support for stm32u5a9j_dk2 board - add dts for stm32u5a9j_dk - add board configurations files - add documentation Signed-off-by: Fabrice DJIATSA --- .../st/stm32u5g9j_dk2/Kconfig.stm32u5g9j_dk2 | 5 + boards/st/stm32u5g9j_dk2/board.cmake | 13 + boards/st/stm32u5g9j_dk2/board.yml | 6 + .../doc/img/stm32u5g9j_dk2.webp | Bin 0 -> 16984 bytes boards/st/stm32u5g9j_dk2/doc/index.rst | 195 ++++++++++ boards/st/stm32u5g9j_dk2/stm32u5g9j_dk2.dts | 337 ++++++++++++++++++ boards/st/stm32u5g9j_dk2/stm32u5g9j_dk2.yaml | 25 ++ .../stm32u5g9j_dk2/stm32u5g9j_dk2_defconfig | 18 + boards/st/stm32u5g9j_dk2/support/openocd.cfg | 46 +++ 9 files changed, 645 insertions(+) create mode 100644 boards/st/stm32u5g9j_dk2/Kconfig.stm32u5g9j_dk2 create mode 100644 boards/st/stm32u5g9j_dk2/board.cmake create mode 100644 boards/st/stm32u5g9j_dk2/board.yml create mode 100644 boards/st/stm32u5g9j_dk2/doc/img/stm32u5g9j_dk2.webp create mode 100644 boards/st/stm32u5g9j_dk2/doc/index.rst create mode 100644 boards/st/stm32u5g9j_dk2/stm32u5g9j_dk2.dts create mode 100644 boards/st/stm32u5g9j_dk2/stm32u5g9j_dk2.yaml create mode 100644 boards/st/stm32u5g9j_dk2/stm32u5g9j_dk2_defconfig create mode 100644 boards/st/stm32u5g9j_dk2/support/openocd.cfg diff --git a/boards/st/stm32u5g9j_dk2/Kconfig.stm32u5g9j_dk2 b/boards/st/stm32u5g9j_dk2/Kconfig.stm32u5g9j_dk2 new file mode 100644 index 00000000000..524edda0bf2 --- /dev/null +++ b/boards/st/stm32u5g9j_dk2/Kconfig.stm32u5g9j_dk2 @@ -0,0 +1,5 @@ +# Copyright (c) 2025 STMicroelectronics +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_STM32U5G9J_DK2 + select SOC_STM32U5G9XX diff --git a/boards/st/stm32u5g9j_dk2/board.cmake b/boards/st/stm32u5g9j_dk2/board.cmake new file mode 100644 index 00000000000..c3617f2cfb1 --- /dev/null +++ b/boards/st/stm32u5g9j_dk2/board.cmake @@ -0,0 +1,13 @@ +# Copyright (c) 2025 STMicroelectronics +# SPDX-License-Identifier: Apache-2.0 + +# keep first +board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw") + +board_runner_args(openocd "--tcl-port=6666") +board_runner_args(openocd --cmd-pre-init "gdb_report_data_abort enable") +board_runner_args(openocd "--no-halt") + +# keep first +include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/st/stm32u5g9j_dk2/board.yml b/boards/st/stm32u5g9j_dk2/board.yml new file mode 100644 index 00000000000..a577da2ff85 --- /dev/null +++ b/boards/st/stm32u5g9j_dk2/board.yml @@ -0,0 +1,6 @@ +board: + name: stm32u5g9j_dk2 + full_name: STM32U5G9J Discovery Kit + vendor: st + socs: + - name: stm32u5g9xx diff --git a/boards/st/stm32u5g9j_dk2/doc/img/stm32u5g9j_dk2.webp b/boards/st/stm32u5g9j_dk2/doc/img/stm32u5g9j_dk2.webp new file mode 100644 index 0000000000000000000000000000000000000000..80bdfc787c454cd685f5e1257c18956389bbe6c0 GIT binary patch literal 16984 zcmb5Vb8u$e^DX|wwv&l9u|2VE+qUfqC$??d_QbYrJ9+N=!Tr_`Rk!Nyzq-!u-MzZk zs#Cj8*HMxb6H^cZ0Mtc=6x0+riA4Uf8I?e?L8x&-ZNT^p>665ZND7Ea6Jad^;9*Sd z?q$AlPD(zjtC%?j32 z?c>f<_i%58zx~&ri>;5!bMt5C7t*cLubEH6yWUcwdPEff}vXz{B40ca3+-8^YaQ`mU#Y#WR2F-Y#G8@4{sN zi0_xl-s4<*py1cV7Q}_gXij0N{$**KrEs9qqlG=ws8+f-Z>7 zEMZ%rrWKj;9ad_pP`f^P~R&i{^W@!f%@@eiyJ8xy`SU6^!E1g$McE|yT}Xzz#L zTRJ;g?B`Q=*Xk&0Rj{v%<tKu&c43hBZ)K zZ*^p{yIg{fczAt)l3_nT{x=}*0f`=JL&_?Vf7*iQ>g?z6uQ0!Wo} z60)90Pf(hMVIkE?i4danzHBE3zX~*=rNP!)&G60v-3}j;EVl#Iv3Y9k%J_& zmEact=YVFor~7}%wq44+4o%?V>%>$;+&Q^BMohCUE-<1g z!E?#vM=|9nGl9=Lh=IMsjEg5r`L{$M7^$zc+tPaT4NO*?IsUh1EH@#Fa+0QYNu%%5 z|APY=Yy$D0?f)=H(PWHM!K@_>_6c5}_%DV0x5m=$WKZ$`D(3iehJV{2sT>Sm>RnpW zz&{`!>|YSumr+IUlwo*{i2hS^wfH~kIEwr}@NDE!`-;CWY5G@}|3$a&d{`HA@@GNL zv+BRq;(K%UPw4*>DazXuU4{QTK1B`t8D^*@;&q=NE8!ur@Y>ujgxHNt5o ze*H_9yKDb|GU{#HwwYe)HSziX^H$p368ayOQ-A$GbZOO1)cgCCoq?K+7!L;-7VP_} zj%DQg>E>*2HTO3o7W)Ua+#OrdqC81g*==R}os{1c6~kIF`3GxJuToO#<$SQpJ-)I; z9SyxXwlS)F1?XO5<@*ow!sW={{s0BSms)>$#F5{sOU0)Dvy4ZFt)onT=R2}il*r2^ zb9*NzBM(<0DEWJMg(qFkCwyfn>6=cpAIb7CfJm0b{_tqt(o9_hLg)sq#spIe)c-7q zP(m>2i`&QN98=s^VdJVSqF;Ik-LOHySP@>W_Gxs`GVWVUStO$7;~l~tR>B-q+LhRE zNX)<_R|z8&cWw(gLt=hv!*4h|RMNX|q@5~%z%7o)kpE6A--`o>o=3+XpL-k}Q(*We zH{HgWXxaEth^X@!4vc+QJTRMQI0B5r zE{h84$`VFp0;UsB^IjEEZveyNiK_ZLTQIdf=}J1#u)MBh{==AVtP?1=4ghDQ1L+11 z)RRxr-*HB5@b|^ck53A-e{>v@BE;bgz7??hvF8NJqL=@@N4HmE`CHpHk^Os8u2?IJZ1a~)MISh7z5afT zss*mBw;6$|iuvht*bP4Mex4;3>OrLh;? zls}60{BY@LyjjB#TmeYE4r4bV2isB*o+s@Q*R7m}F~*jNOI~OJ)3QTOmCb@F#&TU6 zIyaOPPUP`6qS7;;9}%eNFL}iM^;{!mvAs+;oKu~pHu-5H4!BTPznQ|uQr6h>#q<*U z&FGNsDtL0;5pcN1Dw5Tdp*?4xCmC0z_bFVWF=)9n3v@xP2_9`K0WLN8nmb$N?(Q;( zV$)=X0`>Y`4~l6P)XYLC{QUPB^qj!OhW2N$hCnN27R4+^^e6D1DxwvG`T&RbWhmyW z%z37+cW)#T;f>0baaIs2uH?>r9-?KNV}WHe=}lhieYvM4TC6Ym<{XKRw;T+>hb?Mb zsPTw0D3%vhC4!Z_5?-Y%&Xt?5z!Tbbm|26eHL8`q5gFNw`YN;EG~m8^iB;rAMW|H} z6W8|-+_sOE2f^@qqs0K@=33~js?;&uZ8#{X+E+e}BJoa+mFM{gRjBTbSU7|SYaqKq zG*$IpFBxPNJc>HQcZBi^+Vdj{}wonb30;p_`$yt%>C9_xcS2fNx+;Kxo(f#B7BqoLsRRA#fXv zIl(I$ahX^ze|0S`->G%`>lM5ZnT`xWb5QGMvV`;vJJlhf?Ex_jyx61+jVCN_%W~ug z(Sf>^i+Lc&)cO!*1w7r;nBAkez6m~t)Vk;0!dK&O7b3P)k^VXQgvWyQh25J z@sTrxBv;fMi-JpG*YOy8gfr&jpR36t#HYMYp&P9taYUCyc~wBAWLcH`w=hs@Mg*+8 zG*y$gO^?T$^KCYZM_UpocjShV)p>obJQ)$zH|30rY_hscEEegVrX*@zEzh=Fs2uXP zC9F$@{^zu7$cc#`enm?hCM&>Vt`aPGPavVkMc{ol#9RxAOBqlzux~6mEtOZmD1!DR z$clg-h!bSOU3(Uc8M{`eC(P_?Mv4oRz8mR5_?w{Glw~ZeUz}BAqghUGr~PxCuZ9nV zhJl=dVRGFoUXZ7GB4`e+_X6{!@%+oS5w|DK%jcxRD}GB2fvcj-?BuTUr*An^`S!2g z9|i?Tg5+0!D5p8u|6=ZwL08W#m!|>z!a|XYSIcea&g`xiBS6hc;xYk!S#^laj=o2( z&;UwNTvWwYlB>}hq}*(8h}|b&Xpd5Je>Tl3S>AfdaX^#~NLSD-v;3&3UOyOb)T}h+ zu?8Lw@E3?sCka4$19eGY1LmR-jt;8wxi55181Z1o<;IimlrtEnb}fMrDTqrv+++5G zuWoo{!eP@sSY0V@mW+HD{_H$izAliZgKwFAMZ5z=Yn&*=Iwt%C4_>KGdGB1F0p&IG zbaYExW|!G)8l<53&TNOwEIY36o|Wa?4+&bh@dv)=m#X%&4exGXp1{J7oAUHpx&&0Z z{R_D>fC+s1?lZ~EhVH`#6k|030caAbnaf`{cfBVlb61?p`#5IvQ;63AD`1Vi@13Dt z^J#!vRsoYKz?)d$5E|F?uPz6DDv4lY3@ymFz3PEQ3zg8yIb0TLpSKOZ)@@}naXU?D zC0*T^2ayFb+NAZRIKgEu5lqyQvh1%Z;uvOd^_wNG%f~SE@XqOc^AJ5ZDPMp`Usu4M z6{~n`s7TfoGs&lmZlt<>{d-@n@8uEOt8U*uU*ScIdAL#uTGRvD#~WKXkxSA`;-X5= zxLT0mP0rpF$n*L&+!HcpnLuMRJ{4}J1mu#~7^mCgL^ULY|8?((AM3!c(9bdbEmwi` z4MCkBUsA|aM+Bk3$?f*w?&;M;3MpW+^-kiLxL4%z8coGmA${w2^qF3&+J>Z$SKf7u zH_R`*?x;2H>IA7cUepYlGb?ymag%GMq+xq!pQ%#N@%$^V8l7Um&hf zX(12gbx73Tn2anb(Q=HlK~pG=qHR&MuQy6}!OlSJs;9z$k3t%qPkn2W!uEB5-C0;^ zyAgROS^+8AXYWHcrBm-B8{gA1A7RU^R?-6NWcS|R{Phx&`ss~X%i_$V7FjR)XRU%y|@hDl=V<=2A?AeRNdwqbX6aynCB>JFFMtAY1IzEb2 zf^d)wqCI5=pnDkmhNaI3qVK8+QBdPIxp_8~jce^hJ6WskIRF4K`_hsWhMtd+=U+Ni z{_vVTWVUQ_miw*XiT$A}(tq!fxE#qvne`(4XWI_yx9n#iN{A?I4hOo4d)ZRz3Dmz{Me1oFIy} zH&!%7f3)B)LSTWgh&>+;rkGdDs6bpi|0x^3e75(z|8AVuVgw{P8BO}#Iew5Owm@9p zsdznH-b6) zVS}Q5fuaVXB?OGN0l^bCS}&7qXbOh^ER>%H5HuaZ;rO~S@9P@@AnPpi6p>8qjEo4E zdz&FlTLJD1<^9+-uZ9M@CD3J{L0y1J5B3?Flvn=2K|d!&|3Vx^k3jixnQ630QXawi zxLu7g5b7Yr8ZUgbB!Ed5p7Tb6H)n~81MJn_wpT+DKsGP9GDlND0EFTnC(X71^vuDo zX9(!~2Xsj8?&6ld}*B|hoXd`Dki<<9Sf2e=V zJ(j;DqL7Z3(U7}V+7bC6S&;)} ziSqiE07BMVg%zlw0Hh3$pEhfK&puO2IHuG&fsla#f$VPNG&&;ggLZnj|6{<}1pUVVu!lJCJg+tokAb!? z?^`1WU;}P8jK-9F5Hv;Doz$wdRB_hi}xa&LH2)Xt^j1D+Dp<_H%!L=T1Bh8s$P32Ou??Qy-hoawR;hJG z@3ACXqcbNYMZ)eD#UyYz6NfP^X#V5zcvjX3T)XA|6Jd&8)3UQ?PF(DXhys?Hd3*MC zzfDu0-2{LPcInk$sbsLiY?Dg7764Eqr=dTGf;jSj<&Zh!#>WNi9XECP6YiHzW!z`* z+%~9&GYbP}`%J%HHWfr!a98y$Z?iuK*W@;7946kgPV?Ja%%Z=MaNwvc{x3#0v1j&~ zIRWln8>q8P0|iziTvW8*gs;KP+WN$4N0XC%`0l{GjUw}zs=7oAfP_}a?xaZz zCEl$Ht1P-jD(x5uWuM+7-FM?&zNO<|p&~LM8m|`HO?)3`J7VC;ujVV2wa8;U*rI$?%bD`Q>2gQA*7mgxocy)n(V%piqMVx!B4g z%(G#8lB7RN&8?4v)35{=}VRzZZ8Lr#aMNQp`2)DDOOZZ>4UL^mrm3RkiQHpTn;DFWy zuvtR6YvT@7@&@W*Xo)k(%Y>Et2O}q;lxj-U7>JSosD_L{63jf@0S_7x5;P2=* zYVSL_!u^_r)__iJ58`i*)iJJWywrkz(tKB8q`Rhhc$t3ube}&_$gEXKHdW(LBy8J5 zTA68}(|nUgg%z`qWdHgU=Mm+(+o?R=u?qNlt!lCDFb|x6qa<%K#R#{~6cpu;ng#R3 ze{}E`niuI#h!(pqWzc_Aoys@ai288VkhwZc3$=N-`#Arsv$R~ z5kdvu=2$gPXONQOK+z?;m42J`6PAS@6vFkHs(`cvque@;K?pK$M@#YmsjvnJa`+(NH%9f268>Sue->N;cmvm5zIu2&SH5n=+!PdSqd28c2H`$HoKw!O6-|TNDRd7f&etdzf-@h7% zQ*vUhOe`*x1u^0oP!V)h(55pV^y;}bcCJ_6M_~FzNqBgNhtAqc6IqZsN9=I9;b42c z+rg3w3JDgswZ&4d3?bDgsdDl1q}}}vKCRYPUJq^u#!&`56#MBBc29HAmKm_Sd^UQD z9c1R7p1O&OTAs5WySKd6`9c)55Oq?7G6>GjyBOfMAQku7j92K1O=s)0H)6j$f6Y2B zq(oHm1N@6L(kJ5rW7a)r;Dy3g*KwSe?k{J)eJ3i0EJ#Qx@5lZ3Vz&IQ1|Th@eU!bt?NwC8TiPVVqS>S4Z@`{#~_r4gpf41ms1jC3Qz) z!h@bhc&f-7GAnpi^19rX+FRP}Vqj&pb{-q^#=j7^Hht(36c*^RBss4oGF8JuLyW(5 z%ny<5Z02-wnh&?wBuSN68D;_vx6fqr5NeZk`-eza1^>SKB5QDc>9 z5{w}0>_XUY$(T^S@IO*eGF*Ww+0eP#E$F>!psvUGV5Fo-mwjY+lSVK_IvzbyLOrOH zUKOCbTK3#IQctk8(ID>ExU?EvD#|6q7rObqVq|wBVl#$mwUZInpEmZniJ^ZVm?LP746~dOG!ZW#8kS{QZ3~unqB9asRQf5X<3qWl{5pu-j|F| zbZcQQLwJ}&H74r&nFal!SEm85)l03vBJ0kSp&hKCkHp>sI=7?W`%}@JBYP@b*v_vW z1oR3B1)3Z9;+(wE7EJEM;GNwHNqfA3X0_#HQh->l0kXB?I^)sdhan9NEz%NhGXI2z z50g1cHSo7QQ&v7j%c&^fF*$+ULdGO~1ag;=sVBw3g6Wk~D7GoB-Je}sbE978PDELr zUWnC}1+YM|7q9Zip_5vSbI_L5onVJc&~<4pYV!+B#N5%ag12#$jN> z6)U^oiTH&$-z4wxzCe{pQr%%R@rNWzLY3X$yaH*dj~Mx)Z;k``TP>{SqIu(!j0j&L z4irS4%s5)dzR|LOL2H4PqM4gk$3u4EglI}(#?_9ae)L+Zpv+Kh>gVV-`e7hfLt)r= zuf*irZNV-os%RgwaW5#WJC#|X!9q@oc1*;@s7cIALf73+nQ zDj!GQfXy5i`AE2~r~rmfIWi>*E2&1xYk|+cQ#_oNAOU>(K|{J0$3l7=?NQal-@yJ-fB1C?fL5b?_3Gg|$PPby)XvfN_-MLn1k@97QLaVeR2R zGYoa4_9+b9I1w%5GuN@+-RWCdo5#?1t`Dpz|h&@+JMuWG>WfIoQ4uchAIcxE44`0w$>YBk+ZfHdNH>!-wt+ ztE>r5r(zw3s_v5v0;s@givTk0gQ2_@_Jt>)_Tc0zIWZVwkvMBR{oLXawR3bzNAH3O zM%>|ppeSTGHJ!n6uM$qb&{WVE*^t{~HrnQW1ZzY5a0Q^f^_JJdTv4lK=-)QqnnAuo zKgnPdDXczk{cEA~dhDfDo*Kjm{M8tafot`4;TmF1lAFfkcnLPX#volQDcGo}HANTJ z7YyUFmZt_nz=&9U7lM9b!2E1t=(PtUEJn z-l;(R!yoOA+#O3t_cd`7)>>t@6i`<_$Pw!p(9j*AE8Uz9MPU{OOdELP!E1|*0-Q3I zXR}6zj;lT3&yF^H722Co(isGw$?Lg5f_U{Mun1?z&9Ap-+W^#Wl*HzO>(HZ$qy;cl z#bnkGMuVxKVi7zqZRyEXc{Ff|=9<4|B0y243`0*d12KLsBxIfbr~ZZyeumge-yIql zpE)fYN!BniS&kPPePPMpo4tC%#5;AF&vG9Jk-yuLqJy5wD0>5Ye7{&aBVW;u{TVTr zDl-c^Lj5)F4~Fw?_Rx8G?h8e?}tJIZh40_ar2pgO)eOP+tZ zC-Oe@RiLrI{g{}_b!=ooo70(cU(S>kF`8RIpAxkgv(vI^UD)pSe!h3G*;0#p50fQ{ zND<7&XdX=hHVgCf7{owvh5^nmSJyPrz8r@4Gl9r>NJ^V8jJIc-!%~rNT`~LwJKO7L z7YKiu7L_&btFqoCV1Ay?`XucJs_b)uREqn&kjD{Vw2mW90IxGx<1f$#6+b+&vSc0K z5_&VhVF~gbd1#zP(@-r_s%DP(SEzG!-d#-+D2O}BxW{MDGOm9(R{J05HQ|2%60t)5 z@Zo=Y@%5%*ftJq`VuQlxDHtCXf6hLI2cQUH5TDG#5v0ru4}-fSOL*ty!!$ux_E0I_ znN&YcaKb*(xM(UdQI8&F%}N6I+L* z?~8T?kTxmAiSwR!>)%P{*2yCK!yFeJFT-Ke*U5z{mZp?TJZS+s>bF^~YV6b@<3IDj zurybT3!v}Yj!RXxFLLcAOjHzg2a$ke$B=7r-~moDRcb->Wy#cCL05w!kHZcDXN@|V z5jY-%DH(o3f7;``;s76W@9ft%Yxn>~S*7Y_X-fK?CVpp2>+i(IUZ4mm69O(#Kx9t+ zXT_sA8=TL*s4~I)7xqwg#7b9bmNWUMR~vKL&eLuSVHA$lu{@?3WDLiX`wK~fA`m&x zFH(*Gu|6XJDZ!vxRouODBA($UI?G}ry($Jpjw9lr<(HCmsz-l3mJK(HocgPOma30&GYKrM9K?=_?(lEgp(QU18bOn^K2}8P^BmVAF}Ar<)z`+(hzh~5?x(Q| zk!>+Nw&`c|oMr5=UlyuuOFhftiSkH+JekBLVuH6Aqd^rZJB4!!c_!Og2PFB1L3l9R zYin>lex$>2AmDC}Rj3kd^W_b}nLZBjw3QLn9i#Hktw8i(3&rj_#JkatdkgV_m`wEy zWHsPv0APD-F^3UlCxhZ#U0A6qG_ zZ%ok>aUiJs<_)o_7t%?(*2)&^AdAC;AUt@2+>e&4 z+5e`xUND%EKU_zeI}7&3I9|h!RHo4ekE}-O^TtWMCf@gep}s4VLI_=FC4tpME%sic z>X1lCaoLjw3Ir~KsU>3hgetT%L0gapOjC)PDA6T0?_{l5#tnqykzTZ!PkQ1kbh8q$ zQC;BkTI|#st8TK;8tdU>w$4L#YhK2v_WjM(FdA~ct-{E*Q1VYpQws6e>AedUUIi1q z97ts3xI%9Z_}L#n)Q0Oc>ax2ic&wk@6VP)d51?w4SO$KcldyF9$5l6Ss606(xnuX| zu|BZmL;$G24aTHSe(lny$p-4Y4|Bi#Nsvr|woqXRb9Of@%3SmF@iK3-#1REoDA@gp zbjQH6bxW6%iNz2}Y0H~6&=~2|Nuix4Mop{Qajz%2UZWZVrLXE06v90N%&Q$iLs`s* z6N?&m0@uCRdDNjQWS8Es$51$S?=Bqceq($vDZEa}QlM*jml|`SmjpWT#F`Z9U7m2* zCxmsMd){;VYjVZql4ZAV@x*9ADe;4MORPpU%_@@py^Mb3fGNaD)-b*3`5@#1hHL)C zI;F*?IkaU=fCYYiVjp&2fg{o_f?7T;RH>}hOwnKWxrQR_40g6M4Dp~$JJZXp_3>wo zqO7LDCT{xmcMIOw$3qn5miO}j=jk7!$59l-(7s)mQUu1T(w`!#fMA7xAG{_{;gDa# zU*>sw_H`9p@C(IM+6>TbG`+#`HjVpL{jj`$V{|&{%P%|h59&i+kleUP41w}d2EjT* zbfr#p6yjQ-5v~-^FysMV)5A!K#bE1Cd|3z*uwHI|;Nb@&#c9<&HGb+dGy~QP)ZK}lggI7<)b@_@IaW0m$fI8qh#bx!7TrE zpUv?Sq=l6~^0};6e5P1=0N%rReCEJ)Pv&4xd`KV0szmI8L}RfF)MNLT5_y;!M^cs7 z3e&g8@fpf0O90d6_lSipr>$z*=xxg`xI-VZ7|beghS1kW&vPXe!R{Xf3?W z<&}7-Wh?<&)9FpeZ31~!s(;72&MmJ>Wv64 zL3MaNHL4wYQ_YAy65Mzmyt|n}L!QuN;P1YU=ak_hQ6X@EZs8bmiqn#a36RjLTrocg zF@N~*LP@y(`Wa?Nio4sFlT&=hX$h|%bHEn&F3fzHEz0j24_C7a3&kkvmWQJ>xy~6y z)%lWI-U}xsfotrh_$95cAQFynYs6i|*bg_Gnf=gLO=$Xs4>H;pTma#Vh$aURt|Cru zo+Ex_$%x;p2oeU+Wv|M#`Ttc9v9snx(fUh=dcK~O6Li%0{1HD}?ad4VQa&yc9Vz?! z(_V+MbQSZ5C7$!x zL;Up=ztm^%%MC2|7sG;OXBR3w+ZY^g#7g*0e4mi7v*h82j=K{aWMK~ABq0c^WP>omeAT< zhvJm@Wv+5oCJ_yk+ZUkMxu+72g#xCuw1q{s&h(GQ7?Vy!2`P(?IsJlxwS&8UQQL0u zN}z6>j_QRe(A*C%4D6SdwKb8ggJi}s$e;bbt6(Q-TRWbyw{x&o5NL}(6$5{!JGY`m zzFOryh-}hCMZ>l^)L2_wwkOB)VIWt}L7ly&qoF1c<~v)#iODxD^?xxQY))r;W9ie; zNm{A>+QSLU{E^y!qDIZ?%HZJy zIa^#LHHnrZpwUm8mNCf~TSA4%Jp-@F=N z=>|`sgP13gP=LQ@+d|KkoF!~H@g*O)8}MwuEAlvuUGM9tDV37qG&BRF)XOyH{XSYYd4rm+7AZQV#C?$5q$8ot zblgL3WE6y|!q?~*GH4Zw7`Zl7*za6my(5e2BD3LDvF4DE%4(uXd*{z6a!lw~#7J+) zzdQ=kR~6vxgQ^qZFmYKz;O{=iHL`umOAP$#LY%T==odgVl4o4q&4+69p*=ea`L#o~ z5TAFgi{^PBpM|**V5y99M4T(hy2cAZ95J=g-aXp>3T zxNt?7wxZEk zt(&=59Lnc3E7lzGKj^=F;B_D}xx(y@l{2;9D$k`IVzHi7HiJ2Rb0C%@SDtXG#kfOC zAUm5P)DRJ{(+4KVXO>c+Cpcpa>V`_c2qs4(U=@AUIhS^KNHrs3oV)^{zD!$B3GYnX zG{a$hhW^f*ib{yolii~yJTsd zP{|?=SZa^${{F~J5)p73{>gF_`_;nbAfD}?YSJZw%nu5?H~G8OO9@3tC~fKC&x4KTku&?kkva?&zOs|yEh&(QvJW#yZyHlaPQ z4O20o#PLbz*sCRJ>`74Jfw^!+3_p0qB(AlE7E>Ep0J}(BcIoW**Q{#gCv`C! z3r8fHs8m73sG-$KmlY*U?9JIv2b3IZ>{^4-i1qDKeB=5QF173v6Nu!jTkhch2?V0K()IgEo51#n*?b`$R*_&vmGzl0yI zlo$%(#6+L|GJ0i5A?kgbW-rtL`*%H|c-Jpf5i-jxw@aQ@c3vl+K{rszL4IQ4>M0zE zO7DoXg>RBSf=!Obyu3-zt@n6bjI|8zI_icIn1$d-CGqCK{K-N;zm!59afRvsrNL(Q zz@-;2G+4j%WtUuNW;c9!FhtZlnD}+?I@XD4wy(PQCzd%(#na|+F;Rvk3$E{J@vHO( z=tj8jR4@d)+g>=6HipOz`v&>VXAjl#TK?&*t6)`UsHH%Fi)|F+iv;zdD?iBw_*yhS z1cSHKdEsPZCti{(LZ!kd8}VVgd1T1Av=UZ^o__w0%f0mlg`meM*VzSa2qHt!U>N21 z#aF(1`%*3<&&bCZ?!wfKZcowa5V#ij zJwure;UPR+(ghuT$4LX-J+*p-JmG)`(?Sd?66sN_c7nzHwlPykG@?A{iB1$e&g+H1 zHWmzlAvwmlp`&X+KuaEFDLhzFrYjz7^a%KmxPrJiY@-EQyZvCeKz0c{$R#Lw_9Qfw zm(^V|WTvWEXyaOlE^NpH1Z^48E=kE>Z>oo0=i4giloVrNkuf!Vqszg`KjWoHn=;F) zBBt-10%Q(0wlHxxp4PS8nL_!{bH#C)Db!Q5hG(x?9Q?iQ(nWYpw;u^&58o<{$&6Z( z(U%dqNx9a#=PK_xN7}=tN5zo;^O;BF+DW5s5sky|*_L%UoB%Z1`%h^~n zYxts>l+j-SnicZF21crXj|ghoo_*y5+LNW`zgmd-bP_vp*Mm!s_=8nu?FLckbS}73 z(9AqNt?;+Mm+l2sT0yjRuD(Tm7PGVhdGgk9BTc+%aj(Vn;n**l73Yj>ztYmfahtiV zU(V%0_S@dh_`i$bFBj(m>W3j}e!O+eXFJqQ?8-Ui)$foNJ)rb6o7x6Q>8t*n%xu3A z_09~sCThVlue!>Lp|ubvX_8tjB=F{*W9qsN zPTJcW7fG3W?TK*cZ^9O!Z!v0K&5}|%)gI9GP|9}H>WNFU?|HE+3yblJ@py~x*SM{L zmbi^w9_htVoHWIM;{j=yk3m1!=X<`pKqOSN0facZ;2C_%qxTS#o%nzO;x2zx*~^de zfGH@Hmo1qeK^D$pf`JY&SfDFPx$@&!s{6=CX*GTDFC0k`mX{nRg6WnIJGw;w>e%^B z=7p3V5>aO6x;vvhVttazvf#XW_G;u*HE&lM*()}u%(?QY9wposOo&V5R!$Kh~lY+~d#m>LMrN^khRf0U-k1TM%NVGA?XmkEi1@VV- z^5r>yuw~Z3p~ULV)}3S2PGV-%Ka^hp1?Xj1Ja|8hB8;;$;^ec;&FOB^7pw0ihmNMD zD$v^Igvl}Th32&%vl5&wzZ|$B%0~{vSsiSog~)yuF1iX!cj>XTwj9^*SLf6|gTCff zS@2~L?8mF*;BMu4tB&a6+&qaQu zfaOtYv$ZYW9A24f0e^IWTbW1VhaTb4VtOq-he{JngtmUeOrlSkEC%f4k9%5s%wi`_ zaFaTi?v)lro`biF{&}qS4kJ}@w@P?&qLARWRcBK}hy(%?#})aNF(1b>TRCr6|$x-9ukw(d?2)9a4t`vp|w zG3xgygClU?U1fyGh_%va?hkVR2h8s3##Xc5()BxR>Z0n#CCQ=C9BA58v+?)I@DW^v zmDifF&xN6OgeUl3hj$JRdzpr&l6E6Hob7-=rg63Hu)*MqG982n*ZiG-o&`Ru%0f+Z zgxr{+DDpSUBzoe&=oq0TLt zDC}X)-20i2lEF{Z@l`&Iy5~f{v%XuQt@rq}esXMe#aXSu8xsd|IQYB?|MIF~!@_HH z=ZOp!SC$29F5KTnF>4_l*S&3l`Y>U`%6P@=yu<9g)-uB}bfMwMT{x{OF9;igwSwJn z;r|h@_}I|~D|H|FWBXV?i@qdT#17i|w@+3*+{tqT1T8$e^NlfZDyy5Zjw?3RTv`Uw zTiH&pn+ayQNLVArdR%L#|L)HvyXs~htLWqC>?l}z0kCDBjxLa)pt2Ac? z!hI^8^dRl9r&M9Jh3pEXO2Gj-O9*7#pWvr-x=*{({+ta%s-eW`Exs7#q1QTPVG zw!S|kr|CQ1?z^z6plEXo#^Z=QMP2Btx@GKj601`vbb*VKOvo-PiEiTioZ;!h1_4tI zB94D)r87p@JhWySaxdQ$s6j=OrfdwW`N25h&q=;8FZl#Gt6^gG>)=ECAySHZJ?r)_ zOOx7Pj@O?w*h9%^$Vvxirm6Bd)`PXQP7N94I37h~V2lZbztvV!Gi)Vn)rd+3|GcoYMpI1vDI3^H(X}D8K558@UkL&Rc)xB4$+cLaLhO|L3iP|D}jy>9?WGFqw>peVS&Y|jHY)t zwlR5jIDzv`9Scpqi-`HUcnn&>3O_Dlma(U7*kUPcvG&8@R6IJ`+B5}WS{in_frWD>84`sqo1_X(Lk zJmMM6(n@wgo7ZO2@=(45ma1S}ml!eZt4!VeftZ_m*5#}=Tb_*+ z(59m!a%D6%%6rsCnU_CEP&V3l*t9r30Ka$X)IWt|VEO86EI1OLp9F@hPEpE3Xod>f zho=9AyZ94IavinR-Z(mJrbl1`rs|dx`^33=rZO0=I({WPC96A4tMTD90u$!8!fwY_^#oAEyAG=!!n)abenF7YlqXDavF~tt~_N*-uYNU58p< znAy{GLB%V6-*_7KAC`IM7GXc{awdWw5g*_YS8_!~wYF>;xH||}ALe0`pMdQ9c}n>V z!r1!gVnU_!C0(S^DqjzKZOGNxL!lq0%^vP-h{FvcCi^H5WGzyE>P5lV=Hc6Iqp?NE zYPG6w3l^C#8|ceyA*YEC|Cdp*TzmOCYYgTxemwX1dJ(@&dayK_JPp6m%2Hz9I#1)rNYuNRwMD@V z_l2v-lSwvQY=ifO;V3ze8+z6Kw02!{grT`eAT{nu_I>>vCo6{(TvA|${?hcFufC_t zZD6E{Co|nP1H?j>V|-PU(F$jg#X9$2eT{1^x9UZ_?`(a0TG}IcNSe<^Me1~2B9iXm z&8kllZow_ljq8!b$XQNoX@~phkE9d%AY~dNRjkn3Y)G~%&H*HGba`8;kTgf+@5o;f zeoJRu%6_e>^nKr)N?B0mb+;tJeel9{le1@h;^rdTN#A7Ize3oIo!-~1wal!Ef>XcT zyABA1a;RK_Kh;J8?^6$^wd1{J{1k!8A2n0mtv#r(aTT%kFeU=Ic(c8ZjO>BmlGAWvj(nF= z;V}J|l2Dy@bn?slS@ZPje-{Hp&gG{0)Zsl{jw`%$J?jO9DKsd*aUDTV&{wdztXIa9 zk(tBQhi$*rXG-lrecS`Gka|A2+#tml)Y@uJ-vc3{%&Z?D1qcRexZM99^6);xXhP}O zG>z=~H0NBs9_lIw$^`UM&9AzDAF6?5P51xv^P@iG&v2X3X0d#0T*jxuc-#Qx_Fi@9 z#QQF3~Cb_qiO|7VYJ5pq^>Vt)TBx7k>^XUBZ z0#2p)1iq_z{DO{J(>tn75qtXU5*+Ko5k~2=jVS_w-jT z&5e+S{qffFc;;C&rvDWj0ptE!g^XDGXbz3j1+CigDgw#9%QaI1Q4hw77ran>S0pQH zTpkRR&aM1{LbN8@ylFf>A#$B1DeEwm9mZ}n!J8qykLKlek-U!;JsBMc)8#WHgd9Kd zmz6^E(?aK=9PN)!dFrRg#n5)V%qrHfBc3zJ+I(Cfm7+vr7Eq_#wp`8TO!*+U5(@Qe zyAQ8i|AA*^I%u?jbKl6w>Jv2MRXJdY*@RhDdF%W-oxlOEe;G2(dJUj^8cY7&0-5-_gZ8{_6gWgJ u4LNKuR@TyaekJ3RObP#-KPN^zc>RihV1+CI0000000000000000002~bO0Ry literal 0 HcmV?d00001 diff --git a/boards/st/stm32u5g9j_dk2/doc/index.rst b/boards/st/stm32u5g9j_dk2/doc/index.rst new file mode 100644 index 00000000000..d70a7eea876 --- /dev/null +++ b/boards/st/stm32u5g9j_dk2/doc/index.rst @@ -0,0 +1,195 @@ +.. zephyr:board:: stm32u5g9j_dk2 + +Overview +******** + +The STM32U5G9J-DK2 Discovery kit is a complete demonstration and development +platform for the STM32U5G9ZJT6Q microcontroller, featuring an Arm |reg| Cortex |reg|‑M33 +core with Arm |reg| TrustZone |reg|. + +Leveraging the innovative ultra-low power-oriented features, 3 Mbytes of +embedded SRAM, 4 Mbytes of embedded flash memory, and rich graphics features, +the STM32U5G9J-DK2 Discovery kit enables users to prototype applications +with state-of-the-art energy efficiency, as well as providing stunning and +optimized graphics rendering with the support of a 2.5D Neo-Chrom accelerator, +chrom-ART Accelerator, and Chrom-GRC™ MMU. + +The STM32U5G9J-DK2 Discovery kit integrates a full range of hardware features +that help the user evaluate all the peripherals, such as a 5" RGB 800x480 pixels +TFT colored LCD module with a 24‑bit RGB interface and capacitive touch panel, +USB Type-C |reg| HS, Octo‑SPI flash memory device, ARDUINO |reg|, and STLINK-V3EC +(USART console). + +The STM32U5G9J-DK2 Discovery kit integrates an STLINK-V3EC embedded in-circuit +debugger and programmer for the STM32 microcontroller with a USB Virtual COM +port bridge and comes with the STM32CubeU5 MCU Package, which provides an STM32 +comprehensive software HAL library as well as various software examples. + +More information about the board can be found at the `STM32U5G9J-DK2 website`_. +More information about STM32U5G9ZJT6Q can be found here: + +- `STM32U5G9ZJ on www.st.com`_ +- `STM32U5 Series reference manual`_ +- `STM32U5Gxxx datasheet`_ + +Supported Features +================== + +.. zephyr:board-supported-hw:: + +Pin Mapping +=========== + +For more details please refer to `STM32U5G9J-DK2 board User Manual`_. + +Default Zephyr Peripheral Mapping: +---------------------------------- + +.. rst-class:: rst-columns + +- USART_1 TX/RX : PA9/PA10 (ST-Link Virtual Port Com) +- USART_2 TX/RX : PA2/PA3 +- LD2 : PD2 +- LD3 : PD4 +- User Button: PC13 +- I2C1 SCL/SDA : PG14/PG13 +- I2C2 SCL/SDA : PB10/PB11 +- SPI1 SCK/MISO/MOSI/CS : PA5/PA6/PB5/PA3 +- ADC1 : channel5 PA0, channel12 PA7 +- ADC4 : channel4 PC3 +- SDMMC1/LTDC conflicting pins: PC6, PC7, PC8, PC9, PB9 +- SDMMC1_CK : PC12 +- SDMMC1_CMD : PD2 +- SDMMC1_D0 : PC8 +- SDMMC1_D1 : PC9 +- SDMMC1_D2 : PC10 +- SDMMC1_D3 : PC11 +- SDMMC1_D4 : PB8 +- SDMMC1_D5 : PB9 +- SDMMC1_D6 : PC6 +- SDMMC1_D7 : PC7 +- LTDC_R0 : PC6 +- LTDC_R1 : PC7 +- LTDC_R2 : PE15 +- LTDC_R3 : PD8 +- LTDC_R4 : PD9 +- LTDC_R5 : PD10 +- LTDC_R6 : PD11 +- LTDC_R7 : PD12 +- LTDC_G0 : PC8 +- LTDC_G1 : PC9 +- LTDC_G2 : PE9 +- LTDC_G3 : PE10 +- LTDC_G4 : PE11 +- LTDC_G5 : PE12 +- LTDC_G6 : PE13 +- LTDC_G7 : PE14 +- LTDC_B0 : PB9 +- LTDC_B1 : PB2 +- LTDC_B2 : PD14 +- LTDC_B3 : PD15 +- LTDC_B4 : PD0 +- LTDC_B5 : PD1 +- LTDC_B6 : PE7 +- LTDC_B7 : PE8 +- LTDC_DE : PD6 +- LTDC_CLK : PD3 +- LTDC_HSYNC : PE0 +- LTDC_VSYNC : PD13 + +System Clock +============ + +The STM32U5G9J-DK Discovery 2 kit relies on an HSE oscillator (16 MHz crystal) +and an LSE oscillator (32.768 kHz crystal) as clock references. +Using the HSE (instead of HSI) is mandatory to manage the DSI interface for +the LCD module and the USB high‑speed interface. + +Serial Port +=========== + +The STM32U5G9J Discovery 2 kit has up to 4 USARTs, 2 UARTs, and 1 LPUART. +The Zephyr console output is assigned to USART1 which connected to the onboard +ST-LINK/V3.0. Virtual COM port interface. Default communication settings are +115200 8N1. + + +Programming and Debugging +************************* + +.. zephyr:board-supported-runners:: + +STM32U5G9J Discovery 2 kit includes an ST-LINK/V3 embedded debug tool interface. +This probe allows to flash and debug the board using various tools. + +Flashing +======== + +The board is configured to be flashed using west `STM32CubeProgrammer`_ runner, +so its :ref:`installation ` is required. + +Alternatively, OpenOCD can also be used to flash the board using +the ``--runner`` (or ``-r``) option: + +.. code-block:: console + + $ west flash --runner openocd + +Flashing an application to STM32U5G9J_DK2 +----------------------------------------- + +Connect the STM32U5G9J Discovery 2 board to your host computer using the USB +port, then run a serial host program to connect with your Discovery +board. For example: + +.. code-block:: console + + $ minicom -D /dev/ttyACM0 -b 115200 + +Then, build and flash in the usual way. Here is an example for the +:zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: stm32u5g9j_dk2 + :goals: build flash + +You should see the following message on the console: + +.. code-block:: console + + Hello World! stm32u5g9j_dk2 + +Debugging +========= + +Default debugger for this board is openocd. It could be used in the usual way +with "west debug" command. +Here is an example for the :zephyr:code-sample:`blinky` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/basic/blinky + :board: stm32u5g9j_dk2 + :goals: debug + + +.. _STM32U5G9J-DK2 website: + https://www.st.com/en/evaluation-tools/stm32u5g9j-dk2.html + +.. _STM32U5G9J-DK2 board User Manual: + https://www.st.com/resource/en/user_manual/um3223-discovery-kit-with-stm32u5g9zj-mcu-stmicroelectronics.pdf + +.. _STM32U5G9ZJ on www.st.com: + https://www.st.com/en/microcontrollers-microprocessors/stm32u5g9zj.html + +.. _STM32U5 Series reference manual: + https://www.st.com/resource/en/reference_manual/rm0456-stm32u5-series-armbased-32bit-mcus-stmicroelectronics.pdf + +.. _STM32U5Gxxx datasheet: + https://www.st.com/resource/en/datasheet/stm32u5g7vj.pdf + +.. _STM32CubeProgrammer: + https://www.st.com/en/development-tools/stm32cubeprog.html + +.. _STM32U5G9J_DK2 board schematics: + https://www.st.com/resource/en/schematic_pack/mb1918-u5g9zjq-c01-schematic.pdf diff --git a/boards/st/stm32u5g9j_dk2/stm32u5g9j_dk2.dts b/boards/st/stm32u5g9j_dk2/stm32u5g9j_dk2.dts new file mode 100644 index 00000000000..a2425e4cc3d --- /dev/null +++ b/boards/st/stm32u5g9j_dk2/stm32u5g9j_dk2.dts @@ -0,0 +1,337 @@ +/* + * Copyright (c) 2025 STMicroelectronics + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include +#include + +/ { + model = "STMicroelectronics STM32U5G9J DISCOVERY-2 KIT board"; + compatible = "st,stm32u5g9j-dk2"; + + chosen { + zephyr,console = &usart1; + zephyr,shell-uart = &usart1; + zephyr,sram = &sram0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + zephyr,display = <dc; + }; + + leds { + compatible = "gpio-leds"; + + green_led_0: led_3 { + gpios = <&gpiod 4 GPIO_ACTIVE_HIGH>; + label = "User LD3"; + }; + + red_led_0: led_2 { + gpios = <&gpiod 2 GPIO_ACTIVE_HIGH>; + label = "User LD2"; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + + user_button: button_0 { + label = "User"; + gpios = <&gpioc 13 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; + zephyr,code = ; + }; + }; + + aliases { + led0 = &green_led_0; + led1 = &red_led_0; + sw0 = &user_button; + sdhc0 = &sdmmc1; /* disabled by default : conflict with ltdc node */ + watchdog0 = &iwdg; + die-temp0 = &die_temp; + volt-sensor0 = &vref1; + volt-sensor1 = &vbat4; + }; +}; + +<dc { + pinctrl-0 = <<dc_r0_pc6 <dc_r1_pc7 <dc_r2_pe15 <dc_r3_pd8 + <dc_r4_pd9 <dc_r5_pd10 <dc_r6_pd11 <dc_r7_pd12 + <dc_g0_pc8 <dc_g1_pc9 <dc_g2_pe9 <dc_g3_pe10 + <dc_g4_pe11 <dc_g5_pe12 <dc_g6_pe13 <dc_g7_pe14 + <dc_b0_pb9 <dc_b1_pb2 <dc_b2_pd14 <dc_b3_pd15 + <dc_b4_pd0 <dc_b5_pd1 <dc_b6_pe7 <dc_b7_pe8 + <dc_de_pd6 <dc_clk_pd3 <dc_hsync_pe0 <dc_vsync_pd13>; + pinctrl-names = "default"; + disp-on-gpios = <&gpioe 4 GPIO_ACTIVE_HIGH>; + bl-ctrl-gpios = <&gpioe 6 GPIO_ACTIVE_HIGH>; + status = "okay"; + + width = <800>; + height = <480>; + pixel-format = ; + + def-back-color-red = <0x00>; + def-back-color-green = <0x00>; + def-back-color-blue = <0x00>; + + display-timings { + compatible = "zephyr,panel-timing"; + de-active = <0>; + pixelclk-active = <0>; + hsync-active = <0>; + vsync-active = <0>; + hsync-len = <5>; + vsync-len = <5>; + hback-porch = <8>; + vback-porch = <8>; + hfront-porch = <8>; + vfront-porch = <14>; + }; +}; + +&clk_hsi48 { + status = "okay"; +}; + +&clk_hse { + clock-frequency = ; + status = "okay"; +}; + +&clk_msis { + status = "okay"; + msi-range = <4>; /* 4MHz (reset value) */ + msi-pll-mode; +}; + +&clk_lse { + status = "okay"; +}; + +&pll1 { + div-m = <4>; + mul-n = <80>; + div-p = <2>; + div-q = <2>; + div-r = <2>; + clocks = <&clk_hse>; + status = "okay"; +}; + +&pll2 { + div-m = <4>; + mul-n = <66>; + div-p = <2>; + div-q = <2>; + div-r = <2>; + clocks = <&clk_hse>; + status = "okay"; +}; + +&pll3 { + div-m = <4>; + mul-n = <125>; + div-p = <20>; + div-q = <20>; + div-r = <20>; + clocks = <&clk_hse>; + status = "okay"; +}; + +&rcc { + clocks = <&pll1>; + clock-frequency = ; + ahb-prescaler = <1>; + apb1-prescaler = <1>; + apb2-prescaler = <1>; + apb3-prescaler = <1>; +}; + +&usart1 { + pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>; + pinctrl-names = "default"; + current-speed = <115200>; + status = "okay"; +}; + +&usart2 { + pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>; + pinctrl-names = "default"; + current-speed = <115200>; + status = "okay"; +}; + +&i2c1 { + pinctrl-0 = <&i2c1_scl_pg14 &i2c1_sda_pg13>; + pinctrl-names = "default"; + status = "okay"; + clock-frequency = ; +}; + +&i2c2 { + pinctrl-0 = <&i2c2_scl_pb10 &i2c2_sda_pb11>; + pinctrl-names = "default"; + status = "okay"; + clock-frequency = ; +}; + +&spi1 { + pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pb5>; + pinctrl-names = "default"; + cs-gpios = <&gpiob 11 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + status = "okay"; +}; + +&timers1 { + st,prescaler = <1>; + status = "okay"; + + pwm1: pwm { + status = "okay"; + pinctrl-0 = <&tim1_ch2_pe11>; + pinctrl-names = "default"; + }; +}; + +&timers2 { + st,prescaler = <1>; + status = "okay"; + + pwm2: pwm { + status = "okay"; + pinctrl-0 = <&tim2_ch4_pa3>; + pinctrl-names = "default"; + }; +}; + +/* Connected to onboard 4-Gbyte eMMC flash memory */ +&sdmmc1 { + pinctrl-0 = <&sdmmc1_d0_pc8 &sdmmc1_d1_pc9 + &sdmmc1_d2_pc10 &sdmmc1_d3_pc11 + &sdmmc1_d4_pb8 &sdmmc1_d5_pb9 + &sdmmc1_d6_pc6 &sdmmc1_d7_pc7 + &sdmmc1_ck_pc12 &sdmmc1_cmd_pd2>; + pinctrl-names = "default"; + /* disabled due to conflicting pins pc6, pc7, pc8 + * pc9 and pb9 with LTDC node. + */ + status = "disabled"; +}; + +&gpdma1 { + status = "okay"; +}; + +&adc1 { + pinctrl-0 = <&adc1_in5_pa0 &adc1_in12_pa7>; + pinctrl-names = "default"; + st,adc-clock-source = "ASYNC"; + st,adc-prescaler = <1>; + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + + channel@5 { + reg = <0x5>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <14>; + }; + + channel@c { + reg = <0xc>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <14>; + }; +}; + +&adc4 { + pinctrl-0 = <&adc4_in4_pc3>; + pinctrl-names = "default"; + st,adc-clock-source = "ASYNC"; + st,adc-prescaler = <1>; + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + + channel@4 { + reg = <0x4>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; +}; + +zephyr_udc0: &usbotg_hs { + pinctrl-0 = <&usb_otg_hs_dm_pa11 &usb_otg_hs_dp_pa12>; + pinctrl-names = "default"; + status = "okay"; +}; + +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + /* + * Following flash partition is dedicated to the use of bootloader + */ + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x00000000 DT_SIZE_K(64)>; + }; + + slot0_partition: partition@10000 { + label = "image-0"; + reg = <0x00010000 DT_SIZE_K(1952)>; + }; + + slot1_partition: partition@1f8000 { + label = "image-1"; + reg = <0x001f8000 DT_SIZE_K(1960)>; + }; + + storage_partition: partition@3e2000 { + label = "storage"; + reg = <0x003e2000 DT_SIZE_K(120)>; + }; + }; +}; + +&rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB3 0x00200000>, + <&rcc STM32_SRC_LSE RTC_SEL(1)>; + status = "okay"; +}; + +&iwdg { + status = "okay"; +}; + +&rng { + status = "okay"; +}; + +&die_temp { + status = "okay"; +}; + +&vref1 { + status = "okay"; +}; + +&vbat4 { + status = "okay"; +}; diff --git a/boards/st/stm32u5g9j_dk2/stm32u5g9j_dk2.yaml b/boards/st/stm32u5g9j_dk2/stm32u5g9j_dk2.yaml new file mode 100644 index 00000000000..9897045eb2f --- /dev/null +++ b/boards/st/stm32u5g9j_dk2/stm32u5g9j_dk2.yaml @@ -0,0 +1,25 @@ +identifier: stm32u5g9j_dk2 +name: ST STM32U5G9J-DK2 Discovery Kit 2 +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb +supported: + - gpio + - led + - button + - uart + - usart + - lpuart + - watchdog + - spi + - i2c + - flash + - sdmmc + - timer + - rng + - rtc +ram: 3008 +flash: 4096 +vendor: st diff --git a/boards/st/stm32u5g9j_dk2/stm32u5g9j_dk2_defconfig b/boards/st/stm32u5g9j_dk2/stm32u5g9j_dk2_defconfig new file mode 100644 index 00000000000..c3e5fef3399 --- /dev/null +++ b/boards/st/stm32u5g9j_dk2/stm32u5g9j_dk2_defconfig @@ -0,0 +1,18 @@ +# Copyright (c) 2025 STMicroelectronics +# SPDX-License-Identifier: Apache-2.0 + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable HW stack protection +CONFIG_HW_STACK_PROTECTION=y + +# Enable serial +CONFIG_SERIAL=y + +# Enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# Enable GPIO +CONFIG_GPIO=y diff --git a/boards/st/stm32u5g9j_dk2/support/openocd.cfg b/boards/st/stm32u5g9j_dk2/support/openocd.cfg new file mode 100644 index 00000000000..23e2409440f --- /dev/null +++ b/boards/st/stm32u5g9j_dk2/support/openocd.cfg @@ -0,0 +1,46 @@ +source [find interface/stlink-dap.cfg] + +set WORKAREASIZE 0x8000 + +transport select "dapdirect_swd" + +set CHIPNAME STM32U5A9NJHxQ +set BOARDNAME STM32U5A9J_DK + +# Enable debug when in low power modes +set ENABLE_LOW_POWER 1 + +# Stop Watchdog counters when halt +set STOP_WATCHDOG 1 + +# STlink Debug clock frequency +set CLOCK_FREQ 8000 + +# Reset configuration +# use hardware reset, connect under reset +# connect_assert_srst needed if low power mode application running (WFI...) +reset_config srst_only srst_nogate connect_assert_srst +set CONNECT_UNDER_RESET 1 +set CORE_RESET 0 + +# ACCESS PORT NUMBER +set AP_NUM 0 +# GDB PORT +set GDB_PORT 3333 + +# BCTM CPU variables + +source [find target/stm32u5x.cfg] + +$_TARGETNAME configure -event gdb-attach { + echo "Debugger attaching: halting execution" + reset halt + gdb_breakpoint_override hard +} + +$_TARGETNAME configure -event gdb-detach { + echo "Debugger detaching: resuming execution" + resume +} + +gdb_memory_map disable From 3f67e2efd4fa500ebf82fe1bc4060783f2c5e17e Mon Sep 17 00:00:00 2001 From: Fabrice DJIATSA Date: Wed, 16 Apr 2025 14:57:50 +0200 Subject: [PATCH 0088/2553] samples: drivers: display: update display sample add stm32u5g9j_dk2 conf file for display app. Signed-off-by: Fabrice DJIATSA --- samples/drivers/display/boards/stm32u5g9j_dk2.conf | 10 ++++++++++ 1 file changed, 10 insertions(+) create mode 100644 samples/drivers/display/boards/stm32u5g9j_dk2.conf diff --git a/samples/drivers/display/boards/stm32u5g9j_dk2.conf b/samples/drivers/display/boards/stm32u5g9j_dk2.conf new file mode 100644 index 00000000000..7897a882952 --- /dev/null +++ b/samples/drivers/display/boards/stm32u5g9j_dk2.conf @@ -0,0 +1,10 @@ +# +# Copyright (c) 2025 STMicroelectronics +# +# SPDX-License-Identifier: Apache-2.0 +# + +CONFIG_HEAP_MEM_POOL_SIZE=172840 +CONFIG_IDLE_STACK_SIZE=8192 +CONFIG_PRIVILEGED_STACK_SIZE=8192 +CONFIG_MAIN_STACK_SIZE=4096 From 1e5f8bacfe958282ced6a07697f46aba692b32c3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?H=C3=A5vard=20Reierstad?= Date: Thu, 24 Apr 2025 08:15:46 +0200 Subject: [PATCH 0089/2553] Bluetooth: Doc: Improve docs in bluetooth.h MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Adds improvements to the API docs in bluetooth.h, with the aim of making the API less ambiguous and more informative. Signed-off-by: Håvard Reierstad --- include/zephyr/bluetooth/bluetooth.h | 244 +++++++++++++++------------ include/zephyr/bluetooth/gap.h | 2 + 2 files changed, 134 insertions(+), 112 deletions(-) diff --git a/include/zephyr/bluetooth/bluetooth.h b/include/zephyr/bluetooth/bluetooth.h index 425d9a7a1b9..c6832764759 100644 --- a/include/zephyr/bluetooth/bluetooth.h +++ b/include/zephyr/bluetooth/bluetooth.h @@ -302,9 +302,9 @@ typedef void (*bt_ready_cb_t)(int err); * When @kconfig{CONFIG_BT_SETTINGS} is enabled, the application must load the * Bluetooth settings after this API call successfully completes before * Bluetooth APIs can be used. Loading the settings before calling this function - * is insufficient. Bluetooth settings can be loaded with settings_load() or - * settings_load_subtree() with argument "bt". The latter selectively loads only - * Bluetooth settings and is recommended if settings_load() has been called + * is insufficient. Bluetooth settings can be loaded with @ref settings_load or + * @ref settings_load_subtree with argument "bt". The latter selectively loads only + * Bluetooth settings and is recommended if @ref settings_load has been called * earlier. * * @param cb Callback to notify completion or NULL to perform the @@ -321,7 +321,7 @@ int bt_enable(bt_ready_cb_t cb); * * This API will clear all configured identity addresses and keys that are not persistently * stored with @kconfig{CONFIG_BT_SETTINGS}. These can be restored - * with settings_load() before reenabling the stack. + * with @ref settings_load before reenabling the stack. * * This API does _not_ clear previously registered callbacks * like @ref bt_le_scan_cb_register, @ref bt_conn_cb_register @@ -347,11 +347,11 @@ bool bt_is_ready(void); * * Set Bluetooth GAP Device Name. * - * When advertising with device name in the advertising data the name should - * be updated by calling @ref bt_le_adv_update_data or - * @ref bt_le_ext_adv_set_data. + * @note The advertising data is not automatically updated. When advertising with device name in the + * advertising data, the name should be updated by calling @ref bt_le_adv_update_data or + * @ref bt_le_ext_adv_set_data after the call to this function. * - * @note Requires @kconfig{CONFIG_BT_DEVICE_NAME_DYNAMIC}. + * @kconfig_dep{CONFIG_BT_DEVICE_NAME_DYNAMIC} * * @sa @kconfig{CONFIG_BT_DEVICE_NAME_MAX}. * @@ -376,7 +376,7 @@ const char *bt_get_name(void); * Bluetooth Appearance is a description of the external appearance of a device * in terms of an Appearance Value. * - * @see https://specificationrefs.bluetooth.com/assigned-values/Appearance%20Values.pdf + * @see Section 2.6 of the Bluetooth SIG Assigned Numbers document. * * @returns Appearance Value of local Bluetooth host. */ @@ -388,8 +388,7 @@ uint16_t bt_get_appearance(void); * Automatically preserves the new appearance across reboots if * @kconfig{CONFIG_BT_SETTINGS} is enabled. * - * This symbol is linkable if @kconfig{CONFIG_BT_DEVICE_APPEARANCE_DYNAMIC} is - * enabled. + * @kconfig_dep{CONFIG_BT_DEVICE_APPEARANCE_DYNAMIC} * * @param new_appearance Appearance Value * @@ -403,7 +402,7 @@ int bt_set_appearance(uint16_t new_appearance); * * Returns an array of the currently configured identity addresses. To * make sure all available identity addresses can be retrieved, the number of - * elements in the @a addrs array should be CONFIG_BT_ID_MAX. The identity + * elements in the @a addrs array should be @kconfig{CONFIG_BT_ID_MAX}. The identity * handle that some APIs expect (such as @ref bt_le_adv_param) is * simply the index of the identity address in the @a addrs array. * @@ -423,9 +422,9 @@ void bt_id_get(bt_addr_le_t *addrs, size_t *count); * @brief Create a new identity address. * * Create a new identity address using the given address and IRK. This function can be - * called before calling bt_enable(). However, the new identity address will only be - * stored persistently in flash when this API is used after bt_enable(). The - * reason is that the persistent settings are loaded after bt_enable() and would + * called before calling @ref bt_enable. However, the new identity address will only be + * stored persistently in flash when this API is used after @ref bt_enable. The + * reason is that the persistent settings are loaded after @ref bt_enable and would * therefore cause potential conflicts with the stack blindly overwriting what's * stored in flash. The identity address will also not be written to flash in case a * pre-defined address is provided, since in such a situation the app clearly @@ -434,26 +433,24 @@ void bt_id_get(bt_addr_le_t *addrs, size_t *count); * information in flash. * * Generating random static address or random IRK is not supported when calling - * this function before bt_enable(). + * this function before @ref bt_enable. * * If the application wants to have the stack randomly generate identity addresses * and store them in flash for later recovery, the way to do it would be - * to first initialize the stack (using bt_enable), then call settings_load(), - * and after that check with bt_id_get() how many identity addresses were recovered. + * to first initialize the stack (using bt_enable), then call @ref settings_load, + * and after that check with @ref bt_id_get how many identity addresses were recovered. * If an insufficient amount of identity addresses were recovered the app may then - * call bt_id_create() to create new ones. + * call this function to create new ones. * - * If supported by the HCI driver (indicated by setting - * @kconfig{CONFIG_BT_HCI_SET_PUBLIC_ADDR}), the first call to this function can be - * used to set the controller's public identity address. This call must happen - * before calling bt_enable(). Subsequent calls always add/generate random - * static addresses. + * @note If @kconfig{CONFIG_BT_HCI_SET_PUBLIC_ADDR} is enabled, the first call can set a + * public address as the controller's identity, but only before @ref bt_enable and if + * no other identities exist. * * @param addr Address to use for the new identity address. If NULL or initialized * to BT_ADDR_LE_ANY the stack will generate a new random static address * for the identity address and copy it to the given parameter upon return * from this function (in case the parameter was non-NULL). - * @param irk Identity Resolving Key (16 bytes) to be used with this + * @param irk Identity Resolving Key (16 octets) to be used with this * identity address. If set to all zeroes or NULL, the stack will * generate a random IRK for the identity address and copy it back * to the parameter upon return from this function (in case @@ -468,23 +465,20 @@ int bt_id_create(bt_addr_le_t *addr, uint8_t *irk); /** * @brief Reset/reclaim an identity address for reuse. * - * The semantics of the @a addr and @a irk parameters of this function - * are the same as with bt_id_create(). The difference is the first - * @a id parameter that needs to be an existing identity handle (if it doesn't - * exist this function will return an error). When given an existing identity handle - * this function will disconnect any connections (to the corresponding identity address) - * created using it, remove any pairing keys or other data associated with it, and then - * create a new identity address in the same slot, based on the @a addr and @a irk parameters. + * When given an existing identity handle, this function will disconnect any connections (to the + * corresponding identity address) created using it, remove any pairing keys or other data + * associated with it, and then create a new identity address in the same slot, based on the @a addr + * and @a irk parameters. * - * @note The default identity address (corresponding to BT_ID_DEFAULT) cannot be reset, and this - * API will return an error if asked to do that. + * @note The default identity address (corresponding to @ref BT_ID_DEFAULT) cannot be reset, and + * this API will return an error if asked to do that. * * @param id Existing identity handle. * @param addr Address to use for the new identity address. If NULL or initialized * to BT_ADDR_LE_ANY the stack will generate a new static random * address for the identity address and copy it to the given * parameter upon return from this function. - * @param irk Identity Resolving Key (16 bytes) to be used with this + * @param irk Identity Resolving Key (16 octets) to be used with this * identity address. If set to all zeroes or NULL, the stack will * generate a random IRK for the identity address and copy it back * to the parameter upon return from this function (in case @@ -503,10 +497,10 @@ int bt_id_reset(uint8_t id, bt_addr_le_t *addr, uint8_t *irk); * (to the corresponding identity address) created using it, remove any pairing keys * or other data associated with it, and then flag is as deleted, so that it can not * be used for any operations. To take back into use the slot the identity address was - * occupying, the bt_id_reset() API needs to be used. + * occupying, the @ref bt_id_reset API needs to be used. * - * @note The default identity address (corresponding to BT_ID_DEFAULT) cannot be deleted, and this - * API will return an error if asked to do that. + * @note The default identity address (corresponding to @ref BT_ID_DEFAULT) cannot be deleted, and + * this API will return an error if asked to do that. * * @param id Existing identity handle. * @@ -551,7 +545,7 @@ struct bt_data { * * @param _type Type of advertising data field * @param _data Pointer to the data field payload - * @param _data_len Number of bytes behind the _data pointer + * @param _data_len Number of octets behind the _data pointer */ #define BT_DATA(_type, _data, _data_len) \ { \ @@ -574,20 +568,21 @@ struct bt_data { sizeof((uint8_t []) { _bytes })) /** - * @brief Get the total size (in bytes) of a given set of @ref bt_data + * @brief Get the total size (in octets) of a given set of @ref bt_data * structures. * + * The total size includes the length (1 octet) and type (1 octet) fields for each element, plus + * their respective data lengths. + * * @param[in] data Array of @ref bt_data structures. * @param[in] data_count Number of @ref bt_data structures in @p data. * - * @return Size of the concatenated data, built from the @ref bt_data structure - * set. + * @return Size of the concatenated data, built from the @ref bt_data structure set. */ size_t bt_data_get_len(const struct bt_data data[], size_t data_count); /** - * @brief Serialize a @ref bt_data struct into an advertising structure (a flat - * byte array). + * @brief Serialize a @ref bt_data struct into an advertising structure (a flat array). * * The data are formatted according to the Bluetooth Core Specification v. 5.4, * vol. 3, part C, 11. @@ -597,7 +592,7 @@ size_t bt_data_get_len(const struct bt_data data[], size_t data_count); * @p input. The size of it must be at least the size of the * `input->data_len + 2` (for the type and the length). * - * @return Number of bytes written in @p output. + * @return Number of octets written in @p output. */ size_t bt_data_serialize(const struct bt_data *input, uint8_t *output); @@ -674,7 +669,7 @@ struct bt_le_local_features { /** * @brief Get local Bluetooth LE controller features * - * Can only be called after bt_enable() + * Can only be called after @ref bt_enable. * * @param local_features Local features struct to be populated with information. * @@ -731,7 +726,7 @@ enum bt_le_adv_opt { * Don't try to resume connectable advertising after a connection. * This option is only meaningful when used together with * BT_LE_ADV_OPT_CONNECTABLE. If set the advertising will be stopped - * when bt_le_adv_stop() is called or when an incoming (peripheral) + * when @ref bt_le_adv_stop is called or when an incoming (peripheral) * connection happens. If this option is not set the stack will * take care of keeping advertising enabled even as connections * occur. @@ -870,7 +865,7 @@ enum bt_le_adv_opt { * @note Enabling this option requires extended advertising support in * the peer devices scanning for advertisement packets. * - * @note This cannot be used with bt_le_adv_start(). + * @note This cannot be used with @ref bt_le_adv_start. */ BT_LE_ADV_OPT_EXT_ADV = BIT(10), @@ -969,7 +964,7 @@ enum bt_le_adv_opt { * Coding Selection. If these conditions are not met, it will default to * no required coding scheme. * - * @note Requires @kconfig{BT_EXT_ADV_CODING_SELECTION} + * @kconfig_dep{BT_EXT_ADV_CODING_SELECTION} */ BT_LE_ADV_OPT_REQUIRE_S2_CODING = BIT(20), @@ -986,7 +981,7 @@ enum bt_le_adv_opt { * Coding Selection. If these conditions are not met, it will default to * no required coding scheme. * - * @note Requires @kconfig{BT_EXT_ADV_CODING_SELECTION} + * @kconfig_dep{BT_EXT_ADV_CODING_SELECTION} */ BT_LE_ADV_OPT_REQUIRE_S8_CODING = BIT(21), }; @@ -1006,7 +1001,8 @@ struct bt_le_adv_param { uint8_t id; /** - * @brief Advertising Set Identifier, valid range 0x00 - 0x0f. + * @brief Advertising Set Identifier, valid range is @ref BT_GAP_SID_MIN to + * @ref BT_GAP_SID_MAX. * * @note Requires @ref BT_LE_ADV_OPT_EXT_ADV bit (see @ref bt_le_adv_opt field) to be *set as @ref bt_le_adv_param.options. @@ -1058,12 +1054,12 @@ struct bt_le_adv_param { * advertising to the remote device. * * The advertising type will either be high duty cycle, or low duty - * cycle if the BT_LE_ADV_OPT_DIR_MODE_LOW_DUTY option is enabled. + * cycle if the @ref BT_LE_ADV_OPT_DIR_MODE_LOW_DUTY option is enabled. * When using @ref BT_LE_ADV_OPT_EXT_ADV then only low duty cycle is * allowed. * * In case of connectable high duty cycle if the connection could not - * be established within the timeout the connected() callback will be + * be established within the timeout the connected callback will be * called with the status set to @ref BT_HCI_ERR_ADV_TIMEOUT. */ const bt_addr_le_t *peer; @@ -1472,10 +1468,8 @@ struct bt_le_per_adv_param { * Set advertisement data, scan response data, advertisement parameters * and start advertising. * - * When the advertisement parameter peer address has been set the advertising - * will be directed to the peer. In this case advertisement data and scan - * response data parameters are ignored. If the mode is high duty cycle - * the timeout will be @ref BT_GAP_ADV_HIGH_DUTY_CYCLE_MAX_TIMEOUT. + * When @p param.peer is set, the advertising will be directed to that peer device. In this case, + * the other function parameters are ignored. * * This function cannot be used with @ref BT_LE_ADV_OPT_EXT_ADV in the @p param.options. * For extended advertising, the bt_le_ext_adv_* functions must be used. @@ -1527,8 +1521,13 @@ int bt_le_adv_stop(void); /** * @brief Create advertising set. * - * Create a new advertising set and set advertising parameters. - * Advertising parameters can be updated with @ref bt_le_ext_adv_update_param. + * Create an instance of an independent advertising set with its own parameters and data. + * The advertising set remains valid until deleted with @ref bt_le_ext_adv_delete. + * Advertising parameters can be updated with @ref bt_le_ext_adv_update_param, and advertising + * can be started with @ref bt_le_ext_adv_start. + * + * @note The number of supported extended advertising sets can be controlled by + * @kconfig{CONFIG_BT_EXT_ADV_MAX_ADV_SET}. * * @param[in] param Advertising parameters. * @param[in] cb Callback struct to notify about advertiser activity. Can be @@ -1606,13 +1605,15 @@ struct bt_le_ext_adv_start_param { /** * @brief Start advertising with the given advertising set * - * If the advertiser is limited by either the timeout or number of advertising - * events the application will be notified by the advertiser sent callback once + * If the advertiser is limited by either the @p param.timeout or @p param.num_events, + * the application will be notified by the @ref bt_le_ext_adv_cb.sent callback once * the limit is reached. * If the advertiser is limited by both the timeout and the number of - * advertising events then the limit that is reached first will stop the + * advertising events, then the limit that is reached first will stop the * advertiser. * + * @note The advertising set @p adv can be created with @ref bt_le_ext_adv_create. + * * @param adv Advertising set object. * @param param Advertise start parameters. */ @@ -1639,18 +1640,19 @@ int bt_le_ext_adv_stop(struct bt_le_ext_adv *adv); * subsequent advertising events. * * When both @ref BT_LE_ADV_OPT_EXT_ADV and @ref BT_LE_ADV_OPT_SCANNABLE are - * enabled then advertising data is ignored. + * enabled then advertising data is ignored and only scan response data is used. * When @ref BT_LE_ADV_OPT_SCANNABLE is not enabled then scan response data is - * ignored. + * ignored and only advertising data is used. * * If the advertising set has been configured to send advertising data on the * primary advertising channels then the maximum data length is - * @ref BT_GAP_ADV_MAX_ADV_DATA_LEN bytes. + * @ref BT_GAP_ADV_MAX_ADV_DATA_LEN octets. * If the advertising set has been configured for extended advertising, * then the maximum data length is defined by the controller with the maximum * possible of @ref BT_GAP_ADV_MAX_EXT_ADV_DATA_LEN bytes. * - * @note Not all scanners support extended data length advertising data. + * @note Extended advertising was introduced in Bluetooth 5.0, and legacy scanners will not support + * reception of any extended advertising packets. * * @note When updating the advertising data while advertising the advertising * data and scan response data length must be smaller or equal to what @@ -1692,7 +1694,8 @@ int bt_le_ext_adv_update_param(struct bt_le_ext_adv *adv, * @brief Delete advertising set. * * Delete advertising set. This will free up the advertising set and make it - * possible to create a new advertising set. + * possible to create a new advertising set if the limit @kconfig{CONFIG_BT_EXT_ADV_MAX_ADV_SET} + * was reached. * * @return Zero on success or (negative) error code otherwise. */ @@ -1702,12 +1705,12 @@ int bt_le_ext_adv_delete(struct bt_le_ext_adv *adv); * @brief Get array index of an advertising set. * * This function is used to map bt_adv to index of an array of - * advertising sets. The array has CONFIG_BT_EXT_ADV_MAX_ADV_SET elements. + * advertising sets. The array has @kconfig{CONFIG_BT_EXT_ADV_MAX_ADV_SET} elements. * * @param adv Advertising set. * * @return Index of the advertising set object. - * The range of the returned value is 0..CONFIG_BT_EXT_ADV_MAX_ADV_SET-1 + * The range of the returned value is 0..@kconfig{CONFIG_BT_EXT_ADV_MAX_ADV_SET}-1 */ uint8_t bt_le_ext_adv_get_index(struct bt_le_ext_adv *adv); @@ -1738,7 +1741,7 @@ int bt_le_ext_adv_get_info(const struct bt_le_ext_adv *adv, * @typedef bt_le_scan_cb_t * @brief Callback type for reporting LE scan results. * - * A function of this type is given to the bt_le_scan_start() function + * A function of this type is given to the @ref bt_le_scan_start function * and will be called for any discovered LE device. * * @param addr Advertiser LE address and type. @@ -1755,7 +1758,8 @@ typedef void bt_le_scan_cb_t(const bt_addr_le_t *addr, int8_t rssi, * * The periodic advertising parameters can only be set or updated on an * extended advertisement set which is neither scannable, connectable nor - * anonymous. + * anonymous (meaning, the advertising options @ref BT_LE_ADV_OPT_SCANNABLE, + * @ref BT_LE_ADV_OPT_CONNECTABLE and @ref BT_LE_ADV_OPT_ANONYMOUS cannot be set for @p adv). * * @param adv Advertising set object. * @param param Advertising parameters. @@ -1770,7 +1774,8 @@ int bt_le_per_adv_set_param(struct bt_le_ext_adv *adv, * * The periodic advertisement data can only be set or updated on an * extended advertisement set which is neither scannable, connectable nor - * anonymous. + * anonymous (meaning, the advertising options @ref BT_LE_ADV_OPT_SCANNABLE, + * @ref BT_LE_ADV_OPT_CONNECTABLE and @ref BT_LE_ADV_OPT_ANONYMOUS cannot be set for @p adv). * * @param adv Advertising set object. * @param ad Advertising data. @@ -1871,13 +1876,13 @@ struct bt_le_per_adv_sync_synced_info { /** Advertiser LE address and type. */ const bt_addr_le_t *addr; - /** Advertiser SID */ + /** Advertising Set Identifier, valid range @ref BT_GAP_SID_MIN to @ref BT_GAP_SID_MAX. */ uint8_t sid; /** Periodic advertising interval (N * 1.25 ms) */ uint16_t interval; - /** Advertiser PHY */ + /** Advertiser PHY (see @ref bt_gap_le_phy). */ uint8_t phy; /** True if receiving periodic advertisements, false otherwise. */ @@ -1893,7 +1898,7 @@ struct bt_le_per_adv_sync_synced_info { /** * @brief Peer that transferred the periodic advertising sync * - * Will always be 0 when the sync is locally created. + * Will always be NULL when the sync is locally created. * */ struct bt_conn *conn; @@ -1927,10 +1932,10 @@ struct bt_le_per_adv_sync_term_info { /** Advertiser LE address and type. */ const bt_addr_le_t *addr; - /** Advertiser SID */ + /** Advertising Set Identifier, valid range @ref BT_GAP_SID_MIN to @ref BT_GAP_SID_MAX. */ uint8_t sid; - /** Cause of periodic advertising termination */ + /** Cause of periodic advertising termination (see the BT_HCI_ERR_* values). */ uint8_t reason; }; @@ -1949,7 +1954,7 @@ struct bt_le_per_adv_sync_recv_info { /** Advertiser LE address and type. */ const bt_addr_le_t *addr; - /** Advertiser SID */ + /** Advertising Set Identifier, valid range @ref BT_GAP_SID_MIN to @ref BT_GAP_SID_MAX. */ uint8_t sid; /** The TX power of the advertisement. */ @@ -2014,6 +2019,7 @@ struct bt_le_per_adv_sync_cb { * because due to missing data, e.g. by being out of range or sync. * * @param sync The periodic advertising sync object. + * @param info Information about the termination event. */ void (*term)(struct bt_le_per_adv_sync *sync, const struct bt_le_per_adv_sync_term_info *info); @@ -2125,19 +2131,20 @@ struct bt_le_per_adv_sync_param { * @brief Periodic Advertiser Address * * Only valid if not using the periodic advertising list - * (BT_LE_PER_ADV_SYNC_OPT_USE_PER_ADV_LIST) + * (@ref BT_LE_PER_ADV_SYNC_OPT_USE_PER_ADV_LIST) */ bt_addr_le_t addr; /** - * @brief Advertiser SID + * @brief Advertising Set Identifier. Valid range @ref BT_GAP_SID_MIN to + * @ref BT_GAP_SID_MAX. * * Only valid if not using the periodic advertising list - * (BT_LE_PER_ADV_SYNC_OPT_USE_PER_ADV_LIST) + * (@ref BT_LE_PER_ADV_SYNC_OPT_USE_PER_ADV_LIST) */ uint8_t sid; - /** Bit-field of periodic advertising sync options. */ + /** Bit-field of periodic advertising sync options, see the @ref bt_le_adv_opt field. */ uint32_t options; /** @@ -2161,13 +2168,13 @@ struct bt_le_per_adv_sync_param { /** * @brief Get array index of an periodic advertising sync object. * - * This function is get the index of an array of periodic advertising sync - * objects. The array has CONFIG_BT_PER_ADV_SYNC_MAX elements. + * This function is to get the index of an array of periodic advertising sync + * objects. The array has @kconfig{CONFIG_BT_PER_ADV_SYNC_MAX} elements. * * @param per_adv_sync The periodic advertising sync object. * * @return Index of the periodic advertising sync object. - * The range of the returned value is 0..CONFIG_BT_PER_ADV_SYNC_MAX-1 + * The range of the returned value is 0..@kconfig{CONFIG_BT_PER_ADV_SYNC_MAX}-1 */ uint8_t bt_le_per_adv_sync_get_index(struct bt_le_per_adv_sync *per_adv_sync); @@ -2176,27 +2183,27 @@ uint8_t bt_le_per_adv_sync_get_index(struct bt_le_per_adv_sync *per_adv_sync); * * This function is to get the periodic advertising sync object from * the array index. - * The array has CONFIG_BT_PER_ADV_SYNC_MAX elements. + * The array has @kconfig{CONFIG_BT_PER_ADV_SYNC_MAX} elements. * * @param index The index of the periodic advertising sync object. - * The range of the index value is 0..CONFIG_BT_PER_ADV_SYNC_MAX-1 + * The range of the index value is 0..@kconfig{CONFIG_BT_PER_ADV_SYNC_MAX}-1 * * @return The periodic advertising sync object of the array index or NULL if invalid index. */ struct bt_le_per_adv_sync *bt_le_per_adv_sync_lookup_index(uint8_t index); -/** @brief Advertising set info structure. */ +/** @brief Periodic advertising set info structure. */ struct bt_le_per_adv_sync_info { /** Periodic Advertiser Address */ bt_addr_le_t addr; - /** Advertiser SID */ + /** Advertising Set Identifier, valid range @ref BT_GAP_SID_MIN to @ref BT_GAP_SID_MAX. */ uint8_t sid; /** Periodic advertising interval (N * 1.25 ms) */ uint16_t interval; - /** Advertiser PHY */ + /** Advertiser PHY (see @ref bt_gap_le_phy). */ uint8_t phy; }; @@ -2215,7 +2222,7 @@ int bt_le_per_adv_sync_get_info(struct bt_le_per_adv_sync *per_adv_sync, * @brief Look up an existing periodic advertising sync object by advertiser address. * * @param adv_addr Advertiser address. - * @param sid The advertising set ID. + * @param sid The periodic advertising set ID. * * @return Periodic advertising sync object or NULL if not found. */ @@ -2230,7 +2237,7 @@ struct bt_le_per_adv_sync *bt_le_per_adv_sync_lookup_addr(const bt_addr_le_t *ad * disabled or extended scan shall be enabled. * * This function does not timeout, and will continue to look for an advertiser until it either - * finds it or bt_le_per_adv_sync_delete() is called. It is thus suggested to implement a timeout + * finds it or @ref bt_le_per_adv_sync_delete is called. It is thus suggested to implement a timeout * when using this, if it is expected to find the advertiser within a reasonable timeframe. * * @param[in] param Periodic advertising sync parameters. @@ -2250,7 +2257,7 @@ int bt_le_per_adv_sync_create(const struct bt_le_per_adv_sync_param *param, * periodic advertising sync object will be invalidated afterwards. * * If the state of the sync object is syncing, then a new periodic advertising - * sync object may not be created until the controller has finished canceling + * sync object cannot be created until the controller has finished canceling * this object. * * @param per_adv_sync The periodic advertising sync object. @@ -2372,7 +2379,7 @@ struct bt_le_per_adv_sync_transfer_param { */ uint16_t timeout; - /** Periodic Advertising Sync Transfer options */ + /** Periodic Advertising Sync Transfer options, see @ref bt_le_per_adv_sync_transfer_opt. */ uint32_t options; }; @@ -2575,7 +2582,7 @@ struct bt_le_scan_recv_info { */ const bt_addr_le_t *addr; - /** Advertising Set Identifier. */ + /** Advertising Set Identifier, valid range @ref BT_GAP_SID_MIN to @ref BT_GAP_SID_MAX. */ uint8_t sid; /** Strength of advertiser signal. */ @@ -2755,6 +2762,9 @@ BUILD_ASSERT(BT_GAP_SCAN_FAST_WINDOW == BT_GAP_SCAN_FAST_INTERVAL_MIN, * BT_LE_SCAN_TYPE_ACTIVE. Supplying a non-zero timeout will result in an * -EINVAL error code. * + * @note The scanner will automatically scan for extended advertising packets if their support is + * enabled through @kconfig{CONFIG_BT_EXT_ADV}. + * * @param param Scan parameters. * @param cb Callback to notify scan results. May be NULL if callback * registration through @ref bt_le_scan_cb_register is preferred. @@ -2781,8 +2791,7 @@ int bt_le_scan_stop(void); * Adds the callback structure to the list of callback structures that monitors * scanner activity. * - * This callback will be called for all scanner activity, regardless of what - * API was used to start the scanner. + * This callback will be called for all scanner activity. * * @param cb Callback struct. Must point to memory that remains valid. * @@ -2849,7 +2858,14 @@ int bt_le_filter_accept_list_clear(void); /** * @brief Set (LE) channel map. * - * @param chan_map Channel map. + * Used to inform the Controller of known channel classifications. The Host can specify which + * channels are bad or unknown by setting the corresponding bit in the channel map to respectively + * 0 or 1. + * + * @note The interval between two succesive calls to this function must be at least one second. + * + * @param chan_map Channel map. 5 octets where each bit represents a channel. Only the lower 37 bits + * are valid. * * @return Zero on success or error code otherwise, positive in case of * protocol error or negative (POSIX) in case of stack internal error. @@ -2863,13 +2879,11 @@ int bt_le_set_chan_map(uint8_t chan_map[5]); * and all subsequent rotations until another override is scheduled * with this API. * - * Initially, the if @kconfig{CONFIG_BT_RPA_TIMEOUT} is used as the - * RPA timeout. + * Initially, @kconfig{CONFIG_BT_RPA_TIMEOUT} is used as the RPA timeout. * - * This symbol is linkable if @kconfig{CONFIG_BT_RPA_TIMEOUT_DYNAMIC} - * is enabled. + * @kconfig_dep{CONFIG_BT_RPA_TIMEOUT_DYNAMIC}. * - * @param new_rpa_timeout Resolvable Private Address timeout in seconds + * @param new_rpa_timeout Resolvable Private Address timeout in seconds. * * @retval 0 Success. * @retval -EINVAL RPA timeout value is invalid. Valid range is 1s - 3600s. @@ -2882,12 +2896,14 @@ int bt_le_set_rpa_timeout(uint16_t new_rpa_timeout); * A helper for parsing the basic AD Types used for Extended Inquiry * Response (EIR), Advertising Data (AD), and OOB data blocks. The most * common scenario is to call this helper on the advertising data - * received in the callback that was given to bt_le_scan_start(). + * received in the callback that was given to @ref bt_le_scan_start. * - * @warning This helper function will consume `ad` when parsing. The user should - * make a copy if the original data is to be used afterwards + * @warning This helper function will consume @p ad when parsing. The user should make a copy if the + * original data is to be used afterwards. This can be done by using + * @ref net_buf_simple_save to store the state prior to the function call, and then using + * @ref net_buf_simple_restore to restore the state afterwards. * - * @param ad Advertising data as given to the bt_le_scan_cb_t callback. + * @param ad Advertising data as given to the @ref bt_le_scan_cb_t callback. * @param func Callback function which will be called for each element * that's found in the data. The callback should return * true to continue parsing, or false to stop parsing. @@ -2939,7 +2955,8 @@ struct bt_le_oob { * - The local identity address conflicts with the local identity address used by other * roles. * - * @param[in] id Local identity handle, in most cases BT_ID_DEFAULT. + * @param[in] id Local identity handle (typically @ref BT_ID_DEFAULT). Corresponds to the identity + * address this function will be called for. * @param[out] oob LE OOB information * * @return Zero on success or error code otherwise, positive in case of @@ -2977,7 +2994,8 @@ int bt_le_ext_adv_oob_get_local(struct bt_le_ext_adv *adv, /** * @brief Clear pairing information. * - * @param id Local identity handle (mostly just BT_ID_DEFAULT). + * @param id Local identity handle (typically @ref BT_ID_DEFAULT). Corresponds to the identity + * address this function will be called for. * @param addr Remote address, NULL or BT_ADDR_LE_ANY to clear all remote * devices. * @@ -2994,7 +3012,8 @@ struct bt_bond_info { /** * @brief Iterate through all existing bonds. * - * @param id Local identity handle (mostly just BT_ID_DEFAULT). + * @param id Local identity handle (typically @ref BT_ID_DEFAULT). Corresponds to the + * identity address used in iteration. * @param func Function to call for each bond. * @param user_data Data to pass to the callback function. */ @@ -3054,7 +3073,7 @@ struct bt_le_per_adv_sync_subevent_params { * to is unspecified. * * @param per_adv_sync The periodic advertising sync object. - * @param params Parameters. + * @param params Subevent sync parameters. * * @return 0 in case of success or negative value in case of error. */ @@ -3118,7 +3137,8 @@ int bt_le_per_adv_set_response_data(struct bt_le_per_adv_sync *per_adv_sync, * @details Valid Bluetooth LE identity addresses are either public address or random static * address. * - * @param id Local identity handle (typically @ref BT_ID_DEFAULT). + * @param id Local identity handle (typically @ref BT_ID_DEFAULT). Corresponds to the identity + * address this function will be called for. * @param addr Bluetooth LE device address. * * @return true if @p addr is bonded with local @p id diff --git a/include/zephyr/bluetooth/gap.h b/include/zephyr/bluetooth/gap.h index 225f0ecc3cc..a6ca5d0ebdc 100644 --- a/include/zephyr/bluetooth/gap.h +++ b/include/zephyr/bluetooth/gap.h @@ -818,6 +818,8 @@ enum bt_gap_adv_prop { /** Maximum data time */ #define BT_GAP_DATA_TIME_MAX 0x4290 /* 17040 us */ +/** Minimum advertising set number */ +#define BT_GAP_SID_MIN 0x00 /** Maximum advertising set number */ #define BT_GAP_SID_MAX 0x0F /** Maximum number of consecutive periodic advertisement events that can be From 6661952dd44f2296f549ac3fff031c3e283f7596 Mon Sep 17 00:00:00 2001 From: Lyle Zhu Date: Thu, 24 Apr 2025 20:14:47 +0800 Subject: [PATCH 0090/2553] Bluetooth: Classic: SSP: Fix bonding flag mismatch issue A bonding issue is found with following conditions, a. Local is a SSP initiator and it is in non-bondable mode, b. Peer is in bondable mode, c. The bonding flag in Authentication_Requirements of local IOCAP is `No Bonding`, d. the bonding flag in Authentication_Requirements of peer IOCAP is `Bonding`. The bonding information will be exchanged and stored. It is incorrect behavior. Fix the issue by reporting a pairing failure and disconnecting the ACL connection with error `BT_HCI_ERR_AUTH_FAIL`. Signed-off-by: Lyle Zhu --- subsys/bluetooth/host/classic/ssp.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/subsys/bluetooth/host/classic/ssp.c b/subsys/bluetooth/host/classic/ssp.c index 9f43b8a69d2..a6907eb82a7 100644 --- a/subsys/bluetooth/host/classic/ssp.c +++ b/subsys/bluetooth/host/classic/ssp.c @@ -644,6 +644,25 @@ void bt_hci_io_capa_resp(struct net_buf *buf) return; } + if (atomic_test_bit(conn->flags, BT_CONN_BR_PAIRING_INITIATOR) && + (evt->authentication > BT_HCI_NO_BONDING_MITM) && + !atomic_test_bit(conn->flags, BT_CONN_BR_BONDABLE)) { + /* + * BLUETOOTH CORE SPECIFICATION Version 6.0 | Vol 3, Part C, section 9.4.2. + * A device in the non-bondable mode does not allow a bond to be created with a + * peer device. + * + * If the local is SSP initiator and non-bondable mode, and the bonding is required + * by peer device, reports the pairing failure and disconnects the ACL connection + * with error `BT_HCI_ERR_AUTH_FAIL`. + */ + LOG_WRN("Bonding flag mismatch (initiator:false != responder:true)"); + ssp_pairing_complete(conn, bt_security_err_get(BT_HCI_ERR_AUTH_FAIL)); + bt_conn_disconnect(conn, BT_HCI_ERR_AUTH_FAIL); + bt_conn_unref(conn); + return; + } + conn->br.remote_io_capa = evt->capability; conn->br.remote_auth = evt->authentication; atomic_set_bit(conn->flags, BT_CONN_BR_PAIRING); From 74d6b21cd3e5f1ae717ef5f053844e5f4e2717a6 Mon Sep 17 00:00:00 2001 From: Sayooj K Karun Date: Tue, 15 Apr 2025 15:37:13 +0530 Subject: [PATCH 0091/2553] samples: tflite-micro: hello_world: round off quantization Add roundoff to quantization calculation so that precision is not lost in in edge cases or when quantization error propagates through model layes. Signed-off-by: Sayooj K Karun --- .../modules/tflite-micro/hello_world/src/main_functions.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/samples/modules/tflite-micro/hello_world/src/main_functions.cpp b/samples/modules/tflite-micro/hello_world/src/main_functions.cpp index 1666e161cf9..7acb4182f2a 100644 --- a/samples/modules/tflite-micro/hello_world/src/main_functions.cpp +++ b/samples/modules/tflite-micro/hello_world/src/main_functions.cpp @@ -12,6 +12,8 @@ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. + * + * Copyright (c) 2025 Aerlync Labs Inc. */ #include "main_functions.h" @@ -90,7 +92,8 @@ void loop(void) float x = position * kXrange; /* Quantize the input from floating-point to integer */ - int8_t x_quantized = x / input->params.scale + input->params.zero_point; + int8_t x_quantized = (int8_t)round(x / input->params.scale) + + input->params.zero_point; /* Place the quantized input in the model's input tensor */ input->data.int8[0] = x_quantized; From 57b4e614f51416b310d73110cdd7d887b5c6eea3 Mon Sep 17 00:00:00 2001 From: Sadik Ozer Date: Tue, 15 Apr 2025 13:29:36 +0300 Subject: [PATCH 0092/2553] manifest: Update hal_adi module for MAX32657 Update hal_adi node to get MAX32657 support Signed-off-by: Sadik Ozer --- west.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/west.yml b/west.yml index 10ab107abb6..8b4a658a6d9 100644 --- a/west.yml +++ b/west.yml @@ -142,7 +142,7 @@ manifest: groups: - fs - name: hal_adi - revision: 67b88309c327d207e87bb7af6e37c704cd9d5b9d + revision: 8f33130dc5fe33ce14eb1cf29364bfc39dc82020 path: modules/hal/adi groups: - hal From f9ce25fd052b7310589bdb589628d1f10e7ba34c Mon Sep 17 00:00:00 2001 From: Sadik Ozer Date: Tue, 2 Apr 2024 10:24:06 +0300 Subject: [PATCH 0093/2553] soc: Add the MAX32657 SoC MAX32657 is Cortex-M33 based Analog Devices MCU. It supports ARM TrustZone security model. There will be two boards of this MCU Secure and Non-Secure This commit defines Secure version of peripherals. Basic feature of MAX32657 device: - Core is Cortex-M33 - 50MHz IPO clock - There are 54 interrupt vectors - 1MB flash & 256 SRAM - MAX32657 has: - 1 x UART - 1 x I2C/I3C - 1 x SPI - 6 x TIMER - 1 x RTC - 1 x WDT - 1 x TRNG Signed-off-by: Sadik Ozer --- dts/arm/adi/max32/max32657-pinctrl.dtsi | 101 ++++++++++++++++ dts/arm/adi/max32/max32657.dtsi | 43 +++++++ dts/arm/adi/max32/max32657_common.dtsi | 143 +++++++++++++++++++++++ soc/adi/max32/Kconfig | 11 ++ soc/adi/max32/Kconfig.defconfig.max32657 | 14 +++ soc/adi/max32/Kconfig.soc | 9 ++ soc/adi/max32/soc.yml | 1 + 7 files changed, 322 insertions(+) create mode 100644 dts/arm/adi/max32/max32657-pinctrl.dtsi create mode 100644 dts/arm/adi/max32/max32657.dtsi create mode 100644 dts/arm/adi/max32/max32657_common.dtsi create mode 100644 soc/adi/max32/Kconfig.defconfig.max32657 diff --git a/dts/arm/adi/max32/max32657-pinctrl.dtsi b/dts/arm/adi/max32/max32657-pinctrl.dtsi new file mode 100644 index 00000000000..6f74cf673ad --- /dev/null +++ b/dts/arm/adi/max32/max32657-pinctrl.dtsi @@ -0,0 +1,101 @@ +/* + * Copyright (c) 2024-2025 Analog Devices, Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +&pinctrl { + /omit-if-no-ref/ i3c_scl_p0_0: i3c_scl_p0_0 { + pinmux = ; + }; + + /omit-if-no-ref/ i3c_sda_p0_1: i3c_sda_p0_1 { + pinmux = ; + }; + + /omit-if-no-ref/ spi0_mosi_p0_2: spi0_mosi_p0_2 { + pinmux = ; + }; + + /omit-if-no-ref/ spi0_ss0_p0_3: spi0_ss0_p0_3 { + pinmux = ; + }; + + /omit-if-no-ref/ spi0_miso_p0_4: spi0_miso_p0_4 { + pinmux = ; + }; + + /omit-if-no-ref/ uart0_rx_p0_5: uart0_rx_p0_5 { + pinmux = ; + }; + + /omit-if-no-ref/ spi0_sck_p0_6: spi0_sck_p0_6 { + pinmux = ; + }; + + /omit-if-no-ref/ spi0_ss1_p0_7: spi0_ss1_p0_7 { + pinmux = ; + }; + + /omit-if-no-ref/ spi0_ss2_p0_8: spi0_ss2_p0_8 { + pinmux = ; + }; + + /omit-if-no-ref/ uart0_tx_p0_9: uart0_tx_p0_9 { + pinmux = ; + }; + + /omit-if-no-ref/ sqwout_p0_13: sqwout_p0_13 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr0a_p0_0: tmr0a_p0_0 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr1a_p0_1: tmr1a_p0_1 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr3a_p0_2: tmr3a_p0_2 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr4a_p0_3: tmr4a_p0_3 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr5a_p0_4: tmr5a_p0_4 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr0b_p0_5: tmr0b_p0_5 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr4b_p0_6: tmr4b_p0_6 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr3b_p0_7: tmr3b_p0_7 { + pinmux = ; + }; + + /omit-if-no-ref/ i3c_pur_p0_8: i3c_pur_p0_8 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr1b_p0_9: tmr1b_p0_9 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr2a_p0_10: tmr2a_p0_10 { + pinmux = ; + }; + + /omit-if-no-ref/ tmr5b_p0_11: tmr5b_p0_11 { + pinmux = ; + }; +}; diff --git a/dts/arm/adi/max32/max32657.dtsi b/dts/arm/adi/max32/max32657.dtsi new file mode 100644 index 00000000000..0e38c346e9f --- /dev/null +++ b/dts/arm/adi/max32/max32657.dtsi @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2024-2025 Analog Devices, Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +/ { + soc { + sram: sram@30000000 { + ranges = <0x0 0x30000000 0x40000>; + }; + + peripheral: peripheral@50000000 { + ranges = <0x0 0x50000000 0x10000000>; + + pinctrl: pin-controller@8000 { + ranges = <0x8000 0x50008000 0x1000>; + }; + + flc0: flash_controller@29000 { + compatible = "adi,max32-flash-controller"; + reg = <0x29000 0x400>; + + #address-cells = <1>; + #size-cells = <1>; + status = "okay"; + + flash0: flash@1000000 { + compatible = "soc-nv-flash"; + reg = <0x01000000 DT_SIZE_K(1024)>; + write-block-size = <16>; + erase-block-size = <8192>; + }; + }; + }; + }; +}; + +#include "max32657_common.dtsi" diff --git a/dts/arm/adi/max32/max32657_common.dtsi b/dts/arm/adi/max32/max32657_common.dtsi new file mode 100644 index 00000000000..a9d69b0ea0b --- /dev/null +++ b/dts/arm/adi/max32/max32657_common.dtsi @@ -0,0 +1,143 @@ +/* + * Copyright (c) 2024-2025 Analog Devices, Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +/ { + chosen { + zephyr,flash-controller = &flc0; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "arm,cortex-m33"; + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + + mpu: mpu@e000ed90 { + compatible = "arm,armv8m-mpu"; + reg = <0xe000ed90 0x40>; + }; + }; + }; + + clocks { + clk_ipo: clk_ipo { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = ; + status = "disabled"; + }; + + clk_inro: clk_inro { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = < DT_FREQ_K(8) >; + status = "disabled"; + }; + + clk_ibro: clk_ibro { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = < 7372800 >; + status = "disabled"; + }; + + clk_ertco: clk_ertco { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = < 32768 >; + status = "disabled"; + }; + + clk_erfo: clk_erfo { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = ; + status = "disabled"; + }; + }; +}; + +&sram { + #address-cells = <1>; + #size-cells = <1>; + + sram0: memory@0 { + compatible = "mmio-sram"; + reg = <0x0 DT_SIZE_K(32)>; + }; + + sram1: memory@8000 { + compatible = "mmio-sram"; + reg = <0x8000 DT_SIZE_K(32)>; + }; + + sram2: memory@10000 { + compatible = "mmio-sram"; + reg = <0x10000 DT_SIZE_K(64)>; + }; + + sram3: memory@20000 { + compatible = "mmio-sram"; + reg = <0x20000 DT_SIZE_K(64)>; + }; + + sram4: memory@30000 { + compatible = "mmio-sram"; + reg = <0x30000 DT_SIZE_K(64)>; + }; +}; + +&peripheral { + #address-cells = <1>; + #size-cells = <1>; + + gcr: clock-controller@0 { + reg = <0x0 0x400>; + compatible = "adi,max32-gcr"; + #clock-cells = <2>; + clocks = <&clk_ipo>; + sysclk-prescaler = <1>; + status = "okay"; + }; + + pinctrl: pin-controller@8000 { + compatible = "adi,max32-pinctrl"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x8000 0x1000>; + + gpio0: gpio@8000 { + reg = <0x8000 0x1000>; + compatible = "adi,max32-gpio"; + gpio-controller; + #gpio-cells = <2>; + clocks = <&gcr ADI_MAX32_CLOCK_BUS0 0>; + interrupts = <14 0>; + status = "disabled"; + }; + }; + + uart0: serial@42000 { + compatible = "adi,max32-uart"; + reg = <0x42000 0x1000>; + clocks = <&gcr ADI_MAX32_CLOCK_BUS0 9>; + clock-source = ; + interrupts = <11 0>; + status = "disabled"; + }; +}; + +&nvic { + arm,num-irq-priority-bits = <3>; +}; diff --git a/soc/adi/max32/Kconfig b/soc/adi/max32/Kconfig index 2bddfc6e556..63e2d1b4b3e 100644 --- a/soc/adi/max32/Kconfig +++ b/soc/adi/max32/Kconfig @@ -9,6 +9,17 @@ config SOC_FAMILY_MAX32 select SOC_EARLY_INIT_HOOK select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE +config SOC_FAMILY_MAX32_M33 + select ARM + select CPU_CORTEX_M_HAS_SYSTICK + select CPU_HAS_ARM_MPU + select CPU_HAS_FPU + select CLOCK_CONTROL + select CPU_CORTEX_M33 + select ARM_TRUSTZONE_M + select CPU_HAS_ARM_SAU + select ARMV8_M_DSP + config SOC_FAMILY_MAX32_M4 select ARM select CPU_CORTEX_M4 diff --git a/soc/adi/max32/Kconfig.defconfig.max32657 b/soc/adi/max32/Kconfig.defconfig.max32657 new file mode 100644 index 00000000000..84da5e22a18 --- /dev/null +++ b/soc/adi/max32/Kconfig.defconfig.max32657 @@ -0,0 +1,14 @@ +# Analog Devices MAX32657 MCU + +# Copyright (c) 2024-2025 Analog Devices, Inc. +# SPDX-License-Identifier: Apache-2.0 + +if SOC_MAX32657 + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default $(dt_node_int_prop_int,/clocks/clk_ipo,clock-frequency) + +config NUM_IRQS + default 54 + +endif # SOC_MAX32657 diff --git a/soc/adi/max32/Kconfig.soc b/soc/adi/max32/Kconfig.soc index e0be0041b4b..e4b2347ca02 100644 --- a/soc/adi/max32/Kconfig.soc +++ b/soc/adi/max32/Kconfig.soc @@ -6,6 +6,10 @@ config SOC_FAMILY_MAX32 bool +config SOC_FAMILY_MAX32_M33 + bool + select SOC_FAMILY_MAX32 + config SOC_FAMILY_MAX32_M4 bool select SOC_FAMILY_MAX32 @@ -25,6 +29,10 @@ config SOC_MAX32655_M4 select SOC_MAX32655 select SOC_FAMILY_MAX32_M4 +config SOC_MAX32657 + bool + select SOC_FAMILY_MAX32_M33 + config SOC_MAX32660 bool select SOC_FAMILY_MAX32_M4 @@ -88,6 +96,7 @@ config SOC_MAX78002_M4 config SOC default "max32650" if SOC_MAX32650 default "max32655" if SOC_MAX32655 + default "max32657" if SOC_MAX32657 default "max32660" if SOC_MAX32660 default "max32662" if SOC_MAX32662 default "max32666" if SOC_MAX32666 diff --git a/soc/adi/max32/soc.yml b/soc/adi/max32/soc.yml index 3bf7288d120..1a4b7c2568d 100644 --- a/soc/adi/max32/soc.yml +++ b/soc/adi/max32/soc.yml @@ -8,6 +8,7 @@ family: - name: max32655 cpuclusters: - name: m4 + - name: max32657 - name: max32660 - name: max32662 - name: max32666 From 9e6ca51b0391bca4aa65735c09909f4636ba7acd Mon Sep 17 00:00:00 2001 From: Sadik Ozer Date: Wed, 3 Apr 2024 16:28:32 +0300 Subject: [PATCH 0094/2553] boards: Add MAX32657EVKit board This commit add secure board of MAX32657. Only GPIO and UART drivers have been enabled. To build: - west build -b max32657evkit/max32657 -p Co-authored-by:: Furkan Akkiz Signed-off-by: Sadik Ozer --- boards/adi/max32657evkit/Kconfig.defconfig | 25 ++ .../adi/max32657evkit/Kconfig.max32657evkit | 5 + boards/adi/max32657evkit/board.cmake | 7 + boards/adi/max32657evkit/board.yml | 8 + .../max32657evkit/doc/img/max32657evkit.webp | Bin 0 -> 46968 bytes boards/adi/max32657evkit/doc/index.rst | 369 ++++++++++++++++++ .../max32657evkit/max32657evkit_max32657.dts | 48 +++ .../max32657evkit/max32657evkit_max32657.yaml | 13 + .../max32657evkit_max32657_common.dtsi | 62 +++ .../max32657evkit_max32657_defconfig | 16 + 10 files changed, 553 insertions(+) create mode 100644 boards/adi/max32657evkit/Kconfig.defconfig create mode 100644 boards/adi/max32657evkit/Kconfig.max32657evkit create mode 100644 boards/adi/max32657evkit/board.cmake create mode 100644 boards/adi/max32657evkit/board.yml create mode 100644 boards/adi/max32657evkit/doc/img/max32657evkit.webp create mode 100644 boards/adi/max32657evkit/doc/index.rst create mode 100644 boards/adi/max32657evkit/max32657evkit_max32657.dts create mode 100644 boards/adi/max32657evkit/max32657evkit_max32657.yaml create mode 100644 boards/adi/max32657evkit/max32657evkit_max32657_common.dtsi create mode 100644 boards/adi/max32657evkit/max32657evkit_max32657_defconfig diff --git a/boards/adi/max32657evkit/Kconfig.defconfig b/boards/adi/max32657evkit/Kconfig.defconfig new file mode 100644 index 00000000000..0309586a787 --- /dev/null +++ b/boards/adi/max32657evkit/Kconfig.defconfig @@ -0,0 +1,25 @@ +# Copyright (c) 2024-2025 Analog Devices, Inc. +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_MAX32657EVKIT + +# Code Partition: +# +# For the secure version of the board the firmware is linked at the beginning +# of the flash, or into the code-partition defined in DT if it is intended to +# be loaded by MCUboot. If the secure firmware is to be combined with a non- +# secure image (TRUSTED_EXECUTION_SECURE=y), the secure FW image shall always +# be restricted to the size of its code partition. +# +# For the non-secure version of the board, the firmware +# must be linked into the code-partition (non-secure) defined in DT, regardless. +# Apply this configuration below by setting the Kconfig symbols used by +# the linker according to the information extracted from DT partitions. + +# Workaround for not being able to have commas in macro arguments +DT_CHOSEN_Z_CODE_PARTITION := zephyr,code-partition + +config FLASH_LOAD_SIZE + default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION)) + +endif # BOARD_MAX32657EVKIT diff --git a/boards/adi/max32657evkit/Kconfig.max32657evkit b/boards/adi/max32657evkit/Kconfig.max32657evkit new file mode 100644 index 00000000000..7f1cae8fc83 --- /dev/null +++ b/boards/adi/max32657evkit/Kconfig.max32657evkit @@ -0,0 +1,5 @@ +# Copyright (c) 2024-2025 Analog Devices, Inc. +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_MAX32657EVKIT + select SOC_MAX32657 if BOARD_MAX32657EVKIT_MAX32657 diff --git a/boards/adi/max32657evkit/board.cmake b/boards/adi/max32657evkit/board.cmake new file mode 100644 index 00000000000..2c8ea68612c --- /dev/null +++ b/boards/adi/max32657evkit/board.cmake @@ -0,0 +1,7 @@ +# Copyright (c) 2024-2025 Analog Devices, Inc. +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(openocd --cmd-pre-init "source [find interface/jlink.cfg]") +board_runner_args(openocd --cmd-pre-init "source [find target/max32657.cfg]") + +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/adi/max32657evkit/board.yml b/boards/adi/max32657evkit/board.yml new file mode 100644 index 00000000000..48af69011b6 --- /dev/null +++ b/boards/adi/max32657evkit/board.yml @@ -0,0 +1,8 @@ +# Copyright (c) 2024-2025 Analog Devices, Inc. +# SPDX-License-Identifier: Apache-2.0 + +board: + name: max32657evkit + vendor: adi + socs: + - name: max32657 diff --git a/boards/adi/max32657evkit/doc/img/max32657evkit.webp b/boards/adi/max32657evkit/doc/img/max32657evkit.webp new file mode 100644 index 0000000000000000000000000000000000000000..dfdd54a34da238f220bf22385606e0c1a7e9815a GIT binary patch literal 46968 zcmV(uK-)#=C%Au-eH-~N@87xK z<2}0n+5bV~v)8|&|I_}{)i340bboLC-~7kDPvk%9|AXwnvNfcl^Iul>Ks zXY@bt9-LqQ|LJ@d{m}pa|9|0Y_Q(J4{BQn=CK&SD-w-RnP#V?%*02V(fHkZEtzZpn z0BcwSTEH6C05ao5>q&OP?S@x@{r;o z#6yPJ^LprU(BXvTZhC@EFSHlh4o~EdomWKb(!(b%Ws!XkLn?ZON4}eCXKQ)$xD{Y=4 zOd)$ght0;WWD*osY5yNjmAmoECfiM)62FYOK`24{BvM*%5RkJ67F++-IfDqzQ> z@d-XXbk7%VAIu0V5-uCAhsW{qtwimtubs_?_!!XbZEm6D6!!7_N7cIdxXvV zTn9pkQeof!Q?S6dDZOhPhg%V2A)Yk9wm{tXaQh4T3k+Q6vxk=p_4LLXwswty@E zIix9t?x|R;C7BQffYHz+l@UleJxSDs+P|VRO$Q5-jx?5e(6>15VUYe^U*6Qi1CpKMM36yOhsQAGK$lxv9}8k(_DeL>tc=TB>n$ zQZvor9!fG0+E5BIR5D-Y7I!^SWIeGEKQdZgZ&&`Y3xcQE6o5PHV(WR=hxeE+?-|G> zvFU_mF3tp36^_OKtGj zQdda#Ohze1)kULqc4Q{2uC#=onYo!@dey6MG_~kG{uZ|JBd^M$XFPF#`9_iUdHry; zT@VNEV?YAB8)E(J2Bo`0Tck~ke1(ukH_sKVt(D4N;Ulf*# zdp&oUzxQznZP<|`v6X{`jT2R4R<)dpPXcxWMG33T3Bo%?Q>4y%ZkU%Pn3;eh!)V_{ zpi*esOsBbDZg|yM0{dG%)Gs;XdAn=-M2}TTkRbmNju$%4p$NxI+%s|f6p4ORnnMRh z#@WGh_uT9>HqLxH%G0vgk_>obop>wbLHI_Vk%Pgc16OV18Y$0i({b&BQSEMz^}qf+ z{;&DSTN3qPmNl1EI&KK}L2?ZG;y`x8=-wdRzRG@f8=z!5+8C19Y_`a&e>pJ1oo<{r zsh^?%iU95(w2nt}FmgAvB*ol3i(Zb(=I&ASGYR&7ExBKu)8Wu)d)O;ywT#g*n0iFsy+11*ACT}wy*%=E=X5wJTJye~e zC-2T=61FeV+K|!Qu+tfRWzqikSAVlaYJ#jCn;g)sbsV$3V^+^&qfRn&-Cf$#Y6cY z@e1!5u~L8Ri|Ni!f`*OuU4eQ-q#JdFuL>LrzFeviUX;U@a=+}3V)B@Q(8i(G8b_k)-;=n)gH(E^~b!A0+*@OO|Asfyoc z2bogmd(jWPp4 zH_&!1&qwS&PHPw9*c(2and%QpqhC==8^81TD+@|+Qk7;wZ+2n%YqVr$lF0=2?Fm$# z@rU4O&lVtoAqn&8OI6dy0ceGo>xOFuxZcQDyd#W&%`FcLZc^Va1CSd7I^y-M^Yg9` zsfz`RMK3b+sECRqQzfgu8F7pwFuaUIuJA=ElCcP0TE`M%ZG~W_53jI*;q<=-ynMDs zCd~)vqF01Ddc3sfr#>C0ZZoCnKfArU?bWz+9}`Vl*>rc(t};?G+!7QfFG>zh>ZhTF zkw*qAduEw$Oz!j2w0nuOS)VbAsKr<@!-WGJmM0!QmbpLye(H- z2xZFXL?<0RRY3hnMEqpJ8`4($H{r`nVqBDUEd!t)w!Fza-z==AZ8({Jq|B#aZI^D7 z9df05mu?EQs>T2BaaRl9vY({xI|+=lMHmdj_?R{o!gPp1qqH84LBA+>gj1qhM&{yl zEu3Qh_(5p>hKT{qGyt@vYhrJiOnRv+XLdR^mLgr;bp*-=R$4kXhdwC>6e8o=$OZOP z*!Tn7uQ|q|N}a)>h{oFc{^wja)iOh-E4S{U*10yGBQPlIYnjuH_wc9m#pgrvI;%Z| z`ZPsx<8^e%5QOlW-E=<7jnGZqIZwiVSYNV3@favX!kW0_B(RoRf%g!>O|`ml5Z4(Q z{0^o3vRpB0L3crUw5QE{12>4Ly5xlcvCYMiOg8Pu#BJ(R(lVp12#uJ}bch}9^D6{U z(T1Y)H4G>tj9^2_wltO+)&S8B_#+|eQKnk<3~x&T*1kz6Fa~JQIipF;7E- zLmf^vaVT9+t03QdEvcLiO!JkN<^qFHXEdCcOM^eKZ2S2^{14mrT-5O0P$v!#LdkB& z?p*MscGE&WU2;U$T*OnoT$fSTf1>46I}2w2pp+ji&H~x@L?c=^L{1P=rwq&{eg|8@ z2sb6{@I0bedJI-^axDI4QA6%OlflE>?(mU)upg;vwulrk=;%Iqom$X{{kk_@jHgwG z^+cPQXK2T;#bmEbNQ2w~%@e`~0o~Lu346_OB%$8gJEIGH0h*#p`7vWsdmM-YnJ$|v z6roOK@BU`M*Lq!=uM3!trR+~KJU#zsP(}ink0N7$-f1m6PTAX`Z?grVj-(^nJ-Ax>;$ zOgoGX{(sGH;d&Z~S_|W8D8aL5W?eKYPQ=OL&e9A*SqELne$tw%K!RZ2xt!=uxY0jT zHDR*Yz;=QkD~f%Ov3n?|Alf)RTOlMVkGMBUxQrw_;)}_oe(t8*DJpEV0}RIDK#G4m z#mWh%+NS1WE-RhVdBn#~<|b=1cMK}FtXX77!ZYRGA$#%6aPtZl+b>0HoCoIxn@FUV zSoh>m8@{w#>_SA*!9#lo)u$NN2i-&7G;{qriTsbcYNU0h(xFtP>|>_zUc@D5;@=vv z`a>{b*KePA89`1ehW@cgRv3{8LV)EE=5UuXn97>S1?^kJSO`%j4WFvoM`y zqkn!HF0xt58Cl{F9JAbSE!8$-^Ao>`qUr?Dc@m3UX7!3AMVEgtgiENghBkKkQN;^E zjR3aLCx{!*q)yzP1xJ95|oMA&;Q)?!3>I){oh*~9gwuWrc=!i;xr*FoZneJ#n6(m#s&=$P~tdhgzt{y zr8|b1#wnkRgnk!=cM}BlA6(51tXjMa^H6yb7kIzP#%F6w%zsu!S0J4C#v#r zQs*x+jayw$#`z(7>2Zo2*i%;}bKIcwVP-IRuP{OuYlcWwro3J@mjWt7&+zwhrl@#0 z?%4l0FzCXGM{Gm{_L<3HnZZX|!CTxY?_-1sn**x)DyRSdC)z*`R zFyt5M=u(9muG>MA{-N~UGXU< zU~xm+T5XxFlwzBfNbgw=RHQ8XgP_a;;_84m3|;|idgE9XfSayvD>l!iZ`i%&lC%|D z%1|HOWkJH$`g0*$!<2%DhNHhV=5MGixosX`2pGc+iPZGw!#NCl(O7@nGDHO|tWkfH zz>JlbvlBshHExwkJ-TKLtYJos7Rs<~u64Z2xGb=`wO&y_Pu(`<$k6d@>8#0x3YbR^eNiV#*}|yMJmqGvtkkrbCi~Ds(6|J!RjQ&c)2SISHf`dB zP2<2%S`*R+Z=w7~=+9F7_v~&Z#dz~yY=L}Ay7+avAJ@LEIOsQ&a}afYNFO4r>0><8 z_5=d5qi}XRinGq*OLz~B_U^A*!KT#t;8&6d$%lyuFfom+$7v0ngfLElw2a}+Cskj-gJXG(@fJ}AOU2r-59|7gnEp&L z#pMjA@<*!y>|Mql`r3u=ZbJDtaT)%;$dk>xW&7VnOg&|<^v8$;UcZv3w23+x220`i z(h8^@YqS(sb293YJ^ob?hsi008Y!pnuxxRZ*Dwv|Ruw8Lf)iDefu8u6*~;{rjg>Np zU9h`hDpq8S^hxRU!7J&AgAoQI3`7`+F%a(O-OsyoUgf)pF@50@^Y8s z1HWgDbDPH#qtcSq$<0f^xiOn~;);*bI23bp*vMuT-tFBv3Y3$S8!9rFs* zzx=8KoG-9;SYb)CxZs9Tt7zDT_~qGk+tkM_IYsv$I`hpXh;xq9d(k7l;!q}yvcY=S z#6=SkPwYt!i%!rL!MLTTvKt~-B3tL=qXQaaQ87NcGxnGsZi+K$SzX%nM5Yf2nKrVC zVHZG8y9G16o&C~@pftlcc{&8AX>KT35CMtoNC0ARf&PSRo*))_vJY$>oLj5MS9(;JKilkz;6B(jJmwV*hPC5I-oQ3pCS%$mJ&DsQT^lk=3^B|Q-gmV#Acw}Ao-GhBV&8Qs#tKQ-< z0m=59#vcvSJzGz5W{o1m{Ipy4=#WmQmkq!|e1Gh% z^d2<_Xg|!0W%x7x)!%NlfJ?fht@%ed$5i+kqrVZmv+$-y_3(o7)@Hhct*{B}lSe*e z%}X%bl5$NaVjj!~I4-@^NkM6Gr9>F!_Lk0@DhVR4Q+qRPOV8&lC_yFNSKM=ntkGb^yn_@XVql)S#Tn7x(})Bb}hd*`&2+_WE?@%B-S7_gKWib)Y9#mp_GhScd8xg|cVULyrzItSYxKQRzaGBU@v;^@1NKsHli1 zOgRO19nVHrgBw}iRJwK5q=T6vLI~Icc$B{Z9W|+0bH{#z2jC32~PsJ!JhLz))jb@I)wBGwAXlQD~{K~3Cil%r_t%lc9f!hUF8%8c(v{P$G-by|)AxUK`CKD|7WP zvBS@A_h^WSKVIDsYrhs`G)xMX;ht_g<$`1jO+HwO+6+KFQXu$d1CxVP@@oSB1LA~X z$DK|Yih3WgzGt&H67zgjR3mN^YknH=&}u6%!8Fy8|2<9!dy)Hut4Cf1Umx1ior$oM z_}fLEWsJcr|Cj71r9YV#Q&9YrO@`0mv3#JqX7SotPdsbMBgIyG?#t6>w~9`;F+ZRC zVqLl=5xa@wQS-o3$o-DY@zsCkTwM&290{x=n} zmw_eTO*-do%vfHsXzR`WEVwxD;V&O5+Y5velK52GYR`wdq-uh}#5Ci9#B-`vngU~C z2?(N#+{dN;rC)$)xv@|lzYufBDu9-mr3!pB+9R>CTD*IArdPug&D!q!tA1_*`!KI% zo|XNr&1exIlZ)*+B;G%w%nqET<^s?Z%{WRM?<9FLN=H33A{@8F8Ck8e5YF2DkIcsa z3EHb8K)m(n7Pf8PGP?=lbNk~Nwz^_Ax3TU;Udo)W9Qq z*U+$`?=1oFfEifxg>dwZoxUUb<4)UqTBGYvyn>c1hdWaiFY~?+<+q;dxgwcOe1w61b9~k(Ry=$RX+MxHzs$#< zuQ+-;*NUoWthG-Eqy-9dqrTwqR)_rLOXGSM#aH(YlD?=cXr8#EWom++T@4s(Tv@z- z8cv1vZW_U@+mtxRh)M__6ps&Im^)`HS6$VOBC6gVD*cRrRGmHrLydTNC|4%vY02#V z2nAuqaF4l*mXfqA*TRdNyAXtm7dqYGHVj$k-zHRV33#XNHa;n_?ZI}l@J+6%{$cWQ zCPY9W;%h+Twb$#`E(W=9HL)+}T0P9fl3NQ13nB=ap62d(u0ON^JVyOyNv&fY2@H?McVBM~1zkGXs%{cjS+aJWr$ zL0W1}FU74aal1wDYvWUBmf~)+gyigELE9cgmRl8NGnAW8T+6^AW0IFo)$pxlI!8M# zvR|{%yLeoNNuc5Mf`bWS#{lp1ufy#-xMfXDjSnl>^v76%ZO-fC{OI-{u`_9FxfV7A zZ!OK)bP<$f%;#ta7U7Z)x7769}T7K6cJW4QoJti%(Q&VS_FR_FL0iIGm^y+G)-N{ zw5c;}@-N7)x>h2K7R16aqJ(D2c!<+!K26N~piZ>i>#C>e65;Kb73}V^21ulT0{U5z z)dY$t{bUnk3HJ~c&5so5NntYFP(aM~nJT&}RHRH0mmsiaL1xzjk3i0-7e<-~pVH|g z0kIB80LO7QV&z7uc|N&BYdo^`0LRvjQcQ6UG2cZM5+QPSY6v~66#R`Gfo;rOP4RVJ z-MLrk+0~+oLXo^7RsLnmOIYWc0{?T8NKyn^@mxK@1Bc^cC5SW;(iAtGshT6FY2U3O zv4K6x6?Vq(x6KkU#hyL{ulBL#m&=$BK`tw*pyrtMGkQ(Dh=-HH`u6&6)L&IO3-41w zTEgg)N`^no-dELzzvET-`L0gDlV$0;c*i7!b_6c%XRZcCWxAsp6V;sklrPiQJQzby zIYC6tcY=p)bgeDNPGQLfge9Yr#SJlb;#O1pN$f9j#c{iSF(ghO-qU7ir#vqo>R*`9 z0DBeg86H;yCIvJfw**o3(9_VYPkR<;-|mM+QYv71VRc(MfV{h}lR%w15fBzg+vo1D z>Ab8#bzZOw!v`7Ck@@<@J?z{*L<|B1oySb3Fc z!Z5XTj?@*wi3Ub6Ux5pnECJ)+))VPZt2>o9^jLl>bq~-26}laSl5Q9Pamt`IDe9#M zq{U3GKfkJ=K0$@|#5f=coNfuZ&-AobiB{}i&!tJQq zIHr!|_S_lUm~l4!&N$hE|Dn_C{>zPwnFo;x6Gp9db2f8xb?U4?4kPzudI`EP>THH? zCR>y+AudmHHK)O~kXh#O!WMtm1V0m1yj<9JCR$$$Bu;Ep1HEmb>@19<7E4d`x07mpz;GcCwYI*vRYH*h48>*pV^>;-y!Ui2{ zlTzTffYks|#@HZu4oD0E5;Wdp!x20A-D$?iQyBmAS&~gmkZW{h44KB;W z|8XGsmF$=B#)m^G)F9d+vMIf^R=-jIf)m$@ifB=J?@X%_6}JLcjHT&KOj;t;lPw~6 zmUS5^#1VdPFF+_XXe2m*8Rrc0ym2ZT(bJDn8M3c~=)F17u^uh*?3MSI9htt=w8;iC zLe8|HtM;(I;-r)`;WYD4K2HVD+$wRK1LUN;SGjQ0I|JCBcs&8GobKnOC|Rr;eG=}s zyONIiZELJ(k2)G7GHuIgs0b;u`HKZb_#{6UWfQ*`)?NJ91Imiui!Bap7i zzg439P=3ALc^>SCxpqfYj+Arcn)-X<+%%Qm`JcGd;f8x&JO5?^m{gS|!!UN6I$Wra zu0HC#56&q&nnt|8v&S6&zj^x59VW-D*u3Xmj%uBk>(DE)#_4DRCNUre07g(`KpDJ< zVlu&@`8DhplO??96Wmv9c(--bN4r{DmokRj82=yQxzRbFm_btiB3WSHQGJEaj}?E? zyq-M+>jwRHar><(XD0{@`od37PKWH9#*p5*P-_cg(3o;yO7`%ZSwJ`ghhI(cPn+88 zXUW`U1+eBeuP$~zkBYG*A)1rq$PI`jF7#I?6+#si5hLPEGfEoi$Bx*Pm$bSu}Pr{_kj2H_4 zb7RI34tPwBkMhqqb3rfY1zYvK>LYI)T1xwg{A9Mp-`Rw{O$2;Do>X9U6n45}4||4H zXGH0HszAZ#YJE(vM4;1|TZnIx84uXsU3{mM;s4yOx$-M+@;Hh4RKJ^NYGc+UHe>*u z1Qq3J!zGa#dL+|BXMs}nJ$q}=c>uNtHS$mlxGHHJO^rMBnM5LV$dYRC+MP8q>~u>x!DkCTW4TxTYJzR3=igK~d0cL@ zODs*6^ZWI#m2yFr3f1CT;XZgz81?CjUCS9~GpOqX+x@3!ejjZB@;e?G!XIVA8c~n4 zFAwfp#&e=XMR)J{GN@R=19=OUl8xWI3#>p%3u!^}7H->d&&ih+5n-JA(LywcKst5v z;k$vXDpw6dWacQuF*++mq97#0Q8}IUMfSkdGK~GXY|#XXw!_3NGu8t+tq|Hx`uxTK zu!cAQ$4dohI&~c2cpfb`8Gz4X?={vJy?wdlx$&0_vJfs)9Rc?a3G!bf&l+cn3=kaM zuKMebkmk5ok$bA7_r&{9{XJr!QXcv?mtvMi*+(IgXlVs49}T%EH@kB7K-oqItE@y3 zhigWu9(KbKR zR_AUU;ki7?S_UG!lk3t}>aP)~Rx(%Wc2rSo;oR_!&f|$wy=nyS9_Yg8%axbhewc)h zuj?d}yaqI|Q2pQiFqM}$8SW#XD*h4mDWZ0Z-*~ye zz4Va$!4f_oY*x5e*)_gokaogCd#V|PvVokzt&EY|1^vM1_A)BUN=(NHWTviC3QwAP#o&w2kqc1`6f|d6e z9QO*Y_aW%rp9KZV3Dl^N<6aB3u-zPuubDzo#CXD2N%ok1SPpVAibao@c!}^Q>p4FI{;c^;)0x(D-Wu56z`F`ZZPM z_T*P+Bi~0(4IQxO4*U!?(;_R2Avz-_ksXH`gtULQ=7&qeYnaB|GS|V9UNspkPK1C8 zPW&2<^raO$Wph>0w(+qqzX;FnzI#nk;I+t)-=Z(q*A3s1>py1@r52kzj08osOd;QKo9GM{F`op&KJ2m+h zne&Kgf}F!WpJTmeV2Rw11kv9OP3wpe}372XW^uEs%%1zKz?F zVqjGH85ow-=B(X`U7! z*M>RovT@8-3n-5KqPO7)8s_(+HBMA#_-RfvAkf;Lwy0EI`t2s9o)zAP?N&od=Y|(q z=J||$>f?{KEqCE*J&4cD|JZrd=?FbpL6?HRUD|gWr<`XFY_qAGNc#L*^+BFySYbhv zO{6J_le8)4alnpzZJ=LVS0UB&6=!f%!nYTGIISLzJ}97XO3bK{o)q-&MBMv(?0e%)T5Wl-QCK$n*P1?Nx_~=g zt3=})%6eJ^P9}bFd?4nu^2ih9@cL6DEY{cw&poyeV9hN-TC$h~!y0PXCNr9-KP zw#Wv*47V3{GSUas$Ze^p|812WPg>x3k`Onoqt(t*W}ChHu3ITE8CA+Nk5ybr;p%)= zO-J-hfeaMRDN7$CiRZxo#NCq^joo$^h)&jjP%Shq#5b86%nlSqbvFmYETiBaC_b1U zc!Yd}7z1%=>}K$9K~;QTI?-4$BDA!X*qrc7B+dgVjQuqbGp$8SmWh%M0~EfvmV=_$ z1amj*9HLcJN~=W}c@9u2G9>82aKO&K-v5+CVAgjUlmGDg`32h1L_XL}0NZm;FyOx} zKjORYF;b6;81A1yj#PE7Nn6SJqS;niPJG;+)U=;f)@~E1?ow{Qh*o^V1HQ3Oj?)FXRIL z-hCR#7)5zF?RO>3hUs^4Yv(&24VmSoEG}HSv^ALf*)^v8iI&*(9R;Fin?-i}4TX79U%h-mT~YPB4B-!F${20_fze$sGDg`U zqHQcgegk>(h$i!qNU}z|Hm!*+13>skTeBNo_k^x}3=!jclK_p;=u`wXcC-q27dG_f zezP%p@kv4O9BBF^5E$`Tv3y(VM4E05G&|!ae!!X0F4*4hxR`G;Re74|Tb*YF?KGBF zqYl@#ryE7-ui6JPkUy6G4GaZP9!g2M@smb4uA#91hS)_orMBOtWQ)bavS^|4ct$Y! zsjkA1wwq}<=hcB>kg-7F41Fw}`gQ}Z+& z5^fj#P8Cl)abn6_3Cz`&EJgNU#wF_T4~3-F4lL&;vVw2KQwebX<_ifxZTM}3W=4et z)?CTHV^7Pk@BZAD5`uSMTAm7y7q^Npu` zxM5%2U_jO;X#}JofO$TSx!J@`B0{>^wFb_Vu!q!YA%pphxb@)~WCWO@uM$4VsRV6v z{LWo}cWV(4dS|~cn>Q~M6UQYwXqc^}2|=R7YKLe8vVB|lPn#*>^Aij$j7ym^RFa0- zlIhOpIKDUmY1T~87qeRRVh}!6DW(PCTe zoIIk>ZTOn{Ut06(4ucM~0jo-5M}U@!Z>oU=U@Y|*w|~`#I5vDTJViErl_sa2Zf^4; zk)(LrzRB*TJO(S>=K!{t*o6?PX!5WsSQcK=l_yE!H9|MT_dQQyNizM6!q42k@BuGA z+jD>~$qmOfi?}uox)c|JzvreVeyxQNk%7~1%-@?Udun7!j`<9@8Z4X2R%h*7ZeF_s6w4oY@Reck+ z24GY}5!jGC?iG2>ty*9Q(x@UDa+2&d@sFLioveIH!xY$=RkSMv)~^GxeEX%5uZK@I z_jlXxN&M3!ecRAQ;5O1|C0n~3x3-%Y9_uBkWaqXRqKrw)7ca6FCstw^{Wz_ZTp{CW zOzRgVn9X-6--)fAkZ*I+7cSDQ0+DpcFOByJAip?t<;*CUB}xCzWwMdlcmR(M%cyNn z4sR|OIHc$Lcz^YZ^$_*T%mYA$v_L?WWYCnmy>5=k0lv5Ti%b_C6l8RxmhJ`rG``eM zM?$NQe=ZTrZru%uP45QD-<16r1qf&uh>BCrcsft3HrV~-?UWNKC9F0bghO)(Bz_~5 zMTB@H3jrjY1ud$`Udg&iBg@v92KZ`g-4%~ghQmF*FiV5j)*%{*OrjyFDc0*CWWJ%O z$Q+3tbkRP{Kl;*&%p7XcmRYCob*dC%ui97gPkq6U=I{2!Devp}WHQ4^2;+vnCuQT$ zf=%|=8M6AfUOHjJUtuA*edd0OINdjgA_b5U=SsjCUE0C0NC3@$FqvUm@B1I|Uq&@L zG&&~mg`6A4gz(fNEcbdq_oHBk93t>{J-c#+W(bU_+Jj-n3(Hf?RXDn8!Xepkn)IPv zDhUuVXiC;jr}mRB4`ORb*b{|ZY{(RfrT&d&90lGH@_nO{$p#Cw4gA5;%AYxu6kvE? zwN*qO*j}#+==UR&Y|7PmkUHZt=A9i}WdH`fssyE{eWR^$6$|RbZP>15nN^h&womc! z=kY1``lm1%NA|IVU#uauk0oA_lVS?T7U*hx=u)!44Z<)mcTXn+%w#K*Q`w#e6FnUw z=-&KXppyHrK4_?$0Xef2Z!v~#o|OTS>SnuSy7OsZxlczEP2j_J=XdCQ7>g*bJ+Q%P_1=p0De)* z>^Jq2IH;cqqJt8p@p1`cs35py9v2XBi=Nt)O!*o*t1vVkN=;0Fzk&9Ym%s#a>J>e& z#h#3Dls4h0-J@Lt*;|`Ekkm$79{FU!2zSD+3L52}WC7nT11wSubxXcStv8C~N9dh( z7-WaQb|?wU{bwgh^SLL8rV9tzx2@e0x8>${Q(mkB@BIG$ zFSpSHd<2Oq77${pHna9|tVu{dHb`YcVhaA4ED} zk`Qc8bhfJ)!{~d|MKIHsk)E8dqwLtiFJ%#i)!;nQa)#ca`HRT`CFo$fxP_)!5{(A9 zP9pm~(H=+PnvZ_vJVIBxJDzlP6CKLPb3*^~U5V|)&)xg(6n&C3bnm*CZkBaGiX@pn zYcOeF;$d5ig#SmqK`z~C?0)RR2E4j_(?YLkHDjj?4}7cP6`f11`~TKv4CN&v_XVKT zXf+K@W@m%mA>A(rZ*N;ep)WT-0Vvo4tCEoui-KCvNR1ZsAB#_9yF#{&S&KYy^x~cd1t&$^51}&p3}I`{)+pa7k*R=94rT} z>>rxli1ib(LLRhlJ}bEmSL~HO$fe)-%;_}SrT|M6wNVWSv!%dcQoob*F8IV5qfI_g z1lBU-GW|Vnbb#cy`+ep1xrEB<@k{8#322@{6!DDG%VDS(^oR`ZvpKJvWKxt#pXj7g zpsPOLWP#;2KY?z+ZnJy?-X{5F;)GZhejBDEwd+&sd|y~>H^cD9j9QO=Nk4WldA=AJ zr;&;G7$H9gz1K`K%K&R&YA$M-G>T~&7Kr{uOFI)U-Jd{*w0$CWa1J&JP-@ry?oljY zGouSz)R`JU0<0Sda1N0n#ETqNGroO`Oluc2#3rnj&VXQoR}pK_;pyyvnU4W;2*8P6 z=b9=Lr~Pymke~CA0ss&b{{dewm}ge)NntxVa|4g!2l3mGJd>m*xHZe!rFQP4f7`}N zbhe3^p9p3l==-`rf=Y`8LrPM{cGS)}Lu^eLdCgnzfuevJBT?9gRf0@$as>)Qo1GQh z;J)3?R_v2Yx2D>bw4ey5mr=lNRwhINYG~HMM z=H@rCHBnT?UN+w`u!SoN0&MvjusYmA7FL#6EnV^Jh0R_{+RpAPFK`*qju7hsXy#p; zOyTl$&)c0YtWp{vwH+J3;ZKvhoqK~IcNn7d5!O&hCZ=xwba!gtG5b*X_zr|>#?0Sjy~j$ z6C@Ch&Qdv@vbXQo`$>%|IQ^3aGYQo;rNDo!1e?jfh#Trkz0XKokgYtj*4VMsbXOil zu$yVNWA&WLHJvKLMKM;TwuwahPGWcVcjDp3zu_TQU z=8wrF*?}gP9ST@h7o6`?;%nd94T&*uMdhP&!?+k~Pj0-$QE+o-ews5x%l~;H0D8f4 z3*H645F9Q8!j2cz4NxAb%g3iyCYUkkL6rKec{bHoL`=(68hf}CIvf>t9G9~Zf;&NT z(N>Y`#~*}&K9wZWRa)S{d!vP_mGRpGuitslMK67}b3atZk~fTgF}DQIXmE`i)Mlay~_?RnH;lW3oR)*CGQ=S z=2-SCx~uL$8>VJ5OBCNOSZ7T(eiMUS|9$aNqcfg|<3wl(TUZ4-%?PQQX(avjVV?L1 zUBQ0#QA~nn1`V77=z_Ay4 zu1m)X0wtJ2v!Ao32B zsnHVaND9BGnCX6aoMw)uCX^wqlO{~5+E}*4Pqh27bT{{!^grRxXmx6cBde_oGrr0W zynNZ|sHnuw`1g(VI0qV?8}?4W2&P2la^u&t#83nEI0L~qmOh6=@OsM{c0GFNocq)3 z;%5(>I`@N__=`Q~#+IxO4T@DDAxSQR7R=U+ee`%1O82e{=lxSOMswcY6ER)*Of<5;DKQ@aTaG+GawLa4}%tud0v$2kjq8N&w zMko*f9D>1Vwr6pB$$G9GK>kJ0G*?)hkp5Rovt{3Mb+OE74DT_I^rps=DPcC*p3ZOQ zn-Q{A_E~G@ZiQQQUaQ$`*s3LnRqn98E6mr<}?>hdWw?bv&#`68C9%>NO(`n?)hXidKLV6)MO z#q_PDi%?e;s55jrb&0H7{QvAN(;v=-Sfd=QnJq49Phs3-OQZkE@nF>#GF7He9z&|K z|B*TEzxonUHfr&Ai|1w2LmJ5{!~$l&g8 z{xMv~D3M~*LOZ3Cqx3jH`#QoTxWLZ5d$g5`sr^Xs(5szU6g^b*EC84Wn#Lix#eu$i z}{p&{~oRS2nUCb|f| zWJhkbou&X8Bi7M+OE?a~vp>Q<58Kn^$L9|=X^E2Eam|d3;L6Iiwo_~SHB@R6nJ#Ku zg3IP?9>O`o`(ZYm-51c7Q-xm(o!b78lc{CM7l577boQY-_8xjqaMk?zBvK9+lo>yE zCwQQuy6Je?s=jMZ*Okmwu+6_VcJQyCk*&_MWVUi&u594_BA+x1XqLUJBNKWvYcw4& zHgz|(`j+mMzy3L6K%7>J6dz`|EyU$o(6T)5jACQXSfV8HkSnPc-JSsFix9kqAl7F+ zYOI~j^H%e|$;Ba`bNfpMP{V(}XH!RIvUJrkK7~J`R;Eo*qTlnQY7SOZSrS84-r(Rd0i$Fx+uu)XhL~M}~HyV;VaAtRjXc zHb4t3-T_hlSq!Q*>29yYdu)G@2ESe&&oe{TH6f`{yV5fnquMTF?j~R%cf@bz$gy#d zlcz13t{y&@{PkHx_0*^ItzMn8cXYz-lDYrKsCQuF+znH87wvN<`P`0(p}tC#72INn zeqOZ`%)(0hO;T;0iUhvU&2WvhFFQkRGNaYY&}0^tRg`L+sqv$OeKmV%P~K0h-ik%Gex`vf?4p@{&XSk+&g%UjHA)zQ51ZH=yy7#+^_2BDZ=emuRe%&` zfkNBb;Iv@RkPdvzO1Onrh?VD8P_F3HVY3(Se(0KI#|%SQv*M-o+$s*yNcdo9)?4$z zp_b=0iNc@jOuOu863dT`Px}z#Mr#6kRCa;W1@vba7eY6tQVuP|{{$k9Q|v@YVP~%? z^4l>uOgAY|c^qWW(*90tCjWU5T_BZ+2`NJZ0+$_jRG*v)BL9AjT7L%ARPkYB{pj-4 zw)h0IzAPTT;PlV_q`8xd;`w9=ZgIfJlmA%(@(OPl^bdqSB}UGIIQ-B~08>*kMoiKT zMEji}?oH|8ZH~tt%!>^Tkmvev?i52$HRAXETu!A)r0D<$UiDm~0QA{u#4>`Rxx{T= zAhJ8-BqMdx_G0x)jCW)TKx;bfj|AnnAW?`9-F!|Me215gq>j@bZ$gjPc(JoUQFijn zbRc&T)Rjn;&gsYL`s^tkfQzt3?c!fnC$}-0K`s1R)${HUg(7q5tvhr7Mo?wJW4Ra-@`c zqY%meUWG4uWAoducqd0V8!m2UL%Em7payX88N=K(aIX!npj^$U6kZ37*YcjH@5nq$ z5VzU*wl>4K&@i~+(N`+d8N*9Sk)8gjPBukJUquvH)%-|%9u?us)?A@ z4q#ENNHh!I2nnll64gvp*DLJfms0%j5FyewHsW*+uMC)@%Hi*Usf?k8*3@mo%L^w$ z^g+IZOn52^nqTI9tbHdV;$_2bQ5DL=$RVa-4%gTcg0qQuZ{Znt@p|qE07`E)Agf~n zT+V8{yUzcCQ&s4_2VS8O%gPtFs_%X)DjeY&=}_j_ws|p`rt&*VgpVdSaasRv#=tLr zJ6eK$PjaZR0LhPly;r&<2mFmi)>qVP#$7t&N}OVjnqy!uj&wRd_jIgFWIvQohEVux}SJZQu#d}a1uMu&8xC-vw5bX39JDj1Rcv=#ZCIim58`furVwf{?%VO=-^`QfUqqXsXxN^rtZiT;>Cv~ntwVeK9vSf3>K}#8tobMM%P~31k&p*3%Ru|U8t@+z4nHDH z#Qg?$A1O_XxlUmwdv}RU?KI+FOsMXde>@ zxa4~uo=iUwJvrx*y>)4y56CiKf$RW zog{`yTp}nWj>UA96V87pKv3+DQl*E-wrBL!trWtgoJW2RIb_-TT|lnsq;^T;2R5EMBsg!qB#9r=--zb;wv^%!Ov5F| zQ*Tj@aA_sK@5Upt*4>9YN4?p!=Y#K{clgl_9i!jZ;FHZ<-r=4sic359g%-~S${o`# zC7Eon6RNCb24OLdA{hV-)}gd19K?>Iu=qmRJN~_O*k(LV+GHwKss9}3PV0s@_2=a# zA)Z2zAMt25+dYWpG*s0lR@zo0O}7CjFaSoPKvsQY@IAYRizZ#fOa zihE*$!<(UZS3jZml@+HY{kD&3F89(<^!`ZMfDGsDFvgBVWS9zUeb{@3PWC+W4zm*! zMdlTW=w~?=K$LrkX;RG-ILll~3CshYxJWBxYZ@M1cjozf+t}}ky<8BNHqYqVhXIl? zKR!5SPMHkfn#q+qK%O}r(3vM$MOz6&X%Szy0)B@gCx77^v>BD~8keUwp2F>sEeYyt z6u9ve7>T5PCwo|>o)LoianzgN>^JebY-6<~7e_cEm1KeZ8x*K{9L4pe%yhWYGRM*% zg*&BfO6+d04$dC*2Mmd2uD)4zw{O!vgjxUwWm7sezUa8ex(HeKNiS3l3E>erO^%oK zKJD_CFqNbvJ$Gjl7~{J(ndagCOwg~x8LxOG8*X6DSrC;IQClVS1o{1Mv?w`2i`O;B zV_xP{Oq>>Fs{x;}2Jha&-^+AHEB##K+jV9SYc{4w(w%FXuJaQPValUnE3bClRKqry04JT*+m9Q`NYP1m^xHf30C~fZ`^8E zr`i$}{-1Vxv?AZ5aiVySZM|KuJak1{O6YY0>1*|NRfQlruZ5d6^IB;>-hJ2vhC-li zC?ix8-As7Dftqc83`VS*bYh;sgh%>k2Z@xWO6cY;_t*@dUnvP3Zn(V{aYQe{hd0gA zKLQ>*;^Tm5Xo_p6VoPmi#uRm?oNmP9b#(7bvXfMQ%wD_u^OjQ!70szTwk8qx!7cc| z?3iRwsRxV z`A?^lrl-hEo#HNw>73gtg6OH2&Lr8Aug4>p(Mo9~kemm6RikRs`F_ULl2{N#DJ#rb;gdKOIP-kU<4`!LDPaxWAIFrCo_3|ygH1Qi zcGH0FaT)PR(}Ziih<7gSEPC7fjQ*w0v_Cv0i_lEIi-rfwLP%WLi4j0 zCjn^$w`{SM!;8AlJ1SJ16VorHP7Pv1c+}qQ&Udys}eV~=NZIv z%ONXk3HP?;mpAKl8XlYg^wm1~lbpj2$Q8C8c=yXpZwloQ z@mwb1l71m;(>5b^`h9Cnx?@=Y{e5Rt&8&gs1vEV#UDiV==CNyOj z(Q1c54bwim%=VELM5O0JFU!gCzLjc=UiU!`^jl&@hYnX!1E31%W~hYn`|RV*8}8F{ zD9Ed_7B>ca@oTa83%Fqo#i5g)4x3`Gv z&4^P{hX3SNK7qY6O9sXX6(LG@zHe&6JFmgbPSM$4NIZ{0Txl3Q*+~uLfq~z%B`^b3 zMwL6I6*q5<0vT#PMH5$fZvERw#+QPCvhjmmASdkCwN80AMotTj+?eOe9ShYC78|iL zM?cMPyy=NUHNFb@T91{eTy~G=(^6SS%^&ctBW7G@RD3!lQTlc+dgx9)X|TERl)Ai% zzUz>9zHA0NL)FZhF*9)p1-C-LLMeSLjPFp6px*DK$cZKjJBj*K5g3<~-Np%IF?N2_ zpGJh$F_wmWGm~8CgGY$TmMH%$Jyb>=GPVn-s%+BN{Eg1Xd zaNfoPRxHPY+YXbF(h-p+JdJRN2H)f8GASJe37AJE%!*3-gCW)=xOGARB+3Nh(`v@4 ztY(yH&dmW+jO6m#xhxp_|0?vp^$KP557p2h0W=(Is=a3cr>l`2Wo#1RGkAwvd-and zG&(PI{=kX&fEqFhnwU!{6^FzFd83mqxpNlkVv_saJN)Jwf}>}Z#l2_z`zrM(NQ4ar zpBDi7$4E&kE(*3~Os<=bXndk`n;a~4g%-qNjAAB}ljxW+OV(_uP8raDBAZ^-YrK^a zxacNB3g_#{&z6Q>$-yo+@=%OSWkxU(&pD*|5S7PvwIit%Q{z2>$@}A#ivcFXX~7)>!NsZr&5TR&WNTJ(J|GgrQp*9r%A64G8tprXr-%A61nMo82Sg7c{Qv(JM6df7j*L zIjXwzIM(6?l$iY>-ef`XQC9mYVlWbW_MaP%`zb;_VH~818Ku#NaB$M&7#dERt-~*^ zZZ$$PLi=wx-E3DHI%!@1j!+(eTgHT)>t(&Z1ncqQXYa%dAWgP3Yed1ruu?gC>V4N| z5u7)#6>(t~he1gZ~NGRaX)gr@KKl zlNQ|19I(}8uUO6CTBH9#H{!E<;hSo2^A=4ZBDBRmJIX+T#XBd0H7dRv%*z0YKFYgm z_W-%sjI@B=0RpJIHvV+orK=WAW1VrOzri&U&f6|0xu6kZ%dH4ixI>(eEnrsSX$V^n zNY1Cs#ky1>3TUuog_y5xvjD)n#&3g-5JC$q;9Hy^E;-GNY8k*XFtQH%q@_7_k+a0*~4Z_Qj6Ckt2m<@ z&0&v#HQg{4Y{eg(rS~e?nk#YX1(Kuyzu#P6!MD0&jOc?;(r~PrA)-a@o z5UCEmP#M{`l5fF=) zZaz3tr&(}q!Gw5AW`&(9jHdj9-RAO|pML075Ku@dh4WgJPZSrL>jWui?zFVGF_>wE zZNc(Elb&1lFJ6P{qdF*Hw5#A!+y4lge+b4Y1?D$iH)0s$4`pzh} z;Wu8Ol|j=|w_m=syJWQhI?-%C%_Wg0UN|uTP~K@e^c4&ba@t3x!Y`WNn{yFImZ-tN z@rg))8Ggp#$q=_|@8)^d+yZNr45HXlmCQUKUIB?zQ1TyTwxVOhv}T8KI2VxpAY*JZ z=HI`UpH+6G238p8Yl9oRL{NpfVH zM{@|!KH0x5gkNAih9kGJ#q0~#S(v7uV{=BSg}piF9VQvoH{Q|R7|lWoRv@#@jv4ig zA*xtC*5Kzu;AJazIH6 ze^{s}KA>nRd4Jp^mClLI0VhcVyiR74b-=8p%wzO<>b9s~)U_<2_HeB#|9{-E<4(<= z4GbWAU=3>I>;jyCL-tzAC-^0MjpSv5L~)jW{SjTjk?jBlCo9vB$F~}PH~9nk)j+m| zOO}tSfS+&Wzy=6HC4RF5xJZmdYxZIoU(_YkCsA-0T2^tN9yy78O&q@Dmo#Ej%vUFU za1#a7UW#L5aC@oD=okBhH^5VzK!3rh&isHmhVhK>0QVlT>k|tFBOu_zp8`aPp%>72 zzKl0-+ZvGTTjpOnpUcF>T0GY}-nY@^_}l1ac?(y-%jQyqsie&`t1II^Ax;6RbXKUH z1bIgJAzVt&hOjO;nwOd{1WQ&L1)i@U7iKU9j;tYZM+OlizN-0{Jj+uni3m!=ndvWJB%xGZZb8KMC188qnKj$G$?I(#Yd)l&NKZSF>SpFC%c zM}D&7HonMPJ))+ok%9#gVtisH!CDt^>Q-LKtKmVsoGkd#FaOqv3AJ2E)mG< zmLW2+VwP=q3P4mS-)^m(y=2H21Iu!fT9qN{ToTlW^17X11I;5+5f!Akt&iC|W~Ni6 z#7viSPl*$6M6}vOzHWz(N^xO>{4_Now9(2^&5n!df0xVH%DV_Gg00GvY11u0P+V{b zyxqZ6Yo!(2(K^k8Ab&^jAC)%?<&4@ks;hnsm1*HQy2hE(gmAs81*! zfUenS{VVuqOw}P^Cr%n_|0|BdvZQ??oHXk?=QMNozG**z)=%mcBddghqZ=Pj?*Fadf#oW})K(Z8}bCwNNcqfr67-PnKlj&;G6iT7?@M^}`(t-1b};$V8bb zb0A0=3*F_}y%QrSNmqjF2cq(abi&~~y+m2~nR?~JVo}PRju#R6*96#T%#u+eZ^PC8sSE58jDL>bYEA|OGv6Dw_S+`Q+MN(yJp)sK|*QhK%7+6rOE@0?`|*n`0(05bDXj;JsO zTX^k=XNyI>lA4KKb|bh4P@$S+xdQdo2I0Na$l~jCoTlY3(^~AQ(4t#ReGs{jtc{;H ze+FovwHC9CGaIc_Vbk?ztOt0`BPS&n6Eb&2ym{Um)B&OA#L$r;od2_PmB$hD7YY5} zVh|$NrHw{C*d)2%l4L3G`}jqY0kmwAYrXPlY(7Td08ZRFIcUHbS}??B^&98s9gZ@Q z)$!4A=bjLTli`S4w%?`ToMVF-vscQyh9EsKN4e_dVtHl2CB+z z_c@|%RvLJc=A$2bb3PnT=63?Vv%@M8!)o6YG}_6z-!R{63rPtd@-$xd4U##HSnF{U z_duVM;aYAJDP9#48l~J1b*q51W(fw7yw>wIOQ~9zDgea^nAyjpWPh|1!>RT;{u7_f z8!ZM@D$5cM%zUcWfDb8(W^C3(!ejBj(NO%vE8j*gX1h4es^RphWdJGI4K0vymovUEckD<=`Tu$Mm(BF$f@=3NnwYcy-xZvX}v<000A`vAc`r$l`~+($yWw;Z93*+ z0Fx{s{*Rj5Ydf6AzIVU7s#*#!R{GO(8es~p`Tx3hZz&{vP6C4(uhZJ0GauQnD|X*j z&NOZQ$X~)&#pzI}Rqd-%-8IWef)eKGSl4+VL1ptJ$iW}3Zn{F|K#BeifCOO50EfUF zM!Gx>0nPRY8EIJ zPu09A*OdKcqMT|x2=5u8GR$m?L{E$b>k*9bD!NmTYRqUxcNJ;ysmILOnJL9X#~gcR z7-N*Pczu$=-QvVTOz#y8O^y2_U}(3OWK2cMW`gPbd%ac4ateN>gV0VO_{8oT2_T1m zNA&V6_Qj}IrM{7V=uq6Jj(`m4j$b4;c!pp7cecQVcNDP=JN&!xHkbB*KAJNV_|0ae zfC}m#ky)h|s0S!zUsM=IT>U;|amSsa?pc~6Eu5f-KRxsh=Q?Z{+QLd|klw8uE?!zb z=({nGMtMLn88p=Upe7aR@gblelsYq3R=-@JHrIc5rmv&FOrCHH65sg$Tm|I(($xdDs_VIwy$fsH-h3p%&YYXLmI0wzrW<)_5j>H_ z?(@8iUJ~M=Kpgi>Z1S@hoT^T}_(vvrbtNh2Vq_oeiyM8kkK*z%{4Zg~apzmeY`lt8 z%uRbxSFm6gtFV+HwpA-Z{vT%Sg2Z$#_i-)uI;Fv?nRl4FyZ4(g z@@9Y5)BS|WT}qIYu<#)sFiz z7j5PE6~P?AlWJz8X)rzUJZar|-_5+U`_@c(nh;=(1u2+j1{Da?p_nM)%}M4rhq!!U zRlhGMLv2F{XnuKPj>dXv>`JzR|7>@0JKXb5Xj|W>Z^$(8!-)HlG?!PH4OhIJ-zbhu zTruWSecuM|3nRug+$r{r?_04Qv@5q;ATm9i6`C;EA}U;#Q0aqwEbUoVYVLqJVI?ig z06p2W^wCI~Ju#DuJnhWR*>f%ep$A<~9h8SgN{(xuuM2=JL%Ml~P=mTh;BNzz3=OmS zv-iXNiea+0z7FMwlJ*z(&CR$gKu(48maEdOA5=o@`W%M1%ZN;(N8f>bU3GYB1^G#4 zA6f1^gXm)jHm#5HqjLx9*D}*o_7dTko>4iD_vFf!t!??<;V|*eNGE|oKq<-iNJqDO z?IAx|pPvy{`Erj5WUKuW^ZdFw5nMq))b5YaMRwO z5;H5mZz?!=`En|JeZxlf6%c`xkw5;}c{eh^12%BhV-tr1)Jjm(-NeZCNn8R6C?Alx z-%x2=?pTzVeeWKJ7-QpY0!Ov=nQt0sOj9qIM!G)UagBN_(P3oE#<~C2p zey;08=Z!n*-qukGkl=>Avjv$qW?-+S!2^rxN1u}_M7&Nd0<-`WjhJXZey{0O_5;`O z#;vAmi27(SN;I%CBh>8&lxPMWZFH~7S`v)F5xUNje?56x@<(s3pHa+Z7i&hDwFk>@ zZEOGo`UI_#hFbJaA%Vh21T%EGwDI)H|HqQ|0sc*YCRElO$b9_L$f*~oYt!(*&dwG- zv%%~MO&Du`kkUb-K0aV*{5t_39}7NTyY(T4*NFJTsGh=yTOxIutaB6|e`$c07v_kZ z#{H39i-YnhR!Y8Gygj4Bc?(_yeRTYc^9P2kNEPYq8MIc%Y%>Ucr++ju{&R{=LCymz zX^Eg`|D@#i`@$S|0_=WXKt184J}c5zWF}B)t=W@IGwGUlPYYfUPTp3NWw?`_E{T3x zXI@US?<{mm!?)8FKuZ@JK#7vil@H(BrC!xjmR{=xS`j=km_mjMfF}KjD|wUJ00}%; zKdJJ-<*8&$k|4quU=(3ng_>$J1S9-ZJLZkOcKcDNx{I_e3TQvunKW?59s|8rqZWjWk+CQj zz*bZ3A#ZVS1q68I^NX3R(cZLr zD%I*ggpXM7+KQ;>s?$w`_6ag;e}eX-)Oa2>G}O^<_@d_XM~R>DC?^1lx_POxx`(D5 zTzdj%g=6i^XZ~%*Mkz*VZzMC!^mJo;xX~W`iDc2U`lQA80BEp4>1S8nX6APKX6iP> zP(z8;9P00M)hT}H9mt48T7OUoc1|ZDr-z3T;8Vqq=?W$&?~ky1B4P@E2arp@E>5a~ zGh5Rm^+jJ0`1h3G9n<JcUoNu0!ss9R(*`6w0zv8A?z zxEV44CtTYd5dNO4^7#B;14+@17{6(n>M7^_-m&6@3A#u@vb861Te@Y)mD#OhetVwh z{@bPVxNjW{n?Qqzv|626ji& zeQcAC?*h^T?7f+Xgl2*fcw3ohk>FphZAmkwRaZd#%g4)<{Qy_hx{X+ah4jple=s|$ zDL4Wg$e^vs3dQ%RepP|&neOVYYAvb0sN+XsQ`mbtP?^KrM?G?JOEG90Zs;^k zrIQ^3u-j2Bus7l!|HN`0s8fBtlN%UOYP(rG9=lTknBl)ASEDy6H6EO7A*?^A31R`H zH=BwFa6AF#CRhWY2oV4P#?3bQvdV7Lc8eDioC3rJK=`5*8Su?C#=Pbqh_~DTytMS^ zs$J;p)b}e^>P8r|+e@X(mn3j5?S9j~WHXRH5zlcL@8sO_$~gMr*aGsycw~^k4=B%W zlG$+AwLe!pwRoHBa1aXkkHoFEmNNyVKS?%f*@A>t@oe3FNn)E#Dee&mZpnjTP#Cl9 zUQcbQif2Y_4;764sRTx-9_udRzT`GGv*B$*Gne@*+L4ckLYUOPbtmU$nGLBQ=-dXWE=l#ez7iC8$zWc)W8d7}0gLCaYIN_A;@YZ*@NUPGEP z*vPKP!c=tF^P^Y)31Ax_-Tj2rtK|}?o0YK|;{+YBDcBd0#5<=>HAz~247bt{A5>T{ zl$H+5H~5^lpeb=n_@6RS#$S$Do6o&T9i&o78_1rw9Ia8wlATYzshW|G>*+Kp6%|^a z89|~4&duJU=aO4W?F>fZ`BSn$0QyaLz6}kJS*KO@^*7U|ciM3v!hQJUQ|EjIm9O*{ z@F|$iOhU&rP~-;g={|DI+{Q3$Gy~ax!iT-NM&fuR5o6_@2jPWA`E(WIIsj*iV1W9VYw6Tqr6G2qp&I(f?KuE4`{UMRH`57ko!miNZ-y&QcAqu80)=pf0l zu=t+-XY2{1*TI~z%>W-=6~NnBLof<>3@VGXNHi#bY6!Z-FS7^H&*IX&_Al(oAwu3r z9#Dmbr2BCIB226Vz>sCb!j>7e>Q#Z^)um-2Pe1?wH(0i^iVpBJS->9$AeZ$?-oeQET3+@w<;V}42*Z93r$>UPcdUmIL6`0-^@D4o`liQM z^8XxyL2a$3KgbHAmhn`=aRSpGY^xoBqn4QwFZ|&lThkTMX_PNtYS?nhX~5i>pskb8 zzZzxcm%)@oV-6|pF1bgSnrN}^9oY{eEOjiO&Ywa2I>QJfn*4qRqM|CaP~(0quzgZy zD&srjH#_skpQnp3w!)z#HaCI!KHvK3lFPAhno4>Se0jgLyH46I$GAA+9S{oNc zIvPr65zS1P7Tb(IEkM6sX9_T9N=i+PCM}acDk%GS6sy{7y78Py!A%=DjgmB3li_b6 znC!Yl&S#lQ z#flcQPqczO4^}_-OX2cSU@}Cpv_gZ`FB1b&2qNPBOgmoc;H4Q2DY9!w;k+`F8OEy( zgXOs_7g7VkX4T^0sY*ZFzDn;8=chs!1k0>gs#n0DsnMcNUL0O>m2I$EUvj%TX&lg2 z$HiNF7Yb1^2}Y(6{7{?&QvZS!-QD;c*s_m&#aT;p#`YtF45WfJQBMP-luen3EXI?J zI70AAEaV>b-U~^ouO)tNa1Zso!ktYDBL(+uNHg8tam$|metDa=Co6R=u+QY6cXl52 zmKy&9U<~j45e6sVSovtk^W@+lr4D}PbrHJ4Sgf-1x`a~E-Pc8QlxgnN?;Jin3u6Xz z6l$UC8D>q}*y;n^8HFHZwh-D)wa{g3wv zhCfbCVpnJ0G8Qfef(_gozhziaR2g&z?&-l+SZQF{5ReKj?BPv_*A(k+a10gLEtvMv z{4YJF#74&dA2hYbM+L~V8{%zsRH@T>eJE6Z9T)>**G~7it;ha|$@mnLxNawqpZkWY z@6PUJY$PQ^GYglGt-F`G&^LRd{YAxE^mBeIl4j*|m^+8;AE8y^mOK1*DXfg(3Dz38 zYmLoUx=?PYd!j)Z(y(Q6YX_Jb*@FlpH*? zv7tJQQQx@6%;$%ydo}Etqyk>}_F2WodvGz<%Ms7RyUS&IdCOucH8{8nK63u^4{M)p zZuQ1)yUGgjkPCTVs6Yx)xart$@bKE4*`%|~BGVZQAEHNCm54|p%Ugz&p47gkH(@p< zM3!qlOLqMD=g^*fVpSll(}{FK@D6wGFqsrWk$>lM#Qlbm{|Tj!sZlY&o9cPB!Xj5u zT@ZC!8nNNtB(x)BDq~^m?)H!~f8W!?El>Y$3(rXtuU`xov@U!!|KY7P&>;TEfMPyN z^HDxz06W;6ZH<-zPJ+1RTFaLpevD!Cv;)7C7U}wYj4{yLjX*v{vZ;L1Ac<)-A)(1W zOd(g_#WSkmYQOGq%bEz5L3*{P@Yn9LltqVMU~r7`L(xH|JBI=uSvfXqGL_)&&o4?Y zkOEXXB;t5@1F;UBNX^+wn(jLYuP^y~uy>_gOHRDCA>^K;HKi-+B$&@7uv}93&m%R$ zA*x6Fb!-Z)cN+jatWx+eCG~DQ!4Qu-#~a=tjEI97wc2+JT<+(3cc~MRJ#6}ucyV&$ zx+($TjFSw7Q-KdeI)dIYz{deY&Yo~o1g%YNZxIWdBIH+a$zWL@8c<*SF$q|87zKMM zKkA77fejn|6)oF`7Qy~rRt^~ytO`og(#uT0rOQm+R;>KphxK%aUDVOqjNrI;&`q)m430RN zA8K<}%#38UzRJ3jyxakMjLpX?21s8%hWdov zEC7`;&(7+5x+1)yGp6RcpAMFjl&y@2tn`;ZU;N;uEIZ*-Gp3QS#2uR?TggV3yq^{; zn4$)7QHTOG;VEt9qH{>NTKpVi!QR)PSA?Ql$F?i1EUo_&&nc^(TrvkA+pXccbeZ9+bq4o0S0N8ago`0F;(41F9hQtiN z16oDm%x|)cWvZZ?u+vsKAyofl1}6i0-*poQsX@o*0^FYejBYXHgnP48IN4 zHgsQnO_<2=P2dH@w04IMD<-WYuHrk3G|Tv}=<0UT5+YyWCo=SZyz2gqmQx3%k|2i_ zb5=evuiN*~WB2D{JL9GD3fqD~8p}iqjJb-(lPlOC1tNl-b|G z)2|>!u1QSTOK2eobNL(zzN2r*Os($*%eZu-2PvsZ-?{$_m4K-lO0|@_M9a$!tJQ=k6 zxR-0$+|lSk`oL_VS|e{y;cDRaUg8(JJZMBe!``^l_;h>TZiU z;e2XSRWCDM1okRR7&d163c;x{MZBW8X!Mj$AT8*bUXft<7u5afLhmOlgwEq*s|9ds z^nAK1PZ#vw#vzenRBqAplQ(E)bYFOWGr-`U)kSqLcc+9Xnr#z#>5rk++mA=HO}Rgv zv(lD07lH!dJszw;9`tIyw=J!)-F3eJav`Bm(B%3i1sOsVEM=8Khs(}hC3a3=0P-Z? z^;jU`NEFRsSY@xVqWqnca|8B(*l)NZsQx-`U+8JsKUDEKyN_THz_1SO3=Y~1SlZy>9-qDkV zA%7c#^7Hz4TL@Rdqp!A|NQeM&3I+mwhaa^=LEAljveohW2Rn}HVN+4}M82H#)jw+< z6SB5Mnx@OHvy1?nFFDnKSqKXZ3~4#|9RLT=&;U7UhJs@70gVAg-cT9_pO$$5f=d$f z4$g`gS!)sVGJ1`X-naed(R|q*#C_GaL&`CmtCrTyQMl*rIsEhbI#$p`EnOWUqs;M9!?%fw=LNjEnANc+Osy;Lk(Trbta}+YlV)@e*#AA^K@QKTfRJ)8ycD_0=&cPEh zbDe=#J!-5V#e-PI_A>W4wmytAI(@l3 zGXWID<&o{GFWJlR3Sw4rD3Xq%_{>M;pLkL8if26ab;g(_jt&MTf0_8LFezzM_pg6nR#CTF8T(e#?4>% z@&{=<4$L8gzC4Bu(dhPBMnA9mbgy#``wETo$dy|bx#`VdcTd3{tY1j>D>(@Zrf0*) z_r@z&2q~b`j_(XLT+6@Jp9hCKa124rdg7DDc8tz|Iu~ETp8k{ZmUTfPk6z&dWu4pX zlzDBR1fZNeH=x%%j5gtT+3dpWBY4;GbDuu?kaNL|tmd|uSPNyoQX`B|OX9N`BkuMk zRq98joHRTF+SS*ZHtxGWA1r@@jZ9%~H?9=z+DxM4K8?vLryhx8B~S*k_1;K}&N5z) zkBBc!wY6BPMXduN!$Bpv%4|cn#PMa;rH1xFk`u;0-No}`PX)~Pc=SIt$DM7Si$+`0 z$$R##@WxH7EJV|zP1qdfZ|L@+^l5jL{@(6mDYgMUh-FAD03Bx$I~6E;2mL)8le(0p zw~9HPKoediC0doFmgL&8ri{ND0(UA=xq~(VwlL9Kri%U#5>7lJ=B=Hai^&e9_QLtE zFFsHS2P|DOrR6<^6x%Bi)nqoD9i%r+pjVm0w8SMR|9%TTS##ZqL?K=?*!k+V&BICl=r)?VXrMXnr&tpf#^n94qa z#ndNPkrI51>3qiI@>E%SpF%mZw!@lPB_(?h$9+VHk;%wc*4F-WYkW(S!kn&+c7EOhK4Z<$c%8EamQbl4PgN+9Ft4>(sFzh&ktjQ6?soV zEH28ocuX;GCkuac&)sH0xRzSxV;`QWv61#5ARv#8$1LBlR$nEfwf3USqf0r#JcE9= z`oh-NQmVS17n8(vPmE~xAMr2p@;YuRA^WiEw!Lt@X*Z2-zW9E8?aYlq%{`}{AC|~x z;B=tbdF~nd9Q)(XWwIHPkAVNOtqHG_xnJ`3*2#7$GYo(6?gvYPuk_J85bI0j^1p_) zy8ryBH#xcNubVzcH247bsLlAIJB5%84;$KHG+{~(QDnv7BGlmw8Q~*qAj@z34@p=V zjKWV?z(ItGB$O_L(f?PIQQ(>82@=td5hccjc0(GCGBFjkn;TbtgV1!?>fumw5EecL zG!*Z{E~2up)}PZ9ihzNphwR#{P%`<$v;gH8sa5rETjivX`qfV7OHJ*ogf zZ_@TzawSFu(PrJ^L&`adEm45`t}FtrOI@|iL?%9|kkgD9VRd+Qy+{v+oRDWBnFToc zou+u{hJ6W#yfnT2r|?V=v0K5~&gO!7YVIi}k~OEedux`;S!N#%$iZQ8&52u`mezo( z&@`4_?ha1@v7HzZtm8IRoZDFo;y0hH96$Fl>ORWL@L7r20jY<60i}(X-6#u+sUV`E zjXG=vYpLnKtiQXxd5&df3J7$Csqsb?74GKcM$@s>1**Un>je)tE+Iupt;HsbyNP9G zsfCB$SFSWl99XLnZ$Nkdx(|BkLs^WD2-h=@7Q{3_(kFA1tuIc2nfNA z{jYq;V49+23y9^;oQqr+e+k;>RltF-ow|w3#rX*m%fZ2Ff-+cpzJ6&fi{*&53`6&0 z`kk|%Ydv}fqX`m2^jMbkSC+7K=}8FEMoDFqVY47dKc&J&1X!ax&LYZaRIba1%HQGc zjZTMC+TEO3NS&mUW%L_itcYa^oebj3=P+3|dqWiEHSbB6Wb$_g4a4!Oi{=Sl#{Du^ zR_y?xM`{y%L<}vz#5G|O?CSoce04#@p(;M=qq;rxdjmNjCjM3x|JxOpfqy0Rd%xGI z^#lH*x@AQdBrojuzLD@Ca&NglJaZIM4?=QgQzz)_4U>08QLNoStk-DaQVcgce#6=-w_p%~avQLGKOt)TRX2?+X({gJbahVS401g+vL95@9<5v+FomesU{TbQ zZN>xEY_9@XOwK11Cr5#NRj78l6HW_uH~f00m&#foy9;~2XS?GHlDxo??DG_G*+;ix zWHfbJrsUS}%bnts%}#W!su?PCsATbF!TG^Q8kkO3^@1^($6}IeNYA(AIS|Q{zexku zAmfFGXh{ENwV)9y{J>nV19=mttik$RMN_f<{L$Ft#ky(^I-ydNCbH}oz~*ui*t)kP zoSjSd-EsPzjsv%}sl~>-?<6+rXy;$HRHnYql�BEK2Ygk1l)G z!53N)=)(}U2suNsY+IzJ65Y-whKHF2oH%4w$JMTz18F)&{Mq+=rp|>v! z$Jf_p>Q(3w(}RV@DV)be&85kAMYVmU!Is9dLXG$S{A~p<=k{uuZ4q~uhN(+sYJZZx zy#X3oHvTl6L%*K5rW!u6O`B;4oD5JB#KMR_R$`s?s;Cb?8{QmHS3B~E!PMEVlhSDI z1%2{6*#hR(VD~M8JU*kEabrj__#`1ZGAd_X_c73@1S(pJA~(^zBdQ`}r~$<3-_u%P znYOISBeJ~i?UDjjxwMbGCtN!z1yb;{G5e)>zAqEZMGS_AqbXky8pDJD&2265k)X=1E&M$LGHATM{jUWBbzAOseLg$q18Pwf>ZW5&zgZU+ zpLMt1#w+LvG{;en>rcF`J3eK>)w8{Y7_#(0s>5ik0P%am7&KsmuE^XwG$V{%9mvbW z7P{uSvg?CacS2e^SU!j<)NWoK1@sC~IL-8rB#w4G`9q^p9`oT#O7DR%N7Qm&H$~Yj z5<3%0L1TGJ$HUcAXEiQfLe)1^YRXyf$_c!5``YIXA}0m8MNI;6-ai3NW*?i9>pQ z#L$fhl@EM4c4j;aw3{gr)^C2d&&a?fvGHfFqefPzc9WM*`aG$2ZkAa`xQykq*@Y|N zEkWeTGE|z*h5$+2L!9nI1e6FQy9g$-r%nn!O{6gFwJO4mMZ?$J#Y0tdhObjY?dQo7;J&(nOQyMU@e8&mFlHmC#u zs>GHx2c63IonJx)R!`+5cZCe}tn#wGKpQ2gV{M}C~Yc{U2vxD{rQzU>VASZ4GlQ?=rXFz1@^iu4qOh6`d zs_}oH^B3!G*YH%=n@zhXB%-&5JV+iybf4qxZ^^b(Zm0Rd!YZL*n9TRK#`!B&oxfF@ zyx4hxGHT%kPbuX7JFNOInfN=Kc;UW7DRA=`D&41ozRRqJK<|#4_-FhhlTxuZcocI$ z`O3sdcxrPW(1_=7BWza1CDo&}S|;0}5@i$_RQg?KA7B1=cFDZM>J62+!tITCv;b|n zRj)^VkfvHP2#Xj5cH#A>dD52jGeLs(kCnNX3TbN42zlZ?-?@KvL5v6r_i9`Lb*|=b zG+R?HaMPAwbrVZp%kyn*o@sfXCVp-!H!midIOf}YA4(R&g5RWHy=37y4);a5CS#6Z z_&XFhwbfAV6m%ZOD7v8^U-9;uf>CR7{bhpIy8qC;->m`0aTj zdxw*=IsK^mMHWlBE>>5R!RCcPg_YKnnKzWY2)f_q95zum%ZnoJLbdv zwc+sx;n=AuLrjHcZ-`|J8@qX@>PN9&uF&=XI{k8AiXosoA@0lPIAg{=BQn%=Ee&Yr zGsdKbh(LvS?$^cloer{8uKysG?lvto9At4Y(ilwV^`knMpM5EO`9~a5Ne$bVG#kNW zn_zq>nqj9(jR3MJ$-;y($#7$qV&+Kp@{7eqoM)Vn$bZQW2 zqu?V|Z-Ofsc0@tQ<$@sWfj?4dE7;o)yGx7|fnX{-WaT0EO<>3st3jBCCE{fF1OK(n zlu!l`HZW^=L&7jTrOJN+5CmQ^OD%Z_tbF*OFmThSMm}8Kd6H<7l*TUE1ULN|6KINc ztD3rO63M~E_omg2-wy-a8`pxO3qsqbH|=cYen`YyKG9lF=IM zS(qw2QS&)-rt{X%=uJcayj~P(71Kb(h*IiB&G3aPF)HY6nq}TILyh0Ng8dGm+;Y&LUDUS;^ubel*!PfEHdg*xf{+0 z;!bnZ(>xupymzyct|PpR%p_-7dFD)S2$|JKg>dZ~N?b1CtiwJ1lDt!txa4~Os!xoA zvQ73W2C_W&1|!z~bc27nnIUL>@PLwFvPV0X7;3;>vHb{`@z9Stu?fdF#Bk+6?mC*h zpdvGDASZvn7`4k0mkDmjWxA6-LdES!(u1e`BN-0W7AnZs@o{fo72ApvH!K6Tx#z=r zfcHU>c7=da5vNH>#Y*RaXKUF@WRr&#!feA@ouesO%rzVP+?OK`ueNb!M3eceFnIBKFZbs%-ExF_w6OfOH(Xn$QV&l5EB z%ufe7?Zi3mb}lwD>ZgIgw7eN@_LT-CqUHAW4fHdr8{3)JDpbSF9>UHxL!v%eZ%KS9 z{7F!i>VPEJd$+BH=}e~U@87tlbbLXXvxsvFV`y+&j{SwI@`n5&8jlTF!nDASSXf;Q z3c8M0^aGejjs4A83rm{NDysBn^x;o^TXDqkHn+mi(q<-&DHnExO}+y5caA38UeSkc z0d*Bwr-RYtJt!K7|7A(ikXN7mi`Kk1enZ!NarM}W^j=W6Q|__aV#==)e{)wuTXnRo z+7jnwlVe;tiargG&@}V<-JU5Uk>0gE{3kaI$X!p<&c5C3%AB2IxbQ~Z>xduu2O@n& z@D^rNb6*25BJ3?2CQ!=nw@ev2150+4cglqHd34*L*68?^TMpRrSH=; z1vw`I{p#e2I1_{7c3!sB@Y|YXEK!d(SJkdI&64`5$Dw7#a(g)JkhX3H=SbK6+{)M~ ztqBfC1&w+Kf~OqpAfLw!ueLmAFt3{Qse~FX*+ z6dm5uH)MOg^pCY+#_q;6K5)gp1vWtcZ3oo7jo%;e%r+a!>f0~nkv!U|ZdS0heyNsSZ&y{0fu7cVDc#+ z;Th?Q%PPHIO_^v?qsR>*xDyE9IXyy@Jn%C(i0$2?blB#Ko)DDO4M6<)92A|*JuiMA z#hf2EoQgQKwf7rL_*bUy-)ny4{U|LztqmC*tfndSqh7B-;k+OK#}O*%FnN z0v>lM`($#WYBINQ)6jPUF)*LnyZpJR`%9PAwyCr|sb)g&SaQixEWP;as~7#+yXOgs3gPduc;?*u&}`jRBjoc}M>_>O)LH$l{o?w`CCue}S-`0vA<488 zne^XKH`1118knHu>1JCj<;W(yNt6iUF@E(vfK$&=wPrT~A2)w%ZAId zpeDl{v0DL6EZDPSzqUvc;h@W(pqBtvC-DkB4y`@TPN4xG)NFQBY(1aw2h*1Xlc&Fq zoA@^Ypanz9SgX$-<`0k0Bo02=q@F3LucQyCC_;nfIqgNYQ^C%^yFPT@zrCpaniA%c z8I|olvRvCiik#;##lD}c0IoipLDF`-HRDMMCIHlRvMyBtH(}C(oTu3x?ymWOpa)BL zJVy*gbW$u{ULX(^*=z@TkgE_HuWEW!=TW*tKrRH}426=OuaI2qXk=~U(Hw_aJ*=H` z;u8Yf1;E;Hn-0h1h%$tPgqZ<@sM|6P>nIQ3GpYx&w$v#^1d&GgF3b8-5kjI{`tY3h zz89FYdDBLk@o_4*vlf@GU=j0reA4L22gla^36y5Km!jyp7T|kQ^wz`iU?68jUDN|? zWbqf9_RF8i#%FG3+(nonY+6@`YIm0Y#P(h(|4!aYbq2_6$b3nalVSLe^#FJrLfaC^ zEmTmyOPZfzU__hf${Ljl8Kbu5!d>Rn9j^R}p|)`}sG_7t^&;FqhA=a|eZe>Ps2E|9dGb?UhwXW>%bKE_P(tJen z4DP@~wRMISDLsK!-|R*06^z$cT5eC<_I;R+d{}~MXAGw$ z4ri2=>Tv}#bZERd5nR0kK-b<|GK3Q3%(+p|N2N1Q(Y%MzcAS{L{aR(~T}sn_y3SM# zkMvpXl-z#EjxVpG8^pJ29JhY6w68Rwv^%NnvEx#aJ@WXsl1`E z5uym+Ko=Dk#?Qy$O%eq=sI+of&-v#{s3<}pJn*85X_MhH^8eCZ^d+h2LDBeGXA~OL z!~@U3l^sX=z|Hf=gx|#9FWVX!AA%_4=AQA4E7kOFUlS#jKBywlbp%Qd&BFd|1hCH6GN#(veSwE}ViqC>MXkWFf-oX%5oTK5h@JM#D@I{d9?dm| zTlVM8oP>oZyz^HPX7NiG&1Cyn`yacRQY_>IBfGmG314BcJ$E(y#PU)T^_k|pl~D+g z_}=4OQ9nzg-i_+~DQtXUGaQ%P5_3~UL>pLPGFfnuNLN+P)SE8x9ge)&1;u>vWZb+9 zQ*x&qz`n_SusWH>lKOmNwwBlc5I=f*rH>=2VNwa20y2YR;EeDccCWc4Yu%%;MShTI z(o}MEny#v-;T8Iviz*MZJQOd?jO?pH-X;r}441#f-FYNE07%5GSd-E|BocIoGHQIg zRRgqH!nCII5Z_JU^*8eyt{%1 z&)ZAs_0>dF4p!CLhu>fT0000001?4b3L~o7Jy8Aaf~~_yhGh|``##_&RWvdN^$<;v zae&fU15QTWQ4yw3k?;w5p~SX-Hzn8@PDz zH_#u`h$n`RgwA{<$ZWG~z*q1T*i#@zPqjq}SzY*WxxTeS;K~eZPtX2hDMm%tmS0T+v z@OLd=lA5KmAF&mPzoqT}!wGLtgKj!2j z7@hhPZbc6?7g!D*6aSI$_ZkWu7_Xu!3=+nVWjS-H&=W}txU}IRvn3d8Dsf`Ii6(!<;|=)tIaVy`}B;-sM*`EqBv;5 zh8}>)?XSuDb1=*;2MB!KqXJc(c^94_ei|fD5^UmY3;h5WEmP=R%!g%dW!4qGx6Gra z^8;A=q1uJU#Fc4x7+g;2Y-4laNzL} zWPZxX6#(jgat+A1U+=J}Xcw@kT?mpDbv@$86D}&}DZi8su{UCc8ihIJwZ%ZaZu7{Vb` zPY8R70j`bCcWlvmX_DPHTZprg)uwVWKXO8w>oN5G#Acu@is}mA1Fd2`B?^hdswjfMV5% z#ieQ~x*JO`zR0g+vY)eo-&~g?uXdf_%$Y_u>^ZwN;u+cRblV2MYI9-NN|wrV+^C;n z{OxC)qUImCau?26=`~rYv(oxdZ#R{EpMU|#ubV*@WUjsp%LaXkE#=>zK0 zB&1kK^hWLbPSiXtCKeZ?)ef8M*x}_T3EH!qkT3IO#hj#pCYLrB96(^F4nmRGNm>;V zO*kjZ<|;3;0}1uDBZAzGJ5JWngTLpV71ZQRxqUuvLEA{Gd~NV;C4qxxJ2%2OaNfv0 z#NCpUaUk^BhQK)$VIy73_#D*|Yn8@UCGKD6R|S!x=pTRYUcpq>#F#$kJdxToM5!GT z-PT{sk843Rnt~C;O_MHhM;;zR8YU}e^dL#cEf_OBZG&7PLf->j%wuoF9T-i79=_Oy zrJ@#LS!BD7;LS1+Euv!YrwE5DPIi0w9x4`R2~f`pSfxwtk^ohfklSIs7D$Xa z4`ZQfI7L4KSoy=Mvbaz+KT><}9z~rMV8n1k#1nR%ScSz<`D~M43{jrjj}KO1+Vn1W zhw#-X`z91ca6@bNz6ot@GoG1Y&w8-ovN#8SYWcH?)o!Ta1zbiZuZbNCw|~Qga=S&9E`g!120_dcs2VI!7_3N9bWFk5 zoG(9x_pJ_0A)BrT#C)|w*=U}`%IMqhLG@yeJi2J-O|u-+5j z!1PbFYSlFig<9ko)J@qFYp#Ja36~Z1dn-=ed9Gr@UPYpzgvSYhvpmHJeeJxG3a{=^ zC_rz7GoOg1Y+q8`_I&NbXsvz0BxjU8Ux<*TW*@~uI#{w~CaEYEf#z=1eb9`{*|j)h zTH6=-|M3@YIsSgmRRzAYO>eJ_bP2{wn?#Gt{#%sh*7!-63)S@!T5wmmclD^yp&Z`qsT64J zJhQiRz7ZwbmkU}We-l~_1>xx>nWx2*Fgqpfvy>P_*KSL0fDCp%tx%f~mX!Gxdm;Es z!xUI1w`oXKa^D-v!*i15Lv+Im}^!dtL&zUlYUCeR)8u-rTaw-QjO;fG|Mrf5eGUI zxAzRo7cTh8#^3;&PTqB}!3*_V;xysKJ6cGw^tK;6t(4k2NBwRnp;Z5G0%i}ibEne< zY$Mpq17zgRb4Ojz*znF@WWK#nsaEb8@OzB2NwA%=7lh1E`zoOU-aUb|RIjuuL0S^~ zs3eVR&)SO|j!HzAxcw11v##5NwKqm?L1T}k#d({lv;Cg1EZBUlvSBaQfjnLgvRG*R zIqXTLdsm`_p8)oD_K+dVsL;v9QT-u;KK^OM z{kN7kUsLB-<_Zk;Y7kd$&GM17u%`)ChSaI9pN;v>0@D4|N#b2qL7eN`xP59fFTI1^ zH%0i9uz2$xG5>j@`LFv(O?F0>(Jyu^**2s4uR(OdbEJ2I;35F3R4Ey5DpfDG6KAM|U=Af)c2EgeY6uP3k_xY~UL~aW(+f zn2O|$E#m_!kH3&#C@UYa*6v**Wu*k{p&%TxT*DhInbaHG>yCgPv_JApluxhP+~lWQkypNPQ+} z1V9)PwVUU*MSroST70KXH*W@mlVxsG2Tq44Prx=7Xj81nbi}5DmU9S}HXd}@)-RTD zcLDvE8o0={hl`oSRnH&2{Gn)^M6SY|`uuTE65%r;|4%3#ak(}$$OpkUH~wMxb}Lv4 zcLuL2B*i(=<1q;cl%SCpRzA;JKXOL6UD`tksGu{1#U3flB74_+_Z3Sdd%TN*VCUD%k+n8w38U4M ziNP@!DuT{}FeeD{$^tqnUmlpqlHVOFpLSyfU85PHo39Tlv+b33MaN!s@ zpK83Sto%DTHA@#@j-}R1nk!4Ph{rdjucIjw(7L?cVAqCi5Yi$}O^hbFP6$R^a*N=otkqGl=={bLr zpOD6BKHzs%tgT(yBX`wIt@HG8qovJF>Y+S&P6@ZE32gwD`x973#AiPba6%+v<~_Um zKyV<|#cQjLFe*+)V(Gungdb~oyTG_IyKussks(rZTx8C&h3i$+g>!%-&9D9xVpVaj zJefOD+(bVy=ECk5N*FU;EE2Y_8bZMYk$W|xdzSuR@p7!^yhkYNBeTemnsf$e4t+A= zh2cL6ZK;3^_H}&=hXGhy{TlDu-jDyd>~M|tFRS1s396%-(E^}*9m@x@-pu!jtK^}+r<1b@qECJ zee+s~3J{??$@(N3hWVr9hvl;(5umcOPzKOr>+B!Rx4YV5il;oN(5eI?zqicLW!Cfp z$cL=P#)BUUM!CumfR;VUb44PVo!N3bkztNcwps$tYHfYJn1dQg=7dzbDuA!Lo&py6Rrxo*DWB>1WegZsIr%UEvFbt?ElF!b6EiGRtOl1$L zLT%n7$f~R56Vm+^tUg`Dil=Q>hNTXOPMv++9kVQbnRN+~_m`LvlcKi&^8RQ3`k*!c z9#6Z0R&vYxg9F1g7iyvsbcGsR73&xV995g%K;e&#hxv?~m)>iYrTx--mO2Ix|KQyr zx=~iuj`|N@V)$&izRt;d{M`pL8;_|gGctM8R}>SPi=7B$?3740I+TlkRyylv~2@fpRA z8SjpEZ%^?e8gB{RT){z%0-ixns#;3jyvN2=l57i+YOA zil8LL;rmAGe^%mRO`E(ttB}cyY&-*RrzA=JLhoAiP-+O>O{%`#Ydjz<4ieXCG!uOI zz+FK8X14%iHe0_is04iOQ%(Q@D89mH{ahg0V{r@NB4x&+Dm6EUSm~*eck)`-hLphW z=>aCZ5G$J2aAk6m{L38s!)gYqPWwf8v%8>;m;_RjzU{D0f%ByO3BPm)0Tlv$#i7Kw z2lQ?di86lw!o}bA-(+7dbzFjEUQl!|oe&TonykKHX4*p6>l_vzDHLEbFz(>nK=33= zH2~7iF^AXmB^{xmivDgu3j;@akjBVLWzm`mA+1wJ_Se3!E!J6wYpscY+XKmkW$&L- zHbJjOgs)yBj*rk+g^Bjdm4l@g8Rs~I@#%Jfn=LsFKc07&yy_0~$l!qq0mI?Kxsh_` zm6sp1-atR)l&)XuM51@Ik?zp(aqwvn&OFL=izv$RIosrNUOb0Bi(Tpv$c55)6ffv= zruiA0W`O})WA;QE=aqq zIOQ?rEyQVQBP&OqCKOJV#FQ^d>N8Cf70+Ka)@*AuxYLfOk*5_2`~jX?>w!r|xGtAJ zCu0U`5D%0wC=%+Eqis696Z4c8_5Oebfugmn`+@z|3FijisdKWS40e-{*?>UVWj-^< z=7fI(mdTrxn+I%KF*KHTeLGuWIZTT#T>7uIcAp)rb&@LZQhYx|y(!rhm8Aci0r_xF zfB}{8f&@+Ak@2_mh?#$E|eqQWo9LwJ#*w zGy_rKjL=%c*OB&A9V|7@RUV!Oqj2WVh&KmPCx zCQ3*`iLKV{MzhU0UW5wjC!WL3sgTZXP1~sxC!9lG^yhzIGYQ5`sX?L5h{ZtzQ5U8Ujpe>dgq9CAv`*3&-iXV+5c0r0$$=cJmq>KCnCB z(%`C#MzdrQ&(U7m5i1jV=FrEyxBgWO%047b^U(r zdDsRrx+X$(0cXfL7Zi2U(RK#UHQENTV)aeLZo&&;tX|!A-&J$_%a+=$?XvIbIzPsc z_-C8-=a^JInR7~_xlHb9?jcI!-T>ZtKB|qPW;b-M>Tzdk$SvspG|XmZt_Vwen~2QS zaNhtPF3NB3DnK7{`Q?%-y`&-2Uyaj5`VdPC_Y(T9KlGfsXw5D*Uy?HmR6gDi z*&E{bLOIujxcmHb9bEsp%ZTw}msXGk(7ecYB(>+vIoS=7p>Pw#Q&^I8b~jYANY;0a zl~C=!zntMUtb=^O5sL~0H(65_f~0tUG!J#SWVBle6&ab^BJo2fMU;eC6!tdSA64*~ zZ$4o)DlQxS|D?~?Xs$U_>Hp(|d&7$ldkoSC%pRm_vi%Xf9K2jfqFZMGfZKjXfE1y+ z=XlT1lR`o?K>6~(kGvX3X**j-$7~{`1EkS=2CFZf&o(K)%(7@YKC&Lg{jpUpLor}; zrs8zg`XLm??mDFh*Gd1wI7MaG+0MGXTOyZ(Zr~kgS-~1et>5coy2gvpPo3?z(9*!o zgRP)e%0ShUMvo0FHS{4Ep)DeT_oV%grPah#Uglkxn?7a98ox^I)DD^FoB>G@=8c5y z5P^RM8S4ZnT9yxXca9{&nzcNX-ms_W9Ve6Z=?Mvxg=)!uIRu`%K+o811D$i7JjW)c zCOa<%m<20Cwsl?E9E|UN2|LULSPN{wVhfN7`Sy%~q~8}_*sn8Edkh4}+h04NrH#P3 zhqRocK2C)zpv4X|zlo&sCqp}+Ggk7iuvN8GU)Jk$kZ_+sx)Q^cCi;EN@7j%UNZb>G z^*^knkX?luZ(}K5O!`obMMe@xGU4g@`LxV8E>DC_Sdr$mLJ|^L>XE@W@Bssi5z1`L z_+gLAhvx(%Q@ZghW6Qbu2#cn+2U55kvO9cwGhN|%%5FZ(!0fVb8-H@mGl;a|ug`=~ z(4+7@`d(pg`L=FZ&n;>U>IJ7w>T#uk^=WbJ0`9?XwU%S}S}zAA90RCXC|E!85s;x{ zMjGD3F0eM@D6`+YN+{Zu`bhJzbi7@=qg|g!`kE84dvgBF?pkjNg!^slE+-EObQ6V@ zSkMl@JizL&Mu71Ld9`AN+WV;E+Adj5%&z#HK3ia)TlW>*9c;6AffF_NF~DEPAL1;T z<7fbSWQ=}a_}J%0Mv&bo6GU^OOshN8$Np0{T=zzfn&%@JHk>!u?+BNjAVY9}6g?I+ z=i*UB4t~L&Dv4f4Ic$5x7?LL8!g#PV$m-^MphjwbV9VU59OwKh6@%xn^X=_3@>LBd z8K$s?m1mrKTx5;!dF3iZ_>M1FH%(VScxGBNQ5R+vt!@CpP9tRa(1 z97U((QZYQC;6L4Cx;5S+%v*B0)-*_m!*UfpP58?A9lbU5Q3~K}hgRfTm6}cY6HORg zhz1_VJAWpCt+wU8xCW0%z4MnWM?9wT*Wfo22Gmx{=ek77-O4zWe_W436KX_P0j`(M z+rMCVlD37AsO@MOvvC1YtqFW7$)eyDi}1(T^aaKHIMQl$67gr)bl!|B-m=*2tpTGB z{ouE)DjN=%Aj4JNocgQy&p=eOYRf!>@653KA;b%L8^eJR^QOS%d@_ugAB!Qi0&jLrAK4#?bn zt-`ex=P#64rI!AE%t5Y+DdVqNcavihwh?~!9<|BISqL{^hSZAfcA0J(rG(ERmT;gG zMPHE)8*bQ4IQnVk^>X zfH5pA`&_^^-aVu2>D~QOltSvB{q;Bf!z9cSEQGH%yAb`tjwvK&Xv8o@7dh*MnDW71 z3}stU+cK`TcdUK8Jt$Xbx|}QcC!7yGyYzPk!e5bE))o9Cp$FKrox_D3y zqbk){r7xQ(TkjZU0hK&bGMzI^w;@4IJjvIT_v{&%uC0g96Rp)$A5ftHlzKUN)1t_$ zh)m~{ydxkqu||pExUq&fg8laWa=^*sg%j|p$jgs`Y`cagR50#|$}@S<1Hi}@0dC1Z z>PY3Ie4;DuHkXp|S&<~Ul>C)GaE}H|*%jWnTgKqe*1P!R&ab!Tohih51#xl~fK5Bu!Hv#&~!|@lU-K)xW?A^!Hup-7R>>cR^$9aW@oC_?(p(ZO~zr}f^;AW9#=b5 z&RjA(3H27OLTPXLOhd}~N;-KligrxEOz_$%LQxL5c+=$}gozO-AA{)FuZ`kw@q+KY0GT46 zk5yV{&Hhb{4)E=!!Sf?d4K3BenCm>%8qSWi$UqYOL>i^B9xi^M8E`A{7wCbI*=?0P z7Dbb7?IH@0SwsLKJbHU6@CZ1s>IIGpxgFtQRf9aVh2rUNkEY&)#8TjwwZMU(v?E33 z_~dxM>FO0qLYYc3yV4p8Ji0zBbl{x%h_zC_O0h5<+E+k{piYS`37F7UchQ$y{Y181 zN2Yrw77@AQ(Me_jgDViJXkmCR49%TFjPS#-AbeRn4S%H~DlJrN_*iRO4ZR8wpdOF||T_{%zsBLFx_Yb7h;w^2WqHWObm2{i~^mt!pT+( zi{kY2o@|i{3Eo8#`LACU=7?DCzq*wf%Fvc$K)eN4k00w|D!41AxtJ=rcfeZLsE5HNYmoNwCf>4=h^#Gb| zewSd6zJVBbq$+}+q!Q2C#wddeE-fn+Y{N~yeSGzPAHgr$i7nLXeE{G{Azy+yu4k;p|Nj!-d%skt};z4GN`ktg3PkS zXWc)s^V%TSxqaDAPgv1bKcNwIntomn&X9R-Xl!B4pejh7s?U&4%c!*b_ zr&*N9C&pKEu!9dQuGqn)a2qg)ne_c4Zdb-|_3hk{iT~&-E_D@PA9Ft#!9xN7CCT$L z?U8Aqx`W*5t7|^pg%(me11_2=EOXL+?g%fu7d>yXq1Q-?a9$j22mkDHih9g6);Esw z_+6}Caxt~RA1CyM3v4mC5~CMEiLN1;KeiNT@)~V5kf@BsHtj;{g&P^gO~OSLzU26l-+1M{sfjjGOR@joDJ3|T;u z{@xs4QA&&2b6qlpWGJM=ND5VQEdCx~qoJefGHGEwvE1`cVaeC_U!tzCSvYXgoAHh( zzsypVn(Va2)ExY9H?DxL7Jg(P$eGpqAYRK$p>jsg|0sNEwW^z(a;O*4rpIdN!*wK1 zG{`;>a2!a>j1?JE=qwF1v+o*lLxX?wUFhY@?Wvh4H87W%5gd^leA*;2f;y~qma1Y? z_;C}q-Cz8@*SwuS2Ig4&EynN4qGX%LfAs~>RUiX=fHoX}&Q6p9K^tcMr2vb0y@L2S z1FfmpmidodUj$3jGd{u_7hn&ZmNWnW00V#)FMmb`C!yI>DoI2T&-mOc{pbtn-P%pX z85hr=lIIl?^-`1gh&{u8O33!UTizapz>QU4TGU4%000001lm76cAWaTUJ>yeHDmpDFp<@k3`qKX(qrY|%HRo#P^gRV}cj zxTeHIBKrdUM-i~hV2v+?f0Nh5AmlqDT7%tn<=&M{Hcvm|Rhb2eR2Nc^72+4;E=v9~ g +#include "max32657evkit_max32657_common.dtsi" + +/ { + chosen { + zephyr,sram = &secure_ram; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + secure_ram: partition@30000000 { + label = "secure-memory"; + reg = <0x30000000 DT_SIZE_K(256)>; + }; + }; +}; + +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + slot0_partition: partition@0 { + label = "image-0"; + reg = <0x0 DT_SIZE_K(960)>; + read-only; + }; + + storage_partition: partition@f0000 { + label = "storage"; + reg = <0xf0000 DT_SIZE_K(64)>; + }; + }; +}; diff --git a/boards/adi/max32657evkit/max32657evkit_max32657.yaml b/boards/adi/max32657evkit/max32657evkit_max32657.yaml new file mode 100644 index 00000000000..ab1e11c74f5 --- /dev/null +++ b/boards/adi/max32657evkit/max32657evkit_max32657.yaml @@ -0,0 +1,13 @@ +identifier: max32657evkit/max32657 +name: max32657evkit-max32657 +vendor: adi +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb +supported: + - serial + - gpio +ram: 256 +flash: 960 diff --git a/boards/adi/max32657evkit/max32657evkit_max32657_common.dtsi b/boards/adi/max32657evkit/max32657evkit_max32657_common.dtsi new file mode 100644 index 00000000000..5bc950bc167 --- /dev/null +++ b/boards/adi/max32657evkit/max32657evkit_max32657_common.dtsi @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2024-2025 Analog Devices, Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include + +/ { + model = "Analog Devices MAX32657EVKIT"; + compatible = "adi,max32657evkit"; + + chosen { + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + }; + + leds { + compatible = "gpio-leds"; + + led1: led_1 { + gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; + label = "Green LED"; + }; + }; + + buttons { + compatible = "gpio-keys"; + + pb1: pb1 { + gpios = <&gpio0 12 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "SW2"; + zephyr,code = ; + }; + }; + + /* These aliases are provided for compatibility with samples */ + aliases { + led0 = &led1; + sw0 = &pb1; + }; +}; + +&uart0 { + pinctrl-0 = <&uart0_tx_p0_9 &uart0_rx_p0_5>; + pinctrl-names = "default"; + current-speed = <115200>; + data-bits = <8>; + parity = "none"; + status = "okay"; +}; + +&clk_ipo { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; diff --git a/boards/adi/max32657evkit/max32657evkit_max32657_defconfig b/boards/adi/max32657evkit/max32657evkit_max32657_defconfig new file mode 100644 index 00000000000..25ef03ee513 --- /dev/null +++ b/boards/adi/max32657evkit/max32657evkit_max32657_defconfig @@ -0,0 +1,16 @@ +# Copyright (c) 2024-2025 Analog Devices, Inc. +# SPDX-License-Identifier: Apache-2.0 + +# Enable GPIO +CONFIG_GPIO=y + +# Console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# Enable UART +CONFIG_SERIAL=y +CONFIG_UART_INTERRUPT_DRIVEN=y + +# It is secure fw, enable flags +CONFIG_TRUSTED_EXECUTION_SECURE=y From 84ec336e078cba61f56f41a8c507c7fb781f777b Mon Sep 17 00:00:00 2001 From: Sadik Ozer Date: Mon, 13 Jan 2025 15:40:29 +0300 Subject: [PATCH 0095/2553] boards: adi: Enable jlink runner for MAX32657 Enable JLink runner for MAX32657 Signed-off-by: Sadik Ozer --- boards/adi/max32657evkit/board.cmake | 5 +++-- boards/common/openocd-adi-max32.boards.cmake | 4 +++- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/boards/adi/max32657evkit/board.cmake b/boards/adi/max32657evkit/board.cmake index 2c8ea68612c..09717336e5f 100644 --- a/boards/adi/max32657evkit/board.cmake +++ b/boards/adi/max32657evkit/board.cmake @@ -1,7 +1,8 @@ # Copyright (c) 2024-2025 Analog Devices, Inc. # SPDX-License-Identifier: Apache-2.0 -board_runner_args(openocd --cmd-pre-init "source [find interface/jlink.cfg]") -board_runner_args(openocd --cmd-pre-init "source [find target/max32657.cfg]") +board_runner_args(jlink "--device=MAX32657" "--reset-after-load") +include(${ZEPHYR_BASE}/boards/common/openocd-adi-max32.boards.cmake) include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/common/openocd-adi-max32.boards.cmake b/boards/common/openocd-adi-max32.boards.cmake index c231f5ad1cf..c815a0db64f 100644 --- a/boards/common/openocd-adi-max32.boards.cmake +++ b/boards/common/openocd-adi-max32.boards.cmake @@ -14,13 +14,15 @@ endif() # MAX32666 share the same target configuration file with MAX32665 if(CONFIG_SOC_MAX32666) set(MAX32_TARGET_CFG "max32665.cfg") +elseif(CONFIG_SOC_MAX32657) + set(MAX32_INTERFACE_CFG "jlink.cfg") endif() board_runner_args(openocd --cmd-pre-init "source [find interface/${MAX32_INTERFACE_CFG}]") board_runner_args(openocd --cmd-pre-init "source [find target/${MAX32_TARGET_CFG}]") board_runner_args(openocd "--target-handle=_CHIPNAME.cpu") -if(CONFIG_SOC_FAMILY_MAX32_M4) +if(CONFIG_SOC_FAMILY_MAX32_M4 OR CONFIG_SOC_FAMILY_MAX32_M33) board_runner_args(openocd --cmd-pre-init "allow_low_pwr_dbg") board_runner_args(openocd "--cmd-erase=max32xxx mass_erase 0") endif() From cb93c201d5e43e06782392d7dbf39cd22b143626 Mon Sep 17 00:00:00 2001 From: Sadik Ozer Date: Thu, 8 Aug 2024 15:53:25 +0300 Subject: [PATCH 0096/2553] dts: arm: adi: Enable TRNG Add MAX32657 TRNG device node Add TRNG in MAX32657 board file Signed-off-by: Sadik Ozer --- boards/adi/max32657evkit/max32657evkit_max32657.dts | 4 ++++ boards/adi/max32657evkit/max32657evkit_max32657.yaml | 1 + dts/arm/adi/max32/max32657_common.dtsi | 8 ++++++++ 3 files changed, 13 insertions(+) diff --git a/boards/adi/max32657evkit/max32657evkit_max32657.dts b/boards/adi/max32657evkit/max32657evkit_max32657.dts index 692952fcb64..7cee4e11277 100644 --- a/boards/adi/max32657evkit/max32657evkit_max32657.dts +++ b/boards/adi/max32657evkit/max32657evkit_max32657.dts @@ -46,3 +46,7 @@ }; }; }; + +&trng { + status = "okay"; +}; diff --git a/boards/adi/max32657evkit/max32657evkit_max32657.yaml b/boards/adi/max32657evkit/max32657evkit_max32657.yaml index ab1e11c74f5..8290aa1fdd5 100644 --- a/boards/adi/max32657evkit/max32657evkit_max32657.yaml +++ b/boards/adi/max32657evkit/max32657evkit_max32657.yaml @@ -9,5 +9,6 @@ toolchain: supported: - serial - gpio + - trng ram: 256 flash: 960 diff --git a/dts/arm/adi/max32/max32657_common.dtsi b/dts/arm/adi/max32/max32657_common.dtsi index a9d69b0ea0b..e419155bf23 100644 --- a/dts/arm/adi/max32/max32657_common.dtsi +++ b/dts/arm/adi/max32/max32657_common.dtsi @@ -10,6 +10,7 @@ / { chosen { + zephyr,entropy = &trng; zephyr,flash-controller = &flc0; }; @@ -136,6 +137,13 @@ interrupts = <11 0>; status = "disabled"; }; + + trng: trng@4d000 { + compatible = "adi,max32-trng"; + reg = <0x4d000 0x1000>; + clocks = <&gcr ADI_MAX32_CLOCK_BUS1 2>; + status = "disabled"; + }; }; &nvic { From d557fc51bbea2c04f49bb950dffb980bf9e09096 Mon Sep 17 00:00:00 2001 From: Mert Ekren Date: Thu, 27 Jun 2024 18:45:47 +0300 Subject: [PATCH 0097/2553] tests: drivers: gpio: Add MAX32657 boards overlay files Add MAX32657 boards overlay files to gpio test be supported. Signed-off-by: Mert Ekren --- .../boards/max32657evkit_max32657.overlay | 13 +++++++++++++ .../boards/max32657evkit_max32657_ns.overlay | 13 +++++++++++++ 2 files changed, 26 insertions(+) create mode 100644 tests/drivers/gpio/gpio_basic_api/boards/max32657evkit_max32657.overlay create mode 100644 tests/drivers/gpio/gpio_basic_api/boards/max32657evkit_max32657_ns.overlay diff --git a/tests/drivers/gpio/gpio_basic_api/boards/max32657evkit_max32657.overlay b/tests/drivers/gpio/gpio_basic_api/boards/max32657evkit_max32657.overlay new file mode 100644 index 00000000000..12c94d3a494 --- /dev/null +++ b/tests/drivers/gpio/gpio_basic_api/boards/max32657evkit_max32657.overlay @@ -0,0 +1,13 @@ +/* + * Copyright (c) 2024 Analog Devices, Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + resources { + compatible = "test-gpio-basic-api"; + out-gpios = <&gpio0 3 0>; + in-gpios = <&gpio0 12 0>; + }; +}; diff --git a/tests/drivers/gpio/gpio_basic_api/boards/max32657evkit_max32657_ns.overlay b/tests/drivers/gpio/gpio_basic_api/boards/max32657evkit_max32657_ns.overlay new file mode 100644 index 00000000000..12c94d3a494 --- /dev/null +++ b/tests/drivers/gpio/gpio_basic_api/boards/max32657evkit_max32657_ns.overlay @@ -0,0 +1,13 @@ +/* + * Copyright (c) 2024 Analog Devices, Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + resources { + compatible = "test-gpio-basic-api"; + out-gpios = <&gpio0 3 0>; + in-gpios = <&gpio0 12 0>; + }; +}; From a831122029ac469825077b151642526ebcaa0d75 Mon Sep 17 00:00:00 2001 From: Sylvio Alves Date: Thu, 24 Apr 2025 09:36:09 -0300 Subject: [PATCH 0098/2553] drivers: uart/dma: esp32: revert to PRE_KERNEL_1 printf is failing in hello_world sample due to current uart driver init level. This reverts back to PRE_KERNEL_1. As uart depends on GDMA, set it also to same level. Signed-off-by: Sylvio Alves --- drivers/dma/dma_esp32_gdma.c | 2 +- drivers/serial/uart_esp32.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/dma/dma_esp32_gdma.c b/drivers/dma/dma_esp32_gdma.c index da7905fa574..cbdc66befe4 100644 --- a/drivers/dma/dma_esp32_gdma.c +++ b/drivers/dma/dma_esp32_gdma.c @@ -703,6 +703,6 @@ static void *irq_handlers[] = { }; \ \ DEVICE_DT_INST_DEFINE(idx, &dma_esp32_init, NULL, &dma_data_##idx, &dma_config_##idx, \ - PRE_KERNEL_2, CONFIG_DMA_INIT_PRIORITY, &dma_esp32_api); + PRE_KERNEL_1, CONFIG_DMA_INIT_PRIORITY, &dma_esp32_api); DT_INST_FOREACH_STATUS_OKAY(DMA_ESP32_INIT) diff --git a/drivers/serial/uart_esp32.c b/drivers/serial/uart_esp32.c index 2638b258767..14c9fed23a0 100644 --- a/drivers/serial/uart_esp32.c +++ b/drivers/serial/uart_esp32.c @@ -1057,7 +1057,7 @@ static DEVICE_API(uart, uart_esp32_api) = { ESP_UART_UHCI_INIT(idx)}; \ \ DEVICE_DT_INST_DEFINE(idx, uart_esp32_init, NULL, &uart_esp32_data_##idx, \ - &uart_esp32_cfg_port_##idx, PRE_KERNEL_2, \ + &uart_esp32_cfg_port_##idx, PRE_KERNEL_1, \ CONFIG_SERIAL_INIT_PRIORITY, &uart_esp32_api); DT_INST_FOREACH_STATUS_OKAY(ESP32_UART_INIT); From 6a672bc5ba415e4e903855b6e5b3a9921928264e Mon Sep 17 00:00:00 2001 From: Robert Lubos Date: Thu, 24 Apr 2025 14:46:16 +0200 Subject: [PATCH 0099/2553] samples: net: mqtt_publisher: Enable MQTT 5.0 support Enable MQTT 5.0 support in the mqtt_publisher sample and make use of the topic aliasing feature. Signed-off-by: Robert Lubos --- samples/net/mqtt_publisher/README.rst | 29 ++++++++++-- .../net/mqtt_publisher/overlay-mqtt-5.conf | 1 + samples/net/mqtt_publisher/src/main.c | 47 +++++++++++++++++-- 3 files changed, 68 insertions(+), 9 deletions(-) create mode 100644 samples/net/mqtt_publisher/overlay-mqtt-5.conf diff --git a/samples/net/mqtt_publisher/README.rst b/samples/net/mqtt_publisher/README.rst index d94bb9708fb..4f5f90bb821 100644 --- a/samples/net/mqtt_publisher/README.rst +++ b/samples/net/mqtt_publisher/README.rst @@ -11,11 +11,15 @@ Overview publish/subscribe messaging protocol optimized for small sensors and mobile devices. -The Zephyr MQTT Publisher sample application is a MQTT v3.1.1 -client that sends MQTT PUBLISH messages to a MQTT broker. -See the `MQTT V3.1.1 spec`_ for more information. +The Zephyr MQTT Publisher sample application is a MQTT client that sends +MQTT PUBLISH messages to a MQTT broker. The sample supports MQTT client in +version v3.1.1 (default) and v5.0. -.. _MQTT V3.1.1 spec: http://docs.oasis-open.org/mqtt/mqtt/v3.1.1/mqtt-v3.1.1.html +See the `MQTT v3.1.1 spec`_ and `MQTT v5.0 spec`_ for more information about +MQTT v3.1.1 and v5.0, respectively. + +.. _MQTT v3.1.1 spec: https://docs.oasis-open.org/mqtt/mqtt/v3.1.1/mqtt-v3.1.1.html +.. _MQTT v5.0 spec: https://docs.oasis-open.org/mqtt/mqtt/v5.0/mqtt-v5.0.html The source code of this sample application can be found at: :zephyr_file:`samples/net/mqtt_publisher`. @@ -136,6 +140,23 @@ Open another terminal window and type: $ mosquitto_sub -t sensors +MQTT v5.0 support +================= + +The sample can be configured to use MQTT v5.0 instead of MQTT v3.1.1. To enable +MQTT v5.0 in the sample, build it with ``-DEXTRA_CONF_FILE=overlay-mqtt-5.conf`` +parameter. The sample should work with any broker supporting MQTT v5.0, however +it was specifically tested with mosquitto version 2.0.21. Server side +configuration in this particular case is the same as for MQTT v3.1.1. + +When the sample is configured in the MQTT v5.0 mode, it makes use of the topic +aliasing feature. i.e. if the broker reports it supports topic aliases, the +client will register a topic alias for the default ``sensors`` topic, and use it +for consecutive MQTT Publish messages. It can be observed (for example using +Wireshark) how the actual topic is only present in the first Publish message, and +all subsequent Publish messages are smaller, as they include topic alias +property only. + Connecting securely using TLS ============================= diff --git a/samples/net/mqtt_publisher/overlay-mqtt-5.conf b/samples/net/mqtt_publisher/overlay-mqtt-5.conf new file mode 100644 index 00000000000..c6f851780d6 --- /dev/null +++ b/samples/net/mqtt_publisher/overlay-mqtt-5.conf @@ -0,0 +1 @@ +CONFIG_MQTT_VERSION_5_0=y diff --git a/samples/net/mqtt_publisher/src/main.c b/samples/net/mqtt_publisher/src/main.c index 7ae967058e3..2cf61ff6ead 100644 --- a/samples/net/mqtt_publisher/src/main.c +++ b/samples/net/mqtt_publisher/src/main.c @@ -53,9 +53,14 @@ static APP_BMEM struct sockaddr socks5_proxy; static APP_BMEM struct pollfd fds[1]; static APP_BMEM int nfds; - static APP_BMEM bool connected; +/* Whether to include full topic in the publish message, or alias only (MQTT 5). */ +static APP_BMEM bool include_topic; +static APP_BMEM bool aliases_enabled; + +#define APP_TOPIC_ALIAS 1 + #if defined(CONFIG_MQTT_LIB_TLS) #include "test_certs.h" @@ -155,6 +160,18 @@ void mqtt_evt_handler(struct mqtt_client *const client, connected = true; LOG_INF("MQTT client connected!"); +#if defined(CONFIG_MQTT_VERSION_5_0) + if (evt->param.connack.prop.rx.has_topic_alias_maximum && + evt->param.connack.prop.topic_alias_maximum > 0) { + LOG_INF("Topic aliases allowed by the broker, max %u.", + evt->param.connack.prop.topic_alias_maximum); + + aliases_enabled = true; + } else { + LOG_INF("Topic aliases disallowed by the broker."); + } +#endif + break; case MQTT_EVT_DISCONNECT: @@ -242,12 +259,18 @@ static char *get_mqtt_topic(void) static int publish(struct mqtt_client *client, enum mqtt_qos qos) { - struct mqtt_publish_param param; + struct mqtt_publish_param param = { 0 }; + + /* Always true for MQTT 3.1.1. + * True only on first publish message for MQTT 5.0 if broker allows aliases. + */ + if (include_topic) { + param.message.topic.topic.utf8 = (uint8_t *)get_mqtt_topic(); + param.message.topic.topic.size = + strlen(param.message.topic.topic.utf8); + } param.message.topic.qos = qos; - param.message.topic.topic.utf8 = (uint8_t *)get_mqtt_topic(); - param.message.topic.topic.size = - strlen(param.message.topic.topic.utf8); param.message.payload.data = get_mqtt_payload(qos); param.message.payload.len = strlen(param.message.payload.data); @@ -255,6 +278,13 @@ static int publish(struct mqtt_client *client, enum mqtt_qos qos) param.dup_flag = 0U; param.retain_flag = 0U; +#if defined(CONFIG_MQTT_VERSION_5_0) + if (aliases_enabled) { + param.prop.topic_alias = APP_TOPIC_ALIAS; + include_topic = false; + } +#endif + return mqtt_publish(client, ¶m); } @@ -308,7 +338,11 @@ static void client_init(struct mqtt_client *client) client->client_id.size = strlen(MQTT_CLIENTID); client->password = NULL; client->user_name = NULL; +#if defined(CONFIG_MQTT_VERSION_5_0) + client->protocol_version = MQTT_VERSION_5_0; +#else client->protocol_version = MQTT_VERSION_3_1_1; +#endif /* MQTT buffers configuration */ client->rx_buf = rx_buffer; @@ -435,6 +469,9 @@ static int publisher(void) { int i, rc, r = 0; + include_topic = true; + aliases_enabled = false; + LOG_INF("attempting to connect: "); rc = try_to_connect(&client_ctx); PRINT_RESULT("try_to_connect", rc); From 216476caaadb6865ae515bb072b091baf844cc7f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Krzysztof=20Chru=C5=9Bci=C5=84ski?= Date: Thu, 24 Apr 2025 15:11:18 +0200 Subject: [PATCH 0100/2553] pm: Fix case when forced state is not set MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit pm_suspend is returning early if there are no states available (due to locking or latency policy). However, if state is forced it should not return but rather enter forced power state. Signed-off-by: Krzysztof Chruściński --- subsys/pm/pm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/subsys/pm/pm.c b/subsys/pm/pm.c index b4f7c2d765f..947fbbdc7f2 100644 --- a/subsys/pm/pm.c +++ b/subsys/pm/pm.c @@ -147,7 +147,7 @@ bool pm_system_suspend(int32_t kernel_ticks) SYS_PORT_TRACING_FUNC_ENTER(pm, system_suspend, kernel_ticks); - if (!pm_policy_state_any_active()) { + if (!pm_policy_state_any_active() && (z_cpus_pm_forced_state[id] == NULL)) { /* Return early if all states are unavailable. */ return false; } From ca1d457e6fac6b7c7a54efa4d3ec92b70c561203 Mon Sep 17 00:00:00 2001 From: Titouan Christophe Date: Fri, 25 Apr 2025 14:05:28 +0200 Subject: [PATCH 0101/2553] boards: st: stm32h7s78_dk: include correct SoC pinctrl dtsi The STM32H7S78-DK board is equipped with an STM32H7S7L8H6H. According to the datasheet DS14359 (*), section 8, the trailing `H` in this SoC model name indicates that it supports hexadeca SPI, in addition to quad and octa modes that are supported on all variants in this family. This fixes the issue where some pinctrl nodes are missing, when enabling support for memories using 16 bit wide SPI transfer interfaces, like the PSRAM chip on this board. (*) https://www.st.com/resource/en/datasheet/stm32h7s7l8.pdf Signed-off-by: Titouan Christophe --- boards/st/stm32h7s78_dk/stm32h7s78_dk.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/boards/st/stm32h7s78_dk/stm32h7s78_dk.dts b/boards/st/stm32h7s78_dk/stm32h7s78_dk.dts index 5cfbbb449b8..792b48ccd8b 100644 --- a/boards/st/stm32h7s78_dk/stm32h7s78_dk.dts +++ b/boards/st/stm32h7s78_dk/stm32h7s78_dk.dts @@ -6,7 +6,7 @@ /dts-v1/; #include -#include +#include #include "arduino_r3_connector.dtsi" #include From 68652a6682601d2e21bab80917c20e902a69bab6 Mon Sep 17 00:00:00 2001 From: Emil Gydesen Date: Thu, 24 Apr 2025 14:56:15 +0200 Subject: [PATCH 0102/2553] Bluetooth: CAP: Broadcast: Add check for memory allocation for create When creating a broadcast source with bt_cap_initiator_broadcast_audio_create there was no check if all broadcast sources were already allocated, which could cause a NULL pointer dereference. Add a check, a test and documentation about possibly error codes of the function. Signed-off-by: Emil Gydesen --- include/zephyr/bluetooth/audio/cap.h | 7 +++- subsys/bluetooth/audio/cap_initiator.c | 23 ++++++++++-- .../audio/src/cap_initiator_broadcast_test.c | 36 +++++++++++++++++-- 3 files changed, 61 insertions(+), 5 deletions(-) diff --git a/include/zephyr/bluetooth/audio/cap.h b/include/zephyr/bluetooth/audio/cap.h index cfa841afb85..046002318db 100644 --- a/include/zephyr/bluetooth/audio/cap.h +++ b/include/zephyr/bluetooth/audio/cap.h @@ -542,7 +542,12 @@ struct bt_cap_initiator_broadcast_create_param { * @param[in] param Parameters to start the audio streams. * @param[out] broadcast_source Pointer to the broadcast source created. * - * @return 0 on success or negative error value on failure. + * @retval 0 Success + * @retval -EINVAL @p param is invalid or @p broadcast_source is NULL + * @retval -ENOMEM Could not allocate more broadcast sources, subgroups or ISO streams, or the + * provided codec configuration data is too large when merging the BIS and subgroup + * configuration data. + * @retval -ENOEXEC The broadcast source failed to be created for other reasons */ int bt_cap_initiator_broadcast_audio_create( const struct bt_cap_initiator_broadcast_create_param *param, diff --git a/subsys/bluetooth/audio/cap_initiator.c b/subsys/bluetooth/audio/cap_initiator.c index 92716c84c24..849cc99ed14 100644 --- a/subsys/bluetooth/audio/cap_initiator.c +++ b/subsys/bluetooth/audio/cap_initiator.c @@ -228,6 +228,7 @@ int bt_cap_initiator_broadcast_audio_create( struct bt_bap_broadcast_source_stream_param bap_stream_params[CONFIG_BT_BAP_BROADCAST_SRC_STREAM_COUNT]; struct bt_bap_broadcast_source_param bap_create_param = {0}; + int err; CHECKIF(param == NULL) { LOG_DBG("param is NULL"); @@ -243,6 +244,7 @@ int bt_cap_initiator_broadcast_audio_create( return -EINVAL; } + *broadcast_source = NULL; for (size_t i = 0; i < ARRAY_SIZE(broadcast_sources); i++) { if (broadcast_sources[i].bap_broadcast == NULL) { *broadcast_source = &broadcast_sources[i]; @@ -250,11 +252,28 @@ int bt_cap_initiator_broadcast_audio_create( } } + if (*broadcast_source == NULL) { + LOG_DBG("Failed to allocate a new broadcast source"); + return -ENOMEM; + } + cap_initiator_broadcast_to_bap_broadcast_param(param, &bap_create_param, bap_subgroup_params, bap_stream_params); - return bt_bap_broadcast_source_create(&bap_create_param, - &(*broadcast_source)->bap_broadcast); + err = bt_bap_broadcast_source_create(&bap_create_param, + &(*broadcast_source)->bap_broadcast); + if (err != 0) { + /* Return known errors */ + if (err == -EINVAL || err == -ENOMEM) { + return err; + } + + LOG_DBG("Unexpected error from bt_bap_broadcast_source_create: %d", err); + + return -ENOEXEC; + } + + return 0; } static struct bt_cap_broadcast_source *get_cap_broadcast_source_by_bap_broadcast_source( diff --git a/tests/bsim/bluetooth/audio/src/cap_initiator_broadcast_test.c b/tests/bsim/bluetooth/audio/src/cap_initiator_broadcast_test.c index c84fc83742f..369a9544f54 100644 --- a/tests/bsim/bluetooth/audio/src/cap_initiator_broadcast_test.c +++ b/tests/bsim/bluetooth/audio/src/cap_initiator_broadcast_test.c @@ -299,7 +299,7 @@ static void test_broadcast_audio_create_inval(void) stream_params[ARRAY_SIZE(broadcast_source_streams)]; struct bt_cap_initiator_broadcast_subgroup_param subgroup_param; struct bt_cap_initiator_broadcast_create_param create_param; - struct bt_cap_broadcast_source *broadcast_source; + struct bt_cap_broadcast_source *broadcast_sources[CONFIG_BT_BAP_BROADCAST_SRC_COUNT + 1]; struct bt_audio_codec_cfg invalid_codec = BT_AUDIO_CODEC_LC3_CONFIG( BT_AUDIO_CODEC_CFG_FREQ_16KHZ, BT_AUDIO_CODEC_CFG_DURATION_10, BT_AUDIO_LOCATION_FRONT_LEFT, 40U, 1, BT_AUDIO_CONTEXT_TYPE_MEDIA); @@ -323,7 +323,7 @@ static void test_broadcast_audio_create_inval(void) create_param.encryption = false; /* Test NULL parameters */ - err = bt_cap_initiator_broadcast_audio_create(NULL, &broadcast_source); + err = bt_cap_initiator_broadcast_audio_create(NULL, &broadcast_sources[0]); if (err == 0) { FAIL("bt_cap_initiator_broadcast_audio_create with NULL param did not fail\n"); return; @@ -345,6 +345,38 @@ static void test_broadcast_audio_create_inval(void) "fail\n"); return; } + subgroup_param.codec_cfg = &broadcast_preset_16_2_1.codec_cfg; + + /* Test allocating too many sources */ + ARRAY_FOR_EACH(broadcast_sources, i) { + err = bt_cap_initiator_broadcast_audio_create(&create_param, &broadcast_sources[i]); + if (i < CONFIG_BT_BAP_BROADCAST_SRC_COUNT) { + if (err != 0) { + FAIL("[%zu]: bt_cap_initiator_broadcast_audio_create failed: %d\n", + i, err); + return; + } + } else { + if (err != -ENOMEM) { + FAIL("bt_cap_initiator_broadcast_audio_create did not fail with " + "-ENOMEM when allocating too many sources: %d\n", + err); + return; + } + } + } + + /* Cleanup the created broadcast sources */ + ARRAY_FOR_EACH(broadcast_sources, i) { + if (i < CONFIG_BT_BAP_BROADCAST_SRC_COUNT) { + err = bt_cap_initiator_broadcast_audio_delete(broadcast_sources[i]); + if (err != 0) { + FAIL("[%zu]: bt_cap_initiator_broadcast_audio_delete failed: %d\n", + i, err); + return; + } + } + } /* Since we are just casting the CAP parameters to BAP parameters, * we can rely on the BAP tests to verify the values From 1e64c29ac3a1a8d4105c9a001814be03f11a7ce4 Mon Sep 17 00:00:00 2001 From: Damian Krolik Date: Thu, 24 Apr 2025 16:02:52 +0200 Subject: [PATCH 0103/2553] drivers: ieee802154: nrf5: support reading EUI64 from UICR on nRF54L Extend the existing code for reading EUI64 from UICR to support nRF54L SoC series as well. Signed-off-by: Damian Krolik --- drivers/ieee802154/Kconfig.nrf5 | 3 ++- drivers/ieee802154/ieee802154_nrf5.c | 4 ++-- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/ieee802154/Kconfig.nrf5 b/drivers/ieee802154/Kconfig.nrf5 index 90f1d512d5b..0a9401aa63a 100644 --- a/drivers/ieee802154/Kconfig.nrf5 +++ b/drivers/ieee802154/Kconfig.nrf5 @@ -41,7 +41,7 @@ config IEEE802154_NRF5_EXT_IRQ_MGMT config IEEE802154_NRF5_UICR_EUI64_ENABLE bool "Support usage of EUI64 value stored in UICR registers" depends on !IEEE802154_VENDOR_OUI_ENABLE - depends on SOC_SERIES_NRF52X || SOC_SERIES_NRF53X + depends on SOC_SERIES_NRF52X || SOC_SERIES_NRF53X || SOC_SERIES_NRF54LX help This option enables setting custom vendor EUI64 value stored in User information configuration registers (UICR). @@ -55,6 +55,7 @@ config IEEE802154_NRF5_UICR_EUI64_REG int "UICR base register for the EUI64 value" range 0 30 if SOC_SERIES_NRF52X range 0 190 if SOC_SERIES_NRF53X + range 0 318 if SOC_SERIES_NRF54LX default 0 help Base of the two consecutive registers from the UICR customer diff --git a/drivers/ieee802154/ieee802154_nrf5.c b/drivers/ieee802154/ieee802154_nrf5.c index ef6208ecc27..25ec35961c7 100644 --- a/drivers/ieee802154/ieee802154_nrf5.c +++ b/drivers/ieee802154/ieee802154_nrf5.c @@ -72,7 +72,7 @@ static const struct device *nrf5_dev; #define NSEC_PER_TEN_SYMBOLS (10 * IEEE802154_PHY_OQPSK_780_TO_2450MHZ_SYMBOL_PERIOD_NS) #if defined(CONFIG_IEEE802154_NRF5_UICR_EUI64_ENABLE) -#if defined(CONFIG_SOC_NRF5340_CPUAPP) +#if defined(CONFIG_SOC_NRF5340_CPUAPP) || defined(CONFIG_SOC_SERIES_NRF54LX) #if defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) #error "NRF_UICR->OTP is not supported to read from non-secure" #else @@ -80,7 +80,7 @@ static const struct device *nrf5_dev; #endif /* CONFIG_TRUSTED_EXECUTION_NONSECURE */ #else #define EUI64_ADDR (NRF_UICR->CUSTOMER) -#endif /* CONFIG_SOC_NRF5340_CPUAPP */ +#endif /* CONFIG_SOC_NRF5340_CPUAPP || CONFIG_SOC_SERIES_NRF54LX*/ #endif /* CONFIG_IEEE802154_NRF5_UICR_EUI64_ENABLE */ #if defined(CONFIG_IEEE802154_NRF5_UICR_EUI64_ENABLE) From b6e2486ac3dde58a30e0d4aa49cce41991d23f2d Mon Sep 17 00:00:00 2001 From: Luis Ubieda Date: Thu, 24 Apr 2025 07:40:52 -0400 Subject: [PATCH 0104/2553] bluetooth: userchan: Guard reads from beyond frame size Even though through code-inspection there isn't a clear path where the guard wouldn't act upon the length reaching the limit, this check is moved up to unconditially validate it on every read. Fixes #84731. Signed-off-by: Luis Ubieda --- drivers/bluetooth/hci/userchan.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/bluetooth/hci/userchan.c b/drivers/bluetooth/hci/userchan.c index c46647fabd0..7e4c75af1bc 100644 --- a/drivers/bluetooth/hci/userchan.c +++ b/drivers/bluetooth/hci/userchan.c @@ -189,6 +189,12 @@ static void rx_thread(void *p1, void *p2, void *p3) continue; } + if (frame_size >= sizeof(frame)) { + LOG_ERR("HCI Packet is too big for frame (%d " + "bytes). Dropping data", sizeof(frame)); + frame_size = 0; /* Drop buffer */ + } + LOG_DBG("calling read()"); len = nsi_host_read(uc->fd, frame + frame_size, sizeof(frame) - frame_size); @@ -218,14 +224,7 @@ static void rx_thread(void *p1, void *p2, void *p3) } if (decoded_len == 0) { - if (frame_size == sizeof(frame)) { - LOG_ERR("HCI Packet (%d bytes) is too big for frame (%d " - "bytes)", - decoded_len, sizeof(frame)); - frame_size = 0; /* Drop buffer */ - break; - } - if (frame_start != frame) { + if ((frame_start != frame) && (frame_size < sizeof(frame))) { memmove(frame, frame_start, frame_size); } /* Read more */ From abc8cb3bd9587de03137824ddc961e5588ec4935 Mon Sep 17 00:00:00 2001 From: Mathieu Choplain Date: Thu, 24 Apr 2025 11:25:17 +0200 Subject: [PATCH 0105/2553] llext: warn when devices aren't exported and extension tries to use them Kconfig option LLEXT_EXPORT_DEVICES can be enabled to make all device objects of an image available to LLEXTs, but it is disabled by default. If an extension tries to import devices when the base image was not built with this option, the dynamic linking equivalent of the much beloved error "Undefined symbol __device_dts_ord_XXX" is logged, but this can be quite cryptic to understand since user may be unaware of LLEXT_EXPORT_DEVICES. Detect such invalid imports and print a special message that directs users towards the appropriate Kconfig option, which should reduce the confusion. Signed-off-by: Mathieu Choplain --- subsys/llext/llext_link.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/subsys/llext/llext_link.c b/subsys/llext/llext_link.c index 5d37172c08e..fa35a485808 100644 --- a/subsys/llext/llext_link.c +++ b/subsys/llext/llext_link.c @@ -192,6 +192,24 @@ int llext_lookup_symbol(struct llext_loader *ldr, struct llext *ext, uintptr_t * LOG_ERR("Undefined symbol with no entry in " "symbol table %s, offset %zd, link section %d", name, (size_t)rel->r_offset, shdr->sh_link); + + if (!IS_ENABLED(CONFIG_LLEXT_EXPORT_DEVICES)) { + /** + * Attempting to import device objects from LLEXT but forgetting to + * enable the corresponding Kconfig option will result in cryptic + * dynamic linking errors. Try to detect this situation by checking + * if the symbol's name starts with the prefix used to name device + * objects, and print a special warning directing users towards the + * missing Kconfig option in such circumstances. + */ + const char *const dev_prefix = STRINGIFY(DEVICE_NAME_GET(EMPTY)); + const int prefix_len = strlen(dev_prefix); + + if (strncmp(name, dev_prefix, prefix_len) == 0) { + LOG_WRN("(Device objects are not available for import " + "because CONFIG_LLEXT_EXPORT_DEVICES is not enabled)"); + } + } return -ENODATA; } From c5ef6b1936f519b430b7614caac3b334a7bc7ced Mon Sep 17 00:00:00 2001 From: Fabrice DJIATSA Date: Fri, 18 Apr 2025 09:23:43 +0200 Subject: [PATCH 0106/2553] west.yml: update cube package to the latest version Update hal_stm32 to latest version Signed-off-by: Fabrice DJIATSA --- west.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/west.yml b/west.yml index 8b4a658a6d9..e77255cebac 100644 --- a/west.yml +++ b/west.yml @@ -243,7 +243,7 @@ manifest: groups: - hal - name: hal_stm32 - revision: c17bcab857dbf2ec3100b2d0c3123957fcd42e78 + revision: 237391328ba97f70240cd30b24cffeca6152f86f path: modules/hal/stm32 groups: - hal From 591bb7ec10eb61b73facc1e85c06c5221bfa36fb Mon Sep 17 00:00:00 2001 From: Marek Matej Date: Wed, 23 Apr 2025 21:12:12 +0200 Subject: [PATCH 0107/2553] manifest: hal_espressif Pull latest HAL version with: * Fix baseband adapters by using equal interrupt levels * Fix Wi-Fi adapter routines * Add TWAI support * Add PCNT support Signed-off-by: Marek Matej --- west.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/west.yml b/west.yml index e77255cebac..92a4dbc5e24 100644 --- a/west.yml +++ b/west.yml @@ -167,7 +167,7 @@ manifest: groups: - hal - name: hal_espressif - revision: c811e7e58ecb2574a4ae6a1c777015185cdaf199 + revision: e794f935ff732f4e03f2e007d1e342f881ef0d4a path: modules/hal/espressif west-commands: west/west-commands.yml groups: From c1bce30fe591b5488679cf525ce7ad8f55e9f391 Mon Sep 17 00:00:00 2001 From: Alexandre Bailon Date: Tue, 8 Apr 2025 10:56:03 +0200 Subject: [PATCH 0108/2553] drivers: ieee802154: cc13xx/26xx: Add support of 802.15.4 ED Scan This adds support of ED scanning to cc13xx/cc26xx. This could be required to select the least busy channel or to found neighboring networks. Note: Although the scanning is working, OpenThread still fails to discover OpenThread networks. Signed-off-by: Alexandre Bailon --- drivers/ieee802154/ieee802154_cc13xx_cc26xx.c | 92 ++++++++++++++++++- drivers/ieee802154/ieee802154_cc13xx_cc26xx.h | 2 + 2 files changed, 93 insertions(+), 1 deletion(-) diff --git a/drivers/ieee802154/ieee802154_cc13xx_cc26xx.c b/drivers/ieee802154/ieee802154_cc13xx_cc26xx.c index 519ea9aa9d6..a355bb97878 100644 --- a/drivers/ieee802154/ieee802154_cc13xx_cc26xx.c +++ b/drivers/ieee802154/ieee802154_cc13xx_cc26xx.c @@ -128,7 +128,7 @@ ieee802154_cc13xx_cc26xx_get_capabilities(const struct device *dev) { return IEEE802154_HW_FCS | IEEE802154_HW_FILTER | IEEE802154_HW_RX_TX_ACK | IEEE802154_HW_TX_RX_ACK | IEEE802154_HW_CSMA | - IEEE802154_HW_RETRANSMISSION; + IEEE802154_HW_RETRANSMISSION | IEEE802154_HW_ENERGY_SCAN; } static int ieee802154_cc13xx_cc26xx_cca(const struct device *dev) @@ -522,6 +522,64 @@ static int ieee802154_cc13xx_cc26xx_attr_get(const struct device *dev, enum ieee &drv_attr.phy_supported_channels, value); } +static void cmd_ieee_ed_scan_callback(RF_Handle aRfHandle, + RF_CmdHandle aRfCmdHandle, + RF_EventMask aRfEventMask) +{ + const struct device *const dev = DEVICE_DT_INST_GET(0); + struct ieee802154_cc13xx_cc26xx_data *drv_data = dev->data; + int maxRssi = IEEE802154_MAC_RSSI_DBM_UNDEFINED; + + if (drv_data->cmd_ieee_ed_scan.status != IEEE_DONE_OK) { + LOG_DBG("ED Scan failed (%x)", drv_data->cmd_ieee_ed_scan.status); + } else { + maxRssi = drv_data->cmd_ieee_ed_scan.maxRssi; + } + + drv_data->ed_scan_done_cb(dev, maxRssi); +} + +int ieee802154_cc13xx_cc26xx_ed_scan(const struct device *dev, + uint16_t duration, + energy_scan_done_cb_t done_cb) +{ + int ret = 0; + int channel; + RF_EventMask reason; + RF_ScheduleCmdParams sched_params = { + .allowDelay = true, + }; + struct ieee802154_cc13xx_cc26xx_data *drv_data = dev->data; + + channel = drv_data->cmd_ieee_rx.channel; + + drv_data->cmd_ieee_ed_scan.status = IDLE; + drv_data->cmd_ieee_ed_scan.channel = channel; + drv_data->cmd_ieee_ed_scan.endTime = + duration * (CC13XX_CC26XX_RAT_CYCLES_PER_SECOND / 1000); + drv_data->ed_scan_done_cb = done_cb; + + /* Abort FG and BG processes */ + if (ieee802154_cc13xx_cc26xx_stop(dev) < 0) { + return -EIO; + } + + /* Block TX while starting the ED scan */ + k_mutex_lock(&drv_data->tx_mutex, K_FOREVER); + + reason = RF_runScheduleCmd(drv_data->rf_handle, + (RF_Op *)&drv_data->cmd_ieee_ed_scan, &sched_params, + cmd_ieee_ed_scan_callback, RF_EventLastCmdDone); + if ((reason & RF_EventLastCmdDone) == 0) { + LOG_DBG("Failed to run command (0x%" PRIx64 ")", + reason); + ret = -EIO; + } + + k_mutex_unlock(&drv_data->tx_mutex); + return ret; +} + static void ieee802154_cc13xx_cc26xx_data_init(const struct device *dev) { struct ieee802154_cc13xx_cc26xx_data *drv_data = dev->data; @@ -584,6 +642,7 @@ static const struct ieee802154_radio_api ieee802154_cc13xx_cc26xx_radio_api = { .stop = ieee802154_cc13xx_cc26xx_stop_if, .configure = ieee802154_cc13xx_cc26xx_configure, .attr_get = ieee802154_cc13xx_cc26xx_attr_get, + .ed_scan = ieee802154_cc13xx_cc26xx_ed_scan, }; /** RF patches to use (note: RF core keeps a pointer to this, so no stack). */ @@ -800,6 +859,37 @@ static struct ieee802154_cc13xx_cc26xx_data ieee802154_cc13xx_cc26xx_data = { .txPower = 0x2853, /* 0 dBm */ .pRegOverride = overrides }, + + .cmd_ieee_ed_scan = { + .commandNo = CMD_IEEE_ED_SCAN, + .status = IDLE, + .pNextOp = NULL, + .startTrigger.triggerType = TRIG_NOW, + .condition.rule = COND_NEVER, + .endTrigger = { + .triggerType = TRIG_REL_START, + .pastTrig = 1, + }, + .ccaRssiThr = CC13XX_CC26XX_RECEIVER_SENSITIVITY + 10, + .ccaOpt = { +#if IEEE802154_PHY_CCA_MODE == 1 + .ccaEnEnergy = 1, + .ccaEnCorr = 0, +#elif IEEE802154_PHY_CCA_MODE == 2 + .ccaEnEnergy = 0, + .ccaEnCorr = 1, +#elif IEEE802154_PHY_CCA_MODE == 3 + .ccaEnEnergy = 1, + .ccaEnCorr = 1, +#else +#error "Invalid CCA mode" +#endif + .ccaEnSync = 1, + .ccaSyncOp = 0, + .ccaCorrOp = 1, + .ccaCorrThr = 3, + }, + }, }; #if defined(CONFIG_NET_L2_IEEE802154) diff --git a/drivers/ieee802154/ieee802154_cc13xx_cc26xx.h b/drivers/ieee802154/ieee802154_cc13xx_cc26xx.h index 4d4ee4588df..507478a1716 100644 --- a/drivers/ieee802154/ieee802154_cc13xx_cc26xx.h +++ b/drivers/ieee802154/ieee802154_cc13xx_cc26xx.h @@ -80,6 +80,8 @@ struct ieee802154_cc13xx_cc26xx_data { volatile rfc_CMD_IEEE_CSMA_t cmd_ieee_csma; volatile rfc_CMD_IEEE_TX_t cmd_ieee_tx; volatile rfc_CMD_IEEE_RX_ACK_t cmd_ieee_rx_ack; + volatile rfc_CMD_IEEE_ED_SCAN_t cmd_ieee_ed_scan; + energy_scan_done_cb_t ed_scan_done_cb; #if defined(CONFIG_SOC_CC1352R) || defined(CONFIG_SOC_CC2652R) || \ defined(CONFIG_SOC_CC1352R7) || defined(CONFIG_SOC_CC2652R7) volatile rfc_CMD_RADIO_SETUP_t cmd_radio_setup; From e72e1c1c448e6d7b8f662613663b7b22a54a1091 Mon Sep 17 00:00:00 2001 From: Vladislav Pejic Date: Tue, 15 Apr 2025 13:29:43 +0200 Subject: [PATCH 0109/2553] drivers: sensor: adxl372: FIFO mode from DT Adds support for setting FIFO mode and water-mark from DT. Signed-off-by: Vladislav Pejic --- drivers/sensor/adi/adxl372/adxl372.c | 8 +++-- drivers/sensor/adi/adxl372/adxl372.h | 9 +++--- drivers/sensor/adi/adxl372/adxl372_stream.c | 3 +- dts/bindings/sensor/adi,adxl372-common.yaml | 34 +++++++++++++++++++++ include/zephyr/dt-bindings/sensor/adxl372.h | 29 ++++++++++++++++++ 5 files changed, 75 insertions(+), 8 deletions(-) create mode 100644 include/zephyr/dt-bindings/sensor/adxl372.h diff --git a/drivers/sensor/adi/adxl372/adxl372.c b/drivers/sensor/adi/adxl372/adxl372.c index dbffe36ec3d..a0ac2ce73c3 100644 --- a/drivers/sensor/adi/adxl372/adxl372.c +++ b/drivers/sensor/adi/adxl372/adxl372.c @@ -900,9 +900,11 @@ static int adxl372_init(const struct device *dev) .inactivity_th.enable = 1, \ .inactivity_time = CONFIG_ADXL372_INACTIVITY_TIME, \ .filter_settle = ADXL372_FILTER_SETTLE_370, \ - .fifo_config.fifo_mode = ADXL372_FIFO_STREAMED, \ - .fifo_config.fifo_format = ADXL372_XYZ_PEAK_FIFO, \ - .fifo_config.fifo_samples = 128, \ + .fifo_config.fifo_mode = \ + DT_INST_PROP_OR(inst, fifo_mode, ADXL372_FIFO_BYPASSED), \ + .fifo_config.fifo_format = ADXL372_XYZ_FIFO, \ + .fifo_config.fifo_samples = \ + DT_INST_PROP_OR(inst, fifo_watermark, 0x80), \ .op_mode = ADXL372_FULL_BW_MEASUREMENT, \ #define ADXL372_CONFIG_SPI(inst) \ diff --git a/drivers/sensor/adi/adxl372/adxl372.h b/drivers/sensor/adi/adxl372/adxl372.h index acfcf5fddb4..547e78d4464 100644 --- a/drivers/sensor/adi/adxl372/adxl372.h +++ b/drivers/sensor/adi/adxl372/adxl372.h @@ -13,6 +13,7 @@ #include #include #include +#include #ifdef CONFIG_ADXL372_STREAM #include @@ -268,10 +269,10 @@ enum adxl372_fifo_format { }; enum adxl372_fifo_mode { - ADXL372_FIFO_BYPASSED, - ADXL372_FIFO_STREAMED, - ADXL372_FIFO_TRIGGERED, - ADXL372_FIFO_OLD_SAVED + ADXL372_FIFO_BYPASSED = ADXL372_FIFO_MODE_BYPASSED, + ADXL372_FIFO_STREAMED = ADXL372_FIFO_MODE_STREAMED, + ADXL372_FIFO_TRIGGERED = ADXL372_FIFO_MODE_TRIGGERED, + ADXL372_FIFO_OLD_SAVED = ADXL372_FIFO_MODE_OLD_SAVED }; struct adxl372_fifo_config { diff --git a/drivers/sensor/adi/adxl372/adxl372_stream.c b/drivers/sensor/adi/adxl372/adxl372_stream.c index c2ecc42dffb..474c2da082f 100644 --- a/drivers/sensor/adi/adxl372/adxl372_stream.c +++ b/drivers/sensor/adi/adxl372/adxl372_stream.c @@ -107,7 +107,8 @@ void adxl372_submit_stream(const struct device *dev, struct rtio_iodev_sqe *iode data->fifo_config.fifo_samples); if (current_fifo_mode == ADXL372_FIFO_BYPASSED) { - current_fifo_mode = ADXL372_FIFO_STREAMED; + LOG_ERR("ERROR: FIFO BYPASSED"); + return; } adxl372_configure_fifo(dev, current_fifo_mode, data->fifo_config.fifo_format, diff --git a/dts/bindings/sensor/adi,adxl372-common.yaml b/dts/bindings/sensor/adi,adxl372-common.yaml index 547337fc70a..f7bd58e1a00 100644 --- a/dts/bindings/sensor/adi,adxl372-common.yaml +++ b/dts/bindings/sensor/adi,adxl372-common.yaml @@ -3,6 +3,20 @@ include: sensor-device.yaml +description: | + ADXL372 3-axis SPI accelerometer + When setting the accelerometer DTS properties and want to use + streaming funcionality, make sure to include adxl372.h and + use the macros defined there for fifo-mode properties. + + Example: + #include + + adxl372: adxl372@0 { + ... + fifo-mode = ; + }; + properties: odr: type: int @@ -63,3 +77,23 @@ properties: The INT1 signal defaults to active high as produced by the sensor. The property value should ensure the flags properly describe the signal that is presented to the driver. + + fifo-mode: + type: int + description: | + Accelerometer FIFO Mode. + 0 # ADXL372_FIFO_MODE_BYPASSED + 1 # ADXL372_FIFO_MODE_STREAMED + 2 # ADXL372_FIFO_MODE_TRIGGERED + 3 # ADXL372_FIFO_MODE_OLD_SAVED + enum: + - 0 + - 1 + - 2 + - 3 + + fifo-watermark: + type: int + description: | + Specify the FIFO watermark level in frame count. + Valid range: 0 - 512 diff --git a/include/zephyr/dt-bindings/sensor/adxl372.h b/include/zephyr/dt-bindings/sensor/adxl372.h new file mode 100644 index 00000000000..43b92547eee --- /dev/null +++ b/include/zephyr/dt-bindings/sensor/adxl372.h @@ -0,0 +1,29 @@ +/* + * Copyright (c) 2025 Analog Devices Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_ADI_ADX372_H_ +#define ZEPHYR_INCLUDE_DT_BINDINGS_ADI_ADX372_H_ + +/** + * @defgroup ADXL372 ADI DT Options + * @ingroup sensor_interface + * @{ + */ + +/** + * @defgroup ADXL372_FIFO_MODE FIFO mode options + * @{ + */ + +#define ADXL372_FIFO_MODE_BYPASSED 0x0 +#define ADXL372_FIFO_MODE_STREAMED 0x1 +#define ADXL372_FIFO_MODE_TRIGGERED 0x2 +#define ADXL372_FIFO_MODE_OLD_SAVED 0x3 + +/** @} */ + +/** @} */ + +#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_ADI_ADX372_H_ */ From d7c2605aae05dfb862d270ca71906faf7107a9bb Mon Sep 17 00:00:00 2001 From: Vladislav Pejic Date: Tue, 15 Apr 2025 13:37:24 +0200 Subject: [PATCH 0110/2553] samples: sensor: Add adxl372 streaming config Adds adxl372 streaming configuration to accelerometer samples. Signed-off-by: Vladislav Pejic --- boards/shields/eval_adxl372_ardz/eval_adxl372_ardz.overlay | 5 +++++ samples/sensor/accel_polling/adxl372-stream.conf | 6 ++++++ samples/sensor/accel_polling/sample.yaml | 7 +++++++ 3 files changed, 18 insertions(+) create mode 100644 samples/sensor/accel_polling/adxl372-stream.conf diff --git a/boards/shields/eval_adxl372_ardz/eval_adxl372_ardz.overlay b/boards/shields/eval_adxl372_ardz/eval_adxl372_ardz.overlay index 349374a7c7a..a7579e16c71 100644 --- a/boards/shields/eval_adxl372_ardz/eval_adxl372_ardz.overlay +++ b/boards/shields/eval_adxl372_ardz/eval_adxl372_ardz.overlay @@ -4,6 +4,9 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include + + &arduino_spi { status = "okay"; @@ -12,6 +15,8 @@ reg = <0x0>; spi-max-frequency = ; int1-gpios = <&arduino_header 13 GPIO_ACTIVE_HIGH>; + fifo-mode = ; + fifo-watermark = <0x80>; status = "okay"; }; }; diff --git a/samples/sensor/accel_polling/adxl372-stream.conf b/samples/sensor/accel_polling/adxl372-stream.conf new file mode 100644 index 00000000000..abca3332ecb --- /dev/null +++ b/samples/sensor/accel_polling/adxl372-stream.conf @@ -0,0 +1,6 @@ +# Copyright (c) 2025 Analog Devices, Inc. +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_SPI_RTIO=y +CONFIG_SENSOR_ASYNC_API=y +CONFIG_ADXL372_STREAM=y diff --git a/samples/sensor/accel_polling/sample.yaml b/samples/sensor/accel_polling/sample.yaml index 24e3c5f4bbd..a070d521503 100644 --- a/samples/sensor/accel_polling/sample.yaml +++ b/samples/sensor/accel_polling/sample.yaml @@ -41,3 +41,10 @@ tests: - SNIPPET="rtt-tracing;rtt-console" platform_allow: - apard32690/max32690/m4 + sample.sensor.accel_polling.adxl372-stream: + extra_args: + - SHIELD="eval_adxl372_ardz" + - EXTRA_CONF_FILE="adxl372-stream.conf" + - SNIPPET="rtt-tracing;rtt-console" + platform_allow: + - apard32690/max32690/m4 From b0715dd3f2f0c243a2c0a79bfe1e07eba8e23463 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Robin-Charles=20Guih=C3=A9neuf?= Date: Thu, 17 Apr 2025 08:28:14 +0200 Subject: [PATCH 0111/2553] lvgl: Add config to disable monochrome pixel software inversion MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In some cases, pixel inversion is managed by the display hardware and software inversion is not required. Signed-off-by: Robin-Charles Guihéneuf --- doc/releases/release-notes-4.2.rst | 4 ++++ modules/lvgl/Kconfig | 4 ++++ modules/lvgl/lvgl_display_mono.c | 8 ++++++++ 3 files changed, 16 insertions(+) diff --git a/doc/releases/release-notes-4.2.rst b/doc/releases/release-notes-4.2.rst index 0514cf8a77d..77e24f2cec0 100644 --- a/doc/releases/release-notes-4.2.rst +++ b/doc/releases/release-notes-4.2.rst @@ -212,6 +212,10 @@ New APIs and options * :kconfig:option:`CONFIG_NVME_PRP_PAGE_SIZE` +* Other + + * :kconfig:option:`CONFIG_LV_Z_COLOR_MONO_HW_INVERSION` + New Boards ********** diff --git a/modules/lvgl/Kconfig b/modules/lvgl/Kconfig index 8084dd11a33..01e1ef004df 100644 --- a/modules/lvgl/Kconfig +++ b/modules/lvgl/Kconfig @@ -94,6 +94,10 @@ config LV_COLOR_16_SWAP bool "Swap the 2 bytes of RGB565 color." depends on LV_COLOR_DEPTH_16 +config LV_Z_COLOR_MONO_HW_INVERSION + bool "Hardware pixel inversion (disables software pixel inversion)." + depends on LV_COLOR_DEPTH_1 + config LV_Z_FLUSH_THREAD bool "Flush LVGL frames in a separate thread" help diff --git a/modules/lvgl/lvgl_display_mono.c b/modules/lvgl/lvgl_display_mono.c index 09b9bfd2337..069a0eea28b 100644 --- a/modules/lvgl/lvgl_display_mono.c +++ b/modules/lvgl/lvgl_display_mono.c @@ -38,17 +38,25 @@ static ALWAYS_INLINE void set_px_at_pos(uint8_t *dst_buf, uint32_t x, uint32_t y } } +#ifdef CONFIG_LV_Z_COLOR_MONO_HW_INVERSION + *buf |= BIT(bit); +#else if (caps->current_pixel_format == PIXEL_FORMAT_MONO10) { *buf |= BIT(bit); } else { *buf &= ~BIT(bit); } +#endif } static void lvgl_transform_buffer(uint8_t **px_map, uint32_t width, uint32_t height, const struct display_capabilities *caps) { +#ifdef CONFIG_LV_Z_COLOR_MONO_HW_INVERSION + uint8_t clear_color = 0x00; +#else uint8_t clear_color = caps->current_pixel_format == PIXEL_FORMAT_MONO10 ? 0x00 : 0xFF; +#endif memset(mono_conv_buf, clear_color, mono_conv_buf_size); From e1c5e3a44d3df623d03a96266548fd380699d763 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Robin-Charles=20Guih=C3=A9neuf?= Date: Mon, 31 Mar 2025 22:35:59 +0200 Subject: [PATCH 0112/2553] shields: ssd1306: Disable LVGL software screen inversion MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On this screen the inversion is managed by hardware. Signed-off-by: Robin-Charles Guihéneuf --- boards/shields/ssd1306/Kconfig.defconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/boards/shields/ssd1306/Kconfig.defconfig b/boards/shields/ssd1306/Kconfig.defconfig index 3fc5d5a7c05..4ef59333d15 100644 --- a/boards/shields/ssd1306/Kconfig.defconfig +++ b/boards/shields/ssd1306/Kconfig.defconfig @@ -17,6 +17,9 @@ config LV_DPI_DEF config LV_Z_BITS_PER_PIXEL default 1 +config LV_Z_COLOR_MONO_HW_INVERSION + default y + choice LV_COLOR_DEPTH default LV_COLOR_DEPTH_1 endchoice From 327c78ec0aa8153bf36434b09a275d687ad7f622 Mon Sep 17 00:00:00 2001 From: Paul Alvin Date: Mon, 17 Mar 2025 11:05:06 +0530 Subject: [PATCH 0113/2553] drivers: sdhc: Add driver support for xlnx SDHC Add driver support for xlnx SD/EMMC host controller. The driver currently support SD host controller version 3.0 and EMMC host controller version 5.1. This driver functions with the SDHC subsystem to perform operations on device. Driver support both interrupt and polled mode data transfer. Uses ADMA2 to perform data transfer. Signed-off-by: Paul Alvin --- boards/amd/versalnet_rpu/versalnet_rpu.yaml | 2 + drivers/sdhc/CMakeLists.txt | 1 + drivers/sdhc/Kconfig | 1 + drivers/sdhc/Kconfig.xlnx | 28 + drivers/sdhc/xlnx_sdhc.c | 1365 +++++++++++++++++++ drivers/sdhc/xlnx_sdhc.h | 289 ++++ dts/bindings/sdhc/xlnx,sdhc.yaml | 17 + 7 files changed, 1703 insertions(+) create mode 100644 drivers/sdhc/Kconfig.xlnx create mode 100644 drivers/sdhc/xlnx_sdhc.c create mode 100644 drivers/sdhc/xlnx_sdhc.h create mode 100644 dts/bindings/sdhc/xlnx,sdhc.yaml diff --git a/boards/amd/versalnet_rpu/versalnet_rpu.yaml b/boards/amd/versalnet_rpu/versalnet_rpu.yaml index eccdf0ae37b..21f19ea6cce 100644 --- a/boards/amd/versalnet_rpu/versalnet_rpu.yaml +++ b/boards/amd/versalnet_rpu/versalnet_rpu.yaml @@ -8,3 +8,5 @@ testing: - net - bluetooth vendor: amd +supported: + - sdhc diff --git a/drivers/sdhc/CMakeLists.txt b/drivers/sdhc/CMakeLists.txt index 589ba209eb3..07b9834289b 100644 --- a/drivers/sdhc/CMakeLists.txt +++ b/drivers/sdhc/CMakeLists.txt @@ -15,4 +15,5 @@ zephyr_library_sources_ifdef(CONFIG_SDHC_ESP32 sdhc_esp32.c) zephyr_library_sources_ifdef(CONFIG_SDHC_RENESAS_RA sdhc_renesas_ra.c) zephyr_library_sources_ifdef(CONFIG_SDHC_MAX32 sdhc_max32.c) zephyr_library_sources_ifdef(CONFIG_SDHC_AMBIQ sdhc_ambiq.c) +zephyr_library_sources_ifdef(CONFIG_XLNX_SDHC xlnx_sdhc.c) endif() diff --git a/drivers/sdhc/Kconfig b/drivers/sdhc/Kconfig index 3c8a7bd869c..dc59cd37f50 100644 --- a/drivers/sdhc/Kconfig +++ b/drivers/sdhc/Kconfig @@ -20,6 +20,7 @@ source "drivers/sdhc/Kconfig.esp32" source "drivers/sdhc/Kconfig.renesas_ra" source "drivers/sdhc/Kconfig.max32" source "drivers/sdhc/Kconfig.ambiq" +source "drivers/sdhc/Kconfig.xlnx" config SDHC_INIT_PRIORITY int "SDHC driver init priority" diff --git a/drivers/sdhc/Kconfig.xlnx b/drivers/sdhc/Kconfig.xlnx new file mode 100644 index 00000000000..4304081b900 --- /dev/null +++ b/drivers/sdhc/Kconfig.xlnx @@ -0,0 +1,28 @@ +# Copyright (c) 2025 Advanced Micro Devices, Inc. (AMD) +# SPDX-License-Identifier: Apache-2.0 + +config XLNX_SDHC + bool "xlnx sdhc driver" + default y + depends on DT_HAS_XLNX_VERSAL_8_9A_ENABLED + select SDHC_SUPPORTS_NATIVE_MODE + select SDHC_SUPPORTS_UHS + select EVENTS + select CLOCK_CONTROL + select CLOCK_CONTROL_FIXED_RATE_CLOCK + help + Enable xilinx SD/EMMC host controller driver + +if XLNX_SDHC + +# sdhc needs 32 byte aligned buffers +config SDHC_BUFFER_ALIGNMENT + default 32 + +config HOST_ADMA2_DESC_SIZE + int "Max discripter SIZE" + default 32 + help + Set max number of discriptor support + +endif diff --git a/drivers/sdhc/xlnx_sdhc.c b/drivers/sdhc/xlnx_sdhc.c new file mode 100644 index 00000000000..4cc15cf1cfc --- /dev/null +++ b/drivers/sdhc/xlnx_sdhc.c @@ -0,0 +1,1365 @@ +/* + * Copyright (c) 2025 Advanced Micro Devices, Inc. (AMD) + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#define DT_DRV_COMPAT xlnx_versal_8_9a + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "xlnx_sdhc.h" + +LOG_MODULE_REGISTER(xlnx_sdhc, CONFIG_SD_LOG_LEVEL); + +#define CHECK_BITS(b) ((uint64_t)1 << (b)) + +#define XLNX_SDHC_SLOT_TYPE(dev) \ + ((((struct sd_data *)dev->data)->props.host_caps.slot_type != 0) ? \ + XLNX_SDHC_EMMC_SLOT : XLNX_SDHC_SD_SLOT) + +#define XLNX_SDHC_GET_HOST_PROP_BIT(cap, b) ((uint8_t)((cap & (CHECK_BITS(b))) >> b)) + +/** + * @brief ADMA2 descriptor table structure. + */ +typedef struct { + /**< Attributes of descriptor */ + uint16_t attribute; + /**< Length of current dma transfer max 64kb */ + uint16_t length; + /**< source/destination address for current dma transfer */ + uint64_t address; +} __packed adma2_descriptor; + +/** + * @brief Holds device private data. + */ +struct sd_data { + DEVICE_MMIO_RAM; + /**< Current I/O settings of SDHC */ + struct sdhc_io host_io; + /**< Supported properties of SDHC */ + struct sdhc_host_props props; + /**< SDHC IRQ events */ + struct k_event irq_event; + /**< Used to identify HC internal phy register */ + bool has_phy; + /**< transfer mode and data direction */ + uint16_t transfermode; + /**< Maximum input clock supported by HC */ + uint32_t maxclock; + /**< ADMA descriptor table */ + adma2_descriptor adma2_descrtbl[MAX(1, CONFIG_HOST_ADMA2_DESC_SIZE)]; +}; + +/** + * @brief Holds SDHC configuration data. + */ +struct xlnx_sdhc_config { + /* MMIO mapping information for SDHC register base address */ + DEVICE_MMIO_ROM; + /**< Pointer to the device structure representing the clock bus */ + const struct device *clock_dev; + /**< Callback to the device interrupt configuration api */ + void (*irq_config_func)(const struct device *dev); + /**< Card detection pin available or not */ + bool broken_cd; + /**< Support hs200 mode. */ + bool hs200_mode; + /**< Support hs400 mode */ + bool hs400_mode; + /**< delay given to card to power up or down fully */ + uint16_t powerdelay; +}; + +/** + * @brief + * polled wait for selected number of 32 bit events + */ +static int8_t xlnx_sdhc_waitl_events(const void *base, int32_t timeout_ms, uint32_t events, + uint32_t value) +{ + int8_t ret = -EAGAIN; + + for (uint32_t retry = 0; retry < timeout_ms; retry++) { + if ((*((volatile uint32_t *)base) & events) == value) { + ret = 0; + break; + } + k_msleep(1); + } + + return ret; +} + +/** + * @brief + * polled wait for selected number of 8 bit events + */ +static int8_t xlnx_sdhc_waitb_events(const void *base, int32_t timeout_ms, uint32_t events, + uint32_t value) +{ + int8_t ret = -EAGAIN; + + for (uint32_t retry = 0; retry < timeout_ms; retry++) { + if ((*((volatile uint8_t *)base) & events) == value) { + ret = 0; + break; + } + k_msleep(1); + } + + return ret; +} + +/** + * @brief + * Polled wait for any one of the given event + */ +static int8_t xlnx_sdhc_wait_for_events(const void *base, int32_t timeout_ms, + uint32_t events) +{ + int8_t ret = -EAGAIN; + + for (uint32_t retry = 0; retry < timeout_ms; retry++) { + if ((*((volatile uint32_t *)base) & events) != 0U) { + ret = 0; + break; + } + k_msleep(1); + } + + return ret; +} + +/** + * @brief + * Check card is detected by host + */ +static int xlnx_sdhc_card_detect(const struct device *dev) +{ + const volatile struct reg_base *reg = (struct reg_base *)DEVICE_MMIO_GET(dev); + const struct xlnx_sdhc_config *config = dev->config; + + if ((reg->present_state & XLNX_SDHC_PSR_CARD_INSRT_MASK) != 0U) { + return 1; + } + + /* In case of polling always treat card is detected */ + if (config->broken_cd == true) { + return 1; + } + + return 0; +} + +/** + * @brief + * Clear the controller status registers + */ +static void xlnx_sdhc_clear_intr(volatile struct reg_base *reg) +{ + reg->normal_int_stat = XLNX_SDHC_NORM_INTR_ALL; + reg->err_int_stat = XLNX_SDHC_ERROR_INTR_ALL; +} + +/** + * @brief + * Setup ADMA2 discriptor table for data transfer + */ +static int xlnx_sdhc_setup_adma(const struct device *dev, const struct sdhc_data *data) +{ + volatile struct reg_base *reg = (struct reg_base *)DEVICE_MMIO_GET(dev); + struct sd_data *dev_data = dev->data; + uint32_t adma_table; + uint32_t descnum; + const uint8_t *buff = data->data; + int ret = 0; + + if ((data->block_size * data->blocks) < XLNX_SDHC_DESC_MAX_LENGTH) { + adma_table = 1U; + } else { + adma_table = ((data->block_size * data->blocks) / + XLNX_SDHC_DESC_MAX_LENGTH); + if (((data->block_size * data->blocks) % XLNX_SDHC_DESC_MAX_LENGTH) != 0U) { + adma_table += 1U; + } + } + + if (adma_table > CONFIG_HOST_ADMA2_DESC_SIZE) { + LOG_ERR("Descriptor size is too big"); + return -ENOTSUP; + } + + for (descnum = 0U; descnum < (adma_table - 1U); descnum++) { + dev_data->adma2_descrtbl[descnum].address = + ((uintptr_t)buff + (descnum * XLNX_SDHC_DESC_MAX_LENGTH)); + dev_data->adma2_descrtbl[descnum].attribute = + XLNX_SDHC_DESC_TRAN | XLNX_SDHC_DESC_VALID; + dev_data->adma2_descrtbl[descnum].length = 0U; + } + + dev_data->adma2_descrtbl[adma_table - 1U].address = + ((uintptr_t)buff + (descnum * XLNX_SDHC_DESC_MAX_LENGTH)); + dev_data->adma2_descrtbl[adma_table - 1U].attribute = XLNX_SDHC_DESC_TRAN | + XLNX_SDHC_DESC_END | XLNX_SDHC_DESC_VALID; + dev_data->adma2_descrtbl[adma_table - 1U].length = + ((data->blocks * data->block_size) - (descnum * XLNX_SDHC_DESC_MAX_LENGTH)); + + reg->adma_sys_addr = ((uintptr_t)&(dev_data->adma2_descrtbl[0]) & ~(uintptr_t)0x0); + + return ret; +} + +/** + * @brief + * Frame the command + */ +static uint16_t xlnx_sdhc_cmd_frame(struct sdhc_command *cmd, bool data, uint8_t slottype) +{ + uint16_t command = (cmd->opcode << XLNX_SDHC_OPCODE_SHIFT); + + switch (cmd->response_type & XLNX_SDHC_RESP) { + case SD_RSP_TYPE_NONE: + command |= RESP_NONE; + break; + + case SD_RSP_TYPE_R1: + command |= RESP_R1; + break; + + case SD_RSP_TYPE_R1b: + command |= RESP_R1B; + break; + + case SD_RSP_TYPE_R2: + command |= RESP_R2; + break; + + case SD_RSP_TYPE_R3: + command |= RESP_R3; + break; + + case SD_RSP_TYPE_R6: + command |= RESP_R6; + break; + + case SD_RSP_TYPE_R7: + /* As per spec, EMMC does not support R7 */ + if (slottype == XLNX_SDHC_EMMC_SLOT) { + return XLNX_SDHC_CMD_RESP_INVAL; + } + command |= RESP_R1; + break; + + default: + LOG_DBG("Invalid response type"); + return XLNX_SDHC_CMD_RESP_INVAL; + } + + /* EMMC does not support APP command */ + if ((cmd->opcode == SD_APP_CMD) && (slottype == XLNX_SDHC_EMMC_SLOT)) { + LOG_DBG("Invalid response type"); + return XLNX_SDHC_CMD_RESP_INVAL; + } + + if (data) { + command |= XLNX_SDHC_DAT_PRESENT_SEL_MASK; + } + + return command; +} + +/** + * @brief + * Check command response is success or failed also clears status registers + */ +static int8_t xlnx_sdhc_cmd_response(const struct device *dev, struct sdhc_command *cmd) +{ + const struct xlnx_sdhc_config *config = dev->config; + volatile struct reg_base *reg = (struct reg_base *)DEVICE_MMIO_GET(dev); + struct sd_data *dev_data = dev->data; + uint32_t mask; + uint32_t events; + int8_t ret; + k_timeout_t timeout; + + mask = XLNX_SDHC_INTR_ERR_MASK | XLNX_SDHC_INTR_CC_MASK; + if ((cmd->opcode == SD_SEND_TUNING_BLOCK) || (cmd->opcode == MMC_SEND_TUNING_BLOCK)) { + mask |= XLNX_SDHC_INTR_BRR_MASK; + } + + if (config->irq_config_func == NULL) { + ret = xlnx_sdhc_wait_for_events((void *)®->normal_int_stat, + cmd->timeout_ms, mask); + if (ret != 0) { + LOG_ERR("No response from card"); + return ret; + } + + if ((reg->normal_int_stat & XLNX_SDHC_INTR_ERR_MASK) != 0U) { + LOG_ERR("Error response from card"); + reg->err_int_stat = XLNX_SDHC_ERROR_INTR_ALL; + return -EINVAL; + } + reg->normal_int_stat = XLNX_SDHC_INTR_CC_MASK; + } else { + timeout = K_MSEC(cmd->timeout_ms); + + events = k_event_wait(&dev_data->irq_event, mask, false, timeout); + + if ((events & XLNX_SDHC_INTR_ERR_MASK) != 0U) { + LOG_ERR("Error response from card"); + ret = -EINVAL; + } else if ((events & XLNX_SDHC_INTR_CC_MASK) || + (events & XLNX_SDHC_INTR_BRR_MASK)) { + ret = 0; + } else { + LOG_ERR("No response from card"); + ret = -EAGAIN; + } + } + return ret; +} + +/** + * @brief + * Update response member of command structure which is used by subsystem + */ +static void xlnx_sdhc_update_response(const volatile struct reg_base *reg, + struct sdhc_command *cmd) +{ + if (cmd->response_type == SD_RSP_TYPE_NONE) { + return; + } + + if (cmd->response_type == SD_RSP_TYPE_R2) { + cmd->response[0] = reg->resp_0; + cmd->response[1] = reg->resp_1; + cmd->response[2] = reg->resp_2; + cmd->response[3] = reg->resp_3; + + /* CRC is striped from the response performing shifting to update response */ + for (uint8_t i = 3; i != 0; i--) { + cmd->response[i] <<= XLNX_SDHC_CRC_LEFT_SHIFT; + cmd->response[i] |= cmd->response[i-1] >> XLNX_SDHC_CRC_RIGHT_SHIFT; + } + cmd->response[0] <<= XLNX_SDHC_CRC_LEFT_SHIFT; + } else { + cmd->response[0] = reg->resp_0; + } +} + +/** + * @brief + * Setup and send the command and also check for response + */ +static int8_t xlnx_sdhc_cmd(const struct device *dev, struct sdhc_command *cmd, bool data) +{ + const struct xlnx_sdhc_config *config = dev->config; + volatile struct reg_base *reg = (struct reg_base *)DEVICE_MMIO_GET(dev); + struct sd_data *dev_data = dev->data; + uint16_t command; + uint8_t slottype = XLNX_SDHC_SLOT_TYPE(dev); + int8_t ret; + + reg->argument = cmd->arg; + + xlnx_sdhc_clear_intr(reg); + + /* Frame command */ + command = xlnx_sdhc_cmd_frame(cmd, data, slottype); + if (command == XLNX_SDHC_CMD_RESP_INVAL) { + return -EINVAL; + } + + if ((cmd->opcode != SD_SEND_TUNING_BLOCK) && (cmd->opcode != MMC_SEND_TUNING_BLOCK)) { + if (((reg->present_state & XLNX_SDHC_PSR_INHIBIT_DAT_MASK) != 0U) && + ((command & XLNX_SDHC_DAT_PRESENT_SEL_MASK) != 0U)) { + LOG_ERR("Card data lines busy"); + return -EBUSY; + } + } + + if (config->irq_config_func != NULL) { + k_event_clear(&dev_data->irq_event, XLNX_SDHC_TXFR_INTR_EN_MASK); + } + + reg->transfer_mode = dev_data->transfermode; + reg->cmd = command; + + /* Check for response */ + ret = xlnx_sdhc_cmd_response(dev, cmd); + if (ret != 0) { + return ret; + } + + xlnx_sdhc_update_response(reg, cmd); + + return 0; +} + +/** + * @brief + * Check for data transfer completion + */ +static int8_t xlnx_sdhc_xfr(const struct device *dev, struct sdhc_data *data) +{ + const struct xlnx_sdhc_config *config = dev->config; + volatile struct reg_base *reg = (struct reg_base *)DEVICE_MMIO_GET(dev); + struct sd_data *dev_data = dev->data; + uint32_t events; + uint32_t mask; + int8_t ret; + k_timeout_t timeout; + + mask = XLNX_SDHC_INTR_ERR_MASK | XLNX_SDHC_INTR_TC_MASK; + if (config->irq_config_func == NULL) { + ret = xlnx_sdhc_wait_for_events((void *)®->normal_int_stat, + data->timeout_ms, mask); + if (ret != 0) { + LOG_ERR("Data transfer timeout"); + return ret; + } + + if ((reg->normal_int_stat & XLNX_SDHC_INTR_ERR_MASK) != 0U) { + reg->err_int_stat = XLNX_SDHC_ERROR_INTR_ALL; + LOG_ERR("Error at data transfer"); + return -EINVAL; + } + + reg->normal_int_stat = XLNX_SDHC_INTR_TC_MASK; + } else { + timeout = K_MSEC(data->timeout_ms); + + events = k_event_wait(&dev_data->irq_event, mask, false, timeout); + + if ((events & XLNX_SDHC_INTR_ERR_MASK) != 0U) { + LOG_ERR("Error at data transfer"); + ret = -EINVAL; + } else if ((events & XLNX_SDHC_INTR_TC_MASK) != 0U) { + ret = 0; + } else { + LOG_ERR("Data transfer timeout"); + ret = -EAGAIN; + } + } + return ret; +} + +/** + * @brief + * Performs data and command transfer and check for transfer complete + */ +static int8_t xlnx_sdhc_transfer(const struct device *dev, struct sdhc_command *cmd, + struct sdhc_data *data) +{ + volatile struct reg_base *reg = (struct reg_base *)DEVICE_MMIO_GET(dev); + int8_t ret = -EINVAL; + + /* Check command line is in use */ + if ((reg->present_state & 1U) != 0U) { + LOG_ERR("Command lines are busy"); + return -EBUSY; + } + + if (data != NULL) { + reg->block_size = data->block_size; + reg->block_count = data->blocks; + + /* Setup ADMA2 if data is present */ + ret = xlnx_sdhc_setup_adma(dev, data); + if (ret != 0) { + return ret; + } + + /* Send command and check for command complete */ + ret = xlnx_sdhc_cmd(dev, cmd, true); + if (ret != 0) { + return ret; + } + + /* Check for data transfer complete */ + ret = xlnx_sdhc_xfr(dev, data); + if (ret != 0) { + return ret; + } + } else { + /* Send command and check for command complete */ + ret = xlnx_sdhc_cmd(dev, cmd, false); + return ret; + } + + return ret; +} + +/** + * @brief + * Configure transfer mode and transfer command and data + */ +static int xlnx_sdhc_request(const struct device *dev, struct sdhc_command *cmd, + struct sdhc_data *data) +{ + struct sd_data *dev_data = dev->data; + int ret; + + if (dev_data->transfermode == 0U) { + dev_data->transfermode = XLNX_SDHC_TM_DMA_EN_MASK | + XLNX_SDHC_TM_BLK_CNT_EN_MASK | + XLNX_SDHC_TM_DAT_DIR_SEL_MASK; + } + + switch (cmd->opcode) { + case SD_READ_MULTIPLE_BLOCK: + dev_data->transfermode |= XLNX_SDHC_TM_AUTO_CMD12_EN_MASK | + XLNX_SDHC_TM_MUL_SIN_BLK_SEL_MASK; + ret = xlnx_sdhc_transfer(dev, cmd, data); + break; + + case SD_WRITE_MULTIPLE_BLOCK: + dev_data->transfermode |= XLNX_SDHC_TM_AUTO_CMD12_EN_MASK | + XLNX_SDHC_TM_MUL_SIN_BLK_SEL_MASK; + dev_data->transfermode &= ~XLNX_SDHC_TM_DAT_DIR_SEL_MASK; + ret = xlnx_sdhc_transfer(dev, cmd, data); + break; + + case SD_WRITE_SINGLE_BLOCK: + dev_data->transfermode &= ~XLNX_SDHC_TM_DAT_DIR_SEL_MASK; + ret = xlnx_sdhc_transfer(dev, cmd, data); + break; + + default: + ret = xlnx_sdhc_transfer(dev, cmd, data); + } + dev_data->transfermode = 0; + + return ret; +} + +/** + * @brief + * Populate sdhc_host_props structure with all sd host controller property + */ +static int xlnx_sdhc_host_props(const struct device *dev, struct sdhc_host_props *props) +{ + const struct xlnx_sdhc_config *config = dev->config; + const volatile struct reg_base *reg = (struct reg_base *)DEVICE_MMIO_GET(dev); + struct sd_data *dev_data = dev->data; + const uint64_t cap = reg->capabilities; + const uint64_t current = reg->max_current_cap; + + props->f_max = SD_CLOCK_208MHZ; + props->f_min = SDMMC_CLOCK_400KHZ; + + props->power_delay = config->powerdelay; + + props->host_caps.vol_180_support = XLNX_SDHC_GET_HOST_PROP_BIT(cap, + XLNX_SDHC_1P8_VOL_SUPPORT); + props->host_caps.vol_300_support = XLNX_SDHC_GET_HOST_PROP_BIT(cap, + XLNX_SDHC_3P0_VOL_SUPPORT); + props->host_caps.vol_330_support = XLNX_SDHC_GET_HOST_PROP_BIT(cap, + XLNX_SDHC_3P3_VOL_SUPPORT); + props->max_current_330 = (uint8_t)(current & XLNX_SDHC_CURRENT_BYTE); + props->max_current_300 = (uint8_t)((current >> XLNX_SDHC_3P0_CURRENT_SUPPORT_SHIFT) & + XLNX_SDHC_CURRENT_BYTE); + props->max_current_180 = (uint8_t)((current >> XLNX_SDHC_1P8_CURRENT_SUPPORT_SHIFT) & + XLNX_SDHC_CURRENT_BYTE); + props->host_caps.sdma_support = XLNX_SDHC_GET_HOST_PROP_BIT(cap, XLNX_SDHC_SDMA_SUPPORT); + props->host_caps.high_spd_support = XLNX_SDHC_GET_HOST_PROP_BIT(cap, + XLNX_SDHC_HIGH_SPEED_SUPPORT); + props->host_caps.adma_2_support = XLNX_SDHC_GET_HOST_PROP_BIT(cap, + XLNX_SDHC_ADMA2_SUPPORT); + props->host_caps.max_blk_len = (uint8_t)((cap >> XLNX_SDHC_MAX_BLK_LEN_SHIFT) & + XLNX_SDHC_MAX_BLK_LEN); + props->host_caps.ddr50_support = XLNX_SDHC_GET_HOST_PROP_BIT(cap, XLNX_SDHC_DDR50_SUPPORT); + props->host_caps.sdr104_support = XLNX_SDHC_GET_HOST_PROP_BIT(cap, + XLNX_SDHC_SDR104_SUPPORT); + props->host_caps.sdr50_support = XLNX_SDHC_GET_HOST_PROP_BIT(cap, XLNX_SDHC_SDR50_SUPPORT); + props->host_caps.slot_type = (uint8_t)((cap >> XLNX_SDHC_SLOT_TYPE_SHIFT) & + XLNX_SDHC_SLOT_TYPE_GET); + props->host_caps.bus_8_bit_support = XLNX_SDHC_GET_HOST_PROP_BIT(cap, + XLNX_SDHC_8BIT_SUPPORT); + props->host_caps.bus_4_bit_support = XLNX_SDHC_GET_HOST_PROP_BIT(cap, + XLNX_SDHC_4BIT_SUPPORT); + + if ((cap & CHECK_BITS(XLNX_SDHC_SDR400_SUPPORT)) != 0U) { + props->host_caps.hs400_support = (uint8_t)config->hs400_mode; + dev_data->has_phy = true; + } + props->host_caps.hs200_support = (uint8_t)config->hs200_mode; + + dev_data->props = *props; + + return 0; +} + +/** + * @brief + * Calculate clock value based on the selected speed + */ +static uint16_t xlnx_sdhc_cal_clock(uint32_t maxclock, enum sdhc_clock_speed speed) +{ + uint16_t divcnt; + uint16_t divisor = 0U, clockval = 0U; + + if (maxclock <= speed) { + divisor = 0U; + } else { + for (divcnt = 2U; divcnt <= XLNX_SDHC_CC_EXT_MAX_DIV_CNT; divcnt += 2U) { + if ((maxclock / divcnt) <= speed) { + divisor = divcnt >> XLNX_SDHC_CLOCK_CNT_SHIFT; + break; + } + } + } + + clockval |= (divisor & XLNX_SDHC_CC_SDCLK_FREQ_SEL) << XLNX_SDHC_CC_DIV_SHIFT; + clockval |= ((divisor >> XLNX_SDHC_CC_DIV_SHIFT) & XLNX_SDHC_CC_SDCLK_FREQ_SEL_EXT) << + XLNX_SDHC_CC_EXT_DIV_SHIFT; + + return clockval; +} + +/** + * @brief + * Select frequency window for dll clock + */ +static void xlnx_sdhc_select_dll_feq(volatile struct reg_base *reg, + enum sdhc_clock_speed speed) +{ + uint32_t freq; + uint8_t selfreq; + + freq = speed / XLNX_SDHC_KHZ_TO_MHZ; + if ((freq <= XLNX_SDHC_200_FREQ) && (freq > XLNX_SDHC_170_FREQ)) { + selfreq = XLNX_SDHC_FREQSEL_200M_170M; + } else if ((freq <= XLNX_SDHC_170_FREQ) && (freq > XLNX_SDHC_140_FREQ)) { + selfreq = XLNX_SDHC_FREQSEL_170M_140M; + } else if ((freq <= XLNX_SDHC_140_FREQ) && (freq > XLNX_SDHC_110_FREQ)) { + selfreq = XLNX_SDHC_FREQSEL_140M_110M; + } else if ((freq <= XLNX_SDHC_110_FREQ) && (freq > XLNX_SDHC_80_FREQ)) { + selfreq = XLNX_SDHC_FREQSEL_110M_80M; + } else { + selfreq = XLNX_SDHC_FREQSEL_80M_50M; + } + + reg->phy_ctrl2 |= (selfreq << XLNX_SDHC_PHYREG2_FREQ_SEL_SHIFT); +} + +/** + * @brief + * Disable and configure dll clock + */ +static void xlnx_sdhc_config_dll_clock(volatile struct reg_base *reg, + enum sdhc_clock_speed speed) +{ + /* + * Configure dll based clk if speed is greater than or equal to 50MHZ else configure + * delay chain based clock + */ + reg->phy_ctrl2 &= ~XLNX_SDHC_PHYREG2_DLL_EN_MASK; + if (speed >= SD_CLOCK_50MHZ) { + reg->phy_ctrl2 &= ~XLNX_SDHC_PHYREG2_FREQ_SEL; + reg->phy_ctrl2 &= ~XLNX_SDHC_PHYREG2_TRIM_ICP; + reg->phy_ctrl2 &= ~XLNX_SDHC_PHYREG2_DLYTX_SEL_MASK; + reg->phy_ctrl2 &= ~XLNX_SDHC_PHYREG2_DLYRX_SEL_MASK; + reg->phy_ctrl2 |= (XLNX_SDHC_PHYREG2_TRIM_ICP_DEF_VAL << + XLNX_SDHC_PHYREG2_TRIM_ICP_SHIFT); + xlnx_sdhc_select_dll_feq(reg, speed); + } else { + reg->phy_ctrl2 |= XLNX_SDHC_PHYREG2_DLYTX_SEL_MASK; + reg->phy_ctrl2 |= XLNX_SDHC_PHYREG2_DLYRX_SEL_MASK; + } +} + +/** + * @brief + * Enable dll clock + */ +static int8_t xlnx_sdhc_enable_dll_clock(volatile struct reg_base *reg) +{ + int8_t ret; + + reg->phy_ctrl2 |= XLNX_SDHC_PHYREG2_DLL_EN_MASK; + + /* Wait max 100ms for dll clock to stable */ + ret = xlnx_sdhc_waitl_events((void *)®->phy_ctrl2, 100, + XLNX_SDHC_PHYREG2_DLL_RDY_MASK, XLNX_SDHC_PHYREG2_DLL_RDY_MASK); + if (ret != 0) { + LOG_ERR("Failed to enable dll clock"); + } + + return ret; +} + +/** + * @brief + * Set clock and wait for clock to be stable + */ +static int xlnx_sdhc_set_clock(const struct device *dev, enum sdhc_clock_speed speed) +{ + const struct xlnx_sdhc_config *config = dev->config; + volatile struct reg_base *reg = (struct reg_base *)DEVICE_MMIO_GET(dev); + struct sd_data *dev_data = dev->data; + int ret; + uint16_t value; + + /* Disable clock */ + reg->clock_ctrl = 0; + if (speed == 0U) { + return 0; + } + + /* Get input clock rate */ + ret = clock_control_get_rate(config->clock_dev, NULL, &dev_data->maxclock); + if (ret != 0) { + LOG_ERR("Failed to get clock\n"); + return ret; + } + + /* Calculate clock */ + value = xlnx_sdhc_cal_clock(dev_data->maxclock, speed); + value |= XLNX_SDHC_CC_INT_CLK_EN_MASK; + + /* Configure dll clock */ + if (dev_data->has_phy == true) { + xlnx_sdhc_config_dll_clock(reg, speed); + } + + /* Wait max 150ms for internal clock to be stable */ + reg->clock_ctrl = value; + ret = xlnx_sdhc_waitb_events((void *)®->clock_ctrl, 150, + XLNX_SDHC_CC_INT_CLK_STABLE_MASK, XLNX_SDHC_CC_INT_CLK_STABLE_MASK); + if (ret != 0) { + return ret; + } + + /* Enable div clock */ + reg->clock_ctrl |= XLNX_SDHC_CC_SD_CLK_EN_MASK; + + /* Enable dll clock */ + if ((dev_data->has_phy == true) && (speed >= SD_CLOCK_50MHZ)) { + ret = xlnx_sdhc_enable_dll_clock(reg); + } + + return ret; +} + +/** + * @brief + * Set bus width on the controller + */ +static int8_t xlnx_sdhc_set_buswidth(volatile struct reg_base *reg, + enum sdhc_bus_width width) +{ + switch (width) { + case SDHC_BUS_WIDTH1BIT: + reg->host_ctrl1 &= ~XLNX_SDHC_DAT_WIDTH8_MASK; + reg->host_ctrl1 &= ~XLNX_SDHC_DAT_WIDTH4_MASK; + break; + + case SDHC_BUS_WIDTH4BIT: + reg->host_ctrl1 &= ~XLNX_SDHC_DAT_WIDTH8_MASK; + reg->host_ctrl1 |= XLNX_SDHC_DAT_WIDTH4_MASK; + break; + + case SDHC_BUS_WIDTH8BIT: + reg->host_ctrl1 |= XLNX_SDHC_DAT_WIDTH8_MASK; + break; + + default: + return -EINVAL; + } + + return 0; +} + +/** + * @brief + * Enable or disable power + */ +static void xlnx_sdhc_set_power(const struct device *dev, enum sdhc_power power) +{ + volatile struct reg_base *reg = (struct reg_base *)DEVICE_MMIO_GET(dev); + + if (XLNX_SDHC_SLOT_TYPE(dev) == XLNX_SDHC_EMMC_SLOT) { + if (power == SDHC_POWER_ON) { + reg->power_ctrl &= ~XLNX_SDHC_PC_EMMC_HW_RST_MASK; + reg->power_ctrl |= XLNX_SDHC_PC_BUS_PWR_MASK; + } else { + reg->power_ctrl |= XLNX_SDHC_PC_EMMC_HW_RST_MASK; + reg->power_ctrl &= ~XLNX_SDHC_PC_BUS_PWR_MASK; + } + } else { + if (power == SDHC_POWER_ON) { + reg->power_ctrl |= XLNX_SDHC_PC_BUS_PWR_MASK; + } else { + reg->power_ctrl &= ~XLNX_SDHC_PC_BUS_PWR_MASK; + } + } +} + +/** + * @brief + * Set voltage level and signalling voltage + */ +static int8_t xlnx_sdhc_set_voltage(volatile struct reg_base *reg, enum sd_voltage voltage) +{ + switch (voltage) { + case SD_VOL_3_3_V: + reg->power_ctrl = XLNX_SDHC_PC_BUS_VSEL_3V3; + reg->host_ctrl2 &= ~XLNX_SDHC_HC2_1V8_EN_MASK; + break; + + case SD_VOL_3_0_V: + reg->power_ctrl = XLNX_SDHC_PC_BUS_VSEL_3V0; + reg->host_ctrl2 &= ~XLNX_SDHC_HC2_1V8_EN_MASK; + break; + + case SD_VOL_1_8_V: + reg->host_ctrl2 |= XLNX_SDHC_HC2_1V8_EN_MASK; + break; + + default: + return -EINVAL; + } + + return 0; +} + +/** + * @brief + * Set otap delay based on selected speed mode for SD 3.0 + */ +static void xlnx_sdhc_config_sd_otap_delay(const struct device *dev, + enum sdhc_timing_mode timing) +{ + volatile struct reg_base *reg = (struct reg_base *)DEVICE_MMIO_GET(dev); + uint32_t def_degrees[SDHC_TIMING_HS400 + 1] = XLNX_SDHC_SD_OTAP_DEFAULT_PHASES; + uint32_t degrees = 0, otapdly = 0; + uint8_t tap_max = 0; + + switch (timing) { + case SDHC_TIMING_SDR104: + case SDHC_TIMING_HS200: + tap_max = XLNX_SDHC_SD_200HZ_MAX_OTAP; + break; + + case SDHC_TIMING_DDR50: + case SDHC_TIMING_SDR25: + case SDHC_TIMING_HS: + tap_max = XLNX_SDHC_SD_50HZ_MAX_OTAP; + break; + + case SDHC_TIMING_SDR50: + tap_max = XLNX_SDHC_SD_100HZ_MAX_OTAP; + break; + + default: + return; + } + + if ((timing == SDHC_TIMING_HS) && (XLNX_SDHC_SLOT_TYPE(dev) == XLNX_SDHC_EMMC_SLOT)) { + degrees = def_degrees[XLNX_SDHC_TIMING_MMC_HS]; + } else { + degrees = def_degrees[timing]; + } + + otapdly = (degrees * tap_max) / XLNX_SDHC_MAX_CLK_PHASE; + + /* Set the clock phase */ + reg->otap_dly = otapdly; +} + +/** + * @brief + * Set itap delay based on selected speed mode for SD 3.0 + */ +static void xlnx_sdhc_config_sd_itap_delay(const struct device *dev, + enum sdhc_timing_mode timing) +{ + volatile struct reg_base *reg = (struct reg_base *)DEVICE_MMIO_GET(dev); + uint32_t def_degrees[SDHC_TIMING_HS400 + 1] = XLNX_SDHC_SD_ITAP_DEFAULT_PHASES; + uint32_t degrees = 0, itapdly = 0; + uint8_t tap_max = 0; + + switch (timing) { + case SDHC_TIMING_SDR104: + case SDHC_TIMING_HS200: + tap_max = XLNX_SDHC_SD_200HZ_MAX_ITAP; + break; + + case SDHC_TIMING_DDR50: + case SDHC_TIMING_SDR25: + case SDHC_TIMING_HS: + tap_max = XLNX_SDHC_SD_50HZ_MAX_ITAP; + break; + + case SDHC_TIMING_SDR50: + tap_max = XLNX_SDHC_SD_100HZ_MAX_ITAP; + break; + + default: + return; + } + + if ((timing == SDHC_TIMING_HS) && (XLNX_SDHC_SLOT_TYPE(dev) == XLNX_SDHC_EMMC_SLOT)) { + degrees = def_degrees[XLNX_SDHC_TIMING_MMC_HS]; + } else { + degrees = def_degrees[timing]; + } + + itapdly = (degrees * tap_max) / XLNX_SDHC_MAX_CLK_PHASE; + + /* Set the clock phase */ + if (itapdly != 0U) { + reg->itap_dly = XLNX_SDHC_ITAPCHGWIN; + reg->itap_dly |= XLNX_SDHC_ITAPDLYENA; + reg->itap_dly |= itapdly; + reg->itap_dly &= ~XLNX_SDHC_ITAPCHGWIN; + } +} + +/** + * @brief + * Set otap delay based on selected speed mode for EMMC 5.1 + */ +static void xlnx_sdhc_config_emmc_otap_delay(const struct device *dev, + enum sdhc_timing_mode timing) +{ + volatile struct reg_base *reg = (struct reg_base *)DEVICE_MMIO_GET(dev); + uint32_t def_degrees[SDHC_TIMING_HS400 + 1] = XLNX_SDHC_EMMC_OTAP_DEFAULT_PHASES; + uint32_t degrees = 0, otapdly = 0; + uint8_t tap_max = 0; + + switch (timing) { + case SDHC_TIMING_HS400: + case SDHC_TIMING_HS200: + tap_max = XLNX_SDHC_EMMC_200HZ_MAX_OTAP; + break; + case SDHC_TIMING_HS: + tap_max = XLNX_SDHC_EMMC_50HZ_MAX_OTAP; + break; + default: + return; + } + + if (timing == SDHC_TIMING_HS) { + degrees = def_degrees[XLNX_SDHC_TIMING_MMC_HS]; + } else { + degrees = def_degrees[timing]; + } + + otapdly = (degrees * tap_max) / XLNX_SDHC_MAX_CLK_PHASE; + + /* Set the clock phase */ + if (otapdly != 0U) { + reg->phy_ctrl1 |= XLNX_SDHC_PHYREG1_OTAP_EN_MASK; + reg->phy_ctrl1 &= ~XLNX_SDHC_PHYREG1_OTAP_DLY; + reg->phy_ctrl1 |= otapdly << XLNX_SDHC_PHYREG1_OTAP_DLY_SHIFT; + } +} + +/** + * @brief + * Set itap delay based on selected speed mode for EMMC 5.1 + */ +static void xlnx_sdhc_config_emmc_itap_delay(const struct device *dev, + enum sdhc_timing_mode timing) +{ + volatile struct reg_base *reg = (struct reg_base *)DEVICE_MMIO_GET(dev); + uint32_t def_degrees[SDHC_TIMING_HS400 + 1] = XLNX_SDHC_EMMC_ITAP_DEFAULT_PHASES; + uint32_t degrees = 0, itapdly = 0; + uint8_t tap_max = 0; + + /* Select max tap based on speed mode */ + switch (timing) { + case SDHC_TIMING_HS400: + case SDHC_TIMING_HS200: + /* Strobe select tap point for strb90 and strb180 */ + reg->phy_ctrl1 &= ~XLNX_SDHC_PHYREG1_STROBE_SEL; + if (timing == SDHC_TIMING_HS400) { + reg->phy_ctrl1 |= + (XLNX_SDHC_PHY_STRB_SEL_SIG) << XLNX_SDHC_PHYREG1_STROBE_SEL_SHIFT; + } + break; + case SDHC_TIMING_HS: + tap_max = XLNX_SDHC_EMMC_50HZ_MAX_ITAP; + break; + default: + return; + } + + /* default clock phase based on speed mode */ + if (timing == SDHC_TIMING_HS) { + degrees = def_degrees[XLNX_SDHC_TIMING_MMC_HS]; + } else { + degrees = def_degrees[timing]; + } + + itapdly = (degrees * tap_max) / XLNX_SDHC_MAX_CLK_PHASE; + + /* Set the clock phase */ + if (itapdly != 0U) { + reg->phy_ctrl1 |= XLNX_SDHC_PHYREG1_ITAP_CHGWIN_MASK; + reg->phy_ctrl1 |= XLNX_SDHC_PHYREG1_ITAP_EN_MASK; + reg->phy_ctrl1 &= ~XLNX_SDHC_PHYREG1_ITAP_DLY; + reg->phy_ctrl1 |= itapdly << XLNX_SDHC_PHYREG1_ITAP_DLY_SHIFT; + reg->phy_ctrl1 &= ~XLNX_SDHC_PHYREG1_ITAP_CHGWIN_MASK; + } +} + +/** + * @brief + * Set speed mode and config tap delay + */ +static int8_t xlnx_sdhc_set_timing(const struct device *dev, enum sdhc_timing_mode timing) +{ + volatile struct reg_base *reg = (struct reg_base *)DEVICE_MMIO_GET(dev); + const struct sd_data *dev_data = dev->data; + uint16_t mode = 0; + + switch (timing) { + case SDHC_TIMING_LEGACY: + reg->host_ctrl1 &= ~XLNX_SDHC_HS_SPEED_MODE_EN_MASK; + break; + + case SDHC_TIMING_SDR25: + case SDHC_TIMING_HS: + reg->host_ctrl1 |= XLNX_SDHC_HS_SPEED_MODE_EN_MASK; + break; + + case SDHC_TIMING_SDR12: + mode = XLNX_SDHC_UHS_SPEED_MODE_SDR12; + break; + + case SDHC_TIMING_SDR50: + mode = XLNX_SDHC_UHS_SPEED_MODE_SDR50; + break; + + case SDHC_TIMING_HS200: + case SDHC_TIMING_SDR104: + mode = XLNX_SDHC_UHS_SPEED_MODE_SDR104; + break; + + case SDHC_TIMING_DDR50: + case SDHC_TIMING_DDR52: + mode = XLNX_SDHC_UHS_SPEED_MODE_DDR50; + break; + + case SDHC_TIMING_HS400: + mode = XLNX_SDHC_UHS_SPEED_MODE_DDR200; + break; + + default: + return -EINVAL; + } + + /* Select one of UHS mode */ + if (timing > SDHC_TIMING_HS) { + reg->host_ctrl2 &= ~XLNX_SDHC_HC2_UHS_MODE; + reg->host_ctrl2 |= mode; + } + + /* clock phase delays are different for SD 3.0 and EMMC 5.1 */ + if (dev_data->has_phy == true) { + xlnx_sdhc_config_emmc_otap_delay(dev, timing); + xlnx_sdhc_config_emmc_itap_delay(dev, timing); + } else { + xlnx_sdhc_config_sd_otap_delay(dev, timing); + xlnx_sdhc_config_sd_itap_delay(dev, timing); + } + + return 0; +} + +/** + * @brief + * Set voltage, power, clock, timing, bus width on host controller + */ +static int xlnx_sdhc_set_io(const struct device *dev, struct sdhc_io *ios) +{ + int ret; + struct sd_data *dev_data = dev->data; + struct sdhc_io *host_io = (struct sdhc_io *)&dev_data->host_io; + volatile struct reg_base *reg = (struct reg_base *)DEVICE_MMIO_GET(dev); + + /* Check given clock is valid */ + if ((ios->clock != 0) && ((ios->clock > dev_data->props.f_max) || + (ios->clock < dev_data->props.f_min))) { + LOG_ERR("Invalid clock value"); + return -EINVAL; + } + + /* Set power on or off */ + if (ios->power_mode != host_io->power_mode) { + xlnx_sdhc_set_power(dev, ios->power_mode); + host_io->power_mode = ios->power_mode; + } + + /* Set voltage level */ + if (ios->signal_voltage != host_io->signal_voltage) { + ret = xlnx_sdhc_set_voltage(reg, ios->signal_voltage); + if (ret != 0) { + LOG_ERR("Failed to set voltage level"); + return ret; + } + host_io->signal_voltage = ios->signal_voltage; + } + + /* Set speed mode */ + if (ios->timing != host_io->timing) { + ret = xlnx_sdhc_set_timing(dev, ios->timing); + if (ret != 0) { + LOG_ERR("Failed to set speed mode"); + return ret; + } + host_io->timing = ios->timing; + } + + /* Set clock */ + if (ios->clock != host_io->clock) { + ret = xlnx_sdhc_set_clock(dev, ios->clock); + if (ret != 0) { + LOG_ERR("Failed to set clock"); + return ret; + } + host_io->clock = ios->clock; + } + + /* Set bus width */ + if (ios->bus_width != host_io->bus_width) { + ret = xlnx_sdhc_set_buswidth(reg, ios->bus_width); + if (ret != 0) { + LOG_ERR("Failed to set bus width"); + return ret; + } + host_io->bus_width = ios->bus_width; + } + + return 0; +} + +/** + * @brief + * Perform reset and enable status registers + */ +static int xlnx_sdhc_host_reset(const struct device *dev) +{ + const struct xlnx_sdhc_config *config = dev->config; + volatile struct reg_base *reg = (struct reg_base *)DEVICE_MMIO_GET(dev); + int ret; + + /* Perform software reset */ + reg->sw_reset = XLNX_SDHC_SWRST_ALL_MASK; + /* Wait max 100ms for software reset to complete */ + ret = xlnx_sdhc_waitb_events((void *)®->sw_reset, 100, + XLNX_SDHC_SWRST_ALL_MASK, 0); + if (ret != 0) { + LOG_ERR("Device is busy"); + return -EBUSY; + } + + /* Enable status reg and configure interrupt */ + reg->normal_int_stat_en = XLNX_SDHC_NORM_INTR_ALL; + reg->err_int_stat_en = XLNX_SDHC_ERROR_INTR_ALL; + reg->err_int_signal_en = 0; + + if (config->irq_config_func == NULL) { + reg->normal_int_signal_en = 0; + } else { + /* + * Enable command complete, transfer complete, read buffer ready and error status + * interrupt + */ + reg->normal_int_signal_en = XLNX_SDHC_TXFR_INTR_EN_MASK; + } + + /* Data line time out interval */ + reg->timeout_ctrl = XLNX_SDHC_DAT_LINE_TIMEOUT; + + /* Select ADMA2 */ + reg->host_ctrl1 = XLNX_SDHC_ADMA2_64; + + reg->block_size = XLNX_SDHC_BLK_SIZE_512; + + xlnx_sdhc_clear_intr(reg); + + return ret; +} + +/** + * @brief + * Check for card busy + */ +static int xlnx_sdhc_card_busy(const struct device *dev) +{ + int8_t ret; + volatile struct reg_base *reg = (struct reg_base *)DEVICE_MMIO_GET(dev); + + /* Wait max 2ms for card to send next command */ + ret = xlnx_sdhc_waitl_events((void *)®->present_state, 2, + XLNX_SDHC_CARD_BUSY, 0); + if (ret != 0) { + return 0; + } + + return 1; +} + +/** + * @brief + * Enable tuning clock + */ +static int xlnx_sdhc_card_tuning(const struct device *dev) +{ + struct sd_data *dev_data = dev->data; + const struct sdhc_io *io = &dev_data->host_io; + volatile struct reg_base *reg = (struct reg_base *)DEVICE_MMIO_GET(dev); + struct sdhc_command cmd = {0}; + uint8_t blksize; + uint8_t count; + int ret; + + if ((io->timing == SDHC_TIMING_HS200) || (io->timing == SDHC_TIMING_HS400)) { + cmd.opcode = MMC_SEND_TUNING_BLOCK; + } else { + cmd.opcode = SD_SEND_TUNING_BLOCK; + } + + cmd.response_type = SD_RSP_TYPE_R1; + cmd.timeout_ms = CONFIG_SD_CMD_TIMEOUT; + + blksize = XLNX_SDHC_TUNING_CMD_BLKSIZE; + if (io->bus_width == SDHC_BUS_WIDTH8BIT) { + blksize = XLNX_SDHC_TUNING_CMD_BLKSIZE * 2; + } + + dev_data->transfermode = XLNX_SDHC_TM_DAT_DIR_SEL_MASK; + reg->block_size = blksize; + reg->block_count = XLNX_SDHC_TUNING_CMD_BLKCOUNT; + + /* Execute tuning */ + reg->host_ctrl2 |= XLNX_SDHC_HC2_EXEC_TNG_MASK; + + for (count = 0; count < XLNX_SDHC_MAX_TUNING_COUNT; count++) { + ret = xlnx_sdhc_cmd(dev, &cmd, true); + if (ret != 0) { + return ret; + } + if ((reg->host_ctrl2 & XLNX_SDHC_HC2_EXEC_TNG_MASK) == 0U) { + break; + } + } + + /* Check tuning completed successfully */ + if ((reg->host_ctrl2 & XLNX_SDHC_HC2_SAMP_CLK_SEL_MASK) == 0U) { + return -EINVAL; + } + + dev_data->transfermode = 0; + + return 0; +} + +/** + * @brief + * Perform early system init for SDHC + */ +static int xlnx_sdhc_init(const struct device *dev) +{ + const struct xlnx_sdhc_config *config = dev->config; + struct sd_data *dev_data = dev->data; + + DEVICE_MMIO_MAP(dev, K_MEM_CACHE_NONE); + + if (device_is_ready(config->clock_dev) == 0) { + LOG_ERR("Clock control device not ready"); + return -ENODEV; + } + + if (config->irq_config_func != NULL) { + k_event_init(&dev_data->irq_event); + config->irq_config_func(dev); + } + + return xlnx_sdhc_host_reset(dev); +} + +static const struct sdhc_driver_api xlnx_sdhc_api = { + .reset = xlnx_sdhc_host_reset, + .request = xlnx_sdhc_request, + .set_io = xlnx_sdhc_set_io, + .get_card_present = xlnx_sdhc_card_detect, + .execute_tuning = xlnx_sdhc_card_tuning, + .card_busy = xlnx_sdhc_card_busy, + .get_host_props = xlnx_sdhc_host_props, +}; + +#define XLNX_SDHC_INTR_CONFIG(n) \ + static void xlnx_sdhc_irq_handler##n(const struct device *dev) \ + { \ + volatile struct reg_base *reg = (struct reg_base *)DEVICE_MMIO_GET(dev); \ + struct sd_data *dev_data = dev->data; \ + if ((reg->normal_int_stat & XLNX_SDHC_INTR_CC_MASK) != 0U) { \ + reg->normal_int_stat = XLNX_SDHC_INTR_CC_MASK; \ + k_event_post(&dev_data->irq_event, XLNX_SDHC_INTR_CC_MASK); \ + } \ + if ((reg->normal_int_stat & XLNX_SDHC_INTR_BRR_MASK) != 0U) { \ + reg->normal_int_stat = XLNX_SDHC_INTR_BRR_MASK; \ + k_event_post(&dev_data->irq_event, XLNX_SDHC_INTR_BRR_MASK); \ + } \ + if ((reg->normal_int_stat & XLNX_SDHC_INTR_TC_MASK) != 0U) { \ + reg->normal_int_stat = XLNX_SDHC_INTR_TC_MASK; \ + k_event_post(&dev_data->irq_event, XLNX_SDHC_INTR_TC_MASK); \ + } \ + if ((reg->normal_int_stat & XLNX_SDHC_INTR_ERR_MASK) != 0U) { \ + reg->normal_int_stat = XLNX_SDHC_INTR_ERR_MASK; \ + reg->err_int_stat = XLNX_SDHC_ERROR_INTR_ALL; \ + k_event_post(&dev_data->irq_event, XLNX_SDHC_INTR_ERR_MASK); \ + } \ + } \ + static void xlnx_sdhc_config_intr##n(const struct device *dev) \ + { \ + IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), \ + xlnx_sdhc_irq_handler##n, DEVICE_DT_INST_GET(n), \ + DT_INST_IRQ(n, flags)); \ + irq_enable(DT_INST_IRQN(n)); \ + } +#define XLNX_SDHC_INTR_FUNC_REG(n) .irq_config_func = xlnx_sdhc_config_intr##n, + +#define XLNX_SDHC_INTR_CONFIG_NULL +#define XLNX_SDHC_INTR_FUNC_REG_NULL .irq_config_func = NULL, + +#define XLNX_SDHC_INTR_CONFIG_API(n) COND_CODE_1(DT_INST_NODE_HAS_PROP(n, interrupts), \ + (XLNX_SDHC_INTR_CONFIG(n)), (XLNX_SDHC_INTR_CONFIG_NULL)) + +#define XLNX_SDHC_INTR_FUNC_REG_API(n) COND_CODE_1(DT_INST_NODE_HAS_PROP(n, interrupts), \ + (XLNX_SDHC_INTR_FUNC_REG(n)), (XLNX_SDHC_INTR_FUNC_REG_NULL)) + +#define XLNX_SDHC_INIT(n) \ + XLNX_SDHC_INTR_CONFIG_API(n) \ + const static struct xlnx_sdhc_config xlnx_sdhc_inst_##n = { \ + DEVICE_MMIO_ROM_INIT(DT_DRV_INST(n)), \ + .clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)), \ + XLNX_SDHC_INTR_FUNC_REG_API(n) \ + .broken_cd = DT_INST_PROP_OR(n, broken_cd, 0), \ + .powerdelay = DT_INST_PROP_OR(n, power_delay_ms, 0), \ + .hs200_mode = DT_INST_PROP_OR(n, mmc_hs200_1_8v, 0), \ + .hs400_mode = DT_INST_PROP_OR(n, mmc_hs400_1_8v, 0), \ + }; \ + static struct sd_data data##n; \ + \ + DEVICE_DT_INST_DEFINE(n, xlnx_sdhc_init, NULL, &data##n, \ + &xlnx_sdhc_inst_##n, POST_KERNEL, \ + CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &xlnx_sdhc_api); + +DT_INST_FOREACH_STATUS_OKAY(XLNX_SDHC_INIT) diff --git a/drivers/sdhc/xlnx_sdhc.h b/drivers/sdhc/xlnx_sdhc.h new file mode 100644 index 00000000000..546da1c7f7d --- /dev/null +++ b/drivers/sdhc/xlnx_sdhc.h @@ -0,0 +1,289 @@ +/* + * Copyright (c) 2025 Advanced Micro Devices, Inc. (AMD) + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef __XLNX_SDHC_H__ +#define __XLNX_SDHC_H__ + +/* Bit map for status register */ +#define XLNX_SDHC_INTR_CC_MASK BIT(0) +#define XLNX_SDHC_INTR_TC_MASK BIT(1) +#define XLNX_SDHC_INTR_ERR_MASK BIT(15) +#define XLNX_SDHC_NORM_INTR_ALL 0xFFFFU + +/* Bit map for error register */ +#define XLNX_SDHC_ERROR_INTR_ALL 0xF3FFU + +/* Bit map for ADMA2 attribute */ +#define XLNX_SDHC_DESC_VALID BIT(0) +#define XLNX_SDHC_DESC_END BIT(1) +#define XLNX_SDHC_DESC_TRAN BIT(5) + +/* Bit map and constant values for ADMA2 Configuration */ +#define XLNX_SDHC_ADMA2_64 0x18U +#define XLNX_SDHC_DESC_MAX_LENGTH 65536U + +/* Bit map for present stage register */ +#define XLNX_SDHC_PSR_INHIBIT_DAT_MASK BIT(1) +#define XLNX_SDHC_INTR_BRR_MASK BIT(5) +#define XLNX_SDHC_PSR_CARD_INSRT_MASK BIT(16) +#define XLNX_SDHC_CARD_BUSY 0x1F00000U + +/* Bit map for transfer mode register */ +#define XLNX_SDHC_TM_DMA_EN_MASK BIT(0) +#define XLNX_SDHC_TM_BLK_CNT_EN_MASK BIT(1) +#define XLNX_SDHC_TM_AUTO_CMD12_EN_MASK BIT(2) +#define XLNX_SDHC_TM_DAT_DIR_SEL_MASK BIT(4) +#define XLNX_SDHC_TM_MUL_SIN_BLK_SEL_MASK BIT(5) + +/* Bit map for host control1 register */ +#define XLNX_SDHC_DAT_WIDTH4_MASK BIT(1) +#define XLNX_SDHC_HS_SPEED_MODE_EN_MASK BIT(2) +#define XLNX_SDHC_DAT_WIDTH8_MASK BIT(5) + +/* Bit map for power control register */ +#define XLNX_SDHC_PC_BUS_PWR_MASK BIT(0) +#define XLNX_SDHC_PC_EMMC_HW_RST_MASK BIT(4) +#define XLNX_SDHC_PC_BUS_VSEL_3V3 0x0EU +#define XLNX_SDHC_PC_BUS_VSEL_3V0 0x0CU + +/* Bit map for host control2 register */ +#define XLNX_SDHC_HC2_1V8_EN_MASK BIT(3) +#define XLNX_SDHC_HC2_EXEC_TNG_MASK BIT(6) +#define XLNX_SDHC_HC2_SAMP_CLK_SEL_MASK BIT(7) +#define XLNX_SDHC_UHS_SPEED_MODE_SDR12 0U +#define XLNX_SDHC_UHS_SPEED_MODE_SDR50 2U +#define XLNX_SDHC_UHS_SPEED_MODE_SDR104 3U +#define XLNX_SDHC_UHS_SPEED_MODE_DDR50 4U +#define XLNX_SDHC_UHS_SPEED_MODE_DDR200 5U +#define XLNX_SDHC_HC2_UHS_MODE 7U + +/* Bit map to read host capabilities register */ +#define XLNX_SDHC_1P8_VOL_SUPPORT 26U +#define XLNX_SDHC_3P0_VOL_SUPPORT 25U +#define XLNX_SDHC_3P3_VOL_SUPPORT 24U +#define XLNX_SDHC_3P0_CURRENT_SUPPORT_SHIFT 8U +#define XLNX_SDHC_1P8_CURRENT_SUPPORT_SHIFT 16U +#define XLNX_SDHC_CURRENT_BYTE 0xFFU +#define XLNX_SDHC_SDMA_SUPPORT 22U +#define XLNX_SDHC_HIGH_SPEED_SUPPORT 21U +#define XLNX_SDHC_ADMA2_SUPPORT 19U +#define XLNX_SDHC_MAX_BLK_LEN_SHIFT 16U +#define XLNX_SDHC_MAX_BLK_LEN 3U +#define XLNX_SDHC_DDR50_SUPPORT 34U +#define XLNX_SDHC_SDR104_SUPPORT 33U +#define XLNX_SDHC_SDR50_SUPPORT 32U +#define XLNX_SDHC_SLOT_TYPE_SHIFT 30U +#define XLNX_SDHC_SLOT_TYPE_GET 3U +#define XLNX_SDHC_8BIT_SUPPORT 18U +#define XLNX_SDHC_4BIT_SUPPORT 18U +#define XLNX_SDHC_SDR400_SUPPORT 63U + +/* Bit map for tap delay register */ +#define XLNX_SDHC_ITAPCHGWIN BIT(9) +#define XLNX_SDHC_ITAPDLYENA BIT(8) + +/* Bit map for phy1 register */ +#define XLNX_SDHC_PHYREG1_ITAP_DLY_SHIFT 0x1U +#define XLNX_SDHC_PHYREG1_ITAP_EN_MASK BIT(0) +#define XLNX_SDHC_PHYREG1_STROBE_SEL_SHIFT 16U +#define XLNX_SDHC_PHYREG1_ITAP_CHGWIN_MASK BIT(6) +#define XLNX_SDHC_PHYREG1_OTAP_EN_MASK BIT(8) +#define XLNX_SDHC_PHYREG1_OTAP_DLY_SHIFT 0xCU +#define XLNX_SDHC_PHYREG1_ITAP_DLY 0x3EU +#define XLNX_SDHC_PHY_STRB_SEL_SIG 0x0077U +#define XLNX_SDHC_PHYREG1_OTAP_DLY 0xF000U +#define XLNX_SDHC_PHYREG1_STROBE_SEL 0xFF0000U + +/* Bit map for phy2 register */ +#define XLNX_SDHC_PHYREG2_DLL_EN_MASK BIT(0) +#define XLNX_SDHC_PHYREG2_DLL_RDY_MASK BIT(1) +#define XLNX_SDHC_PHYREG2_FREQ_SEL_SHIFT BIT(2) +#define XLNX_SDHC_PHYREG2_TRIM_ICP_SHIFT BIT(3) +#define XLNX_SDHC_PHYREG2_DLYTX_SEL_MASK BIT(16) +#define XLNX_SDHC_PHYREG2_DLYRX_SEL_MASK BIT(17) +#define XLNX_SDHC_PHYREG2_TRIM_ICP_DEF_VAL 0x8U +#define XLNX_SDHC_PHYREG2_FREQ_SEL 0x70U +#define XLNX_SDHC_PHYREG2_TRIM_ICP 0xF00U + +/* Bit map for software register */ +#define XLNX_SDHC_SWRST_ALL_MASK BIT(0) + +/* Bit map for response types */ +#define RESP_NONE XLNX_SDHC_CMD_RESP_NONE +#define RESP_R1B XLNX_SDHC_CMD_RESP_L48_BSY_CHK | \ + XLNX_SDHC_CMD_CRC_CHK_EN_MASK | \ + XLNX_SDHC_CMD_INX_CHK_EN_MASK +#define RESP_R1 XLNX_SDHC_CMD_RESP_L48_MASK | \ + XLNX_SDHC_CMD_CRC_CHK_EN_MASK | \ + XLNX_SDHC_CMD_INX_CHK_EN_MASK +#define RESP_R2 XLNX_SDHC_CMD_RESP_L136_MASK | \ + XLNX_SDHC_CMD_CRC_CHK_EN_MASK +#define RESP_R3 XLNX_SDHC_CMD_RESP_L48_MASK +#define RESP_R6 XLNX_SDHC_CMD_RESP_L48_BSY_CHK | \ + XLNX_SDHC_CMD_CRC_CHK_EN_MASK | \ + XLNX_SDHC_CMD_INX_CHK_EN_MASK +#define XLNX_SDHC_CMD_RESP_NONE 0x0U +#define XLNX_SDHC_CMD_RESP_L136_MASK BIT(0) +#define XLNX_SDHC_CMD_RESP_L48_MASK BIT(1) +#define XLNX_SDHC_CMD_RESP_L48_BSY_CHK 0x3U +#define XLNX_SDHC_CMD_CRC_CHK_EN_MASK BIT(3) +#define XLNX_SDHC_CMD_INX_CHK_EN_MASK BIT(4) +#define XLNX_SDHC_CMD_RESP_INVAL 0xFFU +#define XLNX_SDHC_OPCODE_SHIFT 0x8U +#define XLNX_SDHC_RESP 0xFU + +/* Bit map to update response type */ +#define XLNX_SDHC_CRC_LEFT_SHIFT 0x8U +#define XLNX_SDHC_CRC_RIGHT_SHIFT 0x18U + +/* Bit map for clock configuration */ +#define XLNX_SDHC_CC_DIV_SHIFT 0x8U +#define XLNX_SDHC_CC_EXT_MAX_DIV_CNT 0x7FEU +#define XLNX_SDHC_CC_SDCLK_FREQ_SEL 0xFFU +#define XLNX_SDHC_CC_SDCLK_FREQ_SEL_EXT 0x3U +#define XLNX_SDHC_CC_EXT_DIV_SHIFT 0x6U +#define XLNX_SDHC_CLOCK_CNT_SHIFT 0x1U + +/* Bit map for enable clock */ +#define XLNX_SDHC_CC_INT_CLK_EN_MASK BIT(0) +#define XLNX_SDHC_CC_INT_CLK_STABLE_MASK BIT(1) +#define XLNX_SDHC_CC_SD_CLK_EN_MASK BIT(2) + +/* Tuning command parameters */ +#define XLNX_SDHC_TUNING_CMD_BLKCOUNT 0x1U +#define XLNX_SDHC_MAX_TUNING_COUNT 0X28U +#define XLNX_SDHC_TUNING_CMD_BLKSIZE 0x40U +#define XLNX_SDHC_BLK_SIZE_512 0x200U + +/* Constant tap delay values and mask */ +#define XLNX_SDHC_SD_OTAP_DEFAULT_PHASES {60, 0, 48, 0, 48, 72, 90, 36, 60, 90, 0} +#define XLNX_SDHC_SD_ITAP_DEFAULT_PHASES {132, 0, 132, 0, 132, 0, 0, 162, 90, 0, 0} +#define XLNX_SDHC_EMMC_OTAP_DEFAULT_PHASES {113, 0, 0, 0, 0, 0, 0, 0, 113, 79, 45} +#define XLNX_SDHC_EMMC_ITAP_DEFAULT_PHASES {0, 0, 0, 0, 0, 0, 0, 0, 39, 0, 0} +#define XLNX_SDHC_TIMING_MMC_HS 0U +#define XLNX_SDHC_CLK_PHASES 2U +#define XLNX_SDHC_ITAP 0 +#define XLNX_SDHC_OTAP 1 +#define XLNX_SDHC_MAX_CLK_PHASE 360U +#define XLNX_SDHC_SD_200HZ_MAX_OTAP 8U +#define XLNX_SDHC_SD_50HZ_MAX_OTAP 30U +#define XLNX_SDHC_SD_100HZ_MAX_OTAP 15U +#define XLNX_SDHC_SD_200HZ_MAX_ITAP 30U +#define XLNX_SDHC_SD_50HZ_MAX_ITAP 120U +#define XLNX_SDHC_SD_100HZ_MAX_ITAP 60U +#define XLNX_SDHC_EMMC_200HZ_MAX_OTAP 32U +#define XLNX_SDHC_EMMC_50HZ_MAX_OTAP 16U +#define XLNX_SDHC_EMMC_50HZ_MAX_ITAP 32U + +/* Constant dll clock frequency select */ +#define XLNX_SDHC_FREQSEL_200M_170M 0x0U +#define XLNX_SDHC_FREQSEL_170M_140M 0x1U +#define XLNX_SDHC_FREQSEL_140M_110M 0x2U +#define XLNX_SDHC_FREQSEL_110M_80M 0x3U +#define XLNX_SDHC_FREQSEL_80M_50M 0x4U +#define XLNX_SDHC_200_FREQ 200U +#define XLNX_SDHC_170_FREQ 170U +#define XLNX_SDHC_140_FREQ 140U +#define XLNX_SDHC_110_FREQ 110U +#define XLNX_SDHC_80_FREQ 80U + +#define XLNX_SDHC_KHZ_TO_MHZ 1000000U + +#define XLNX_SDHC_DAT_PRESENT_SEL_MASK BIT(5) + +#define XLNX_SDHC_TXFR_INTR_EN_MASK 0x8023U +#define XLNX_SDHC_DAT_LINE_TIMEOUT 0xEU + +#define XLNX_SDHC_SD_SLOT 0x0U +#define XLNX_SDHC_EMMC_SLOT 0X1U + +struct reg_base { + volatile uint32_t sdma_sysaddr; /**< SDMA System Address */ + volatile uint16_t block_size; /**< Block Size */ + volatile uint16_t block_count; /**< Block Count */ + volatile uint32_t argument; /**< Argument */ + volatile uint16_t transfer_mode; /**< Transfer Mode */ + volatile uint16_t cmd; /**< Command */ + + volatile uint32_t resp_0; /**< Response Register 0 */ + volatile uint32_t resp_1; /**< Response Register 1 */ + volatile uint32_t resp_2; /**< Response Register 2 */ + volatile uint32_t resp_3; /**< Response Register 3 */ + volatile uint32_t data_port; /**< Buffer Data Port */ + volatile uint32_t present_state; /**< Present State */ + volatile uint8_t host_ctrl1; /**< Host Control 1 */ + volatile uint8_t power_ctrl; /**< Power Control */ + volatile uint8_t block_gap_ctrl; /**< Block Gap Control */ + volatile uint8_t wake_up_ctrl; /**< Wakeup Control */ + volatile uint16_t clock_ctrl; /**< Clock Control */ + volatile uint8_t timeout_ctrl; /**< Timeout Control */ + volatile uint8_t sw_reset; /**< Software Reset */ + volatile uint16_t normal_int_stat; /**< Normal Interrupt Status */ + volatile uint16_t err_int_stat; /**< Error Interrupt Status */ + volatile uint16_t normal_int_stat_en; /**< Normal Interrupt Status Enable */ + volatile uint16_t err_int_stat_en; /**< Error Interrupt Status Enable */ + volatile uint16_t normal_int_signal_en; /**< Normal Interrupt Signal Enable */ + volatile uint16_t err_int_signal_en; /**< Error Interrupt Signal Enable */ + volatile uint16_t auto_cmd_err_stat; /**< Auto CMD Error Status */ + volatile uint16_t host_ctrl2; /**< Host Control 2 */ + volatile uint64_t capabilities; /**< Capabilities */ + + volatile uint64_t max_current_cap; /**< Max Current Capabilities */ + volatile uint16_t force_err_autocmd_stat; /**< Force Event for Auto CMD Error Status*/ + volatile uint16_t force_err_int_stat; /**< Force Event for Error Interrupt Status */ + volatile uint8_t adma_err_stat; /**< ADMA Error Status */ + volatile uint8_t reserved0[3]; + volatile uint64_t adma_sys_addr; /**< ADMA System Address */ + volatile uint16_t preset_val_0; /**< Preset Value 0 */ + volatile uint16_t preset_val_1; /**< Preset Value 1 */ + volatile uint16_t preset_val_2; /**< Preset Value 2 */ + volatile uint16_t preset_val_3; /**< Preset Value 3 */ + volatile uint16_t preset_val_4; /**< Preset Value 4 */ + volatile uint16_t preset_val_5; /**< Preset Value 5 */ + volatile uint16_t preset_val_6; /**< Preset Value 6 */ + volatile uint16_t preset_val_7; /**< Preset Value 7 */ + volatile uint32_t boot_timeout; /**< Boot Timeout */ + volatile uint16_t reserved1[58]; + volatile uint32_t reserved2[5]; + volatile uint16_t slot_intr_stat; /**< Slot Interrupt Status */ + volatile uint16_t host_cntrl_version; /**< Host Controller Version */ + volatile uint32_t reserved4[64]; + volatile uint32_t cq_ver; /**< Command Queue Version */ + volatile uint32_t cq_cap; /**< Command Queue Capabilities */ + volatile uint32_t cq_cfg; /**< Command Queue Configuration */ + volatile uint32_t cq_ctrl; /**< Command Queue Control */ + volatile uint32_t cq_intr_stat; /**< Command Queue Interrupt Status */ + volatile uint32_t cq_intr_stat_en; /**< Command Queue Interrupt Status Enable */ + volatile uint32_t cq_intr_sig_en; /**< Command Queue Interrupt Signal Enable */ + volatile uint32_t cq_intr_coalesc; /**< Command Queue Interrupt Coalescing */ + volatile uint32_t cq_tdlba; /**< Command Queue Task Desc List Base Addr */ + volatile uint32_t cq_tdlba_upr; /**< Command Queue Task Desc List Base Addr Upr */ + volatile uint32_t cq_task_db; /**< Command Queue Task DoorBell */ + volatile uint32_t cq_task_db_notify; /**< Command Queue Task DoorBell Notify */ + volatile uint32_t cq_dev_qstat; /**< Command Queue Device queue status */ + volatile uint32_t cq_dev_pend_task; /**< Command Queue Device pending tasks */ + volatile uint32_t cq_task_clr; /**< Command Queue Task Clr */ + volatile uint32_t reserved6; + volatile uint32_t cq_ssc1; /**< Command Queue Send Status Configuration 1 */ + volatile uint32_t cq_ssc2; /**< Command Queue Send Status Configuration 2 */ + volatile uint32_t cq_crdct; /**< Command response for direct command */ + volatile uint32_t reserved7; + volatile uint32_t cq_rmem; /**< Command response mode error mask */ + volatile uint32_t cq_terri; /**< Command Queue Task Error Information */ + volatile uint32_t cq_cri; /**< Command Queue Command response index */ + volatile uint32_t cq_cra; /**< Command Queue Command response argument */ + volatile uint32_t cq_cerri; /**< Command Queue Command Error Information */ + volatile uint32_t reserved8[3]; + volatile uint32_t phy_ctrl1; /**< Configuring phyctrl */ + volatile uint32_t phy_ctrl2; /**< Configuring phyctrl and DLL */ + volatile uint32_t bist_ctrl; /**< BIST test control */ + volatile uint32_t bist_stat; /**< BIST test status */ + volatile uint32_t hs200_tap; /**< HS200 Tap Delay Select */ + volatile uint32_t reserved3[15261]; + volatile uint32_t itap_dly; /**< Input Tap Delay Select */ + volatile uint32_t otap_dly; /**< Output Tap Delay Select */ +} __packed; +#endif /* __XLNX_SDHC_H__ */ diff --git a/dts/bindings/sdhc/xlnx,sdhc.yaml b/dts/bindings/sdhc/xlnx,sdhc.yaml new file mode 100644 index 00000000000..7451305252f --- /dev/null +++ b/dts/bindings/sdhc/xlnx,sdhc.yaml @@ -0,0 +1,17 @@ +description: Xilinx SD/EMMC host controller + +compatible: "xlnx,versal-8.9a" + +include: [sdhc.yaml] + +properties: + reg: + required: true + + clocks: + required: true + + broken-cd: + type: boolean + description: + There is no card detection available; polling must be used. From bf7e5687c2ffe2574ec2164dca481721ad930199 Mon Sep 17 00:00:00 2001 From: Paul Alvin Date: Fri, 11 Apr 2025 09:16:29 +0000 Subject: [PATCH 0114/2553] dts: Add device tree support for SDHC Add sdhci0(SD) and sdhci1(EMMC) bus node with disk support to DT for Versal NET. Signed-off-by: Paul Alvin --- dts/common/amd/versalnet.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/dts/common/amd/versalnet.dtsi b/dts/common/amd/versalnet.dtsi index e5ab51ad59f..dc2f4c4d50b 100644 --- a/dts/common/amd/versalnet.dtsi +++ b/dts/common/amd/versalnet.dtsi @@ -28,5 +28,28 @@ interrupt-names = "irq_1"; interrupts = ; }; + + sdhci0: mmc@f1040000 { + compatible = "xlnx,versal-8.9a"; + status = "disabled"; + interrupts = ; + reg = <0xf1040000 0x10000>; + sdmmc { + compatible = "zephyr,sdmmc-disk"; + disk-name = "sd0"; + }; + }; + + sdhci1: mmc@f1050000 { + compatible = "xlnx,versal-8.9a"; + status = "disabled"; + reg = <0xf1050000 0x10000>; + interrupts = ; + mmc { + compatible = "zephyr,mmc-disk"; + bus-width = <8>; + disk-name = "mmc0"; + }; + }; }; }; From d85aff2575354efb6b3364b53c930cc6b8815c8b Mon Sep 17 00:00:00 2001 From: Paul Alvin Date: Fri, 11 Apr 2025 09:25:00 +0000 Subject: [PATCH 0115/2553] boards: amd: Enable SDHC DT nodes Enable both sdhci0 and sdhci1 DT node. IP is tested on HW for Versal NET. Signed-off-by: Paul Alvin --- boards/amd/versalnet_rpu/versalnet_rpu.dts | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/boards/amd/versalnet_rpu/versalnet_rpu.dts b/boards/amd/versalnet_rpu/versalnet_rpu.dts index 73d034e20cb..f9ff1722567 100644 --- a/boards/amd/versalnet_rpu/versalnet_rpu.dts +++ b/boards/amd/versalnet_rpu/versalnet_rpu.dts @@ -14,6 +14,12 @@ zephyr,shell-uart = &uart0; zephyr,ocm = &ocm; }; + + sdhci_ref_clk: sdhci-ref-clk { + compatible = "fixed-clock"; + clock-frequency = <200000000>; + #clock-cells = <0>; + }; }; &cpu0 { @@ -42,3 +48,14 @@ current-speed = <115200>; clock-frequency = <100000000>; }; + +&sdhci0 { + status = "okay"; + power-delay-ms = <10>; + clocks = <&sdhci_ref_clk>; +}; + +&sdhci1 { + status = "okay"; + clocks = <&sdhci_ref_clk>; +}; From ec23317813f63c88d8c21c75041b0e8b7ad3f49b Mon Sep 17 00:00:00 2001 From: Paul Alvin Date: Fri, 11 Apr 2025 10:21:15 +0000 Subject: [PATCH 0116/2553] tests: sd: mmc: Add filter for sdhc0 alias Test expect sdhc0 alias to be defined. Signed-off-by: Paul Alvin --- tests/subsys/sd/mmc/testcase.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/subsys/sd/mmc/testcase.yaml b/tests/subsys/sd/mmc/testcase.yaml index 3c201d0f1e4..cc46638d518 100644 --- a/tests/subsys/sd/mmc/testcase.yaml +++ b/tests/subsys/sd/mmc/testcase.yaml @@ -6,7 +6,7 @@ common: tests: sd.mmc: harness: ztest - filter: dt_compat_enabled("zephyr,mmc-disk") + filter: dt_alias_exists("sdhc0") and dt_compat_enabled("zephyr,mmc-disk") tags: sdhc min_ram: 32 integration_platforms: From 87b664e3a2b5bd09189f082217e6332d87867130 Mon Sep 17 00:00:00 2001 From: Paul Alvin Date: Fri, 11 Apr 2025 10:34:27 +0000 Subject: [PATCH 0117/2553] tests: subsys: sd: Add board overlays to support testcase Add SD/EMMC overlay files to support testcases for Versal NET. This overlays are used to select the device to be tested. Signed-off-by: Paul Alvin --- tests/subsys/sd/mmc/boards/versalnet_rpu.overlay | 11 +++++++++++ tests/subsys/sd/sdmmc/boards/versalnet_rpu.overlay | 11 +++++++++++ 2 files changed, 22 insertions(+) create mode 100644 tests/subsys/sd/mmc/boards/versalnet_rpu.overlay create mode 100644 tests/subsys/sd/sdmmc/boards/versalnet_rpu.overlay diff --git a/tests/subsys/sd/mmc/boards/versalnet_rpu.overlay b/tests/subsys/sd/mmc/boards/versalnet_rpu.overlay new file mode 100644 index 00000000000..10aa18645ca --- /dev/null +++ b/tests/subsys/sd/mmc/boards/versalnet_rpu.overlay @@ -0,0 +1,11 @@ +/* + * Copyright (c) 2025 Advanced Micro Devices, Inc. (AMD) + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + aliases { + sdhc0 = &sdhci1; + }; +}; diff --git a/tests/subsys/sd/sdmmc/boards/versalnet_rpu.overlay b/tests/subsys/sd/sdmmc/boards/versalnet_rpu.overlay new file mode 100644 index 00000000000..d4ea0fe275e --- /dev/null +++ b/tests/subsys/sd/sdmmc/boards/versalnet_rpu.overlay @@ -0,0 +1,11 @@ +/* + * Copyright (c) 2025 Advanced Micro Devices, Inc. (AMD) + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + aliases { + sdhc0 = &sdhci0; + }; +}; From 4509d14fb5240a7c7f9c7ab233f9254dc442df9c Mon Sep 17 00:00:00 2001 From: Nirav Agrawal Date: Wed, 12 Mar 2025 16:21:39 +0530 Subject: [PATCH 0118/2553] west: update dependent hal_nxp PR - Current PR is dependent on nxp_hal PR, so updating manifest. Signed-off-by: Nirav Agrawal --- west.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/west.yml b/west.yml index 92a4dbc5e24..4807f1194f4 100644 --- a/west.yml +++ b/west.yml @@ -208,7 +208,7 @@ manifest: groups: - hal - name: hal_nxp - revision: 6b11d190e0092aafec81489d0e7045a3bcf80c60 + revision: 601e1e538abaf9f5985e28531b3b6a2a07e38d2a path: modules/hal/nxp groups: - hal From 49e96fb885808199088fc0e60fce0e8573926f98 Mon Sep 17 00:00:00 2001 From: Nirav Agrawal Date: Wed, 12 Feb 2025 13:20:48 +0530 Subject: [PATCH 0119/2553] drivers: bluetooth: hci: add IW416 BT Controller Support Added IW416 SoC support to enable Bluetooth HCI driver perform firmware load, and works with blueooth HCI interface. Removed cmake file from bt_controller/, added support in hal_nxp module to fetch firmware blobs for iW416/nw612 BT Only FW. Signed-off-by: Nirav Agrawal --- drivers/bluetooth/hci/Kconfig.nxp | 14 ++++++++--- drivers/bluetooth/hci/hci_nxp_setup.c | 7 +++--- .../middleware/bt_controller/CMakeLists.txt | 25 ------------------- .../middleware/bt_controller/src/no_blobs.h | 14 ----------- .../mcux-sdk-ng/middleware/middleware.cmake | 2 -- 5 files changed, 15 insertions(+), 47 deletions(-) delete mode 100644 modules/hal_nxp/mcux/mcux-sdk-ng/middleware/bt_controller/CMakeLists.txt delete mode 100644 modules/hal_nxp/mcux/mcux-sdk-ng/middleware/bt_controller/src/no_blobs.h diff --git a/drivers/bluetooth/hci/Kconfig.nxp b/drivers/bluetooth/hci/Kconfig.nxp index d5f72a0d720..1f6983ee989 100644 --- a/drivers/bluetooth/hci/Kconfig.nxp +++ b/drivers/bluetooth/hci/Kconfig.nxp @@ -1,5 +1,5 @@ # -# Copyright 2023-2024 NXP +# Copyright 2023-2025 NXP # # SPDX-License-Identifier: Apache-2.0 # @@ -80,15 +80,23 @@ choice BT_NXP_MODULE config BT_NXP_NW612 bool "NW612 firmware for NXP IW612 Chipset" help - NXP IW612 Chipset supports Wi-Fi? 802.11a/b/g/n/ac/ax + Bluetooth? 5.3 + NXP IW612 Chipset supports Wi-Fi? 802.11a/b/g/n/ac/ax + Bluetooth? 5.4 BR/EDR/LE + IEEE802.1.5.4 up to 601 Mbps data rate on Wi-Fi? and 2Mbps data rate on Bluetooth?. 4-wire UART@3M baud is supported. PCM for audio is also supported. - Details of the module could be fond on https://www.nxp.com/products/ + Details of the module could be found on https://www.nxp.com/products/ wireless-connectivity/wi-fi-plus-bluetooth-plus-802-15-4/2-4-5-ghz- dual-band-1x1-wi-fi-6-802-11ax-plus-bluetooth-5-4-plus-802-15-4-tri- radio-solution:IW612. +config BT_NXP_IW416 + bool "NXP IW416 Chipset" + help + NXP IW416 Chipset supports Wi-Fi4 + Bluetooth5.2 + Details of the module could be found on https://www.nxp.com/products/ + wireless-connectivity/wi-fi-plus-bluetooth-plus-802-15-4/2-4-5-ghz- + dual-band-1x1-wi-fi-4-802-11n-plus-bluetooth-5-2-solution:IW416. + endchoice # BT_NXP_MODULE endif # BT_H4_NXP_CTLR diff --git a/drivers/bluetooth/hci/hci_nxp_setup.c b/drivers/bluetooth/hci/hci_nxp_setup.c index 6bd0e5d5764..6fa34d0a24e 100644 --- a/drivers/bluetooth/hci/hci_nxp_setup.c +++ b/drivers/bluetooth/hci/hci_nxp_setup.c @@ -1,5 +1,5 @@ /* - * Copyright 2024 NXP + * Copyright 2024-2025 NXP * * SPDX-License-Identifier: Apache-2.0 */ @@ -27,12 +27,13 @@ LOG_MODULE_REGISTER(bt_nxp_ctlr); #include "common/bt_str.h" -#include "bt_nxp_ctlr_fw.h" - #define DT_DRV_COMPAT nxp_bt_hci_uart #define FW_UPLOAD_CHANGE_TIMEOUT_RETRY_COUNT 6 +extern const unsigned char *bt_fw_bin; +extern const unsigned int bt_fw_bin_len; + static const struct device *uart_dev = DEVICE_DT_GET(DT_INST_GPARENT(0)); #if DT_NODE_HAS_PROP(DT_DRV_INST(0), sdio_reset_gpios) diff --git a/modules/hal_nxp/mcux/mcux-sdk-ng/middleware/bt_controller/CMakeLists.txt b/modules/hal_nxp/mcux/mcux-sdk-ng/middleware/bt_controller/CMakeLists.txt deleted file mode 100644 index 9d17f2d353d..00000000000 --- a/modules/hal_nxp/mcux/mcux-sdk-ng/middleware/bt_controller/CMakeLists.txt +++ /dev/null @@ -1,25 +0,0 @@ -# -# Copyright 2024-2025 NXP -# -# SPDX-License-Identifier: Apache-2.0 -# - -set(hal_nxp_dir ${ZEPHYR_HAL_NXP_MODULE_DIR}) -set(hal_nxp_blobs_dir ${hal_nxp_dir}/zephyr/blobs) -set(blob_gen_file ${ZEPHYR_BINARY_DIR}/include/generated/bt_nxp_ctlr_fw.h) - -if(CONFIG_BUILD_ONLY_NO_BLOBS) - set(blob_file src/no_blobs.h) -elseif(CONFIG_BT_NXP_NW612) - set(blob_file ${hal_nxp_blobs_dir}/iw612/uart_nw61x_se.h) -endif() - -if (NOT DEFINED blob_file) - message(FATAL_ERROR "Unsupported controller. Please select a BT conntroller, refer to ./driver/bluetooth/hci/Kconfig.nxp") -endif() - -if(NOT CONFIG_BUILD_ONLY_NO_BLOBS) - zephyr_blobs_verify(FILES ${blob_file} REQUIRED) -endif() - -configure_file(${blob_file} ${blob_gen_file} COPYONLY) diff --git a/modules/hal_nxp/mcux/mcux-sdk-ng/middleware/bt_controller/src/no_blobs.h b/modules/hal_nxp/mcux/mcux-sdk-ng/middleware/bt_controller/src/no_blobs.h deleted file mode 100644 index 361d7420b87..00000000000 --- a/modules/hal_nxp/mcux/mcux-sdk-ng/middleware/bt_controller/src/no_blobs.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * Copyright 2024 NXP - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#ifndef __UART_BT_FW_H__ -#define __UART_BT_FW_H__ - - -const unsigned char *bt_fw_bin; -unsigned int bt_fw_bin_len; - -#endif /* __UART_BT_FW_H__ */ diff --git a/modules/hal_nxp/mcux/mcux-sdk-ng/middleware/middleware.cmake b/modules/hal_nxp/mcux/mcux-sdk-ng/middleware/middleware.cmake index 37b0b479abd..f30bcd65a2d 100644 --- a/modules/hal_nxp/mcux/mcux-sdk-ng/middleware/middleware.cmake +++ b/modules/hal_nxp/mcux/mcux-sdk-ng/middleware/middleware.cmake @@ -39,5 +39,3 @@ endif() add_subdirectory(${MCUX_SDK_NG_DIR}/middleware/usb ${CMAKE_CURRENT_BINARY_DIR}/usb ) - -add_subdirectory_ifdef(CONFIG_BT_H4_NXP_CTLR ${CMAKE_CURRENT_LIST_DIR}/bt_controller) From bef5abd293440a6c76655787f1c43d4ee511ca7e Mon Sep 17 00:00:00 2001 From: Nirav Agrawal Date: Wed, 12 Feb 2025 13:20:50 +0530 Subject: [PATCH 0120/2553] boards: shields: add nxp_m2_wifi_bt shield - Added new shield to add support for WIFI and BT interface. - Added board overlay for MIMXRT1060EVKC. - Removed mimxrt1062 overlay from shell example to avoid conflicts. - Added seperate shield overlay for supported M.2 module to enable BT or WIFI or Both. - Added default kconfigs for each BT and WIFI which enables supported modules and SoC as part of enabled shield through build param. - Added shield document. Signed-off-by: Nirav Agrawal --- boards/nxp/mimxrt1060_evk/doc/index.rst | 12 +++ boards/nxp/mimxrt1060_evk/mimxrt1060_evk.dtsi | 6 +- .../shields/nxp_m2_wifi_bt/Kconfig.defconfig | 91 +++++++++++++++++++ boards/shields/nxp_m2_wifi_bt/Kconfig.shield | 8 ++ .../mimxrt1060_evk_mimxrt1062_qspi_C.overlay | 90 ++++++++++++++++++ boards/shields/nxp_m2_wifi_bt/doc/index.rst | 62 +++++++++++++ .../nxp_m2_wifi_bt/nxp_m2_1xk_wifi_bt.overlay | 37 ++++++++ .../nxp_m2_wifi_bt/nxp_m2_2el_wifi_bt.overlay | 37 ++++++++ .../mimxrt1060_evk_mimxrt1062_qspi.overlay | 22 ----- .../mimxrt1060_evk_mimxrt1062_qspi_C.overlay | 22 ----- 10 files changed, 342 insertions(+), 45 deletions(-) create mode 100644 boards/shields/nxp_m2_wifi_bt/Kconfig.defconfig create mode 100644 boards/shields/nxp_m2_wifi_bt/Kconfig.shield create mode 100644 boards/shields/nxp_m2_wifi_bt/boards/mimxrt1060_evk_mimxrt1062_qspi_C.overlay create mode 100644 boards/shields/nxp_m2_wifi_bt/doc/index.rst create mode 100644 boards/shields/nxp_m2_wifi_bt/nxp_m2_1xk_wifi_bt.overlay create mode 100644 boards/shields/nxp_m2_wifi_bt/nxp_m2_2el_wifi_bt.overlay delete mode 100644 tests/bluetooth/shell/boards/mimxrt1060_evk_mimxrt1062_qspi.overlay delete mode 100644 tests/bluetooth/shell/boards/mimxrt1060_evk_mimxrt1062_qspi_C.overlay diff --git a/boards/nxp/mimxrt1060_evk/doc/index.rst b/boards/nxp/mimxrt1060_evk/doc/index.rst index 3f2265cb6a9..d2a04b18421 100644 --- a/boards/nxp/mimxrt1060_evk/doc/index.rst +++ b/boards/nxp/mimxrt1060_evk/doc/index.rst @@ -137,6 +137,10 @@ The MIMXRT1060 SoC has five pairs of pinmux/gpio controllers. +---------------+-----------------+---------------------------+ | GPIO_AD_B1_01 | LPI2C1_SDA | I2C | +---------------+-----------------+---------------------------+ +| GPIO_AD_B1_04 | LPUART3_CTS | UART BT HCI | ++---------------+-----------------+---------------------------+ +| GPIO_AD_B1_05 | LPUART3_RTS | UART BT HCI | ++---------------+-----------------+---------------------------+ | GPIO_AD_B1_06 | LPUART3_TX | UART BT HCI | +---------------+-----------------+---------------------------+ | GPIO_AD_B1_07 | LPUART3_RX | UART BT HCI | @@ -428,6 +432,14 @@ should see the following message in the terminal: ***** Booting Zephyr OS v1.14.0-rc1 ***** Hello World! mimxrt1060_evk//qspi +Shield for M.2 Wi-Fi and BT Interface +===================================== + +Rev C version is tested with :ref:`nxp_m2_wifi_bt` shield to attach any M.2 module +with BT HCI UART interface and Wi-Fi SDIO interface. The shield binds the required NXP +HCI driver or SDIO driver to perform firmware-load and other setup configurations +for NXP SoC IW416/IW612. + Troubleshooting =============== diff --git a/boards/nxp/mimxrt1060_evk/mimxrt1060_evk.dtsi b/boards/nxp/mimxrt1060_evk/mimxrt1060_evk.dtsi index 2a26160c2a2..c9b7edc5667 100644 --- a/boards/nxp/mimxrt1060_evk/mimxrt1060_evk.dtsi +++ b/boards/nxp/mimxrt1060_evk/mimxrt1060_evk.dtsi @@ -1,5 +1,5 @@ /* - * Copyright 2018,2024 NXP + * Copyright 2018,2024-2025 NXP * * SPDX-License-Identifier: Apache-2.0 */ @@ -308,3 +308,7 @@ arduino_spi: &lpspi1 { dvp_fpc24_i2c: &lpi2c1 {}; dvp_fpc24_interface: &csi {}; + +m2_hci_bt_uart: &lpuart3 {}; + +m2_wifi_sdio: &usdhc1 {}; diff --git a/boards/shields/nxp_m2_wifi_bt/Kconfig.defconfig b/boards/shields/nxp_m2_wifi_bt/Kconfig.defconfig new file mode 100644 index 00000000000..79692b8f2e2 --- /dev/null +++ b/boards/shields/nxp_m2_wifi_bt/Kconfig.defconfig @@ -0,0 +1,91 @@ +# Copyright 2025 NXP +# SPDX-License-Identifier: Apache-2.0 + +if SHIELD_NXP_M2_1XK_WIFI_BT + +if BT + +choice BT_NXP_MODULE + default BT_NXP_IW416 +endchoice + +endif # BT + +if WIFI + +config WIFI_NXP + default y + +choice NXP_WIFI_PART + default NXP_IW416 +endchoice + +choice NXP_IW416_MODULE + default NXP_IW416_MURATA_1XK_M2 +endchoice + +endif # WIFI + +endif # SHIELD_NXP_M2_1XK_WIFI_BT + +if SHIELD_NXP_M2_2EL_WIFI_BT + +if BT + +choice BT_NXP_MODULE + default BT_NXP_NW612 +endchoice + +endif # BT + +if WIFI + +config WIFI_NXP + default y + +choice NXP_WIFI_PART + default NXP_IW61X +endchoice + +choice NXP_IW61X_MODULE + default NXP_IW612_MURATA_2EL_M2 +endchoice + +endif # WIFI + +endif # SHIELD_NXP_M2_2EL_WIFI_BT + +if (BT_NXP_IW416) || (BT_NXP_NW612) || (NXP_IW416) || (NXP_IW61X) + +if BT + +config SYSTEM_WORKQUEUE_STACK_SIZE + default 2048 + +config BT_LONG_WQ_STACK_SIZE + default 2560 + +config MAIN_STACK_SIZE + default 2560 + +if SHELL + +config SHELL_STACK_SIZE + default 4096 + +endif # SHELL + +endif # BT + +if WIFI_NXP + +if SHELL + +config NXP_WIFI_SHELL + default y + +endif # SHELL + +endif # WIFI_NXP + +endif diff --git a/boards/shields/nxp_m2_wifi_bt/Kconfig.shield b/boards/shields/nxp_m2_wifi_bt/Kconfig.shield new file mode 100644 index 00000000000..d61c97955ef --- /dev/null +++ b/boards/shields/nxp_m2_wifi_bt/Kconfig.shield @@ -0,0 +1,8 @@ +# Copyright 2025 NXP +# SPDX-License-Identifier: Apache-2.0 + +config SHIELD_NXP_M2_1XK_WIFI_BT + def_bool $(shields_list_contains,nxp_m2_1xk_wifi_bt) + +config SHIELD_NXP_M2_2EL_WIFI_BT + def_bool $(shields_list_contains,nxp_m2_2el_wifi_bt) diff --git a/boards/shields/nxp_m2_wifi_bt/boards/mimxrt1060_evk_mimxrt1062_qspi_C.overlay b/boards/shields/nxp_m2_wifi_bt/boards/mimxrt1060_evk_mimxrt1062_qspi_C.overlay new file mode 100644 index 00000000000..3c9276102f2 --- /dev/null +++ b/boards/shields/nxp_m2_wifi_bt/boards/mimxrt1060_evk_mimxrt1062_qspi_C.overlay @@ -0,0 +1,90 @@ +/* + * Copyright 2025 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + chosen { + zephyr,uart-pipe = &lpuart1; + }; +}; + +&m2_hci_bt_uart { + /delete-property/ pinctrl-0; + /delete-property/ pinctrl-1; + /delete-property/ pinctrl-2; + /delete-property/ pinctrl-names; + pinctrl-0 = <&pinmux_lpuart3_flow_control>; + pinctrl-1 = <&pinmux_lpuart3_sleep>; + pinctrl-names = "default", "sleep"; + + bt_hci_uart: bt_hci_uart { + m2_bt_module: m2_bt_module { + sdio-reset-gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; + w-disable-gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&m2_wifi_sdio { + /* Use dat3 detection method */ + detect-dat3; + pinctrl-4 = <&pinmux_usdhc1_dat3_nopull>; + pinctrl-names = "default", "slow", "med", "fast", "nopull"; +}; + +&pinctrl { + /* removes pull on dat3 for card detect */ + pinmux_usdhc1_dat3_nopull: pinmux_usdhc1_dat3_nopull { + + group0 { + pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>; + bias-disable; + drive-strength = "r0"; + input-schmitt-enable; + slew-rate = "fast"; + nxp,speed = "100-mhz"; + }; + + group1 { + pinmux = <&iomuxc_gpio_b1_12_gpio2_io28>, + <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>, + <&iomuxc_gpio_sd_b0_02_usdhc1_data0>, + <&iomuxc_gpio_sd_b0_03_usdhc1_data1>, + <&iomuxc_gpio_sd_b0_04_usdhc1_data2>; + drive-strength = "r0"; + input-schmitt-enable; + bias-pull-up; + bias-pull-up-value = "47k"; + slew-rate = "fast"; + nxp,speed = "100-mhz"; + }; + + group2 { + pinmux = <&iomuxc_gpio_b1_14_usdhc1_vselect>; + drive-strength = "r0-4"; + input-schmitt-enable; + bias-pull-up; + bias-pull-up-value = "47k"; + slew-rate = "fast"; + nxp,speed = "100-mhz"; + }; + + group3 { + pinmux = <&iomuxc_gpio_ad_b0_05_gpio1_io05>; + drive-strength = "r0-6"; + slew-rate = "slow"; + nxp,speed = "100-mhz"; + }; + + group4 { + pinmux = <&iomuxc_gpio_sd_b0_05_usdhc1_data3>; + bias-disable; + drive-strength = "r0"; + slew-rate = "fast"; + nxp,speed = "100-mhz"; + input-schmitt-enable; + }; + }; +}; diff --git a/boards/shields/nxp_m2_wifi_bt/doc/index.rst b/boards/shields/nxp_m2_wifi_bt/doc/index.rst new file mode 100644 index 00000000000..eaf57ac01e5 --- /dev/null +++ b/boards/shields/nxp_m2_wifi_bt/doc/index.rst @@ -0,0 +1,62 @@ +.. _nxp_m2_wifi_bt: + +NXP M.2 Wi-Fi and BT Shield +########################### + +Overview +******** + +This Zephyr shield is tested with the following M.2 modules and hardware for Wi-Fi and Bluetooth applications: + +- Embedded Artist 1XK module - uses Murata 1XK radio module with NXP IW416 chipset +- Embedded Artist 2EL module - uses Murata 2EL radio module with NXP IW612 chipset + +More information about supported chipsets, radio modules and M.2 modules can be found in below links, + +- `IW612 NXP Chipset `_ +- `IW416 NXP Chipset `_ +- `2EL Murata Radio Module `_ +- `1XK Murata Radio Module `_ +- `1XK Embedded Artist Module `_ +- `2EL Embedded Artist Module `_ + +Requirements +************ + +To use the shield, below requirements needs to be satisfied. + +- M.2 module with BT HCI UART and SDIO Interface with NXP IW416 or IW612 SoC support. +- Host platform shall have compatible M.2 interface slot. +- For Coex (Wi-Fi + BT), UART driver that supports UART RTS line control to wakeup BT CPU from sleep. +- To use default Bluetooth-Shell app it needs ~490KB flash & ~130KB RAM memory. +- To use default Wi-Fi-Shell app it needs ~1MB flash & ~1.2MB RAM memory. + +Integration Platform +******************** + +This shield works with below host platform, + +- :zephyr:board:`mimxrt1060_evk` Rev-C. + +Programming +*********** + +Below are the supported shields to be used with ``--shield