From b2c764d6672ce286e6695cfb2862c82123f3bfb4 Mon Sep 17 00:00:00 2001 From: Josh DeWitt Date: Thu, 13 Nov 2025 10:14:33 -0600 Subject: [PATCH] [nrf fromtree] soc: nordic: Gate FLASH_0 MPU region on CONFIG_XIP Only include a flash MPU region if CONFIG_XIP is set, similar to arm/core/mpu/arm_mpu_regions.c. Signed-off-by: Josh DeWitt (cherry picked from commit 0dc2e0c38f18f2ea65d03ed493dba9b1f19e5c2f) --- soc/nordic/common/nrf54hx_nrf92x_mpu_regions.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/soc/nordic/common/nrf54hx_nrf92x_mpu_regions.c b/soc/nordic/common/nrf54hx_nrf92x_mpu_regions.c index a9e8b3de7a91..14b63a6481c9 100644 --- a/soc/nordic/common/nrf54hx_nrf92x_mpu_regions.c +++ b/soc/nordic/common/nrf54hx_nrf92x_mpu_regions.c @@ -22,10 +22,12 @@ #define SOFTPERIPH_SIZE DT_REG_SIZE(DT_NODELABEL(softperiph_ram)) static struct arm_mpu_region mpu_regions[] = { +#ifdef CONFIG_XIP MPU_REGION_ENTRY("FLASH_0", CONFIG_FLASH_BASE_ADDRESS, REGION_FLASH_ATTR(CONFIG_FLASH_BASE_ADDRESS, CONFIG_FLASH_SIZE * 1024)), +#endif MPU_REGION_ENTRY("SRAM_0", CONFIG_SRAM_BASE_ADDRESS, REGION_RAM_ATTR(CONFIG_SRAM_BASE_ADDRESS,