QEMU NVMe: cq doorbell write, interrupts

Trigger an interrupt if the completion queue head is updated but there
are still completion entries to be processed.

Signed-off-by: Keith Busch <keith.busch@intel.com>

Conflicts:

	hw/nvme.c

.gitignore

@@ -69,3 +69,4 @@ tags
 TAGS
 *~
 linux-headers/asm
+.project

hw/nvme.c

@@ -46,6 +46,7 @@ static void sq_processing_timer_cb(void *);
 static int nvme_irqcq_empty(NVMEState *, uint32_t);
 static void msix_clr_pending(PCIDevice *, uint32_t);
 
+
 void enqueue_async_event(NVMEState *n, uint8_t event_type, uint8_t event_info,
     uint8_t log_page)
 {
@@ -61,6 +62,17 @@ void enqueue_async_event(NVMEState *n, uint8_t event_type, uint8_t event_info,
             qemu_get_clock_ns(vm_clock) + 20000);
 }
 
+void isr_notify(NVMEState *n, NVMEIOCQueue *cq)
+{
+    if (cq->irq_enabled) {
+        if (msix_enabled(&(n->dev))) {
+            msix_notify(&(n->dev), cq->vector);
+        } else {
+            qemu_irq_pulse(n->dev.irq[0]);
+        }
+    }
+}
+
 /*********************************************************************
     Function     :    process_doorbell
     Description  :    Processing Doorbell and SQ commands
@@ -117,6 +129,11 @@ static void process_doorbell(NVMEState *nvme_dev, target_phys_addr_t addr,
             msix_clr_pending(&nvme_dev->dev, nvme_dev->cq[queue_id].vector);
 
         }
+
+        if (nvme_dev->cq[queue_id].tail != nvme_dev->cq[queue_id].head) {
+            /* more completion entries, submit interrupt */
+            isr_notify(nvme_dev, &nvme_dev->cq[queue_id]);
+        }
     } else {
         /* SQ */
         uint16_t new_tail = val & 0xffff;

hw/nvme.h

@@ -1128,5 +1128,6 @@ void enqueue_async_event(NVMEState *n, uint8_t event_type, uint8_t event_info,
 int random_chance(int chance);
 void post_cq_entry(NVMEState *n, NVMEIOCQueue *cq, NVMECQE* cqe);
 uint8_t is_cq_full(NVMEState *n, uint16_t qid);
+void isr_notify(NVMEState *n, NVMEIOCQueue *cq);
 
 #endif /* NVME_H_ */