dmix is a FPGA-based digital mixer.
List of modules
- output I2S-like but 24bit MSB first format accepted by FA1242
- reset FA1242 chip
- mix multiple 2ch audio streams w/ attenuators
- multiplier IP core emulator
- latch wb signal on posedge
- used to interface modules w/ different clocks
- resample audio stream using polyphase FIR filters
- ringbuf for buffering audio data avoiding jitters
- also serves as a delay line for FIR filters
- polyphase FIR bank for 44.1kHz -> 48.0kHz resampling
- polyphase FIR bank for halfband filter
- decode S/PDIF signal
- sawwave synth for test
- The downstream requests new sample to be output by the upstream by setting pop_i to 1.
- The upstream responds to request by setting ack_o to 1, with the new sample on data_o.
- For modules w/o ack_o, simply assume the data_o returns the valid sample in the immediate next cycle.