OXNAS:Change powerdown core code

olderzeus · Jan 12, 2014 · 709d9ee · 709d9ee
1 parent 11d1d08
commit 709d9ee
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Showing 7 changed files with 63 additions and 84 deletions.
diff --git a/arch/arm/boot/dts/ox820-hmnhdce.dts b/arch/arm/boot/dts/ox820-hmnhdce.dts
@@ -107,7 +107,6 @@
 	};
 	gpio-poweroff {
 		compatible = "gpio-poweroff";
-		gpios = <&GPIOB 11 0>;
-		input = "true";
+		gpios = <&GPIOB 16 1>;
 	};
 };
diff --git a/arch/arm/mach-oxnas/include/mach/utils.h b/arch/arm/mach-oxnas/include/mach/utils.h
@@ -4,8 +4,6 @@
 #include <linux/io.h>
 #include <mach/hardware.h>
 
-extern int gpiob_regbase;
-
 static inline void oxnas_register_clear_mask(void __iomem *p, unsigned mask)
 {
 	u32 val = readl_relaxed(p);

diff --git a/arch/arm/mach-oxnas/mach-ox820.c b/arch/arm/mach-oxnas/mach-ox820.c
@@ -150,80 +150,6 @@ static int __init ox820_ether_init(void)
 	return 0;
 }
 
-static void force_to_low_power(void)
-{
-#ifdef CONFIG_PCI
-printk(KERN_INFO "Powering down PCIe\n");
-	// Ensure the PCIe core clock is running so register accesses work
-	writel((1UL << SYS_CTRL_CLK_PCIEA) |
-		   (1UL << SYS_CTRL_CLK_PCIEB), SYS_CTRL_CLK_SET_CTRL);
-
-	// Put core into reset and PHY into minimum power state
-	writel((1UL << SYS_CTRL_RST_PCIEA) |
-		   (1UL << SYS_CTRL_RST_PCIEB) |
-		   (1UL << SYS_CTRL_RST_PCIEPHY), SYS_CTRL_RST_SET_CTRL);
-
-	// Stop clock
-	writel((1UL << SYS_CTRL_CLK_PCIEA) |
-		   (1UL << SYS_CTRL_CLK_PCIEB), SYS_CTRL_CLK_CLR_CTRL);
-#endif // CONFIG_PCI
-
-	printk(KERN_INFO "Powering down SATA\n");
-	// Ensure the SATA core clock is running so register accesses work
-	writel((1UL << SYS_CTRL_CLK_SATA), SYS_CTRL_CLK_SET_CTRL);
-
-	// Put core into reset and PHY into minimum power state
-	writel((1UL << SYS_CTRL_RST_SATA) |
-		   (1UL << SYS_CTRL_RST_SATA_LINK) |
-		   (1UL << SYS_CTRL_RST_SATA_PHY), SYS_CTRL_RST_SET_CTRL);
-
-	// Stop clock
-	writel((1UL << SYS_CTRL_CLK_SATA), SYS_CTRL_CLK_CLR_CTRL);
-#if defined(CONFIG_USB) || defined(CONFIG_USB_MODULE)
-	printk(KERN_INFO "Powering down USB\n");
-	// Ensure the USB host and device core clocks are running so register accesses work
-	writel((1UL << SYS_CTRL_CLK_USBHS) |
-		   (1UL << SYS_CTRL_CLK_USBDEV), SYS_CTRL_CLK_SET_CTRL);
-
-	// Put PHY into minimum power state
-	writel((1UL << USBHSPHY_SUSPENDM_MANUAL_ENABLE) |
-		   (1UL << USBHSPHY_SUSPENDM_MANUAL_STATE) |
-		   (1UL << USBHSPHY_ATE_ESET), SYS_CTRL_USBHSPHY_CTRL); 
-
-	// Put core into reset
-	writel((1UL << SYS_CTRL_RST_USBHS) |
-		   (1UL << SYS_CTRL_RST_USBHSPHYA) |
-		   (1UL << SYS_CTRL_RST_USBHSPHYB) |
-		   (1UL << SYS_CTRL_RST_USBDEV), SYS_CTRL_RST_SET_CTRL);
-
-	// Stop clock
-	writel((1UL << SYS_CTRL_CLK_USBHS) |
-		   (1UL << SYS_CTRL_CLK_USBDEV), SYS_CTRL_CLK_CLR_CTRL);
-#endif // CONFIG_USB || CONFIG_USB_MODULE
-}
-//#vmalloc : 0xd0800000 - 0xff000000
-//#define VMALLOC_END	         (0xE1000000)
-//#define OXNAS_HW_PA_TO_VA(x) (VMALLOC_END + (x))
-//#define GPIO_B_BASE				OXNAS_HW_PA_TO_VA(0x04100000)
-//#define GPIO_B_BASE                   0xff000000 + 0x4100000
-
-//0x44F00000 0x44100000
-//OXNAS_HW_PA_TO_VA(0x04100000)
-//#define GPIO_B_OUTPUT_CLEAR                   (GPIO_B_BASE + 0x0018)
-//#define GPIO_B_OUTPUT_ENABLE_SET              (GPIO_B_BASE + 0x001C)
-
-static void arch_poweroff(void)
-{
-    int gpio_power_off_mask = 1 << 16;
-    // Put various cores whose drivers are built into the kernel into low power
-    force_to_low_power();
-
-    // now power down completely
-    writel(gpio_power_off_mask, gpiob_regbase + 0x0018);
-    writel(gpio_power_off_mask, gpiob_regbase + 0x001c);
-}
-
-
 static void __init ox820_dt_init(void)
 {
         int ret;
@@ -240,7 +166,6 @@ static void __init ox820_dt_init(void)
         if (ret) {
                 pr_info("ox820_ether_init failed: %d\n", ret);
         }
-	 pm_power_off = arch_poweroff;
 }
 
 static void __init ox820_timer_init(void)

diff --git a/drivers/ata/sata_oxnas.c b/drivers/ata/sata_oxnas.c
@@ -1924,6 +1924,20 @@ static int sata_oxnas_resume(struct platform_device *op)
 }
 #endif
 
+static void sata_oxnas_shutdown(struct platform_device *op)
+{
+	printk(KERN_INFO "Powering down SATA\n");
+	// Ensure the SATA core clock is running so register accesses work
+	writel((1UL << SYS_CTRL_CLK_SATA), SYS_CTRL_CLK_SET_CTRL);
+
+	// Put core into reset and PHY into minimum power state
+	writel((1UL << SYS_CTRL_RST_SATA) |
+		   (1UL << SYS_CTRL_RST_SATA_LINK) |
+		   (1UL << SYS_CTRL_RST_SATA_PHY), SYS_CTRL_RST_SET_CTRL);
+
+	// Stop clock
+	writel((1UL << SYS_CTRL_CLK_SATA), SYS_CTRL_CLK_CLR_CTRL);
+}
 
 
 static struct of_device_id oxnas_sata_match[] = {
@@ -1943,6 +1957,7 @@ static struct platform_driver oxnas_sata_driver = {
 	},
 	.probe		= sata_oxnas_probe,
 	.remove		= sata_oxnas_remove,
+	.shutdown	= sata_oxnas_shutdown,
 #ifdef CONFIG_PM
 	.suspend	= sata_oxnas_suspend,
 	.resume		= sata_oxnas_resume,

diff --git a/drivers/pci/host/pcie-oxnas.c b/drivers/pci/host/pcie-oxnas.c
@@ -654,6 +654,23 @@ static int __init oxnas_pcie_probe(struct platform_device *pdev)
 	return ret;
 }
 
+static void oxnas_pcie_shutdown(struct platform_device *op)
+{
+	printk(KERN_INFO "Powering down PCIe\n");
+	// Ensure the PCIe core clock is running so register accesses work
+	writel((1UL << SYS_CTRL_CLK_PCIEA) |
+		   (1UL << SYS_CTRL_CLK_PCIEB), SYS_CTRL_CLK_SET_CTRL);
+
+	// Put core into reset and PHY into minimum power state
+	writel((1UL << SYS_CTRL_RST_PCIEA) |
+		   (1UL << SYS_CTRL_RST_PCIEB) |
+		   (1UL << SYS_CTRL_RST_PCIEPHY), SYS_CTRL_RST_SET_CTRL);
+
+	// Stop clock
+	writel((1UL << SYS_CTRL_CLK_PCIEA) |
+		   (1UL << SYS_CTRL_CLK_PCIEB), SYS_CTRL_CLK_CLR_CTRL);
+}
+
 static const struct of_device_id oxnas_pcie_of_match_table[] = {
 	{ .compatible = "plxtech,nas782x-pcie", },
 	{},
@@ -667,6 +684,7 @@ static struct platform_driver oxnas_pcie_driver = {
 		.of_match_table =
 		   of_match_ptr(oxnas_pcie_of_match_table),
 	},
+	.shutdown	= oxnas_pcie_shutdown,
 };
 
 static int __init oxnas_pcie_init(void)

diff --git a/drivers/pinctrl/pinctrl-oxnas.c b/drivers/pinctrl/pinctrl-oxnas.c
@@ -1404,10 +1404,6 @@ static int oxnas_gpio_probe(struct platform_device *pdev)
 	oxnas_gpio_of_irq_setup(np, oxnas_chip, irq);
 
 	dev_info(&pdev->dev, "at address %p\n", oxnas_chip->regbase);
-	if (alias_idx == 1) {
-		gpiob_regbase = oxnas_chip->regbase;
-	}
-
 	return 0;
 err:
 	dev_err(&pdev->dev, "Failure %i for GPIO %i\n", ret, alias_idx);

diff --git a/drivers/usb/host/ehci-oxnas.c b/drivers/usb/host/ehci-oxnas.c
@@ -270,6 +270,33 @@ static int ehci_oxnas_drv_remove(struct platform_device *pdev)
 	return 0;
 }
 
+static void oxnas_ehci_shutdown(struct platform_device *op)
+{
+	printk(KERN_INFO "Powering down USB\n");
+
+	usb_hcd_platform_shutdown(op);
+
+	// Ensure the USB host and device core clocks are running so register accesses work
+	writel((1UL << SYS_CTRL_CLK_USBHS) |
+		   (1UL << SYS_CTRL_CLK_USBDEV), SYS_CTRL_CLK_SET_CTRL);
+
+	// Put PHY into minimum power state
+	writel((1UL << USBHSPHY_SUSPENDM_MANUAL_ENABLE) |
+		   (1UL << USBHSPHY_SUSPENDM_MANUAL_STATE) |
+		   (1UL << USBHSPHY_ATE_ESET), SYS_CTRL_USBHSPHY_CTRL); 
+
+	// Put core into reset
+	writel((1UL << SYS_CTRL_RST_USBHS) |
+		   (1UL << SYS_CTRL_RST_USBHSPHYA) |
+		   (1UL << SYS_CTRL_RST_USBHSPHYB) |
+		   (1UL << SYS_CTRL_RST_USBDEV), SYS_CTRL_RST_SET_CTRL);
+
+	// Stop clock
+	writel((1UL << SYS_CTRL_CLK_USBHS) |
+		   (1UL << SYS_CTRL_CLK_USBDEV), SYS_CTRL_CLK_CLR_CTRL);
+}
+
+
 static const struct of_device_id oxnas_ehci_dt_ids[] = {
 	{ .compatible = "plxtch,nas782x-ehci" },
 	{ /* sentinel */ }
@@ -280,7 +307,8 @@ MODULE_DEVICE_TABLE(of, oxnas_ehci_dt_ids);
 static struct platform_driver ehci_oxnas_driver = {
 	.probe		= ehci_oxnas_drv_probe,
 	.remove		= ehci_oxnas_drv_remove,
-	.shutdown	= usb_hcd_platform_shutdown,
+	//.shutdown	= usb_hcd_platform_shutdown,
+	.shutdown	= oxnas_ehci_shutdown,
 	.driver.name	= "oxnas-ehci",
 	.driver.of_match_table	= oxnas_ehci_dt_ids,
 };