diff --git a/edalize/libero.py b/edalize/libero.py index d10660df0..ae6cfbd2f 100644 --- a/edalize/libero.py +++ b/edalize/libero.py @@ -157,12 +157,15 @@ def src_file_filter(self, f): return file_types[_file_type] + f.name return '' - def tcl_file_filter(self, f): + def tcl_file_filter(self, f, type='tclSource'): file_types = { 'tclSource': 'source ', + 'tclSourcePresynth': 'source ', + 'tclSourcePrepnr': 'source ', + 'tclSourcePrebistream': 'source ', } _file_type = f.file_type.split('-')[0] - if _file_type in file_types: + if _file_type in file_types and _file_type == type: return file_types[_file_type] + f.name return '' diff --git a/edalize/templates/libero/libero-run.tcl.j2 b/edalize/templates/libero/libero-run.tcl.j2 index 4dee6f329..9cd6a4163 100644 --- a/edalize/templates/libero/libero-run.tcl.j2 +++ b/edalize/templates/libero/libero-run.tcl.j2 @@ -4,8 +4,25 @@ source {{op}}{{name}}-project.tcl{{cl}} +# Source user defined TCL scripts +{% for src_file in src_files if src_file|tcl_file_filter('tclSourcePresynth')%} +puts "---------- Executing User pre-synth TCL script: {{src_file|tcl_file_filter('tclSourcePresynth')|replace("source", "")|trim}} ----------" +{{src_file|tcl_file_filter('tclSourcePresynth')}} +{% endfor %} run_tool -name {SYNTHESIZE} + +# Source user defined TCL scripts +{% for src_file in src_files if src_file|tcl_file_filter('tclSourcePrepnr')%} +puts "---------- Executing User pre-pnr TCL script: {{src_file|tcl_file_filter('tclSourcePrepnr')|replace("source", "")|trim}} ----------" +{{src_file|tcl_file_filter('tclSourcePrepnr')}} +{% endfor %} run_tool -name {PLACEROUTE} + +# Source user defined TCL scripts +{% for src_file in src_files if src_file|tcl_file_filter('tclSourcePrebistream')%} +puts "---------- Executing User pre-bitstream TCL script: {{src_file|tcl_file_filter('tclSourcePrebistream')|replace("source", "")|trim}} ----------" +{{src_file|tcl_file_filter('tclSourcePrebistream')}} +{% endfor %} run_tool -name {GENERATEPROGRAMMINGDATA} puts "To program the FPGA and SPI-Flash, run the 'Run PROGRAM Action' and 'Run PROGRAM_SPI_IMAGE Action' tools in the Design Flow menu." diff --git a/tests/edalize_common.py b/tests/edalize_common.py index f9350e3df..249094595 100644 --- a/tests/edalize_common.py +++ b/tests/edalize_common.py @@ -187,6 +187,9 @@ def _setup_backend(name, tool, paramtypes, files, {"name": "ucf_file.ucf", "file_type": "UCF"}, {"name": "user_file", "file_type": "user"}, {"name": "tcl_file.tcl", "file_type": "tclSource"}, + {"name": "tcl_file_presynth.tcl", "file_type": "tclSourcePresynth"}, + {"name": "tcl_file_prepnr.tcl", "file_type": "tclSourcePrepnr"}, + {"name": "tcl_file_prebitstream.tcl", "file_type": "tclSourcePrebistream"}, {"name": "waiver_file.waiver", "file_type": "waiver"}, {"name": "vlog_file.v", "file_type": "verilogSource"}, {"name": "vlog05_file.v", "file_type": "verilogSource-2005"}, diff --git a/tests/test_libero/libero-test-all-run.tcl b/tests/test_libero/libero-test-all-run.tcl index 4976cddd6..d7e96999b 100644 --- a/tests/test_libero/libero-test-all-run.tcl +++ b/tests/test_libero/libero-test-all-run.tcl @@ -4,8 +4,20 @@ source {libero-test-all-project.tcl} +# Source user defined TCL scripts +puts "---------- Executing User pre-synth TCL script: tcl_file_presynth.tcl ----------" +source tcl_file_presynth.tcl run_tool -name {SYNTHESIZE} + +# Source user defined TCL scripts +puts "---------- Executing User pre-pnr TCL script: tcl_file_prepnr.tcl ----------" +source tcl_file_prepnr.tcl run_tool -name {PLACEROUTE} + +# Source user defined TCL scripts +puts "---------- Executing User pre-bitstream TCL script: tcl_file_prebitstream.tcl ----------" +source tcl_file_prebitstream.tcl + run_tool -name {GENERATEPROGRAMMINGDATA} puts "To program the FPGA and SPI-Flash, run the 'Run PROGRAM Action' and 'Run PROGRAM_SPI_IMAGE Action' tools in the Design Flow menu." diff --git a/tests/test_libero/libero-test-run.tcl b/tests/test_libero/libero-test-run.tcl index 4f078f423..c5ee161f8 100644 --- a/tests/test_libero/libero-test-run.tcl +++ b/tests/test_libero/libero-test-run.tcl @@ -4,8 +4,20 @@ source {libero-test-project.tcl} +# Source user defined TCL scripts +puts "---------- Executing User pre-synth TCL script: tcl_file_presynth.tcl ----------" +source tcl_file_presynth.tcl run_tool -name {SYNTHESIZE} + +# Source user defined TCL scripts +puts "---------- Executing User pre-pnr TCL script: tcl_file_prepnr.tcl ----------" +source tcl_file_prepnr.tcl run_tool -name {PLACEROUTE} + +# Source user defined TCL scripts +puts "---------- Executing User pre-bitstream TCL script: tcl_file_prebitstream.tcl ----------" +source tcl_file_prebitstream.tcl + run_tool -name {GENERATEPROGRAMMINGDATA} puts "To program the FPGA and SPI-Flash, run the 'Run PROGRAM Action' and 'Run PROGRAM_SPI_IMAGE Action' tools in the Design Flow menu."