diff --git a/edalize/libero.py b/edalize/libero.py index 0fe0bba80..97a5f3734 100644 --- a/edalize/libero.py +++ b/edalize/libero.py @@ -177,12 +177,15 @@ def src_file_filter(self, f): return file_types[_file_type] + f.name return "" - def tcl_file_filter(self, f): + def tcl_file_filter(self, f, type="tclSource"): file_types = { "tclSource": "source ", + "tclSourcePreSynth": "source ", + "tclSourcePrePnR": "source ", + "tclSourcePreBitstream": "source ", } _file_type = f.file_type.split("-")[0] - if _file_type in file_types: + if _file_type in file_types and _file_type == type: return file_types[_file_type] + f.name return "" diff --git a/edalize/templates/libero/libero-run.tcl.j2 b/edalize/templates/libero/libero-run.tcl.j2 index 4dee6f329..2dbc21bfc 100644 --- a/edalize/templates/libero/libero-run.tcl.j2 +++ b/edalize/templates/libero/libero-run.tcl.j2 @@ -4,8 +4,25 @@ source {{op}}{{name}}-project.tcl{{cl}} +{% for src_file in src_files if src_file|tcl_file_filter('tclSourcePreSynth')%} +# Source user defined TCL scripts +puts "---------- Executing User pre-synth TCL script: {{src_file|tcl_file_filter('tclSourcePreSynth')|replace("source", "")|trim}} ----------" +{{src_file|tcl_file_filter('tclSourcePreSynth')}} +{% endfor %} run_tool -name {SYNTHESIZE} + +{% for src_file in src_files if src_file|tcl_file_filter('tclSourcePrePnR')%} +# Source user defined TCL scripts +puts "---------- Executing User pre-pnr TCL script: {{src_file|tcl_file_filter('tclSourcePrePnR')|replace("source", "")|trim}} ----------" +{{src_file|tcl_file_filter('tclSourcePrePnR')}} +{% endfor %} run_tool -name {PLACEROUTE} + +{% for src_file in src_files if src_file|tcl_file_filter('tclSourcePreBitstream')%} +# Source user defined TCL scripts +puts "---------- Executing User pre-bitstream TCL script: {{src_file|tcl_file_filter('tclSourcePreBitstream')|replace("source", "")|trim}} ----------" +{{src_file|tcl_file_filter('tclSourcePreBitstream')}} +{% endfor %} run_tool -name {GENERATEPROGRAMMINGDATA} puts "To program the FPGA and SPI-Flash, run the 'Run PROGRAM Action' and 'Run PROGRAM_SPI_IMAGE Action' tools in the Design Flow menu." diff --git a/tests/edalize_common.py b/tests/edalize_common.py index b40e3ea53..5838e1c87 100644 --- a/tests/edalize_common.py +++ b/tests/edalize_common.py @@ -204,6 +204,9 @@ def _setup_backend( {"name": "ucf_file.ucf", "file_type": "UCF"}, {"name": "user_file", "file_type": "user"}, {"name": "tcl_file.tcl", "file_type": "tclSource"}, + {"name": "tcl_file_presynth.tcl", "file_type": "tclSourcePreSynth"}, + {"name": "tcl_file_prepnr.tcl", "file_type": "tclSourcePrePnR"}, + {"name": "tcl_file_prebitstream.tcl", "file_type": "tclSourcePreBitstream"}, {"name": "waiver_file.waiver", "file_type": "waiver"}, {"name": "vlog_file.v", "file_type": "verilogSource"}, {"name": "vlog05_file.v", "file_type": "verilogSource-2005"}, diff --git a/tests/test_libero/libero-test-all-run.tcl b/tests/test_libero/libero-test-all-run.tcl index 4976cddd6..fb8f52d8b 100644 --- a/tests/test_libero/libero-test-all-run.tcl +++ b/tests/test_libero/libero-test-all-run.tcl @@ -4,8 +4,19 @@ source {libero-test-all-project.tcl} +# Source user defined TCL scripts +puts "---------- Executing User pre-synth TCL script: tcl_file_presynth.tcl ----------" +source tcl_file_presynth.tcl run_tool -name {SYNTHESIZE} + +# Source user defined TCL scripts +puts "---------- Executing User pre-pnr TCL script: tcl_file_prepnr.tcl ----------" +source tcl_file_prepnr.tcl run_tool -name {PLACEROUTE} + +# Source user defined TCL scripts +puts "---------- Executing User pre-bitstream TCL script: tcl_file_prebitstream.tcl ----------" +source tcl_file_prebitstream.tcl run_tool -name {GENERATEPROGRAMMINGDATA} puts "To program the FPGA and SPI-Flash, run the 'Run PROGRAM Action' and 'Run PROGRAM_SPI_IMAGE Action' tools in the Design Flow menu." diff --git a/tests/test_libero/libero-test-run.tcl b/tests/test_libero/libero-test-run.tcl index 4f078f423..9bdd28fa5 100644 --- a/tests/test_libero/libero-test-run.tcl +++ b/tests/test_libero/libero-test-run.tcl @@ -4,8 +4,19 @@ source {libero-test-project.tcl} +# Source user defined TCL scripts +puts "---------- Executing User pre-synth TCL script: tcl_file_presynth.tcl ----------" +source tcl_file_presynth.tcl run_tool -name {SYNTHESIZE} + +# Source user defined TCL scripts +puts "---------- Executing User pre-pnr TCL script: tcl_file_prepnr.tcl ----------" +source tcl_file_prepnr.tcl run_tool -name {PLACEROUTE} + +# Source user defined TCL scripts +puts "---------- Executing User pre-bitstream TCL script: tcl_file_prebitstream.tcl ----------" +source tcl_file_prebitstream.tcl run_tool -name {GENERATEPROGRAMMINGDATA} puts "To program the FPGA and SPI-Flash, run the 'Run PROGRAM Action' and 'Run PROGRAM_SPI_IMAGE Action' tools in the Design Flow menu."