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4bc042b initial public release v1.50
Patrick Titiano authored
1 /*
2 *
3 * @Component OMAPCONF
4 * @Filename clock44xx.h
5 * @Description OMAP4 Clocks Definitions & Functions
6 * @Author Patrick Titiano (p-titiano@ti.com)
7 * @Date 2011
8 * @Copyright Texas Instruments Incorporated
9 *
10 *
11 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
12 *
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 *
18 * Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 *
21 * Redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the
24 * distribution.
25 *
26 * Neither the name of Texas Instruments Incorporated nor the names of
27 * its contributors may be used to endorse or promote products derived
28 * from this software without specific prior written permission.
29 *
30 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
31 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
32 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
33 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
34 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
35 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
36 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
37 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
38 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
40 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41 *
42 */
43
44
45 #ifndef __CLOCK44XX_H__
46 #define __CLOCK44XX_H__
47
48
49 #define CLOCK44XX_MAX_NAME_LENGTH 22
50
51 typedef enum {
52 OMAP4_SYS_CLK,
53 OMAP4_FUNC_32K_CLK,
54 OMAP4_PER_SYS_GFCLK,
55 OMAP4_CUST_EFUSE_SYS_CLK,
56 OMAP4_STD_EFUSE_SYS_CLK,
57 OMAP4_EMU_SYS_CLK,
58 OMAP4_ABE_DPLL_BYPASS_CLK,
59 OMAP4_ABE_ALWON_32K_CLK,
60 OMAP4_PER_32K_GFCLK,
61 OMAP4_CORE_32K_GFCLK,
62 OMAP4_WKUP_32K_GFCLK,
63 OMAP4_ABE_LP_CLK,
64 OMAP4_L4WKUP_ICLK,
65 OMAP4_WKUP_L4_ICLK1,
66 OMAP4_WKUP_L4_ICLK2,
67 OMAP4_CM1_SYS_CLK,
68 OMAP4_SR_MPU_SYS_CLK,
69 OMAP4_SR_IVA_SYS_CLK,
70 OMAP4_SR_CORE_SYS_CLK,
71 OMAP4_ABE_DSS_SYS_CLK,
72 OMAP4_DSS_ALWON_SYS_CLK,
73 OMAP4_ABE_SYSCLK,
74 OMAP4_DPLL_SYS_REF_CLK,
75 OMAP4_CORE_DPLL_ALWON_CLK,
76 OMAP4_PER_DPLL_ALWON_CLK,
77 OMAP4_IVA_DPLL_ALWON_CLK,
78 OMAP4_MPU_DPLL_ALWON_CLK,
79 OMAP4_L3INIT_DPLL_ALWON_CLK,
80 OMAP4_ABE_DPLL_ALWON_CLK,
81 OMAP4_GPT1_FCLK,
82 OMAP4_GPT2_FCLK,
83 OMAP4_GPT3_FCLK,
84 OMAP4_GPT4_FCLK,
85 OMAP4_GPT9_FCLK,
86 OMAP4_GPT10_FCLK,
87 OMAP4_GPT11_FCLK,
88 OMAP4_GPT12_FCLK,
89 OMAP4_PHY_ROOT_CLK,
90 OMAP4_CORE_DPLL_SCRM_CLK,
91 OMAP4_DLL_X2_CLK,
92 OMAP4_CORE_X2_CLK,
93 OMAP4_CORE_DPLL_EMU_CLK,
94 OMAP4_CORE_GFX_FCLK,
95 OMAP4_96M_ALWON_FCLK,
96 OMAP4_192M_FCLK,
97 OMAP4_PER_DPLL_SCRM_CLK,
98 OMAP4_128M_FCLK,
99 OMAP4_DSS_FCLK,
100 OMAP4_PER_MPU_M3_CLK,
101 OMAP4_PER_DPLL_EMU_CLK,
102 OMAP4_PER_ABE_X1_FCLK,
103 OMAP4_DPLL_ABE_X2_FCLK,
104 OMAP4_CORE_DPLL_HS_CLK,
105 OMAP4_MPU_DPLL_CLK,
106 OMAP4_DSP_ROOT_CLK,
107 OMAP4_IVAHD_ROOT_CLK,
108 OMAP4_INIT_480M_FCLK,
109 OMAP4_INIT_960M_FCLK,
110 OMAP4_CLK_DCO_LDO,
111 OMAP4_UNIPRO1_PHY_FCLK,
112 OMAP4_DLL_CLK,
113 OMAP4_CORE_CLK,
114 OMAP4_CORE_MPU_M3_CLK,
115 OMAP4_L3_ICLK,
116 OMAP4_L4_ROOT_CLK,
117 OMAP4_L4_ICLK,
118 OMAP4_MPU_DPLL_HS_CLK,
119 OMAP4_IVA_DPLL_HS_CLK,
120 OMAP4_IVA_HSD_BYP_CLK,
121 OMAP4_CORE_PHY_HSD_BYP_CLK,
122 OMAP4_USB_DPLL_HS_CLK,
123 OMAP4_PER_DPLL_HS_CLK,
124 OMAP4_PER_HSD_BYP_CLK,
125 OMAP4_24M_FCLK,
126 OMAP4_HSIC_P2_480M_FCLK,
127 OMAP4_HSIC_P1_480M_FCLK,
128 OMAP4_INIT_60M_FCLK,
129 OMAP4_TLL_CH2_FCLK,
130 OMAP4_TLL_CH1_FCLK,
131 OMAP4_TLL_CH0_FCLK,
132 OMAP4_UTMI_ROOT_FCLK,
133 OMAP4_INIT_60M_P2_FCLK,
134 OMAP4_INIT_60M_P1_FCLK,
135 OMAP4_HSIC_P1_FCLK,
136 OMAP4_HSIC_P2_FCLK,
137 OMAP4_XCLK_60M_OTG,
138 OMAP4_XCLK_60M_HSP2,
139 OMAP4_XCLK_60M_HSP1,
140 OMAP4_UTMI_P1_FCLK,
141 OMAP4_UTMI_P2_FCLK,
142 OMAP4_OTG_60M_FCLK,
143 OMAP4_PHY_CLKOUT,
144 OMAP4_PAD_UCLKS,
145 OMAP4_SLIMBUS_UCLKS,
146 OMAP4_ABE_CLK,
147 OMAP4_AESS_FCLK,
148 OMAP4_ABE_ICLK2,
149 OMAP4_ABE_24M_FCLK,
150 OMAP4_PAD_CLKS,
151 OMAP4_SLIMBUS_CLKS,
152 OMAP4_MCBSP1_INT_FCLK,
153 OMAP4_MCBSP2_INT_FCLK,
154 OMAP4_MCBSP3_INT_FCLK,
155 OMAP4_MCASP1_INT_FCLK,
156 OMAP4_DMIC_ABE_INT_FCLK,
157 OMAP4_MCBSP1_FCLK,
158 OMAP4_MCBSP2_FCLK,
159 OMAP4_MCBSP3_FCLK,
160 OMAP4_MCASP1_FCLK,
161 OMAP4_DMIC_ABE_FCLK,
162 OMAP4_ABE_GPT5_FCLK,
163 OMAP4_ABE_GPT6_FCLK,
164 OMAP4_ABE_GPT7_FCLK,
165 OMAP4_ABE_GPT8_FCLK,
166 OMAP4_GFX_L3_ICLK,
167 OMAP4_INSTR_L3_ICLK,
168 OMAP4_DMA_L3_ICLK,
169 OMAP4_DSS_L3_ICLK,
170 OMAP4_EMIF_L3_ICLK,
171 OMAP4_INIT_L3_ICLK,
172 OMAP4_L3_ICLK1,
173 OMAP4_L3_ICLK2,
174 OMAP4_C2C_L3_ICLK,
175 OMAP4_CFG_L4_ICLK,
176 OMAP4_INSTR_L4_ICLK,
177 OMAP4_DMA_L4_ICLK,
178 OMAP4_DSS_L4_ICLK,
179 OMAP4_AO_L4_ICLK,
180 OMAP4_EMIF_L4_ICLK,
181 OMAP4_C2C_L4_ICLK,
182 OMAP4_INIT_L4_ICLK,
183 OMAP4_L4_ICLK2,
184 OMAP4_L4_ICLK1,
185 OMAP4_PER_L4_ICLK,
186 OMAP4_MPU_M3_ISS_CLK,
187 OMAP4_ISS_CLK,
188 OMAP4_MPU_M3_CLK,
189 OMAP4_64M_FCLK,
190 OMAP4_FDIF_FCLK,
191 OMAP4_PER_ABE_NC_FCLK,
192 OMAP4_PER_ABE_24M_FCLK,
193 OMAP4_96M_FCLK,
194 OMAP4_PER_48M_FCLK,
195 OMAP4_48M_FCLK,
196 OMAP4_INIT_48M_FCLK,
197 OMAP4_48MC_FCLK,
198 OMAP4_24MC_FCLK,
199 OMAP4_PER_24MC_FCLK,
200 OMAP4_12M_FCLK,
201 OMAP4_HSI_FCLK,
202 OMAP4_INIT_HSI_FCLK,
203 OMAP4_PER_GFX_FCLK,
204 OMAP4_HSMMC1_FCLK,
205 OMAP4_MMC1_FCLK,
206 OMAP4_HSMMC2_FCLK,
207 OMAP4_MMC2_FCLK,
208 OMAP4_PER_MCBSP4_FCLK,
209 OMAP4_PER_MCBSP4_INT_FCLK,
210 OMAP4_HDMI_PHY_48M_FCLK,
211 OMAP4_INIT_48MC_FCLK,
212 OMAP4_GFX_FCLK,
213 OMAP4_C2C_L3X2_ICLK,
214 OMAP4_PER_96M_FCLK,
215 OMAP4_USIM_FCLK,
216 OMAP4_SECURE_32K_CLK,
217 OMAP4_L3_SECURE_GICLK,
218 OMAP4_L4_SECURE_GICLK,
219 OMAP4_L3_INSTR_GICLK,
220 OMAP4_SLIMBUS_CORE_UCLKS,
221 OMAP4_CORE_BB2D_FCLK,
222 OMAP4_PER_BB2D_FCLK,
223 OMAP4_BB2D_FCLK,
224 OMAP4_UNDEF_CLK,
225 OMAP4_CLOCK_ID_MAX
226 } clock44xx_id;
227
228 double clk44xx_get_system_clock_speed(void);
229 char *clk44xx_get_name(clock44xx_id id, char name[CLOCK44XX_MAX_NAME_LENGTH]);
230 double clk44xx_get_clock_speed(clock44xx_id clk,
231 unsigned short ignore_stop_status);
232
233
234 #endif
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