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[OMAP5432][AUDIT][DPLL][CLKSPEED] DPLL ABE running from 19.2M clock i…

…nstead of 32K

DPLL cascading is no more supported.
OMAP5432ES2.0 as integrated on panda5board does not source DPLL ABE clock from 32K but 19.2M.
Update DPLL ABE golden settings accordingly, as well as AESS and L4_ABE_INTERCONNECT expected clock rates.

Signed-off-by: Patrick Titiano <p-titiano@ti.com>
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commit f309ef8aa533084bcd28ebafdf496a29a9b39168 1 parent 7dcf864
Patrick Titiano authored
18 arch/arm/mach-omap/omap5/dpll/dpll54xx-data-19_2MHz.c
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@@ -744,7 +744,7 @@ dpll54xx_audited_settings dpll54xxes2_PER_golden_settings_19_2MHz_opp_nom = {
.selfreqdco = -1,
.clkdcoldo_rate = -1.0,
/* OMAP5 ONLY */
- .hsdiv_div = {6, 4, -1, 2, -1, -1, -1, -1},
+ .hsdiv_div = {3, 4, -1, 2, -1, -1, -1, -1},
.hsdiv_rate = {256.0, 192.0, -1.0, 384.0, -1.0, -1.0, -1.0, -1.0} };
@@ -805,18 +805,18 @@ dpll54xx_audited_settings dpll54xxes2_ABE_golden_settings_19_2MHz = {
.status = DPLL_STATUS_LOCKED,
.mode = DPLL_LOCK,
.autoidle_mode = DPLL_AUTO_LOW_POWER_STOP,
- .fref = 0.032768,
- .M = 750,
- .N = 0,
- .fdpll = 196.608,
+ .fref = 19.2,
+ .M = 46,
+ .N = 8,
+ .fdpll = 196.267,
.M2 = 1,
- .M2_rate = -1.0,
+ .M2_rate = 98.133,
/* DPLL type A only */
.dcc_en = 0,
- .regm4xen = 1,
- .X2_M2_rate = 196.608,
+ .regm4xen = 0,
+ .X2_M2_rate = 196.267,
.M3 = 1,
- .X2_M3_rate = 196.608,
+ .X2_M3_rate = 196.267,
/* DPLL type B only */
.sd_div = -1,
.selfreqdco = -1,
8 arch/arm/mach-omap/omap5/prcm/module54xx.c
View
@@ -7557,10 +7557,10 @@ void mod5432_init(void)
}
genlist_init(&(mod.mod_opp_list));
opp.name = OPP_LOW;
- opp.rate = 98304;
+ opp.rate = 98133;
genlist_addtail(&(mod.mod_opp_list), (void *) &opp, sizeof(mod_opp));
opp.name = OPP_NOM;
- opp.rate = 196608;
+ opp.rate = 196266;
genlist_addtail(&(mod.mod_opp_list), (void *) &opp, sizeof(mod_opp));
opp.name = OPP_HIGH;
opp.rate = -1;
@@ -7617,10 +7617,10 @@ void mod5432_init(void)
mod.context = NULL;
genlist_init(&(mod.mod_opp_list));
opp.name = OPP_LOW;
- opp.rate = 49152;
+ opp.rate = 49066;
genlist_addtail(&(mod.mod_opp_list), (void *) &opp, sizeof(mod_opp));
opp.name = OPP_NOM;
- opp.rate = 98304;
+ opp.rate = 98133;
genlist_addtail(&(mod.mod_opp_list), (void *) &opp, sizeof(mod_opp));
opp.name = OPP_HIGH;
opp.rate = -1;
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