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commit 40afb007e428af1cbf23732b12c8a9861953b4ff 2 parents 4bc042b + ee037d5
TI OMAPCONF authored
26 CHANGELOG
... ... @@ -1,3 +1,27 @@
  1 +v1.51:
  2 +-------
  3 + - [AUDIT][PERF] fixed empty interrupt statistic when CPU1 is offline
  4 + - [AUDIT][PERF] fixed segmentation fault
  5 + - [OMAP4][OMAP5][OPP] fixed OPP-clock rates incoherency
  6 + - [OMAP4][OMAP5][OPP] highlight disabled modules
  7 + - [OMAP4][OMAP5][OPP] highlight disabled modules
  8 + - [OMAP4][OMAP5][OPP] added debug traces
  9 + - [OMAP4][MODULE] fixed missing arg in debug trace in mod44xx_get_autoidle_mode()
  10 + - [OMAP5][VOLTDM][OPP] use nominal voltage instead of frequencies to detect OPP
  11 + - [OMAP5][VC] added function to retrieve registers of a given VC module
  12 + - [OMAP5][MODULE] fixed incorrect number of arguments in debug trace
  13 + - [OMAP5][MODULE] fixed GPU/IVA/DSP OPP_[NOM-HI] clock rates
  14 + - [STATCOLL] Added --overflow_delay in "trace" module help
  15 + - [STATCOLL] Extended --overflow_delay to -a 2 mode (direct dump on terminal)
  16 + - [STATCOLL] Reset HW IP after a certain number of iterations in -a 1 mode instead of counter checking
  17 + - [STATCOLL] per-counter config, error checking, HW bug handling, overflow handling
  18 + - [STATCOLL] clarified that option is -m MA_MPU_1_2, not MA_MPU_1_2 alone
  19 + - [STATCOLL] 6 counters and better description of counters before first data output
  20 + - [STATCOLL] Add capability to track overflow on 2 thresholds (use twice -o and -t)
  21 + - [STATCOLL] rename trans_qaul to trans_qual in cTools lib
  22 + - [STATCOLL] Missing initiator, error check for -m option and capability to use initiator name
  23 +
  24 +
1 25 v1.50:
2 26 -------
3   - - Initial release.
  27 + - Initial release.
25 README.md
Source Rendered
@@ -13,12 +13,11 @@ ABOUT:
13 13 OMAPCONF is a Linux user-space standalone application designed to provide a
14 14 quick'n easy way to diagnose (monitor/debug/audit...) TI OMAP configuration/status
15 15 dynamically at runtime, in any situation:
16   - - Any Linux distribution (Ubuntu, ...)
17   - - Any Android release (Froyo, GingerBread, HoneyComb,
18   - Ice-Cream Sandwich, Jelly Bean, ...)
19   - - TI official platforms (blaze, panda, ...),
20   - - Custom OMAP platforms, etc.
21   - - With no single kernel recompilation needed
  16 + * Any Linux distribution (Ubuntu, ...)
  17 + * Any Android release (Froyo, GingerBread, HoneyComb, Ice-Cream Sandwich, Jelly Bean, ...)
  18 + * TI official platforms (blaze, panda, ...),
  19 + * Custom OMAP platforms, etc.
  20 + * With no single kernel recompilation needed
22 21
23 22 OMAPCONF leverages "/dev/mem" special device to directly access complete
24 23 TI OMAP memory space (registers, ...).
@@ -41,13 +40,15 @@ Build instructions (Ubuntu):
41 40
42 41 OMAPCONF is available as a Ubuntu package.
43 42 To proceed with package installation type the following:
  43 +
44 44 # sudo apt-get install tiomapconf
45 45
46 46 Once package is installed, you can check which omapconf version you are using:
  47 +
47 48 # dpkg -l tiomapconf
48 49
49 50 Package is available via TI OMAP4 Ubuntu PPA.
50   -See http://www.omappedia.org/wiki/PandaBoard_Ubuntu_PPA for further instructions.
  51 +See [the OMAPpedia page](http://www.omappedia.org/wiki/PandaBoard_Ubuntu_PPA "Your mouse is hovering over this link") for further instructions.
51 52
52 53
53 54
@@ -59,18 +60,20 @@ To only build the output binary file:
59 60 NB: CROSS_COMPILE variable must be set to point to the correct compiler.
60 61
61 62 To build and install ompaconf:
  63 +
62 64 # make CROSS_COMPILE=arm-none-linux-gnueabi- DESTDIR=YOUR_DIR install
63 65
64 66 YOUR_DIR is a destination directory where omapconf output binary file will be
65 67 copied (e.g. ubuntu/android filesystem)
66 68
67   -Thats it!
  69 +That's it!
68 70
69 71
70 72
71 73 Build instructions and installation via ADB (Android):
72 74 ------------------------------------------------------
73 75 Make sure your Android device is connected to host via ADB:
  76 +
74 77 # adb kill-server
75 78 # adb devices
76 79 * daemon not running. starting it now *
@@ -80,7 +83,8 @@ Make sure your Android device is connected to host via ADB:
80 83 # adb root
81 84
82 85 To build and install ompaconf for Android via ADB:
83   -# make CROSS_COMPILE=arm-none-linux-gnueabi- install_android
  86 +
  87 + # make CROSS_COMPILE=arm-none-linux-gnueabi- install_android
84 88
85 89 OMAPCONF binary will be copied to /data directory (known writable directory)
86 90 on your Android device. You may get it copied to a different directory by
@@ -94,5 +98,4 @@ Help:
94 98 Type "./omapconf --help" to get complete list of available commands and options.
95 99 Note that in case of incorrect command/option, help will also be displayed.
96 100
97   -A dedicated wiki page is available here:
98   - https://github.com/omapconf/omapconf/wiki
  101 +A dedicated wiki page is available [here](https://github.com/omapconf/omapconf/wiki "Github Wiki").
6 common/audit.c
@@ -102,9 +102,9 @@ int audit_performances(FILE *stream, unsigned int duration, unsigned int delay)
102 102 unsigned int emif_delta_cycles,
103 103 emif_delta_busy_cycles;
104 104 double emif_load;
105   - uint64_t *time_in_opp_t0;
106   - uint64_t *time_in_opp_t1;
107   - uint64_t *time_in_opp_cnt;
  105 + uint64_t *time_in_opp_t0 = NULL;
  106 + uint64_t *time_in_opp_t1 = NULL;
  107 + uint64_t *time_in_opp_cnt = NULL;
108 108 uint64_t total_trans_t0, total_trans_t1, total_trans_cnt;
109 109 unsigned int i;
110 110 uint64_t sec, msec, usec, active_c0_time;
20 common/cpuinfo.c
@@ -1116,6 +1116,26 @@ double cpu_load_get(unsigned int delta_idle,
1116 1116 return load;
1117 1117 }
1118 1118
  1119 +/* ------------------------------------------------------------------------*//**
  1120 + * @FUNCTION cpu_online_cores_count_get
  1121 + * @BRIEF return the number of CPU cores online
  1122 + * @RETURNS number of CPU cores online
  1123 + * @param[in] none
  1124 + * @DESCRIPTION return the number of CPU cores online
  1125 + *//*------------------------------------------------------------------------ */
  1126 +unsigned int cpu_online_cores_count_get(void)
  1127 +{
  1128 + unsigned int i, cpu_total_count, cpu_online_count;
  1129 +
  1130 + cpu_total_count = cpu_cores_count_get();
  1131 + cpu_online_count = 0;
  1132 + for (i = 0; i < cpu_total_count; i ++) {
  1133 + if (cpu_is_online(i) == 1)
  1134 + cpu_online_count ++;
  1135 + }
  1136 +
  1137 + return cpu_online_count;
  1138 +}
1119 1139
1120 1140 /* ------------------------------------------------------------------------*//**
1121 1141 * @FUNCTION cpu_cores_count_get
1  common/cpuinfo.h
@@ -135,6 +135,7 @@ char *cpu_gets(char s[CPU_NAME_MAX_LENGTH]);
135 135 char *cpu_full_name_get(char s[CPU_FULL_NAME_MAX_LENGTH]);
136 136
137 137 unsigned int cpu_cores_count_get(void);
  138 +unsigned int cpu_online_cores_count_get(void);
138 139
139 140 unsigned int cpu_is_online(unsigned short cpu);
140 141 int cpu_proc_stats_get(unsigned int cpu,
6 linux/interrupts.c
@@ -146,7 +146,7 @@ int irq_total_count_get(FILE *fp)
146 146 char irq_ctrl_name[256], dev_name[256];
147 147 int ret;
148 148
149   - cpu_count = cpu_cores_count_get();
  149 + cpu_count = cpu_online_cores_count_get();
150 150 if (cpu_count == 0) {
151 151 fprintf(stderr, "%s(): cpu_count == 0!\n", __func__);
152 152 return IRQ_ERR_CPU;
@@ -244,7 +244,7 @@ int irq_count_get(unsigned int n, FILE *fp)
244 244 char irq_ctrl_name[256], dev_name[256];
245 245 int ret;
246 246
247   - cpu_count = cpu_cores_count_get();
  247 + cpu_count = cpu_online_cores_count_get();
248 248 if (cpu_count == 0) {
249 249 fprintf(stderr, "%s(): cpu_count == 0!\n", __func__);
250 250 return IRQ_ERR_CPU;
@@ -360,7 +360,7 @@ char *irq_dev_name_get(unsigned int n, FILE *fp, char name[256])
360 360 int ret;
361 361
362 362 dprintf("%s(): looking for irq #%u name ...\n", __func__, n);
363   - cpu_count = cpu_cores_count_get();
  363 + cpu_count = cpu_online_cores_count_get();
364 364 if (cpu_count == 0) {
365 365 fprintf(stderr, "%s(): cpu_count == 0!\n", __func__);
366 366 return NULL;
1  omap4/module44xx.c
@@ -552,6 +552,7 @@ int mod44xx_get_autoidle_mode(mod44xx_id module_id,
552 552 extract_bit(sysconfig, 9);
553 553 ret_val = 1;
554 554 dprintf("%s(): module %s AUTOIDLE bit 9 = %d\n",
  555 + __func__,
555 556 mod44xx_get_name(module_id, name),
556 557 *mode);
557 558 break;
542 omap4/voltdm44xx.c
@@ -67,6 +67,9 @@
67 67 #endif
68 68
69 69
  70 +#define OPP_MAX_RETRY 100
  71 +
  72 +
70 73 const char
71 74 voltdm44xx_name_table[OMAP4_VD_ID_MAX][VOLTDM44XX_MAX_NAME_LENGTH] = {
72 75 "LDO_WKUP",
@@ -277,6 +280,9 @@ double voltdm44xx_nominal_voltage_get(voltdm44xx_id id, opp44xx_id opp)
277 280 #undef dprintf
278 281 #define dprintf(format, ...) printf(format, ## __VA_ARGS__)
279 282 #endif
  283 +#else
  284 +#undef dprintf
  285 +#define dprintf(format, ...)
280 286 #endif
281 287 /* ------------------------------------------------------------------------*//**
282 288 * @FUNCTION voltdm44xx_get_opp
@@ -299,7 +305,7 @@ int voltdm44xx_get_opp(voltdm44xx_id id, opp44xx_id *opp)
299 305 double gfx_speed_curr = 0.0, gfx_speed_por = 0.0;
300 306 omap4_dpll_params dpll_params;
301 307 dpll44xx_id dpll_id;
302   - #if (defined OMAP4CONF_GET_OPP_DEBUG || defined VOLTDM44XX_DEBUG)
  308 + #ifdef OMAP4CONF_GET_OPP_DEBUG
303 309 char mname[MOD44XX_MAX_NAME_LENGTH];
304 310 char cname[CLOCK44XX_MAX_NAME_LENGTH];
305 311 char vname[VOLTDM44XX_MAX_NAME_LENGTH];
@@ -361,8 +367,7 @@ int voltdm44xx_get_opp(voltdm44xx_id id, opp44xx_id *opp)
361 367 dprintf("%s(): %s speed is %lfMHz\n", __func__,
362 368 clk44xx_get_name(clk_id, cname), speed_curr);
363 369 for (opp_id = 0; opp_id < OPP44XX_ID_MAX; opp_id++) {
364   - #if (defined OMAP4CONF_GET_OPP_DEBUG || \
365   - defined VOLTDM44XX_DEBUG)
  370 + #ifdef OMAP4CONF_GET_OPP_DEBUG
366 371 voltdm44xx_opp2string(s_opp, opp_id, id);
367 372 #endif
368 373
@@ -409,10 +414,8 @@ int voltdm44xx_get_opp(voltdm44xx_id id, opp44xx_id *opp)
409 414
410 415 if ((int) gfx_speed_curr == (int) gfx_speed_por) {
411 416 opp_id = OMAP447X_OPP119_LOW;
412   - #if (defined OMAP4CONF_GET_OPP_DEBUG ||\
413   - defined VOLTDM44XX_DEBUG)
414   - voltdm44xx_opp2string(s_opp, opp_id,
415   - id);
  417 + #ifdef OMAP4CONF_GET_OPP_DEBUG
  418 + voltdm44xx_opp2string(s_opp, opp_id, id);
416 419 #endif
417 420 dprintf("%s(): GFX POR Speed == OPP119_LOW "
418 421 "POR Speed\n", __func__);
@@ -437,6 +440,9 @@ int voltdm44xx_get_opp(voltdm44xx_id id, opp44xx_id *opp)
437 440 #undef dprintf
438 441 #define dprintf(format, ...)
439 442 #endif
  443 +#else
  444 +#undef dprintf
  445 +#define dprintf(format, ...) printf(format, ## __VA_ARGS__)
440 446 #endif
441 447
442 448
@@ -760,174 +766,418 @@ int voltdm44xx_get_voltage_by_type(voltdm44xx_id id,
760 766 }
761 767
762 768
  769 +/* #define OMAP4CONF_OPP_SHOW_DEBUG */
  770 +#ifndef VOLTDM44XX_DEBUG
  771 +#ifdef OMAP4CONF_OPP_SHOW_DEBUG
  772 +#undef dprintf
  773 +#define dprintf(format, ...) printf(format, ## __VA_ARGS__)
  774 +#endif
  775 +#else
  776 +#undef dprintf
  777 +#define dprintf(format, ...)
  778 +#endif
763 779 /* ------------------------------------------------------------------------*//**
764 780 * @FUNCTION voltdm44xx_opp_show
765   - * @BRIEF show OPerating Point (OPP, voltage + frequency)
  781 + * @BRIEF show OPerating Point (OPP, voltage + key clock rates)
766 782 * of a given voltage domain.
767 783 * @RETURNS 0 in case of success
768 784 * OMAPCONF_ERR_CPU
769 785 * OMAPCONF_ERR_REG_ACCESS
770 786 * @param[in] none
771   - * @DESCRIPTION show OPerating Point (OPP, voltage + frequency)
  787 + * @DESCRIPTION show OPerating Point (OPP, voltage + key clock rates)
772 788 * of a given voltage domain.
773 789 *//*------------------------------------------------------------------------ */
774 790 int voltdm44xx_opp_show(void)
775 791 {
776   - opp44xx_id current_opp[OMAP4_VD_ID_MAX] = {
777   - OPP44XX_ID_MAX, OPP44XX_ID_MAX, OPP44XX_ID_MAX, OPP44XX_ID_MAX};
778   - char s_opp_mpu[OPP44XX_MAX_NAME_LENGTH] = "UNKNOWN";
779   - char s_opp_ivahd[OPP44XX_MAX_NAME_LENGTH] = "UNKNOWN";
780   - char s_opp_core[OPP44XX_MAX_NAME_LENGTH] = "UNKNOWN";
  792 + voltdm44xx_id vdd_id;
  793 + double volt, volt2;
  794 + char vdd_name[VOLTDM44XX_MAX_NAME_LENGTH];
  795 + opp44xx_id opp, opp2;
  796 + int temp;
  797 + mod_module_mode mmode;
  798 + double rate_mpu, rate_mpu_por;
  799 + double rate_dsp, rate_iva, rate_aess;
  800 + double rate_dsp_por, rate_iva_por, rate_aess_por;
  801 + double rate_l3, rate_l3_por;
  802 + double rate_l4, rate_emif, rate_lpddr2, rate_iss,
  803 + rate_fdif, rate_m3, rate_dss, rate_bb2d, rate_hsi, rate_gfx;
781 804 char table[TABLE_MAX_ROW][TABLE_MAX_COL][TABLE_MAX_ELT_LEN];
782 805 unsigned int row = 0;
783   - int ret = 0;
784   - double volt;
785   - char prev_gov[CPUFREQ_GOV_MAX_NAME_LENGTH],
786   - prev_gov2[CPUFREQ_GOV_MAX_NAME_LENGTH];
  806 + unsigned int retry_cnt = 0;
  807 + unsigned int found = 0;
  808 + int ret, ret_volt, ret_opp;
787 809
788 810 CHECK_CPU(44xx, OMAPCONF_ERR_CPU);
789 811
790   - /* Switch to userspace governor temporarily,
791   - * so that OPP cannot change during audit and does not false it.
  812 + autoadjust_table_init(table);
  813 + row = 0;
  814 + strncpy(table[row][1], "Temperature", TABLE_MAX_ELT_LEN);
  815 + strncpy(table[row][2], "Voltage", TABLE_MAX_ELT_LEN);
  816 + strncpy(table[row][3], "Frequency", TABLE_MAX_ELT_LEN);
  817 + strncpy(table[row][4], "OPerating Point", TABLE_MAX_ELT_LEN);
  818 + row++;
  819 +
  820 + /*
  821 + * In order to make sure all details (OPP, voltage, clock rates) are
  822 + * coherent (due to potential OPP change in between), must use a loop,
  823 + * checking that OPP and voltage did not change and that at least ONE
  824 + * clock rate is aligned to expected rate for the detected OPP.
792 825 */
793   - cpufreq_scaling_governor_set("userspace", prev_gov);
  826 + dprintf("%s():\n", __func__);
  827 + for (vdd_id = OMAP4_VDD_MPU; vdd_id <= OMAP4_VDD_CORE; vdd_id++) {
  828 + snprintf(table[row][0], TABLE_MAX_ELT_LEN, "%s / VDD_CORE%u",
  829 + voltdm44xx_get_name(vdd_id, vdd_name),
  830 + (unsigned int) vdd_id);
  831 + dprintf(" %s:\n", voltdm44xx_get_name(vdd_id, vdd_name));
  832 +
  833 + /* Retrieve OPP and clock rates */
  834 + retry_cnt = 0;
  835 + found = 0;
  836 + do {
  837 + dprintf(" TRY #%u:\n", retry_cnt);
  838 +
  839 + ret_opp = voltdm44xx_get_opp(vdd_id, &opp);
  840 + dprintf(" OPP detected: %s (ret_opp=%d)\n",
  841 + opp44xx_name_get(opp, vdd_id), ret_opp);
  842 + ret_volt = voltdm44xx_get_voltage(vdd_id, &volt);
  843 + dprintf(" Voltage: %lfV (ret_opp=%d)\n",
  844 + volt, ret_volt);
  845 +
  846 + switch (vdd_id) {
  847 + case OMAP4_VDD_MPU:
  848 + rate_mpu = clk44xx_get_clock_speed(
  849 + OMAP4_MPU_DPLL_CLK, 0);
  850 + ret = mod44xx_get_por_clk_speed(
  851 + OMAP4_MPU, opp, &rate_mpu_por);
  852 + dprintf(
  853 + " MPU Rate: %.3lfMHz, POR Rate: %.3lfMHz (ret=%d)\n",
  854 + rate_mpu, rate_mpu_por, ret);
  855 + break;
  856 +
  857 + case OMAP4_VDD_IVA:
  858 + rate_dsp = clk44xx_get_clock_speed(
  859 + OMAP4_DSP_ROOT_CLK, 1);
  860 + rate_iva = clk44xx_get_clock_speed(
  861 + OMAP4_IVAHD_ROOT_CLK, 1);
  862 + rate_aess = clk44xx_get_clock_speed(
  863 + OMAP4_AESS_FCLK, 1);
  864 +
  865 + ret = mod44xx_get_por_clk_speed(
  866 + OMAP4_DSP, opp, &rate_dsp_por);
  867 + ret += mod44xx_get_por_clk_speed(
  868 + OMAP4_IVAHD, opp, &rate_iva_por);
  869 + ret += mod44xx_get_por_clk_speed(
  870 + OMAP4_AESS, opp, &rate_aess_por);
  871 + dprintf(
  872 + " DSP Rate: %.3lfMHz, POR Rate: %.3lfMHz (ret=%d)\n",
  873 + rate_dsp, rate_dsp_por, ret);
  874 + dprintf(
  875 + " IVAHD Rate: %.3lfMHz, POR Rate: %.3lfMHz (ret=%d)\n",
  876 + rate_iva, rate_iva_por, ret);
  877 + dprintf(
  878 + " AESS Rate: %.3lfMHz, POR Rate: %.3lfMHz (ret=%d)\n",
  879 + rate_aess, rate_aess_por, ret);
  880 + break;
  881 +
  882 + case OMAP4_VDD_CORE:
  883 + rate_l3 = clk44xx_get_clock_speed(
  884 + OMAP4_L3_ICLK, 1);
  885 + ret = mod44xx_get_por_clk_speed(
  886 + OMAP4_L3_1, opp, &rate_l3_por);
  887 + dprintf(
  888 + " L3_1 Rate: %.3lfMHz, POR Rate: %.3lfMHz (ret=%d)\n",
  889 + rate_l3, rate_l3_por, ret);
  890 +
  891 + rate_emif = clk44xx_get_clock_speed(
  892 + OMAP4_EMIF_L3_ICLK, 1);
  893 + rate_lpddr2 = clk44xx_get_clock_speed(
  894 + OMAP4_PHY_ROOT_CLK, 1) / 2;
  895 + rate_l4 = clk44xx_get_clock_speed(
  896 + OMAP4_L4_ICLK, 1);
  897 + rate_gfx = clk44xx_get_clock_speed(
  898 + OMAP4_GFX_FCLK, 1);
  899 + rate_fdif = clk44xx_get_clock_speed(
  900 + OMAP4_FDIF_FCLK, 1);
  901 + rate_m3 = clk44xx_get_clock_speed(
  902 + OMAP4_MPU_M3_CLK, 1) / 2;
  903 + rate_iss = clk44xx_get_clock_speed(
  904 + OMAP4_ISS_CLK, 1);
  905 + rate_dss = clk44xx_get_clock_speed(
  906 + OMAP4_DSS_FCLK, 1);
  907 + rate_hsi = clk44xx_get_clock_speed(
  908 + OMAP4_HSI_FCLK, 1);
  909 + if (cpu_is_omap4470())
  910 + rate_bb2d = clk44xx_get_clock_speed(
  911 + OMAP4_BB2D_FCLK, 1);
  912 + break;
794 913
795   - /* Retrieve OPP */
796   - ret = voltdm44xx_get_opp(OMAP4_VDD_MPU, &current_opp[OMAP4_VDD_MPU]);
797   - if (ret != 0)
798   - dprintf("%s(): warning VDD_MPU OPP not detected!!! (%d)\n",
799   - __func__, ret);
800   - else
801   - voltdm44xx_opp2string(s_opp_mpu, current_opp[OMAP4_VDD_MPU],
802   - OMAP4_VDD_MPU);
  914 + default:
  915 + /* cannot happen */
  916 + fprintf(stderr,
  917 + "omapconf: %s(): cannot happen?!\n",
  918 + __func__);
  919 + }
803 920
804   - ret = voltdm44xx_get_opp(OMAP4_VDD_IVA, &current_opp[OMAP4_VDD_IVA]);
805   - if (ret != 0)
806   - dprintf("%s(): warning VDD_IVA OPP not detected!!! (%d)\n",
807   - __func__, ret);
808   - else
809   - voltdm44xx_opp2string(s_opp_ivahd, current_opp[OMAP4_VDD_IVA],
810   - OMAP4_VDD_IVA);
  921 + ret_opp += voltdm44xx_get_opp(vdd_id, &opp2);
  922 + dprintf(" OPP detected (2): %s (ret_opp=%d)\n",
  923 + opp44xx_name_get(opp2, vdd_id), ret_opp);
  924 + ret_volt += voltdm44xx_get_voltage(vdd_id, &volt2);
  925 + dprintf(" Voltage (2): %lfV (ret_opp=%d)\n",
  926 + volt2, ret_volt);
  927 +
  928 + switch (vdd_id) {
  929 + case OMAP4_VDD_MPU:
  930 + found = (((unsigned int) rate_mpu == (unsigned int) rate_mpu_por) &&
  931 + (opp == opp2) && (volt == volt2));
  932 + break;
  933 +
  934 + case OMAP4_VDD_IVA:
  935 + found = ((opp == opp2) && (volt == volt2) &&
  936 + (((unsigned int) rate_dsp == (unsigned int) rate_dsp_por) ||
  937 + ((unsigned int) rate_iva == (unsigned int) rate_iva_por) ||
  938 + ((unsigned int) rate_aess == (unsigned int) rate_aess_por)));
  939 + break;
  940 +
  941 + case OMAP4_VDD_CORE:
  942 + found = ((opp == opp2) && (volt == volt2) &&
  943 + ((unsigned int) rate_l3 == (unsigned int) rate_l3_por));
  944 + break;
  945 +
  946 + default:
  947 + /* cannot happen */
  948 + fprintf(stderr,
  949 + "omapconf: %s(): cannot happen?!\n",
  950 + __func__);
  951 + }
  952 + dprintf(" found=%u\n", found);
811 953
812   - ret = voltdm44xx_get_opp(OMAP4_VDD_CORE, &current_opp[OMAP4_VDD_CORE]);
813   - if (ret != 0)
814   - dprintf("%s(): warning VDD_CORE OPP not detected!!! (%d)\n",
815   - __func__, ret);
816   - else
817   - voltdm44xx_opp2string(s_opp_core, current_opp[OMAP4_VDD_CORE],
818   - OMAP4_VDD_CORE);
  954 + retry_cnt++;
819 955
820   - autoadjust_table_init(table);
821   - row = 0;
822   - strncpy(table[row][1], "Voltage", TABLE_MAX_ELT_LEN);
823   - strncpy(table[row][2], "Frequency", TABLE_MAX_ELT_LEN);
824   - strncpy(table[row][3], "OPerating Point", TABLE_MAX_ELT_LEN);
825   - row++;
  956 + ret = ret + ret_volt + ret_opp;
  957 + dprintf(" ret=%d\n\n", ret);
  958 + } while ((ret == 0) && (retry_cnt < OPP_MAX_RETRY)
  959 + && (found == 0));
826 960
827   - strncpy(table[row][0], "VDD_MPU / VDD_CORE1", TABLE_MAX_ELT_LEN);
828   - ret = voltdm44xx_get_voltage(OMAP4_VDD_MPU, &volt);
829   - if (ret == 0)
830   - snprintf(table[row][1], TABLE_MAX_ELT_LEN, "%-4f V", volt);
831   - else
832   - snprintf(table[row][1], TABLE_MAX_ELT_LEN, "NA");
833   - strncpy(table[row][3], s_opp_mpu, TABLE_MAX_ELT_LEN);
834   - row++;
835   - if (cpu_is_online(1) == 1)
836   - strncpy(table[row][0], " MPU (CPU1 ON)", TABLE_MAX_ELT_LEN);
837   - else
838   - strncpy(table[row][0], " MPU (CPU1 OFF)", TABLE_MAX_ELT_LEN);
839   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
840   - (unsigned int) clk44xx_get_clock_speed(OMAP4_MPU_DPLL_CLK,
841   - 0));
842   - row += 2;
843   -
844   - strncpy(table[row][0], "VDD_IVA / VDD_CORE2", TABLE_MAX_ELT_LEN);
845   - ret = voltdm44xx_get_voltage(OMAP4_VDD_IVA, &volt);
846   - if (ret == 0)
847   - snprintf(table[row][1], TABLE_MAX_ELT_LEN, "%-4f V", volt);
848   - else
849   - snprintf(table[row][1], TABLE_MAX_ELT_LEN, "NA");
850   - strncpy(table[row][3], s_opp_ivahd, TABLE_MAX_ELT_LEN);
851   - row++;
852   - strncpy(table[row][0], " DSP", TABLE_MAX_ELT_LEN);
853   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
854   - (unsigned int) clk44xx_get_clock_speed(OMAP4_DSP_ROOT_CLK, 1));
855   - row++;
856   - strncpy(table[row][0], " IVAHD", TABLE_MAX_ELT_LEN);
857   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
858   - (unsigned int) clk44xx_get_clock_speed(OMAP4_IVAHD_ROOT_CLK,
859   - 1));
860   - row++;
861   - strncpy(table[row][0], " ABE", TABLE_MAX_ELT_LEN);
862   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
863   - (unsigned int) clk44xx_get_clock_speed(OMAP4_ABE_CLK, 1));
864   - row += 2;
865   -
866   - strncpy(table[row][0], "VDD_CORE / VDD_CORE3", TABLE_MAX_ELT_LEN);
867   - ret = voltdm44xx_get_voltage(OMAP4_VDD_CORE, &volt);
868   - if (ret == 0)
869   - snprintf(table[row][1], TABLE_MAX_ELT_LEN, "%-4f V", volt);
870   - else
871   - snprintf(table[row][1], TABLE_MAX_ELT_LEN, "NA");
872   - strncpy(table[row][3], s_opp_core, TABLE_MAX_ELT_LEN);
873   - row++;
874   - strncpy(table[row][0], " L3", TABLE_MAX_ELT_LEN);
875   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
876   - (unsigned int) clk44xx_get_clock_speed(OMAP4_L3_ICLK, 1));
877   - row++;
878   - strncpy(table[row][0], " DMM/EMIF", TABLE_MAX_ELT_LEN);
879   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
880   - (unsigned int) clk44xx_get_clock_speed(OMAP4_EMIF_L3_ICLK, 1));
881   - row++;
882   - strncpy(table[row][0], " LPDDR2", TABLE_MAX_ELT_LEN);
883   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
884   - (unsigned int) clk44xx_get_clock_speed(
885   - OMAP4_PHY_ROOT_CLK, 1) / 2);
886   - row++;
887   - strncpy(table[row][0], " L4", TABLE_MAX_ELT_LEN);
888   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
889   - (unsigned int) clk44xx_get_clock_speed(OMAP4_L4_ICLK, 1));
890   - row++;
891   - strncpy(table[row][0], " GFX", TABLE_MAX_ELT_LEN);
892   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
893   - (unsigned int) clk44xx_get_clock_speed(OMAP4_GFX_FCLK, 1));
894   - row++;
895   - strncpy(table[row][0], " FDIF", TABLE_MAX_ELT_LEN);
896   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
897   - (unsigned int) clk44xx_get_clock_speed(OMAP4_FDIF_FCLK, 1));
898   - row++;
899   - strncpy(table[row][0], " Cortex-M3 Cores", TABLE_MAX_ELT_LEN);
900   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
901   - (unsigned int) clk44xx_get_clock_speed(
902   - OMAP4_MPU_M3_CLK, 1) / 2);
903   - row++;
904   - strncpy(table[row][0], " ISS", TABLE_MAX_ELT_LEN);
905   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
906   - (unsigned int) clk44xx_get_clock_speed(OMAP4_ISS_CLK, 1));
907   - row++;
908   - strncpy(table[row][0], " DSS", TABLE_MAX_ELT_LEN);
909   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
910   - (unsigned int) clk44xx_get_clock_speed(OMAP4_DSS_FCLK, 1));
911   - row++;
912   - if (cpu_is_omap4470()) {
913   - strncpy(table[row][0], " BB2D", TABLE_MAX_ELT_LEN);
914   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
915   - (unsigned int) clk44xx_get_clock_speed(
916   - OMAP4_BB2D_FCLK, 1));
  961 + /* Print temperature */
  962 + if (vdd_id == OMAP4_VDD_CORE) {
  963 + ret = temp44xx_read_bandgap_sensor(&temp);
  964 + snprintf(table[row][1], TABLE_MAX_ELT_LEN,
  965 + "%dC / %dF", temp, celcius2fahrenheit(temp));
  966 + }
  967 +
  968 + /* Print voltage */
  969 + if (ret_volt == 0) {
  970 + snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%lf V",
  971 + volt);
  972 + } else {
  973 + fprintf(stderr,
  974 + "omapconf: could not retrieve %s voltage!!! (%d)\n",
  975 + voltdm44xx_get_name(vdd_id, vdd_name),
  976 + ret_volt);
  977 + snprintf(table[row][2], TABLE_MAX_ELT_LEN, "NA");
  978 + }
  979 +
  980 + /* Print OPP */
  981 + if (retry_cnt >= OPP_MAX_RETRY) {
  982 + fprintf(stderr,
  983 + "omapconf: too many %s OPP changes, could not retrieve it!!!\n",
  984 + voltdm44xx_get_name(vdd_id, vdd_name));
  985 + strncpy(table[row][4], "ERROR", TABLE_MAX_ELT_LEN);
  986 + } else if (ret_opp != 0) {
  987 + fprintf(stderr,
  988 + "omapconf: could not retrieve %s OPP!!! (%d)\n",
  989 + voltdm44xx_get_name(vdd_id, vdd_name), ret_opp);
  990 + strncpy(table[row][4], "NA", TABLE_MAX_ELT_LEN);
  991 + } else {
  992 + strncpy(table[row][4], opp44xx_name_get(opp, vdd_id),
  993 + TABLE_MAX_ELT_LEN);
  994 + }
917 995 row++;
  996 +
  997 + /* Print clock rates */
  998 + switch (vdd_id) {
  999 + case OMAP4_VDD_MPU:
  1000 + if (cpu_is_online(1) == 1)
  1001 + strncpy(table[row][0], " MPU (CPU1 ON)",
  1002 + TABLE_MAX_ELT_LEN);
  1003 + else
  1004 + strncpy(table[row][0], " MPU (CPU1 OFF)",
  1005 + TABLE_MAX_ELT_LEN);
  1006 + snprintf(table[row][3], TABLE_MAX_ELT_LEN, " %-4d MHz",
  1007 + (unsigned int) rate_mpu);
  1008 + row += 2;
  1009 + break;
  1010 +
  1011 + case OMAP4_VDD_IVA:
  1012 + strncpy(table[row][0], " DSP", TABLE_MAX_ELT_LEN);
  1013 + mod44xx_get_mode(OMAP4_DSP, &mmode);
  1014 + if (mmode == MOD_DISABLED_MODE)
  1015 + snprintf(table[row][3], TABLE_MAX_ELT_LEN,
  1016 + "(%-4d MHz) (1)",
  1017 + (unsigned int) rate_dsp);
  1018 + else
  1019 + snprintf(table[row][3], TABLE_MAX_ELT_LEN,
  1020 + " %-4d MHz",
  1021 + (unsigned int) rate_dsp);
  1022 + row++;
  1023 +
  1024 + strncpy(table[row][0], " IVAHD", TABLE_MAX_ELT_LEN);
  1025 + mod44xx_get_mode(OMAP4_IVAHD, &mmode);
  1026 + if (mmode == MOD_DISABLED_MODE)
  1027 + snprintf(table[row][3], TABLE_MAX_ELT_LEN,
  1028 + "(%-4d MHz) (1)",
  1029 + (unsigned int) rate_iva);
  1030 + else
  1031 + snprintf(table[row][3], TABLE_MAX_ELT_LEN,
  1032 + " %-4d MHz",
  1033 + (unsigned int) rate_iva);
  1034 + row++;
  1035 +
  1036 + strncpy(table[row][0], " AESS", TABLE_MAX_ELT_LEN);
  1037 + mod44xx_get_mode(OMAP4_AESS, &mmode);
  1038 + if (mmode == MOD_DISABLED_MODE)
  1039 + snprintf(table[row][3], TABLE_MAX_ELT_LEN,
  1040 + "(%-4d MHz) (1)",
  1041 + (unsigned int) rate_aess);
  1042 + else
  1043 + snprintf(table[row][3], TABLE_MAX_ELT_LEN,
  1044 + " %-4d MHz", (unsigned int) rate_aess);
  1045 +
  1046 + row += 2;
  1047 + break;
  1048 +
  1049 + case OMAP4_VDD_CORE:
  1050 + strncpy(table[row][0], " L3", TABLE_MAX_ELT_LEN);
  1051 + snprintf(table[row][3], TABLE_MAX_ELT_LEN, " %-4d MHz",
  1052 + (unsigned int) rate_l3);
  1053 + row++;
  1054 +
  1055 + strncpy(table[row][0], " DMM/EMIF", TABLE_MAX_ELT_LEN);
  1056 + snprintf(table[row][3], TABLE_MAX_ELT_LEN, " %-4d MHz",
  1057 + (unsigned int) rate_emif);
  1058 + row++;
  1059 +
  1060 + strncpy(table[row][0], " LP-DDR2",
  1061 + TABLE_MAX_ELT_LEN);
  1062 + snprintf(table[row][3], TABLE_MAX_ELT_LEN, " %-4d MHz",
  1063 + (unsigned int) rate_lpddr2);
  1064 + row++;
  1065 +
  1066 + strncpy(table[row][0], " L4", TABLE_MAX_ELT_LEN);
  1067 + snprintf(table[row][3], TABLE_MAX_ELT_LEN, " %-4d MHz",
  1068 + (unsigned int) rate_l4);
  1069 + row++;
  1070 +
  1071 + strncpy(table[row][0], " GFX", TABLE_MAX_ELT_LEN);
  1072 + mod44xx_get_mode(OMAP4_GFX, &mmode);
  1073 + if (mmode == MOD_DISABLED_MODE)
  1074 + snprintf(table[row][3], TABLE_MAX_ELT_LEN,
  1075 + "(%-4d MHz) (1)",
  1076 + (unsigned int) rate_gfx);
  1077 + else
  1078 + snprintf(table[row][3], TABLE_MAX_ELT_LEN,
  1079 + " %-4d MHz", (unsigned int) rate_gfx);
  1080 + row++;
  1081 +
  1082 + strncpy(table[row][0], " FDIF", TABLE_MAX_ELT_LEN);
  1083 + mod44xx_get_mode(OMAP4_FDIF, &mmode);
  1084 + if (mmode == MOD_DISABLED_MODE)
  1085 + snprintf(table[row][3], TABLE_MAX_ELT_LEN,
  1086 + "(%-4d MHz) (1)",
  1087 + (unsigned int) rate_fdif);
  1088 + else
  1089 + snprintf(table[row][3], TABLE_MAX_ELT_LEN,
  1090 + " %-4d MHz", (unsigned int) rate_fdif);
  1091 + row++;
  1092 +
  1093 + strncpy(table[row][0], " Cortex-M3 Cores",
  1094 + TABLE_MAX_ELT_LEN);
  1095 + mod44xx_get_mode(OMAP4_MPU_M3, &mmode);
  1096 + if (mmode == MOD_DISABLED_MODE)
  1097 + snprintf(table[row][3], TABLE_MAX_ELT_LEN,
  1098 + "(%-4d MHz) (1)",
  1099 + (unsigned int) rate_m3);
  1100 + else
  1101 + snprintf(table[row][3], TABLE_MAX_ELT_LEN,
  1102 + " %-4d MHz", (unsigned int) rate_m3);
  1103 + row++;
  1104 +
  1105 + strncpy(table[row][0], " ISS", TABLE_MAX_ELT_LEN);
  1106 + mod44xx_get_mode(OMAP4_ISS, &mmode);
  1107 + if (mmode == MOD_DISABLED_MODE)
  1108 + snprintf(table[row][3], TABLE_MAX_ELT_LEN,
  1109 + "(%-4d MHz) (1)",
  1110 + (unsigned int) rate_iss);
  1111 + else
  1112 + snprintf(table[row][3], TABLE_MAX_ELT_LEN,
  1113 + " %-4d MHz", (unsigned int) rate_iss);
  1114 + row++;
  1115 +
  1116 + strncpy(table[row][0], " DSS", TABLE_MAX_ELT_LEN);
  1117 + mod44xx_get_mode(OMAP4_DISPC, &mmode);
  1118 + if (mmode == MOD_DISABLED_MODE)
  1119 + snprintf(table[row][3], TABLE_MAX_ELT_LEN,
  1120 + "(%-4d MHz) (1)",
  1121 + (unsigned int) rate_dss);
  1122 + else
  1123 + snprintf(table[row][3], TABLE_MAX_ELT_LEN,
  1124 + " %-4d MHz", (unsigned int) rate_dss);
  1125 + row++;
  1126 +
  1127 + if (cpu_is_omap4470()) {
  1128 + strncpy(table[row][0], " BB2D",
  1129 + TABLE_MAX_ELT_LEN);
  1130 + mod44xx_get_mode(OMAP4_BB2D, &mmode);
  1131 + if (mmode == MOD_DISABLED_MODE)
  1132 + snprintf(table[row][3],
  1133 + TABLE_MAX_ELT_LEN,
  1134 + "(%-4d MHz) (1)",
  1135 + (unsigned int) rate_bb2d);
  1136 + else
  1137 + snprintf(table[row][3],
  1138 + TABLE_MAX_ELT_LEN, " %-4d MHz",
  1139 + (unsigned int) rate_bb2d);
  1140 + row++;
  1141 + }
  1142 +
  1143 + strncpy(table[row][0], " HSI", TABLE_MAX_ELT_LEN);
  1144 + mod44xx_get_mode(OMAP4_HSI, &mmode);
  1145 + if (mmode == MOD_DISABLED_MODE)
  1146 + snprintf(table[row][3], TABLE_MAX_ELT_LEN,
  1147 + "(%-4d MHz) (1)",
  1148 + (unsigned int) rate_hsi);
  1149 + else
  1150 + snprintf(table[row][3], TABLE_MAX_ELT_LEN,
  1151 + " %-4d MHz", (unsigned int) rate_hsi);
  1152 + row++;
  1153 + break;
  1154 +
  1155 + default:
  1156 + /* cannot happen */
  1157 + fprintf(stderr,
  1158 + "omapconf: %s(): cannot happen?!\n",
  1159 + __func__);
  1160 + }
918 1161 }
919   - strncpy(table[row][0], " HSI", TABLE_MAX_ELT_LEN);
920   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
921   - (unsigned int) clk44xx_get_clock_speed(OMAP4_HSI_FCLK, 1));
922   - row++;
923 1162
924   - autoadjust_table_print(table, row, 4);
  1163 + /* Display table */
  1164 + autoadjust_table_print(table, row, 5);
925 1165
926   - /* Restore CPUFreq governor */
927   - cpufreq_scaling_governor_set(prev_gov, prev_gov2);
  1166 + fprintf(stdout, "Notes:\n");
  1167 + fprintf(stdout,
  1168 + " (1) Module is disabled, rate may not be relevant.\n\n");
928 1169
929 1170 return 0;
930 1171 }
  1172 +#ifndef VOLTDM44XX_DEBUG
  1173 +#ifdef OMAP4CONF_OPP_SHOW_DEBUG
  1174 +#undef dprintf
  1175 +#define dprintf(format, ...)
  1176 +#endif
  1177 +#else
  1178 +#undef dprintf
  1179 +#define dprintf(format, ...) printf(format, ## __VA_ARGS__)
  1180 +#endif
931 1181
932 1182
933 1183 /* ------------------------------------------------------------------------*//**
491 omap5/lib54xx.c
@@ -72,6 +72,9 @@
72 72 #endif
73 73
74 74
  75 +#define OPP_MAX_RETRY 100
  76 +
  77 +
75 78 /* ------------------------------------------------------------------------*//**
76 79 * @FUNCTION lib54xx_pwst_show
77 80 * @BRIEF show OMAP5 power status
@@ -321,157 +324,385 @@ int lib54xx_pwst_show(FILE *stream)
321 324 }
322 325
323 326
  327 +/* #define LIB54XX_OPP_SHOW_DEBUG */
  328 +#ifndef LIB54XX_DEBUG
  329 +#ifdef LIB54XX_OPP_SHOW_DEBUG
  330 +#undef dprintf
  331 +#define dprintf(format, ...) printf(format, ## __VA_ARGS__)
  332 +#endif
  333 +#else
  334 +#undef dprintf
  335 +#define dprintf(format, ...)
  336 +#endif
324 337 /* ------------------------------------------------------------------------*//**
325 338 * @FUNCTION lib54xx_opp_show
326   - * @BRIEF show current operating voltages and frequencies
  339 + * @BRIEF show current operating voltages and key clock rates.
327 340 * @RETURNS 0 in case of success
328 341 * OMAPCONF_ERR_REG_ACCESS
329 342 * OMAPCONF_ERR_CPU
330   - * @DESCRIPTION show current operating voltages and frequencies
  343 + * @DESCRIPTION show current operating voltages and key clock rates.
331 344 *//*------------------------------------------------------------------------ */
332 345 int lib54xx_opp_show(void)
333 346 {
334   - opp54xx_id opp_mpu, opp_mm, opp_core;
335   - double volt_mpu, volt_mm, volt_core;
  347 + voltdm54xx_id vdd_id;
  348 + double volt, volt2;
  349 + opp54xx_id opp, opp2;
  350 + int temp;
  351 + unsigned int rate_mpu, rate_mpu_por;
  352 + unsigned int rate_dsp, rate_iva, rate_gpu;
  353 + unsigned int rate_dsp_por, rate_iva_por, rate_gpu_por;
  354 + unsigned int rate_l3, rate_l3_por;
  355 + unsigned int rate_l4, rate_emif, rate_lpddr2, rate_aess, rate_iss,
  356 + rate_fdif, rate_cal, rate_ipu, rate_m4, rate_dss, rate_bb2d,
  357 + rate_hsi, rate_c2c;
336 358 char table[TABLE_MAX_ROW][TABLE_MAX_COL][TABLE_MAX_ELT_LEN];
337 359 unsigned int row = 0;
338   - char prev_gov[CPUFREQ_GOV_MAX_NAME_LENGTH],
339   - prev_gov2[CPUFREQ_GOV_MAX_NAME_LENGTH];
  360 + unsigned int retry_cnt = 0;
  361 + unsigned int found = 0;
340 362
341   - /* Switch to userspace governor temporarily,
342   - * so that OPP cannot change during audit and does not false it.
  363 + autoadjust_table_init(table);
  364 + row = 0;
  365 + strncpy(table[row][1], "Temperature", TABLE_MAX_ELT_LEN);
  366 + strncpy(table[row][2], "Voltage", TABLE_MAX_ELT_LEN);
  367 + strncpy(table[row][3], "Frequency", TABLE_MAX_ELT_LEN);
  368 + strncpy(table[row][4], "OPerating Point", TABLE_MAX_ELT_LEN);
  369 + row++;
  370 +
  371 + /*
  372 + * In order to make sure all details (OPP, voltage, clock rates) are
  373 + * coherent (due to potential OPP change in between), must use a loop,
  374 + * checking that OPP and voltage did not change and that at least ONE
  375 + * clock rate is aligned to expected rate for the detected OPP.
343 376 */
344   - cpufreq_scaling_governor_set("userspace", prev_gov);
  377 + dprintf("%s():\n", __func__);
  378 + for (vdd_id = VDD54XX_MPU; vdd_id <= VDD54XX_CORE; vdd_id++) {
  379 + snprintf(table[row][0], TABLE_MAX_ELT_LEN, "%s / VDD_CORE%u",
  380 + voltdm54xx_name_get(vdd_id),
  381 + (unsigned int) vdd_id);
  382 + dprintf(" %s:\n", voltdm54xx_name_get(vdd_id));
  383 +
  384 + /* Retrieve OPP and clock rates */
  385 + retry_cnt = 0;
  386 + found = 0;
  387 + do {
  388 + dprintf(" TRY #%u:\n", retry_cnt);
  389 +
  390 + opp = voltdm54xx_opp_get(vdd_id);
  391 + dprintf(" OPP detected: %s\n",
  392 + opp54xx_name_get(opp));
  393 + volt = voltdm54xx_voltage_get(vdd_id);
  394 + dprintf(" Voltage: %lfV\n", volt);
  395 +
  396 + switch (vdd_id) {
  397 + case VDD54XX_MPU:
  398 + rate_mpu = (unsigned int) mod54xx_clk_rate_get(
  399 + OMAP5_MPU, 0);
  400 + rate_mpu_por = (unsigned int)
  401 + mod54xx_por_clk_rate_get(
  402 + OMAP5_MPU, opp);
  403 + dprintf(
  404 + " MPU Rate: %dMHz, POR Rate: %dMHz\n",
  405 + rate_mpu, rate_mpu_por);
  406 + break;
  407 +
  408 + case VDD54XX_MM:
  409 + rate_dsp = (unsigned int) mod54xx_clk_rate_get(
  410 + OMAP5_DSP, 1);
  411 + rate_iva = (unsigned int) mod54xx_clk_rate_get(
  412 + OMAP5_IVA, 1);
  413 + rate_gpu = (unsigned int) mod54xx_clk_rate_get(
  414 + OMAP5_GPU, 1);
  415 +
  416 + rate_dsp_por = (unsigned int)
  417 + mod54xx_por_clk_rate_get(
  418 + OMAP5_DSP, opp);
  419 + rate_iva_por = (unsigned int)
  420 + mod54xx_por_clk_rate_get(
  421 + OMAP5_IVA, opp);
  422 + rate_gpu_por = (unsigned int)
  423 + mod54xx_por_clk_rate_get(
  424 + OMAP5_GPU, opp);
  425 + dprintf(
  426 + " DSP Rate: %dMHz, POR Rate: %dMHz\n",
  427 + rate_dsp, rate_dsp_por);
  428 + dprintf(
  429 + " IVA Rate: %dMHz, POR Rate: %dMHz\n",
  430 + rate_iva, rate_iva_por);
  431 + dprintf(
  432 + " GPU Rate: %dMHz, POR Rate: %dMHz\n",
  433 + rate_gpu, rate_gpu_por);
  434 + break;
  435 +
  436 + case VDD54XX_CORE:
  437 + rate_l3 = (unsigned int) mod54xx_clk_rate_get(
  438 + OMAP5_L3_MAIN1_INTERCONNECT, 0);
  439 + rate_l3_por = (unsigned int)
  440 + mod54xx_por_clk_rate_get(
  441 + OMAP5_L3_MAIN1_INTERCONNECT,
  442 + opp);
  443 + dprintf(
  444 + " L3_1 Rate: %dMHz, POR Rate: %dMHz\n",
  445 + rate_l3, rate_l3_por);
  446 +
  447 + rate_l4 = (unsigned int) mod54xx_clk_rate_get(
  448 + OMAP5_L4_CFG_INTERCONNECT, 1);
  449 + rate_emif = (unsigned int) mod54xx_clk_rate_get(
  450 + OMAP5_EMIF1, 1);
  451 + rate_lpddr2 =
  452 + (unsigned int) mod54xx_clk_rate_get(
  453 + OMAP5_PHY_EMIF, 1);
  454 + rate_aess = (unsigned int) mod54xx_clk_rate_get(
  455 + OMAP5_AESS, 1);
  456 + rate_iss = (unsigned int) mod54xx_clk_rate_get(
  457 + OMAP5_ISS, 1);
  458 + rate_fdif = (unsigned int) mod54xx_clk_rate_get(
  459 + OMAP5_FDIF, 1);
  460 + rate_cal = (unsigned int) mod54xx_clk_rate_get(
  461 + OMAP5_CAL, 1);
  462 + rate_ipu = (unsigned int) mod54xx_clk_rate_get(
  463 + OMAP5_IPU, 1);
  464 + rate_m4 = rate_ipu / 2;
  465 + rate_dss = (unsigned int) mod54xx_clk_rate_get(
  466 + OMAP5_DSS, 1);
  467 + rate_bb2d = (unsigned int) mod54xx_clk_rate_get(
  468 + OMAP5_BB2D, 1);
  469 + rate_hsi = (unsigned int) mod54xx_clk_rate_get(
  470 + OMAP5_HSI, 1);
  471 + rate_c2c = (unsigned int) mod54xx_clk_rate_get(
  472 + OMAP5_C2C, 1);
  473 + break;
345 474
346   - opp_mpu = voltdm54xx_opp_get(VDD54XX_MPU);
347   - opp_mm = voltdm54xx_opp_get(VDD54XX_MM);
348   - opp_core = voltdm54xx_opp_get(VDD54XX_CORE);
  475 + default:
  476 + /* cannot happen */
  477 + fprintf(stderr,
  478 + "omapconf: %s(): cannot happen?!\n",
  479 + __func__);
  480 + }
349 481
350   - volt_mpu = voltdm54xx_voltage_get(VDD54XX_MPU);
351   - volt_mm = voltdm54xx_voltage_get(VDD54XX_MM);
352   - volt_core = voltdm54xx_voltage_get(VDD54XX_CORE);
  482 + opp2 = voltdm54xx_opp_get(vdd_id);
  483 + dprintf(" OPP detected (2): %s\n",
  484 + opp54xx_name_get(opp2));
  485 + volt2 = voltdm54xx_voltage_get(vdd_id);
  486 + dprintf(" Voltage (2): %lfV\n", volt2);
  487 +
  488 + switch (vdd_id) {
  489 + case VDD54XX_MPU:
  490 + found = ((rate_mpu == rate_mpu_por) &&
  491 + (opp == opp2) && (volt == volt2));
  492 + break;
  493 +
  494 + case VDD54XX_MM:
  495 + found = ((opp == opp2) && (volt == volt2) &&
  496 + ((rate_dsp == rate_dsp_por) ||
  497 + (rate_iva == rate_iva_por) ||
  498 + (rate_gpu == rate_gpu_por)));
  499 + break;
  500 +
  501 + case VDD54XX_CORE:
  502 + found = ((opp == opp2) && (volt == volt2) &&
  503 + (rate_l3 == rate_l3_por));
  504 + break;
353 505
354   - autoadjust_table_init(table);
355   - row = 0;
356   - strncpy(table[row][1], "Voltage", TABLE_MAX_ELT_LEN);
357   - strncpy(table[row][2], "Frequency", TABLE_MAX_ELT_LEN);
358   - strncpy(table[row][3], "OPerating Point", TABLE_MAX_ELT_LEN);
359   - row++;
  506 + default:
  507 + /* cannot happen */
  508 + fprintf(stderr,
  509 + "omapconf: %s(): cannot happen?!\n",
  510 + __func__);
  511 + }
360 512
361   - strncpy(table[row][0], "VDD_MPU / VDD_CORE1", TABLE_MAX_ELT_LEN);
362   - snprintf(table[row][1], TABLE_MAX_ELT_LEN, "%.3lf V", volt_mpu);
363   - if (opp_mpu != OPP54XX_ID_MAX)
364   - strncpy(table[row][3], opp54xx_name_get(opp_mpu),
365   - TABLE_MAX_ELT_LEN);
366   - else
367   - strncpy(table[row][3], "UNKNOWN",
368   - TABLE_MAX_ELT_LEN);
369   - row++;
370   - if (cpu_is_online(1) == 1)
371   - strncpy(table[row][0], " MPU (CPU1 ON)", TABLE_MAX_ELT_LEN);
372   - else
373   - strncpy(table[row][0], " MPU (CPU1 OFF)", TABLE_MAX_ELT_LEN);
374   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
375   - (unsigned int) mod54xx_clk_rate_get(OMAP5_MPU, 0));
376   - row += 2;
377   -
378   - strncpy(table[row][0], "VDD_MM / VDD_CORE2", TABLE_MAX_ELT_LEN);
379   - snprintf(table[row][1], TABLE_MAX_ELT_LEN, "%.3lf V", volt_mm);
380   - if (opp_mm != OPP54XX_ID_MAX)
381   - strncpy(table[row][3], opp54xx_name_get(opp_mm),
382   - TABLE_MAX_ELT_LEN);
383   - else
384   - strncpy(table[row][3], "UNKNOWN",
385   - TABLE_MAX_ELT_LEN);
386   - row++;
387   - strncpy(table[row][0], " IVA", TABLE_MAX_ELT_LEN);
388   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
389   - (unsigned int) mod54xx_clk_rate_get(OMAP5_IVA, 1));
390   - row++;
391   - strncpy(table[row][0], " GPU", TABLE_MAX_ELT_LEN);
392   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
393   - (unsigned int) mod54xx_clk_rate_get(OMAP5_GPU, 1));
394   - row++;
395   - strncpy(table[row][0], " DSP", TABLE_MAX_ELT_LEN);
396   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
397   - (unsigned int) mod54xx_clk_rate_get(OMAP5_DSP, 1));
398   - row += 2;
399   -
400   - strncpy(table[row][0], "VDD_CORE / VDD_CORE3", TABLE_MAX_ELT_LEN);
401   - snprintf(table[row][1], TABLE_MAX_ELT_LEN, "%.3lf V", volt_core);
402   - if (opp_core != OPP54XX_ID_MAX)
403   - strncpy(table[row][3], opp54xx_name_get(opp_core),
404   - TABLE_MAX_ELT_LEN);
405   - else
406   - strncpy(table[row][3], "UNKNOWN",
407   - TABLE_MAX_ELT_LEN);
408   - row++;
409   - strncpy(table[row][0], " L4", TABLE_MAX_ELT_LEN);
410   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
411   - (unsigned int) mod54xx_clk_rate_get(
412   - OMAP5_L4_CFG_INTERCONNECT, 1));
413   - row++;
414   - strncpy(table[row][0], " L3", TABLE_MAX_ELT_LEN);
415   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
416   - (unsigned int) mod54xx_clk_rate_get(
417   - OMAP5_L3_MAIN1_INTERCONNECT, 1));
418   - row++;
419   - strncpy(table[row][0], " DMM/EMIF", TABLE_MAX_ELT_LEN);
420   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
421   - (unsigned int) mod54xx_clk_rate_get(OMAP5_EMIF1, 1));
422   - row++;
423   - strncpy(table[row][0], " LP-DDR2", TABLE_MAX_ELT_LEN);
424   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
425   - (unsigned int) mod54xx_clk_rate_get(OMAP5_PHY_EMIF, 1));
426   - row++;
427   - strncpy(table[row][0], " AESS", TABLE_MAX_ELT_LEN);
428   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
429   - (unsigned int) mod54xx_clk_rate_get(OMAP5_AESS, 1));
430   - row++;
431   - strncpy(table[row][0], " ISS", TABLE_MAX_ELT_LEN);
432   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
433   - (unsigned int) mod54xx_clk_rate_get(OMAP5_ISS, 1));
434   - row++;
435   - strncpy(table[row][0], " FDIF", TABLE_MAX_ELT_LEN);
436   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
437   - (unsigned int) mod54xx_clk_rate_get(OMAP5_FDIF, 1));
438   - row++;
439   - strncpy(table[row][0], " CAL", TABLE_MAX_ELT_LEN);
440   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
441   - (unsigned int) mod54xx_clk_rate_get(OMAP5_CAL, 1));
442   - row++;
443   - strncpy(table[row][0], " IPU", TABLE_MAX_ELT_LEN);
444   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
445   - (unsigned int) mod54xx_clk_rate_get(OMAP5_IPU, 1));
446   - row++;
447   - strncpy(table[row][0], " Cortex-M4 Cores", TABLE_MAX_ELT_LEN);
448   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
449   - (unsigned int) mod54xx_clk_rate_get(OMAP5_IPU, 1) / 2);
450   - row++;
451   - strncpy(table[row][0], " DSS", TABLE_MAX_ELT_LEN);
452   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
453   - (unsigned int) mod54xx_clk_rate_get(OMAP5_DSS, 1));
454   - row++;
455   - strncpy(table[row][0], " BB2D", TABLE_MAX_ELT_LEN);
456   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
457   - (unsigned int) mod54xx_clk_rate_get(OMAP5_BB2D, 1));
458   - row++;
459   - strncpy(table[row][0], " HSI", TABLE_MAX_ELT_LEN);
460   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
461   - (unsigned int) mod54xx_clk_rate_get(OMAP5_HSI, 1));
462   - row++;
463   - strncpy(table[row][0], " C2C", TABLE_MAX_ELT_LEN);
464   - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz",
465   - (unsigned int) mod54xx_clk_rate_get(OMAP5_C2C, 1));
466   - row++;
  513 + retry_cnt++;
  514 + } while ((retry_cnt < OPP_MAX_RETRY) && (found == 0));
467 515
468   - autoadjust_table_print(table, row, 4);
  516 + /* Print temperature */
  517 + temp = temp54xx_get(voltdm2sensor_id(vdd_id));
  518 + snprintf(table[row][1], TABLE_MAX_ELT_LEN,
  519 + "%dC / %dF", temp,
  520 + celcius2fahrenheit(temp));
  521 +
  522 + /* Print voltage */
  523 + snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%.3lf V", volt);
  524 +
  525 + /* Print OPP */
  526 + if (retry_cnt < OPP_MAX_RETRY) {
  527 + strncpy(table[row][4], opp54xx_name_get(opp),
  528 + TABLE_MAX_ELT_LEN);
  529 + } else {
  530 + fprintf(stderr,
  531 + "omapconf: too many %s OPP changes, could not retrieve it!!!\n",
  532 + voltdm54xx_name_get(vdd_id));
  533 + strncpy(table[row][4], "ERROR", TABLE_MAX_ELT_LEN);
  534 + }
  535 + row++;
  536 +
  537 + /* Print clock rates */
  538 + switch (vdd_id) {
  539 + case VDD54XX_MPU:
  540 + if (cpu_is_online(1) == 1)
  541 + strncpy(table[row][0], " MPU (CPU1 ON)",
  542 + TABLE_MAX_ELT_LEN);
  543 + else
  544 + strncpy(table[row][0], " MPU (CPU1 OFF)",
  545 + TABLE_MAX_ELT_LEN);
  546 + snprintf(table[row][3], TABLE_MAX_ELT_LEN, " %-4d MHz",
  547 + rate_mpu);
  548 + row += 2;
  549 + break;
  550 +
  551 + case VDD54XX_MM:
  552 + strncpy(table[row][0], " IVA", TABLE_MAX_ELT_LEN);
  553 + if (mod54xx_mode_get(OMAP5_IVA) == MOD_DISABLED_MODE)
  554 + snprintf(table[row][3], TABLE_MAX_ELT_LEN,
  555 + "(%-4d MHz) (1)", rate_iva);
  556 + else
  557 + snprintf(table[row][3], TABLE_MAX_ELT_LEN,
  558 + " %-4d MHz", rate_iva);
  559 + row++;
  560 + strncpy(table[row][0], " GPU", TABLE_MAX_ELT_LEN);
  561 + if (mod54xx_mode_get(OMAP5_GPU) == MOD_DISABLED_MODE)
  562 + snprintf(table[row][3], TABLE_MAX_ELT_LEN,
  563 + "(%-4d MHz) (1)", rate_gpu);
  564 + else
  565 + snprintf(table[row][3], TABLE_MAX_ELT_LEN,
  566 + " %-4d MHz", rate_gpu);
  567 + row++;
  568 + strncpy(table[row][0], " DSP", TABLE_MAX_ELT_LEN);
  569 + if (mod54xx_mode_get(OMAP5_DSP) == MOD_DISABLED_MODE)
  570 + snprintf(table[row][3], TABLE_MAX_ELT_LEN,
  571 + "(%-4d MHz) (1)", rate_dsp);
  572 + else
  573 + snprintf(table[row][3], TABLE_MAX_ELT_LEN,
  574 + " %-4d MHz", rate_dsp);
  575 + row += 2;
  576 + break;
  577 +
  578 + case VDD54XX_CORE:
  579 + strncpy(table[row][0], " L4", TABLE_MAX_ELT_LEN);
  580 + snprintf(table[row][3], TABLE_MAX_ELT_LEN, " %-4d MHz",