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Commits on Aug 18, 2017
  1. [CROSSBAR] [DRA7] Add DRA76x and DRA72x specific crossbar inputs

    DRA76x has few IPs that are not available in DRA74x/DRA72x. Add
    crossbar inputs for these IPs. Also added a small note in description
    to indicate that these inputs are specific to DRA76x or DRA72x.
    
    Acked-by: Praneeth Bajjuri <praneeth@ti.com>
    Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    lokeshvutla committed with nmenon Aug 2, 2017
  2. [PRCM] [DRA7] Update DRA76 specific HS dividers

    Dividers H14 of DPLL_GMAC and H21 of DPLL_CORE are reserved on DRA74
    or DRA72 SoCs. These dividers are available in DRA76x and controlled
    by CTRL module. Updating these registers definitions.
    
    Acked-by: Praneeth Bajjuri <praneeth@ti.com>
    Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    lokeshvutla committed with nmenon Aug 2, 2017
  3. [DPLL] [DRA7] Add control module HS dividers

    Certain HS dividers on DRA76 are controlled by control modules. Adding
    support for reading data from these dividers.
    
    Acked-by: Praneeth Bajjuri <praneeth@ti.com>
    Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    lokeshvutla committed with nmenon Aug 2, 2017
  4. [DPLL] [DRA7] Fix HSDIV clock rate

    Rate of HSDIV is shown as fdpll/div even though it is disabled. This
    may fail sometimes when divider is by default 0 when disabled. So, fix
    it by making rate as fdpll when HSDIV is disabled.
    
    Acked-by: Praneeth Bajjuri <praneeth@ti.com>
    Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    lokeshvutla committed with nmenon Aug 2, 2017
  5. [OPP] [DRA7] Add OPP_PLUS detection support

    DRA76x supports OPP_PLUS with higher speeds:
    MPU: 1.8GHz
    DSP: 1 GHz
    EVE: 900MHz
    IVA: 617MHz
    GPU: 665MHz
    
    Acked-by: Praneeth Bajjuri <praneeth@ti.com>
    Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    lokeshvutla committed with nmenon Aug 2, 2017
  6. [OPP] [DRA7] Fix build with OPP_DRA7XX_DEBUG

    Fix build error when OPP_DRA7XX_DEBUG is defined.
    
    arch/arm/mach-omap/dra7/opp_dra7xx.c:163:14: error: 'VDD_DRA7XX_WKUP' undeclared (first use in this function)
    for (vdd = VDD_DRA7XX_WKUP; vdd < VDD_DRA7XX_ID_MAX; vdd++) {
                     ^~~~~~~~~~~~~~~
    arch/arm/mach-omap/dra7/opp_dra7xx.c:163:14: note: each undeclared identifier is reported only once for each function it appears in
    arch/arm/mach-omap/dra7/opp_dra7xx.c:170:19: error: 'opp' undeclared (first use in this function)
           i, (void *) &opp);
    
    Acked-by: Praneeth Bajjuri <praneeth@ti.com>
    Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    lokeshvutla committed with nmenon Aug 2, 2017
  7. [OPP] [DRA7] Add OPP_HIGH support for DSPEVE

    Add OPP_HIGH information for DSPEVE.
    
    Acked-by: Praneeth Bajjuri <praneeth@ti.com>
    Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    lokeshvutla committed with nmenon Aug 2, 2017
  8. [OPP] [DRA7] Fix DSPEVE OPP detection

    It is not necessary to have both DSP and EVE to be configured to
    determine OPP of DSPEVE. If either of it are configured then display
    the OPP. Without this OPP of DSPEVE is always shown as unknown as EVE
    is not configured most of the times.
    
    Acked-by: Praneeth Bajjuri <praneeth@ti.com>
    Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    lokeshvutla committed with nmenon Aug 2, 2017
  9. [CPUINFO] [DRA7] Delete unused cpu_dra7xx_cores_count_get function

    cpu_cores_count_get() uses /prop/stat file to get the number of cores
    available. So, drop the unused function cpu_dra7xx_cores_count_get().
    
    Acked-by: Praneeth Bajjuri <praneeth@ti.com>
    Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    lokeshvutla committed with nmenon Aug 2, 2017
  10. [CPUINFO] [DRA7] Use efuse to detect Speed grade

    Use STD_FUSE_ID_2 register to detect the maximum supported frequency
    by all DRA7 SoCs.
    
    NOTE: DRA76 specific speed grade has been added, however, not all
    possible speed grades are enumerated here, just the ones of immediate
    interest to us is added.
    
    Acked-by: Praneeth Bajjuri <praneeth@ti.com>
    Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    lokeshvutla committed with nmenon Aug 2, 2017
  11. [CPUINFO] [DRA7] Add detection of DRA76x SoC

    Add support for DRA76x SoC detection.
    
    dra76 family is a high-performance, infotainment application
    device, based on OMAP architecture on a 28-nm technology.
    This contains most of the subsystems, peripherals that are
    available on dra74, dra72 family. This SoC mainly features
    Subsystems:
    - 2 x Cortex-A15 with max speed of 1.8GHz
    - 2 X DSP
    - 2 X Cortex-M4 IPU
    - ISS
    - CAL
    - DSS
    - VPE
    - VIP
    
    Connectivity peripherals:
    - 1 USB3.0 and 3 USB2.0 subsystems
    - 2 x SATA
    - 2 x PCI Express Gen2
    - 3-port Gigabit ethernet switch
    - 2 x CAN
    - MCAN
    
    Acked-by: Praneeth Bajjuri <praneeth@ti.com>
    Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    lokeshvutla committed with nmenon Aug 2, 2017
Commits on Apr 21, 2017
  1. Merge branch 'brad-griffis-hotfix/am437x-ctt'

    Signed-off-by: Nishanth Menon <nm@ti.com>
    nmenon committed Apr 21, 2017
  2. [AM4][CTT] Align register reporting with other tools

    Register set is updated to match the AM43xx variant.  This is
    a superset of all AM43xx, i.e. it encompasses AM437x, AM437xHS
    and AM438x.
    
    This also aligns with other tools such as this DSS file:
    
    https://git.ti.com/sitara-dss-files/am43xx-dss-files/blobs/master/am43xx-ctt.dss
    
    In particular, the JTAG script is precisely aligned with the
    formatting of omapconf such that you can dump the registers with
    either one and compare the result without picking up little differences
    like the case of the hexadecimal, missing registers, etc.
    
    Signed-off-by: Brad Griffis <bgriffis@ti.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    Acked-by:Dave Gerlach <d-gerlach@ti.com>
    brad-griffis committed with nmenon Apr 12, 2017
  3. [AM4][CTT] Align with CTT-SITARA 1.0.0.1

    1. Change DEVICE_NAME to match what's expected by
    CTT-SITARA 1.0.0.1.
    
    2. Change output format to use lower case hex for
    consistency with how the tool itself saves registers
    to files.
    
    Signed-off-by: Brad Griffis <bgriffis@ti.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    Acked-by:Dave Gerlach <d-gerlach@ti.com>
    brad-griffis committed with nmenon Apr 12, 2017
Commits on Mar 13, 2017
  1. [DRA7] Skip reporting pwrdm/clkdm error report for dra7xx family

    DRA7 Support is minimal and does not encompass power domain and
    clockdomain hierarchy yet. So, Just return from powerdomain and clock
    domain function call inits.
    
    WARNING: this might assume silent failure, but that is not the real
    intent here.
    
    Fixes: #39
    Reported-by: Brad Griffis <bgriffis@ti.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    nmenon committed Mar 13, 2017
Commits on Feb 25, 2017
  1. Merge branch 'brad-griffis-hotfix/am57xx-ipu-mmu2'

    Pull request: #38
    
    Signed-off-by: Nishanth Menon <nm@ti.com>
    nmenon committed Feb 25, 2017
  2. [DRA7] Add support for IPU AMMU decode

    The IPU subsystem of the AM57xx and DRA7xx processors contains an
    Attribute MMU (AMMU). It sometimes is called the "Unicache MMU"
    or the "Shared Cache MMU". This patch is intended to decode the
    address mappings and associated flags. The primary reference for
    this patch set was the AM57xx TRM, SPRUHZ6 Rev H, Chapter 7.4.4
    "IPUx_UNICACHE_MMU (AMMU) Registers". However, other TRMs, like
    the OMAP4470 Public TRM (SWPU270 Rev T) were also consulted in
    order to make the code as reusable as possible.
    
    I chose to structure these patches as having a "common" area plus
    a device-specific area since there are other devices that also
    implement the AMMU. For example, OMAP4 and OMAP5 also use the
    Attribute MMU, but they have a different number of instances of
    the IPU (Cortex M3/M4 subsystem). Also, OMAP4 and OMAP5 contained
    an AMMU for their DSP subsystem since they used a different DSP
    core. So if desired it would be fairly simple for someone to create
    a follow-up patch that adds OMAP4/5 support where they could leverage
    the underlying register decoding that is common across devices.
    
    Signed-off-by: Brad Griffis <bgriffis@ti.com>
    [nm@ti.com: minor cleanups]
    Signed-off-by: Nishanth Menon <nm@ti.com>
    brad-griffis committed with nmenon Jan 20, 2017
Commits on Sep 3, 2016
  1. omapconf: v1.73

    Signed-off-by: Nishanth Menon <nm@ti.com>
    nmenon committed Sep 3, 2016
Commits on Jul 16, 2016
  1. [AM437X][PRM] Add register definitions for crypto IPs

    Because the RNG, SHA0, DES, and AES0 CLKCTRL registers are all used by
    the Linux kernel to support their driver implementations so let's also
    add the corresponding CONTEXT registers to the PRM code here as well.
    
    Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    dgerlach committed with nmenon May 23, 2016
  2. [AM437X][CM] Add register definitions for crypto IPs

    The RNG, SHA0, DES, and AES0 CLKCTRL registers are all exposed by the Linux
    kernel to support their driver implementations so add them here as well
    so that we can easily tell their state.
    
    Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    dgerlach committed with nmenon May 23, 2016
  3. [AM335X][CM] Add register definitions for crypto IPs

    The RNG, SHA0, and AES0 CLKCTRL registers are all exposed by the Linux
    kernel to support their driver implementations so add them here as well
    so that we can easily tell their state.
    
    Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    dgerlach committed with nmenon May 23, 2016
Commits on May 9, 2016
  1. [I2CTOOLS] I2c-busses: Define _DEFAULT_SOURCE as well

    Newer glib (>2.2) prefers _DEFAULT_SOURCE defined, so allow builds based
    on what ever glib needed.
    
    Signed-off-by: Nishanth Menon <nm@ti.com>
    nmenon committed May 9, 2016
  2. [AM437x][PRCM] Allow dump of prcm irq or prcm dpll raw registers

    Add dump of dpll and irq prcm registers to dump prcm command.
    
    Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    dgerlach committed with nmenon Apr 18, 2016
  3. [AM437x][PRCM] Add PRCM dump support

    Add functions to dump each PRM and cm module according to power
    domain. Option to dump all PRCM registers. Although not technically a
    power domain, PRCM device registers can also be dumped.
    
    Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    dgerlach committed with nmenon Apr 18, 2016
  4. [AM437x][PRM] Add register definitions and register access support

    Add all AM437X PRM register definitions and appropriate accessors
    functions for use by 'dump prcm' command.
    
    Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    dgerlach committed with nmenon Apr 18, 2016
  5. [AM437x][CM] Add register definitions and register access support

    Add all AM437X CM register definitions and appropriate accessors
    functions for use by 'dump prcm' command.
    
    Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    dgerlach committed with nmenon Apr 18, 2016
  6. [AM437x][EMIF] Add support for dump EMIF

    Add EMIF register functions to implement the dump EMIF command in
    omapconf for AM437X.
    
    Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    dgerlach committed with nmenon Apr 18, 2016
Commits on Apr 14, 2016
  1. Separate wake_lock from Android

    Add API to check if OS supports wake_lock and use the same
    [COMMON][LIB] for wake_lock operations check.
    
    Fixes: #35
    
    Reported-By: ggardet <guillaume.gardet@opensuse.org>
    Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    Vishal Mahaveer committed with nmenon Mar 10, 2016
  2. [LIB][ANDROID] Check if OS is Android based on lowmemorykiller

    More Linux distributions support wake_lock now, use lowmemory killer
    driver to identify Android OS.
    
    Fixes: #35
    
    Reported-By: ggardet <guillaume.gardet@opensuse.org>
    Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    Vishal Mahaveer committed with nmenon Mar 10, 2016
  3. [CPUINFO][DRA72] Support SR2.0

    Add ID code support for DRA72x SR2.0
    
    Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    Vishal Mahaveer committed with nmenon Mar 10, 2016
Commits on Dec 11, 2015
  1. [AM335X][CTT] Add missing registers

    This commit picks up a bunch of missing registers.  This was
    determined by "Save Registers" in CTT.  Comparing the generated
    rd1 file against the one being input showed many missing registers.
    
    Sync with v4.0.0.0  http://www.ti.com/tool/clocktreetool
    
    Acked-by: Dave Gerlach <d-gerlach@ti.com>
    Signed-off-by: Brad Griffis <bgriffis@ti.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    brad-griffis committed with nmenon Dec 10, 2015
Commits on Nov 23, 2015
  1. [LIB][ANDROID] Extend product name to include Marshmallow

    Extend android product name to include Marshmallow
    
    Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    Vishal Mahaveer committed with nmenon Oct 7, 2015
Commits on Aug 28, 2015
  1. [Makefile] squash build error message when git is not available

    Typical example is when building a tarball, error message "/bin/sh: 1:
    git: not found" is seen. we can just dump that message.
    
    Reported-by: Robert C Nelson <robertcnelson@gmail.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    nmenon committed Aug 28, 2015
  2. [COMMON][TRACE] Add debug print if chdir does not work

    yet another gcc 5.2 nuisance. fixes:
    common/trace.c: In function ‘trace_perf_capture’:
    common/trace.c:1633:2: warning: ignoring return value of ‘chdir’, declared with attribute warn_unused_result [-Wunused-result]
      chdir("/data");
      ^
    
    Reported-by: Robert C Nelson <robertcnelson@gmail.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    nmenon committed Aug 28, 2015
  3. [LINUX][MEM] Remove inline from global functions

    inline with a static variable causes gcc 5.2 to croak and die
    
    Fixes:
    linux/linux_mem.h:51:14: warning: inline function ‘lmem_phys2virt’ declared but never defined
     inline void *lmem_phys2virt(void *addr);
                  ^
    linux/linux_mem.c:239:34: warning: ‘mem_map_base’ is static but used in inline function ‘lmem_phys2virt’ which is not static
      return (void *) ((unsigned int) mem_map_base +
                                      ^
    /bin/sh: 1: git: not found
    common/mem.o: In function `mem_phys2virt':
    mem.c:(.text+0x34): undefined reference to `lmem_phys2virt'
    collect2: error: ld returned 1 exit status
    
    Reported-by: Robert C Nelson <robertcnelson@gmail.com>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    nmenon committed Aug 28, 2015