From 40022cf501761abb5652ebdd30b28373704ab1eb Mon Sep 17 00:00:00 2001 From: Artem Radzikhovskyy Date: Fri, 13 Jan 2023 09:10:20 -0800 Subject: [PATCH 1/3] Added sim support --- .../Tutorials/Features/private_copies/README.md | 17 +++++++++++++++-- .../Features/private_copies/src/CMakeLists.txt | 17 +++++++++++++++++ .../private_copies/src/private_copies.cpp | 16 ++++++++++++---- 3 files changed, 44 insertions(+), 6 deletions(-) diff --git a/DirectProgramming/C++SYCL_FPGA/Tutorials/Features/private_copies/README.md b/DirectProgramming/C++SYCL_FPGA/Tutorials/Features/private_copies/README.md index 015977f275..3371804822 100755 --- a/DirectProgramming/C++SYCL_FPGA/Tutorials/Features/private_copies/README.md +++ b/DirectProgramming/C++SYCL_FPGA/Tutorials/Features/private_copies/README.md @@ -130,6 +130,10 @@ A typical design flow may be to: ``` make report ``` + * Compile for simulation (fast compile time, targets simulated FPGA device, reduced data size): + ``` + make fpga_sim + ``` * Compile for FPGA hardware (longer compile time, targets FPGA device): ``` make fpga @@ -167,6 +171,10 @@ A typical design flow may be to: ``` nmake report ``` + * Compile for simulation (fast compile time, targets simulated FPGA device, reduced data size): + ``` + nmake fpga_sim + ``` * Compile for FPGA hardware (longer compile time, targets FPGA device): ``` nmake fpga @@ -188,7 +196,12 @@ On the main report page, scroll down to the section titled "Estimated Resource U ./private_copies.fpga_emu (Linux) private_copies.fpga_emu.exe (Windows) ``` -2. Run the sample on the FPGA device: +2. Run the sample on the FPGA simulator device: + ``` + ./private_copies.fpga_sim (Linux) + private_copies.fpga_sim.exe (Windows) + ``` +3. Run the sample on the FPGA device: ``` ./private_copies.fpga (Linux) private_copies.fpga.exe (Windows) @@ -218,7 +231,7 @@ When run on the Intel® PAC with Intel Arria10® 10 GX FPGA hardware board Setting the `private_copies` attribute to 0 (or equivalently omitting the attribute entirely) produced good throughput, and the reports show us that the compiler selected 3 private copies. This does produce the optimal throughput, but in this case it probably makes sense to save some area in exchange for a very small throughput loss by specifying 2 private copies instead. -When run on the FPGA emulator, the `private_copies` attribute has no effect on kernel time. You may actually notice that the emulator achieved higher throughput than the FPGA in this example. This is because this trivial example uses only a tiny fraction of the spatial compute resources available on the FPGA. +When run on the FPGA emulator or simulator, the `private_copies` attribute has no effect on kernel time. You may actually notice that the emulator achieved higher throughput than the FPGA in this example. This is because this trivial example uses only a tiny fraction of the spatial compute resources available on the FPGA. ## License diff --git a/DirectProgramming/C++SYCL_FPGA/Tutorials/Features/private_copies/src/CMakeLists.txt b/DirectProgramming/C++SYCL_FPGA/Tutorials/Features/private_copies/src/CMakeLists.txt index a0288d5568..14b76322b5 100755 --- a/DirectProgramming/C++SYCL_FPGA/Tutorials/Features/private_copies/src/CMakeLists.txt +++ b/DirectProgramming/C++SYCL_FPGA/Tutorials/Features/private_copies/src/CMakeLists.txt @@ -1,6 +1,7 @@ set(SOURCE_FILE private_copies.cpp) set(TARGET_NAME private_copies) set(EMULATOR_TARGET ${TARGET_NAME}.fpga_emu) +set(SIMULATOR_TARGET ${TARGET_NAME}.fpga_sim) set(FPGA_TARGET ${TARGET_NAME}.fpga) # FPGA board selection @@ -24,6 +25,8 @@ endif() # For this reason, FPGA backend flags must be passed as link flags in CMake. set(EMULATOR_COMPILE_FLAGS "-fsycl -fintelfpga -Wall ${WIN_FLAG} -DFPGA_EMULATOR") set(EMULATOR_LINK_FLAGS "-fsycl -fintelfpga") +set(SIMULATOR_COMPILE_FLAGS "-fsycl -fintelfpga -Wall ${WIN_FLAG} -Xssimulation -DFPGA_SIMULATOR") +set(SIMULATOR_LINK_FLAGS "-fsycl -fintelfpga -Xssimulation -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS}") set(HARDWARE_COMPILE_FLAGS "-fsycl -fintelfpga -Wall ${WIN_FLAG} -DFPGA_HARDWARE") set(HARDWARE_LINK_FLAGS "-fsycl -fintelfpga -Xshardware -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS}") # use cmake -D USER_HARDWARE_FLAGS= to set extra flags for FPGA backend compilation @@ -56,6 +59,20 @@ set_target_properties(${FPGA_EARLY_IMAGE} PROPERTIES COMPILE_FLAGS "${HARDWARE_C set_target_properties(${FPGA_EARLY_IMAGE} PROPERTIES LINK_FLAGS "${HARDWARE_LINK_FLAGS} -fsycl-link=early") # fsycl-link=early stops the compiler after RTL generation, before invoking Quartus® +############################################################################### +### FPGA Simulator +############################################################################### +# To compile in a single command: +# icpx -fsycl -fintelfpga -Xssimulation -DFPGA_SIMULATOR -Xstarget= private_copies.cpp -o private_copies.fpga +# CMake executes: +# [compile] icpx -fsycl -fintelfpga -Xssimulation -DFPGA_SIMULATOR -o private_copies.cpp.o -c private_copies.cpp +# [link] icpx -fsycl -fintelfpga -Xssimulation -Xstarget= private_copies.cpp.o -o private_copies.fpga +add_executable(${SIMULATOR_TARGET} EXCLUDE_FROM_ALL ${SOURCE_FILE}) +target_include_directories(${SIMULATOR_TARGET} PRIVATE ../../../../include) +add_custom_target(fpga DEPENDS ${SIMULATOR_TARGET}) +set_target_properties(${SIMULATOR_TARGET} PROPERTIES COMPILE_FLAGS "${SIMULATOR_COMPILE_FLAGS}") +set_target_properties(${SIMULATOR_TARGET} PROPERTIES LINK_FLAGS "${SIMULATOR_LINK_FLAGS}") + ############################################################################### ### FPGA Hardware ############################################################################### diff --git a/DirectProgramming/C++SYCL_FPGA/Tutorials/Features/private_copies/src/private_copies.cpp b/DirectProgramming/C++SYCL_FPGA/Tutorials/Features/private_copies/src/private_copies.cpp index ce7d020e2b..f2e818cac7 100644 --- a/DirectProgramming/C++SYCL_FPGA/Tutorials/Features/private_copies/src/private_copies.cpp +++ b/DirectProgramming/C++SYCL_FPGA/Tutorials/Features/private_copies/src/private_copies.cpp @@ -15,8 +15,14 @@ using namespace sycl; -constexpr size_t kSize = 8192; +#if defined(FPGA_SIMULATOR) +// Smaller size to keep the runtime reasonable +constexpr size_t kSize = 512; //2^9 +constexpr size_t kMaxIter = 100; +#else +constexpr size_t kSize = 8192; //2^13 constexpr size_t kMaxIter = 50000; +#endif constexpr size_t kTotalOps = 2 * kMaxIter * kSize; constexpr size_t kMaxValue = 128; @@ -33,10 +39,12 @@ template class Kernel; template void SimpleMathWithShift(const IntArray &array, int shift, IntScalar &result) { -#if FPGA_HARDWARE - auto selector = sycl::ext::intel::fpga_selector_v; +#if FPGA_SIMULATOR + auto selector = sycl::ext::intel::fpga_simulator_selector_v; +#elif FPGA_HARDWARE + auto selector = sycl::ext::intel::fpga_selector_v; #else // #if FPGA_EMULATOR - auto selector = sycl::ext::intel::fpga_emulator_selector_v; + auto selector = sycl::ext::intel::fpga_emulator_selector_v; #endif double kernel_time = 0.0; From c98397bfa848dae15a702fa6e707e83f407bea37 Mon Sep 17 00:00:00 2001 From: Artem Radzikhovskyy Date: Fri, 13 Jan 2023 09:39:45 -0800 Subject: [PATCH 2/3] Fixes --- .../Tutorials/Features/private_copies/src/CMakeLists.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/DirectProgramming/C++SYCL_FPGA/Tutorials/Features/private_copies/src/CMakeLists.txt b/DirectProgramming/C++SYCL_FPGA/Tutorials/Features/private_copies/src/CMakeLists.txt index 14b76322b5..25fde594d3 100755 --- a/DirectProgramming/C++SYCL_FPGA/Tutorials/Features/private_copies/src/CMakeLists.txt +++ b/DirectProgramming/C++SYCL_FPGA/Tutorials/Features/private_copies/src/CMakeLists.txt @@ -67,9 +67,9 @@ set_target_properties(${FPGA_EARLY_IMAGE} PROPERTIES LINK_FLAGS "${HARDWARE_LINK # CMake executes: # [compile] icpx -fsycl -fintelfpga -Xssimulation -DFPGA_SIMULATOR -o private_copies.cpp.o -c private_copies.cpp # [link] icpx -fsycl -fintelfpga -Xssimulation -Xstarget= private_copies.cpp.o -o private_copies.fpga -add_executable(${SIMULATOR_TARGET} EXCLUDE_FROM_ALL ${SOURCE_FILE}) +add_executable(${SIMULATOR_TARGET} ${SOURCE_FILE}) target_include_directories(${SIMULATOR_TARGET} PRIVATE ../../../../include) -add_custom_target(fpga DEPENDS ${SIMULATOR_TARGET}) +add_custom_target(fpga_sim DEPENDS ${SIMULATOR_TARGET}) set_target_properties(${SIMULATOR_TARGET} PROPERTIES COMPILE_FLAGS "${SIMULATOR_COMPILE_FLAGS}") set_target_properties(${SIMULATOR_TARGET} PROPERTIES LINK_FLAGS "${SIMULATOR_LINK_FLAGS}") From edf1e7484566f6bc30c8b31c1a7f2ef640424993 Mon Sep 17 00:00:00 2001 From: Artem Radzikhovskyy Date: Mon, 16 Jan 2023 07:28:49 -0800 Subject: [PATCH 3/3] Running Inst update --- .../Tutorials/Features/private_copies/README.md | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/DirectProgramming/C++SYCL_FPGA/Tutorials/Features/private_copies/README.md b/DirectProgramming/C++SYCL_FPGA/Tutorials/Features/private_copies/README.md index 3371804822..75c85a1583 100755 --- a/DirectProgramming/C++SYCL_FPGA/Tutorials/Features/private_copies/README.md +++ b/DirectProgramming/C++SYCL_FPGA/Tutorials/Features/private_copies/README.md @@ -197,10 +197,16 @@ On the main report page, scroll down to the section titled "Estimated Resource U private_copies.fpga_emu.exe (Windows) ``` 2. Run the sample on the FPGA simulator device: - ``` - ./private_copies.fpga_sim (Linux) - private_copies.fpga_sim.exe (Windows) - ``` + * On Linux + ```bash + CL_CONTEXT_MPSIM_DEVICE_INTELFPGA=1 ./private_copies.fpga_sim + ``` + * On Windows + ```bash + set CL_CONTEXT_MPSIM_DEVICE_INTELFPGA=1 + private_copies.fpga_sim.exe + set CL_CONTEXT_MPSIM_DEVICE_INTELFPGA= + ``` 3. Run the sample on the FPGA device: ``` ./private_copies.fpga (Linux)