From d5e8ecd52d12a40030afbf1a832f3a30f10bd93a Mon Sep 17 00:00:00 2001 From: Yohann Uguen Date: Thu, 9 Mar 2023 01:04:48 -0800 Subject: [PATCH] seed update Signed-off-by: Yohann Uguen --- .../C++SYCL_FPGA/ReferenceDesigns/gzip/src/CMakeLists.txt | 4 ++-- .../C++SYCL_FPGA/ReferenceDesigns/qrd/src/CMakeLists.txt | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/DirectProgramming/C++SYCL_FPGA/ReferenceDesigns/gzip/src/CMakeLists.txt b/DirectProgramming/C++SYCL_FPGA/ReferenceDesigns/gzip/src/CMakeLists.txt index 635c19ec5a..a6e439485d 100755 --- a/DirectProgramming/C++SYCL_FPGA/ReferenceDesigns/gzip/src/CMakeLists.txt +++ b/DirectProgramming/C++SYCL_FPGA/ReferenceDesigns/gzip/src/CMakeLists.txt @@ -74,10 +74,10 @@ elseif(DEVICE_FLAG MATCHES "S10") # S10 parameters set(NUM_ENGINES 2) if(DEFINED LOW_LATENCY) - set(SEED "-Xsseed=16") + set(SEED "-Xsseed=2") set(NUM_REORDER "") else() - set(SEED "-Xsseed=1") + set(SEED "-Xsseed=10") # For the High Bandwidth variant, specify 6 reordering units to improve global memory read bandwidth across 4 channels of DDR. # For Low Latency variant this is not necessary since only one channel of global memory is used (host memory). set(NUM_REORDER "-Xsnum-reorder=6") diff --git a/DirectProgramming/C++SYCL_FPGA/ReferenceDesigns/qrd/src/CMakeLists.txt b/DirectProgramming/C++SYCL_FPGA/ReferenceDesigns/qrd/src/CMakeLists.txt index c9f19913be..8c4fbe4520 100644 --- a/DirectProgramming/C++SYCL_FPGA/ReferenceDesigns/qrd/src/CMakeLists.txt +++ b/DirectProgramming/C++SYCL_FPGA/ReferenceDesigns/qrd/src/CMakeLists.txt @@ -64,7 +64,7 @@ if(DEVICE_FLAG MATCHES "A10") set(COMPLEX 1) set(FIXED_ITERATIONS 64) set(CLOCK_TARGET "-Xsclock=360MHz") - set(SEED "-Xsseed=7") + set(SEED "-Xsseed=1") elseif(DEVICE_FLAG MATCHES "S10") # S10 parameters set(ROWS_COMPONENT 256) @@ -72,7 +72,7 @@ elseif(DEVICE_FLAG MATCHES "S10") set(COMPLEX 1) set(FIXED_ITERATIONS 110) set(CLOCK_TARGET "-Xsclock=480MHz") - set(SEED "-Xsseed=2") + set(SEED "-Xsseed=3") elseif(DEVICE_FLAG MATCHES "Agilex") # Agilex™ parameters set(ROWS_COMPONENT 256)