From 1657296485ff5bb16b44db6c17de6eeac530244d Mon Sep 17 00:00:00 2001
From: Caleb Palmer <cnpalmer@us.ibm.com>
Date: Fri, 22 Sep 2017 16:01:49 -0500
Subject: [PATCH] PRD: Cumulus PON Support MDIA Init to zero

Change-Id: I3987ba3850e14105921ed346956185e3961de2b2
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46649
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com>
Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46810
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
---
 src/usr/diag/prdf/plat/mem/prdfMemTdCtlr.C | 58 +++++++++++++---------
 1 file changed, 34 insertions(+), 24 deletions(-)

diff --git a/src/usr/diag/prdf/plat/mem/prdfMemTdCtlr.C b/src/usr/diag/prdf/plat/mem/prdfMemTdCtlr.C
index d37793455e6..db3501a3a26 100644
--- a/src/usr/diag/prdf/plat/mem/prdfMemTdCtlr.C
+++ b/src/usr/diag/prdf/plat/mem/prdfMemTdCtlr.C
@@ -184,6 +184,37 @@ uint32_t __checkEcc( ExtensibleChip * i_chip, TdQueue & io_queue,
 
 //------------------------------------------------------------------------------
 
+template<TARGETING::TYPE T>
+TdRankListEntry __getStopRank( ExtensibleChip * i_chip, const MemAddr & i_addr )
+{
+    MemRank stopRank = i_addr.getRank();
+
+    // ############################ SIMICs only ############################
+    // We have found it to be increasingly difficult to simulate the MCBMCAT
+    // register in SIMICs. We tried copying the address in the MCBEA
+    // registers, but the HWP code will input the last possible address to
+    // the MCBEA registers, but it is likely that this address is not a
+    // configured address. MCBIST commands are tolerant of this, where MBA
+    // maintenance commands are not. Also, there are multiple possible
+    // subtests for MCBIST commands. So it is difficult to determine which
+    // subtest will be the last configured address. To maintain sanity, we
+    // will simply short-circuit the code and ensure we always get the last
+    // configured rank.
+    if ( ::Util::isSimicsRunning() )
+    {
+        std::vector<MemRank> list;
+        getSlaveRanks<T>( i_chip->getTrgt(), list );
+        PRDF_ASSERT( !list.empty() ); // func target with no config ranks
+
+        stopRank = list.back(); // Get the last configured rank.
+    }
+    // #####################################################################
+
+    return TdRankListEntry( i_chip, stopRank );
+}
+
+//------------------------------------------------------------------------------
+
 template<TARGETING::TYPE T>
 uint32_t __analyzeCmdComplete( ExtensibleChip * i_chip,
                                TdQueue & io_queue,
@@ -229,31 +260,10 @@ uint32_t __analyzeCmdComplete<TYPE_MCBIST>( ExtensibleChip * i_chip,
         // Therefore, we can simply use the first MCA in the list for all
         // configs.
         ExtensibleChip * stopChip = portList.front();
-        MemRank          stopRank = i_addr.getRank();
-
-        // ############################ SIMICs only ############################
-        // We have found it to be increasingly difficult to simulate the MCBMCAT
-        // register in SIMICs. We tried copying the address in the MCBEA
-        // registers, but the HWP code will input the last possible address to
-        // the MCBEA registers, but it is likely that this address is not a
-        // configured address. MCBIST commands are tolerant of this, where MBA
-        // maintenance commands are not. Also, there are multiple possible
-        // subtests for MCBIST commands. So it is difficult to determine which
-        // subtest will be the last configured address. To maintain sanity, we
-        // will simply short-circuit the code and ensure we always get the last
-        // configured rank.
-        if ( ::Util::isSimicsRunning() )
-        {
-            std::vector<MemRank> list;
-            getSlaveRanks<TYPE_MCA>( stopChip->getTrgt(), list );
-            PRDF_ASSERT( !list.empty() ); // func target with no config ranks
-
-            stopRank = list.back(); // Get the last configured rank.
-        }
-        // #####################################################################
 
         // Update iv_stoppedRank.
-        o_stoppedRank = TdRankListEntry ( stopChip, stopRank );
+        o_stoppedRank = __getStopRank<TYPE_MCA>( stopChip, i_addr );
+
         #ifndef __HOSTBOOT_RUNTIME
         // Update iv_broadcastMode.
         o_broadcastMode = ( 1 < portList.size() );
@@ -298,7 +308,7 @@ uint32_t __analyzeCmdComplete<TYPE_MBA>( ExtensibleChip * i_chip,
                                          STEP_CODE_DATA_STRUCT & io_sc )
 {
     // Update iv_stoppedRank.
-    o_stoppedRank = TdRankListEntry( i_chip, i_addr.getRank() );
+    o_stoppedRank = __getStopRank<TYPE_MBA>( i_chip, i_addr );
 
     /* TODO RTC 157888
     // Check the MBA for ECC errors.