From 204f665312b42efbd23e01660baa47497908556a Mon Sep 17 00:00:00 2001 From: Matt Derksen Date: Fri, 13 Oct 2017 08:44:42 -0500 Subject: [PATCH] Add SBE boot side to default console output Adding trace to help understand failures. Try to do this as early as possible in the boot. Change-Id: I0880362e31e84f0761f3ad216e24a82f9f4cc0e9 RTC:180354 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48400 Reviewed-by: Martin Gloff Tested-by: Jenkins Server Reviewed-by: Christian R. Geddes Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Matt Derksen Reviewed-by: Daniel M. Crowell --- .../istepdispatcher/istepdispatcher.C | 64 +++++++++++++++++++ src/usr/initservice/istepdispatcher/makefile | 5 +- 2 files changed, 68 insertions(+), 1 deletion(-) diff --git a/src/usr/initservice/istepdispatcher/istepdispatcher.C b/src/usr/initservice/istepdispatcher/istepdispatcher.C index 8d330847f55..103bd704c5f 100644 --- a/src/usr/initservice/istepdispatcher/istepdispatcher.C +++ b/src/usr/initservice/istepdispatcher/istepdispatcher.C @@ -80,6 +80,13 @@ #include #include +// --------------------------- +// Used to grab SBE boot side +#include +#include +#include +// --------------------------- + namespace ISTEPS_TRACE { // declare storage for isteps_trace! @@ -260,6 +267,63 @@ void IStepDispatcher::init(errlHndl_t &io_rtaskRetErrl) TRACE::setTraceLite(l_tlEnabled); #endif + + ////////////////// + // Send to console which SBE side we are currently on + ////////////////// + SBE::sbeSeepromSide_t l_bootside = SBE::SBE_SEEPROM_INVALID; + TARGETING::Target * l_masterTarget = nullptr; + TARGETING::targetService().masterProcChipTargetHandle(l_masterTarget); + + // NOTE: can't just call SBE::getSbeBootSeeprom(..) as it isn't loaded + + uint64_t scomData = 0x0; + // Read PERV_SB_CS_SCOM 0x00050008 + size_t op_size = sizeof(scomData); + err = deviceRead( l_masterTarget, + &scomData, + op_size, + DEVICE_SCOM_ADDRESS(PERV_SB_CS_SCOM) ); + if( err ) + { + TRACFCOMP( g_trac_initsvc, ERR_MRK"IStepDispatcher() - " + "Unable to find SBE boot side, Error " + "reading SB CS SCOM (0x%.8X) from Target :" + "HUID=0x%.8X, RC=0x%X, PLID=0x%lX", + PERV_SB_CS_SCOM, // 0x00050008 + TARGETING::get_huid(l_masterTarget), + ERRL_GETRC_SAFE(err), + ERRL_GETPLID_SAFE(err)); + err->collectTrace("INITSVC", 1024); + errlCommit(err, INITSVC_COMP_ID ); + } + else + { + if(scomData & SBE::SBE_BOOT_SELECT_MASK) + { + l_bootside = SBE::SBE_SEEPROM1; + } + else + { + l_bootside = SBE::SBE_SEEPROM0; + } + + TRACFCOMP( g_trac_initsvc, + INFO_MRK"IStepDispatcher(): SBE boot side %d for proc=%.8X", + l_bootside, TARGETING::get_huid(l_masterTarget) ); + + + #ifdef CONFIG_CONSOLE + // Sending to console SBE side + CONSOLE::displayf( NULL, + "Booting from SBE side %d on master proc=%.8X", + l_bootside, TARGETING::get_huid(l_masterTarget) ); + CONSOLE::flush(); + #endif + } + //////////////// + + if(iv_mailboxEnabled) { // Register message Q with FSP Mailbox diff --git a/src/usr/initservice/istepdispatcher/makefile b/src/usr/initservice/istepdispatcher/makefile index 71fa00f140e..a2dcb470419 100644 --- a/src/usr/initservice/istepdispatcher/makefile +++ b/src/usr/initservice/istepdispatcher/makefile @@ -5,7 +5,7 @@ # # OpenPOWER HostBoot Project # -# Contributors Listed Below - COPYRIGHT 2011,2016 +# Contributors Listed Below - COPYRIGHT 2011,2017 # [+] International Business Machines Corp. # # @@ -30,6 +30,9 @@ EXTRAINCDIR += ${ROOTPATH}/src/include/usr/ecmddatabuffer # Next includes required for attribute override support EXTRAINCDIR += ${ROOTPATH}/src/import/hwpf/fapi2/include/ EXTRAINCDIR += ${ROOTPATH}/src/include/usr/fapi2/ +EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/utils/imageProcs/ +EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/ffdc/ +EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/common/include/ VPATH = ${ROOTPATH}/src/usr/initservice/bootconfig/