From 42f6285e76bb55856fb3afea9b670f71aa65417a Mon Sep 17 00:00:00 2001 From: Mark Pizzutillo Date: Tue, 18 Feb 2020 12:40:13 -0500 Subject: [PATCH] Update pmic_bias_tool percentage bias to be relative to nominal Will use attribute value as the base (nominal) value. Will check that the value is non-zero before using it, in case the attributes are not set (for example during pmic_enable manual mode) Change-Id: I89db022cd7867ce8986cc4a5a36c52f8fde9a355 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/92393 Tested-by: FSP CI Jenkins Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: Louis Stermole Reviewed-by: STEPHEN GLANCY Reviewed-by: Jennifer A Stofer Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/92419 Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Daniel M Crowell --- .../lib/mss_pmic_attribute_accessors_manual.H | 426 +++++++++++++++++ .../hwp/pmic/lib/utils/pmic_common_utils.C | 34 +- .../hwp/pmic/lib/utils/pmic_common_utils.H | 40 +- .../hwp/pmic/lib/utils/pmic_enable_utils.C | 35 +- .../hwp/pmic/lib/utils/pmic_enable_utils.H | 430 ++---------------- src/usr/isteps/istep08/makefile | 3 +- 6 files changed, 530 insertions(+), 438 deletions(-) create mode 100644 src/import/chips/ocmb/common/procedures/hwp/pmic/lib/mss_pmic_attribute_accessors_manual.H diff --git a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/mss_pmic_attribute_accessors_manual.H b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/mss_pmic_attribute_accessors_manual.H new file mode 100644 index 00000000000..3c7e790dab7 --- /dev/null +++ b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/mss_pmic_attribute_accessors_manual.H @@ -0,0 +1,426 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/import/chips/ocmb/common/procedures/hwp/pmic/lib/mss_pmic_attribute_accessors_manual.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2020 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ + +/// +/// @file mss_pmic_attribute_accessors_manual.H +/// @brief Manual PMIC attribute accessors +/// +// *HWP HWP Owner: Mark Pizzutillo +// *HWP HWP Backup: Louis Stermole +// *HWP Team: Memory +// *HWP Level: 1 +// *HWP Consumed by: FSP:HB + +#ifndef _MSS_PMIC_ATTR_ACCESSORS_MANUAL_H_ +#define _MSS_PMIC_ATTR_ACCESSORS_MANUAL_H_ + +#include +#include +#include + +namespace mss +{ +namespace attr +{ + +//-------------------- +// Attribute Getters +//-------------------- + +// Attribute getter pointer for manufacturer/vendor ID +typedef fapi2::ReturnCode (*mfg_id_attr_ptr)(const fapi2::Target& i_target, + uint16_t& o_value); + +// Manufacturer / Vendor ID +static constexpr mfg_id_attr_ptr get_mfg_id[] = +{ + mss::attr::get_pmic0_mfg_id, + mss::attr::get_pmic1_mfg_id, +}; + +/// @brief pointer to PMIC attribute getters for OCMB parent target of pmic +typedef fapi2::ReturnCode (*pmic_attr_ptr)(const fapi2::Target& i_target, + uint8_t& o_value); +typedef fapi2::ReturnCode (*pmic_attr_ptr_signed)(const fapi2::Target& i_target, + int8_t& o_value); + +// Pointers below allow for run-time attribute getter selection by PMIC ID (0,1) + +// Voltage Setting +static constexpr pmic_attr_ptr get_swa_voltage_setting[] = +{ + mss::attr::get_pmic0_swa_voltage_setting, + mss::attr::get_pmic1_swa_voltage_setting +}; +static constexpr pmic_attr_ptr get_swb_voltage_setting[] = +{ + mss::attr::get_pmic0_swb_voltage_setting, + mss::attr::get_pmic1_swb_voltage_setting +}; +static constexpr pmic_attr_ptr get_swc_voltage_setting[] = +{ + mss::attr::get_pmic0_swc_voltage_setting, + mss::attr::get_pmic1_swc_voltage_setting +}; +static constexpr pmic_attr_ptr get_swd_voltage_setting[] = +{ + mss::attr::get_pmic0_swd_voltage_setting, + mss::attr::get_pmic1_swd_voltage_setting +}; + +// Voltage Range Select +static constexpr pmic_attr_ptr get_swa_voltage_range_select[] = +{ + mss::attr::get_pmic0_swa_voltage_range_select, + mss::attr::get_pmic1_swa_voltage_range_select +}; +static constexpr pmic_attr_ptr get_swb_voltage_range_select[] = +{ + mss::attr::get_pmic0_swb_voltage_range_select, + mss::attr::get_pmic1_swb_voltage_range_select +}; +static constexpr pmic_attr_ptr get_swc_voltage_range_select[] = +{ + mss::attr::get_pmic0_swc_voltage_range_select, + mss::attr::get_pmic1_swc_voltage_range_select +}; +static constexpr pmic_attr_ptr get_swd_voltage_range_select[] = +{ + mss::attr::get_pmic0_swd_voltage_range_select, + mss::attr::get_pmic1_swd_voltage_range_select +}; + +// Voltage Offset +static constexpr pmic_attr_ptr_signed get_swa_voltage_offset[] = +{ + mss::attr::get_pmic0_swa_voltage_offset, + mss::attr::get_pmic1_swa_voltage_offset +}; +static constexpr pmic_attr_ptr_signed get_swb_voltage_offset[] = +{ + mss::attr::get_pmic0_swb_voltage_offset, + mss::attr::get_pmic1_swb_voltage_offset +}; +static constexpr pmic_attr_ptr_signed get_swc_voltage_offset[] = +{ + mss::attr::get_pmic0_swc_voltage_offset, + mss::attr::get_pmic1_swc_voltage_offset +}; +static constexpr pmic_attr_ptr_signed get_swd_voltage_offset[] = +{ + mss::attr::get_pmic0_swd_voltage_offset, + mss::attr::get_pmic1_swd_voltage_offset +}; + +// EFD Fields + +// Offset +static constexpr pmic_attr_ptr_signed get_efd_swa_voltage_offset[] = +{ + mss::attr::get_efd_pmic0_swa_voltage_offset, + mss::attr::get_efd_pmic1_swa_voltage_offset +}; + +static constexpr pmic_attr_ptr_signed get_efd_swb_voltage_offset[] = +{ + mss::attr::get_efd_pmic0_swb_voltage_offset, + mss::attr::get_efd_pmic1_swb_voltage_offset +}; + +static constexpr pmic_attr_ptr_signed get_efd_swc_voltage_offset[] = +{ + mss::attr::get_efd_pmic0_swc_voltage_offset, + mss::attr::get_efd_pmic1_swc_voltage_offset +}; + +static constexpr pmic_attr_ptr_signed get_efd_swd_voltage_offset[] = +{ + mss::attr::get_efd_pmic0_swd_voltage_offset, + mss::attr::get_efd_pmic1_swd_voltage_offset +}; + +// These arrays allow us to dynamically choose the right attribute getter at runtime based on the rail and mss::pmic::id +static constexpr const pmic_attr_ptr* get_volt_setting[] = +{ + get_swa_voltage_setting, + get_swb_voltage_setting, + get_swc_voltage_setting, + get_swd_voltage_setting +}; + +static constexpr const pmic_attr_ptr* get_volt_range_select[] = +{ + get_swa_voltage_range_select, + get_swb_voltage_range_select, + get_swc_voltage_range_select, + get_swd_voltage_range_select +}; + +static constexpr const pmic_attr_ptr_signed* get_volt_offset[] = +{ + get_swa_voltage_offset, + get_swb_voltage_offset, + get_swc_voltage_offset, + get_swd_voltage_offset +}; + +// EFD Offset + Direction functions +static constexpr const pmic_attr_ptr_signed* get_efd_volt_offset[] = +{ + get_efd_swa_voltage_offset, + get_efd_swb_voltage_offset, + get_efd_swc_voltage_offset, + get_efd_swd_voltage_offset +}; + +// PMIC0/1 sequence order +static constexpr pmic_attr_ptr get_sequence[] = +{ + mss::attr::get_pmic0_sequence, + mss::attr::get_pmic1_sequence +}; +// Sequence Delay +static constexpr pmic_attr_ptr get_swa_sequence_delay[] = +{ + mss::attr::get_pmic0_swa_sequence_delay, + mss::attr::get_pmic1_swa_sequence_delay +}; +static constexpr pmic_attr_ptr get_swb_sequence_delay[] = +{ + mss::attr::get_pmic0_swb_sequence_delay, + mss::attr::get_pmic1_swb_sequence_delay +}; +static constexpr pmic_attr_ptr get_swc_sequence_delay[] = +{ + mss::attr::get_pmic0_swc_sequence_delay, + mss::attr::get_pmic1_swc_sequence_delay +}; +static constexpr pmic_attr_ptr get_swd_sequence_delay[] = +{ + mss::attr::get_pmic0_swd_sequence_delay, + mss::attr::get_pmic1_swd_sequence_delay +}; + +// Sequence Order +static constexpr pmic_attr_ptr get_swa_sequence_order[] = +{ + mss::attr::get_pmic0_swa_sequence_order, + mss::attr::get_pmic1_swa_sequence_order +}; +static constexpr pmic_attr_ptr get_swb_sequence_order[] = +{ + mss::attr::get_pmic0_swb_sequence_order, + mss::attr::get_pmic1_swb_sequence_order +}; +static constexpr pmic_attr_ptr get_swc_sequence_order[] = +{ + mss::attr::get_pmic0_swc_sequence_order, + mss::attr::get_pmic1_swc_sequence_order +}; +static constexpr pmic_attr_ptr get_swd_sequence_order[] = +{ + mss::attr::get_pmic0_swd_sequence_order, + mss::attr::get_pmic1_swd_sequence_order +}; + +static constexpr const pmic_attr_ptr* get_sequence_order[] = +{ + get_swa_sequence_order, + get_swb_sequence_order, + get_swc_sequence_order, + get_swd_sequence_order +}; + +static constexpr const pmic_attr_ptr* get_sequence_delay[] = +{ + get_swa_sequence_delay, + get_swb_sequence_delay, + get_swc_sequence_delay, + get_swd_sequence_delay +}; + +// Phase Combination +static constexpr pmic_attr_ptr get_phase_comb[] = +{ + mss::attr::get_pmic0_phase_comb, + mss::attr::get_pmic1_phase_comb +}; + +//-------------------- +// Attribute Setters +//-------------------- + +// Attribute setter FP type +typedef fapi2::ReturnCode (*pmic_attr_setter_ptr)(const fapi2::Target& i_target, + uint8_t i_value); +typedef fapi2::ReturnCode (*pmic_attr_setter_ptr_signed)(const fapi2::Target& i_target, + int8_t i_value); + +// Voltage Setting +static constexpr pmic_attr_setter_ptr set_swa_voltage_setting[] = +{ + mss::attr::set_pmic0_swa_voltage_setting, + mss::attr::set_pmic1_swa_voltage_setting +}; +static constexpr pmic_attr_setter_ptr set_swb_voltage_setting[] = +{ + mss::attr::set_pmic0_swb_voltage_setting, + mss::attr::set_pmic1_swb_voltage_setting +}; +static constexpr pmic_attr_setter_ptr set_swc_voltage_setting[] = +{ + mss::attr::set_pmic0_swc_voltage_setting, + mss::attr::set_pmic1_swc_voltage_setting +}; +static constexpr pmic_attr_setter_ptr set_swd_voltage_setting[] = +{ + mss::attr::set_pmic0_swd_voltage_setting, + mss::attr::set_pmic1_swd_voltage_setting +}; + +// Voltage Range Select +static constexpr pmic_attr_setter_ptr set_swa_voltage_range_select[] = +{ + mss::attr::set_pmic0_swa_voltage_range_select, + mss::attr::set_pmic1_swa_voltage_range_select +}; +static constexpr pmic_attr_setter_ptr set_swb_voltage_range_select[] = +{ + mss::attr::set_pmic0_swb_voltage_range_select, + mss::attr::set_pmic1_swb_voltage_range_select +}; +static constexpr pmic_attr_setter_ptr set_swc_voltage_range_select[] = +{ + mss::attr::set_pmic0_swc_voltage_range_select, + mss::attr::set_pmic1_swc_voltage_range_select +}; +static constexpr pmic_attr_setter_ptr set_swd_voltage_range_select[] = +{ + mss::attr::set_pmic0_swd_voltage_range_select, + mss::attr::set_pmic1_swd_voltage_range_select +}; + +// Voltage Offset +static constexpr pmic_attr_setter_ptr_signed set_swa_voltage_offset[] = +{ + mss::attr::set_pmic0_swa_voltage_offset, + mss::attr::set_pmic1_swa_voltage_offset +}; +static constexpr pmic_attr_setter_ptr_signed set_swb_voltage_offset[] = +{ + mss::attr::set_pmic0_swb_voltage_offset, + mss::attr::set_pmic1_swb_voltage_offset +}; +static constexpr pmic_attr_setter_ptr_signed set_swc_voltage_offset[] = +{ + mss::attr::set_pmic0_swc_voltage_offset, + mss::attr::set_pmic1_swc_voltage_offset +}; +static constexpr pmic_attr_setter_ptr_signed set_swd_voltage_offset[] = +{ + mss::attr::set_pmic0_swd_voltage_offset, + mss::attr::set_pmic1_swd_voltage_offset +}; + +// Sequence Delay +static constexpr pmic_attr_setter_ptr set_swa_sequence_delay[] = +{ + mss::attr::set_pmic0_swa_sequence_delay, + mss::attr::set_pmic1_swa_sequence_delay +}; +static constexpr pmic_attr_setter_ptr set_swb_sequence_delay[] = +{ + mss::attr::set_pmic0_swb_sequence_delay, + mss::attr::set_pmic1_swb_sequence_delay +}; +static constexpr pmic_attr_setter_ptr set_swc_sequence_delay[] = +{ + mss::attr::set_pmic0_swc_sequence_delay, + mss::attr::set_pmic1_swc_sequence_delay +}; +static constexpr pmic_attr_setter_ptr set_swd_sequence_delay[] = +{ + mss::attr::set_pmic0_swd_sequence_delay, + mss::attr::set_pmic1_swd_sequence_delay +}; + +// Sequence Order +static constexpr pmic_attr_setter_ptr set_swa_sequence_order[] = +{ + mss::attr::set_pmic0_swa_sequence_order, + mss::attr::set_pmic1_swa_sequence_order +}; +static constexpr pmic_attr_setter_ptr set_swb_sequence_order[] = +{ + mss::attr::set_pmic0_swb_sequence_order, + mss::attr::set_pmic1_swb_sequence_order +}; +static constexpr pmic_attr_setter_ptr set_swc_sequence_order[] = +{ + mss::attr::set_pmic0_swc_sequence_order, + mss::attr::set_pmic1_swc_sequence_order +}; +static constexpr pmic_attr_setter_ptr set_swd_sequence_order[] = +{ + mss::attr::set_pmic0_swd_sequence_order, + mss::attr::set_pmic1_swd_sequence_order +}; + +// Phase Combination +static constexpr pmic_attr_setter_ptr set_phase_comb[] = +{ + mss::attr::set_pmic0_phase_comb, + mss::attr::set_pmic1_phase_comb +}; + +// Offset +static constexpr pmic_attr_setter_ptr_signed set_efd_swa_voltage_offset[] = +{ + mss::attr::set_efd_pmic0_swa_voltage_offset, + mss::attr::set_efd_pmic1_swa_voltage_offset +}; + +static constexpr pmic_attr_setter_ptr_signed set_efd_swb_voltage_offset[] = +{ + mss::attr::set_efd_pmic0_swb_voltage_offset, + mss::attr::set_efd_pmic1_swb_voltage_offset +}; + +static constexpr pmic_attr_setter_ptr_signed set_efd_swc_voltage_offset[] = +{ + mss::attr::set_efd_pmic0_swc_voltage_offset, + mss::attr::set_efd_pmic1_swc_voltage_offset +}; + +static constexpr pmic_attr_setter_ptr_signed set_efd_swd_voltage_offset[] = +{ + mss::attr::set_efd_pmic0_swd_voltage_offset, + mss::attr::set_efd_pmic1_swd_voltage_offset +}; + +} // nss attr +} // ns mss + +#endif diff --git a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_common_utils.C b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_common_utils.C index f89559ddeef..69cebbbf1c1 100644 --- a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_common_utils.C +++ b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_common_utils.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2019 */ +/* Contributors Listed Below - COPYRIGHT 2019,2020 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -42,6 +42,7 @@ #include #include #include +#include namespace mss { @@ -189,6 +190,37 @@ fapi_try_exit: return fapi2::current_err; } +/// +/// @brief Calculate target voltage for PMIC from attribute settings +/// +/// @param[in] i_ocmb_target OCMB parent target of pmic of PMIC (holds the attributes) +/// @param[in] i_id ID of pmic (0,1) +/// @param[in] i_rail RAIL to calculate voltage for +/// @param[out] o_volt_bitmap output bitmap +/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff success +/// +fapi2::ReturnCode calculate_voltage_bitmap_from_attr( + const fapi2::Target& i_ocmb_target, + const mss::pmic::id i_id, + const uint8_t i_rail, + uint8_t& o_volt_bitmap) +{ + uint8_t l_volt = 0; + int8_t l_volt_offset = 0; + int8_t l_efd_volt_offset = 0; + + // Get the attributes corresponding to the rail and PMIC indices + FAPI_TRY(mss::attr::get_volt_setting[i_rail][i_id](i_ocmb_target, l_volt)); + FAPI_TRY(mss::attr::get_volt_offset[i_rail][i_id](i_ocmb_target, l_volt_offset)); + FAPI_TRY(mss::attr::get_efd_volt_offset[i_rail][i_id](i_ocmb_target, l_efd_volt_offset)); + + // Set output buffer + o_volt_bitmap = l_volt + l_volt_offset + l_efd_volt_offset; + +fapi_try_exit: + return fapi2::current_err; +} + namespace status { diff --git a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_common_utils.H b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_common_utils.H index 12a0f4f0b84..1207abb2f3e 100644 --- a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_common_utils.H +++ b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_common_utils.H @@ -49,16 +49,8 @@ namespace mss namespace pmic { -// Attribute getter pointer for manufacturer/vendor ID -typedef fapi2::ReturnCode (*mfg_id_attr_ptr)(const fapi2::Target& i_target, - uint16_t& o_value); - -// Manufacturer / Vendor ID -static constexpr mfg_id_attr_ptr get_mfg_id[] = -{ - mss::attr::get_pmic0_mfg_id, - mss::attr::get_pmic1_mfg_id, -}; +// For output traces +const std::vector PMIC_RAIL_NAMES = {"SWA", "SWB", "SWC", "SWD"}; using REGS = pmicRegs; using FIELDS = pmicFields; @@ -178,6 +170,34 @@ fapi2::ReturnCode pmic_is_idt(const fapi2::Target& i_pm /// fapi2::ReturnCode pmic_is_ti(const fapi2::Target& i_pmic_target, bool& o_is_ti); + +/// +/// @brief Calcuate target voltage for PMIC from attribute settings +/// +/// @param[in] i_ocmb_target OCMB parent target of pmic of PMIC (holds the attributes) +/// @param[in] i_id ID of pmic (0,1) +/// @param[in] i_rail RAIL to calculate voltage for +/// @param[out] o_volt_bitmap output bitmap +/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff success +/// +fapi2::ReturnCode calculate_voltage_bitmap_from_attr( + const fapi2::Target& i_ocmb_target, + const mss::pmic::id i_id, + const uint8_t i_rail, + uint8_t& o_volt_bitmap); + +/// +/// @brief Get PMIC position/ID under OCMB target. There could be 4 pmics, but we care about whether its PMIC0(2) or PMIC1(3) +/// +/// @param[in] i_pmic_target +/// @return mss::pmic::id +/// +inline mss::pmic::id get_relative_pmic_id(const fapi2::Target& i_pmic_target) +{ + using CONSTS = mss::pmic::consts; + return static_cast(mss::index(i_pmic_target) % CONSTS::NUM_UNIQUE_PMICS); +} + namespace status { diff --git a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_enable_utils.C b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_enable_utils.C index b244afc1e97..bf08c1d6aed 100644 --- a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_enable_utils.C +++ b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_enable_utils.C @@ -43,8 +43,8 @@ #include #include #include -#include #include +#include namespace mss { @@ -116,7 +116,7 @@ fapi2::ReturnCode bias_with_spd_phase_comb( uint8_t l_phase_comb = 0; fapi2::buffer l_phase; - FAPI_TRY(mss::pmic::get_phase_comb[i_id](i_ocmb_target, l_phase_comb)); + FAPI_TRY(mss::attr::get_phase_comb[i_id](i_ocmb_target, l_phase_comb)); // Read, replace bit, and then re-write FAPI_TRY(mss::pmic::i2c::reg_read_reverse_buffer(i_pmic_target, REGS::R4F, l_phase)); @@ -151,10 +151,10 @@ fapi2::ReturnCode bias_with_spd_volt_ranges( fapi2::buffer l_volt_range_buffer; - FAPI_TRY(mss::pmic::get_swa_voltage_range_select[i_id](i_ocmb_target, l_swa_range)); - FAPI_TRY(mss::pmic::get_swb_voltage_range_select[i_id](i_ocmb_target, l_swb_range)); - FAPI_TRY(mss::pmic::get_swc_voltage_range_select[i_id](i_ocmb_target, l_swc_range)); - FAPI_TRY(mss::pmic::get_swd_voltage_range_select[i_id](i_ocmb_target, l_swd_range)); + FAPI_TRY(mss::attr::get_swa_voltage_range_select[i_id](i_ocmb_target, l_swa_range)); + FAPI_TRY(mss::attr::get_swb_voltage_range_select[i_id](i_ocmb_target, l_swb_range)); + FAPI_TRY(mss::attr::get_swc_voltage_range_select[i_id](i_ocmb_target, l_swc_range)); + FAPI_TRY(mss::attr::get_swd_voltage_range_select[i_id](i_ocmb_target, l_swd_range)); // Read in what the register has, as to not overwrite any default values FAPI_TRY(mss::pmic::i2c::reg_read_reverse_buffer(i_pmic_target, REGS::R2B, l_volt_range_buffer)); @@ -190,19 +190,6 @@ fapi2::ReturnCode bias_with_spd_startup_seq( using REGS = pmicRegs; using CONSTS = mss::pmic::consts; - // Arrays to key off of rail and PMIC ID - static const pmic_attr_ptr* l_get_sequence_order[] = {mss::pmic::get_swa_sequence_order, - mss::pmic::get_swb_sequence_order, - mss::pmic::get_swc_sequence_order, - mss::pmic::get_swd_sequence_order - }; - - static const pmic_attr_ptr* l_get_sequence_delay[] = {mss::pmic::get_swa_sequence_delay, - mss::pmic::get_swb_sequence_delay, - mss::pmic::get_swc_sequence_delay, - mss::pmic::get_swd_sequence_delay - }; - static const std::vector SEQUENCE_REGS = { 0, // 0 would imply no sequence config (won't occur due to assert in bias_with_spd_startup_seq) @@ -220,8 +207,8 @@ fapi2::ReturnCode bias_with_spd_startup_seq( for (uint8_t l_rail_index = mss::pmic::rail::SWA; l_rail_index <= mss::pmic::rail::SWD; ++l_rail_index) { // We know after these FAPI_TRY's that all 4 entries must be populated, else the TRYs fail - FAPI_TRY(((l_get_sequence_order[l_rail_index][i_id]))(i_ocmb_target, l_sequence_orders[l_rail_index])); - FAPI_TRY(((l_get_sequence_delay[l_rail_index][i_id]))(i_ocmb_target, l_sequence_delays[l_rail_index])); + FAPI_TRY(((mss::attr::get_sequence_order[l_rail_index][i_id]))(i_ocmb_target, l_sequence_orders[l_rail_index])); + FAPI_TRY(((mss::attr::get_sequence_delay[l_rail_index][i_id]))(i_ocmb_target, l_sequence_delays[l_rail_index])); // The SPD allows for up to 8 sequences, but there are only 4 on the PMIC. The SPD defaults never go higher than 2. // We put this check in here as with anything over 4, we don't really know what we can do. @@ -404,8 +391,8 @@ fapi2::ReturnCode order_pmics_by_sequence( uint8_t l_sequence_pmic_1 = 0; // Need to pull out the RC's manually. Goto's in lambdas apparently don't play nicely - fapi2::ReturnCode l_rc_0 = mss::pmic::get_sequence[mss::index(l_first_pmic)](i_ocmb_target, l_sequence_pmic_0); - fapi2::ReturnCode l_rc_1 = mss::pmic::get_sequence[mss::index(l_second_pmic)](i_ocmb_target, l_sequence_pmic_1); + fapi2::ReturnCode l_rc_0 = mss::attr::get_sequence[mss::index(l_first_pmic)](i_ocmb_target, l_sequence_pmic_0); + fapi2::ReturnCode l_rc_1 = mss::attr::get_sequence[mss::index(l_second_pmic)](i_ocmb_target, l_sequence_pmic_1); // Hold on to an error if we see one if (l_rc_0 != fapi2::FAPI2_RC_SUCCESS) @@ -594,7 +581,7 @@ fapi2::ReturnCode pmic_enable_SPD(const fapi2::Target #include #include -#include -#include +#include namespace mss { namespace pmic { -/// @brief pointer to PMIC attribute getters for OCMB parent target of pmic -typedef fapi2::ReturnCode (*pmic_attr_ptr)(const fapi2::Target& i_target, - uint8_t& o_value); -typedef fapi2::ReturnCode (*pmic_attr_ptr_signed)(const fapi2::Target& i_target, - int8_t& o_value); -// Pointers below allow for run-time attribute getter selection by PMIC ID (0,1) - -// PMIC0/1 sequence order -static constexpr pmic_attr_ptr get_sequence[] = -{ - mss::attr::get_pmic0_sequence, - mss::attr::get_pmic1_sequence -}; - -// Voltage Setting -static constexpr pmic_attr_ptr get_swa_voltage_setting[] = -{ - mss::attr::get_pmic0_swa_voltage_setting, - mss::attr::get_pmic1_swa_voltage_setting -}; -static constexpr pmic_attr_ptr get_swb_voltage_setting[] = -{ - mss::attr::get_pmic0_swb_voltage_setting, - mss::attr::get_pmic1_swb_voltage_setting -}; -static constexpr pmic_attr_ptr get_swc_voltage_setting[] = -{ - mss::attr::get_pmic0_swc_voltage_setting, - mss::attr::get_pmic1_swc_voltage_setting -}; -static constexpr pmic_attr_ptr get_swd_voltage_setting[] = -{ - mss::attr::get_pmic0_swd_voltage_setting, - mss::attr::get_pmic1_swd_voltage_setting -}; - -// Voltage Range Select -static constexpr pmic_attr_ptr get_swa_voltage_range_select[] = -{ - mss::attr::get_pmic0_swa_voltage_range_select, - mss::attr::get_pmic1_swa_voltage_range_select -}; -static constexpr pmic_attr_ptr get_swb_voltage_range_select[] = -{ - mss::attr::get_pmic0_swb_voltage_range_select, - mss::attr::get_pmic1_swb_voltage_range_select -}; -static constexpr pmic_attr_ptr get_swc_voltage_range_select[] = -{ - mss::attr::get_pmic0_swc_voltage_range_select, - mss::attr::get_pmic1_swc_voltage_range_select -}; -static constexpr pmic_attr_ptr get_swd_voltage_range_select[] = -{ - mss::attr::get_pmic0_swd_voltage_range_select, - mss::attr::get_pmic1_swd_voltage_range_select -}; - -// Voltage Offset -static constexpr pmic_attr_ptr_signed get_swa_voltage_offset[] = -{ - mss::attr::get_pmic0_swa_voltage_offset, - mss::attr::get_pmic1_swa_voltage_offset -}; -static constexpr pmic_attr_ptr_signed get_swb_voltage_offset[] = -{ - mss::attr::get_pmic0_swb_voltage_offset, - mss::attr::get_pmic1_swb_voltage_offset -}; -static constexpr pmic_attr_ptr_signed get_swc_voltage_offset[] = -{ - mss::attr::get_pmic0_swc_voltage_offset, - mss::attr::get_pmic1_swc_voltage_offset -}; -static constexpr pmic_attr_ptr_signed get_swd_voltage_offset[] = -{ - mss::attr::get_pmic0_swd_voltage_offset, - mss::attr::get_pmic1_swd_voltage_offset -}; - -// Sequence Delay -static constexpr pmic_attr_ptr get_swa_sequence_delay[] = -{ - mss::attr::get_pmic0_swa_sequence_delay, - mss::attr::get_pmic1_swa_sequence_delay -}; -static constexpr pmic_attr_ptr get_swb_sequence_delay[] = -{ - mss::attr::get_pmic0_swb_sequence_delay, - mss::attr::get_pmic1_swb_sequence_delay -}; -static constexpr pmic_attr_ptr get_swc_sequence_delay[] = -{ - mss::attr::get_pmic0_swc_sequence_delay, - mss::attr::get_pmic1_swc_sequence_delay -}; -static constexpr pmic_attr_ptr get_swd_sequence_delay[] = -{ - mss::attr::get_pmic0_swd_sequence_delay, - mss::attr::get_pmic1_swd_sequence_delay -}; - -// Sequence Order -static constexpr pmic_attr_ptr get_swa_sequence_order[] = -{ - mss::attr::get_pmic0_swa_sequence_order, - mss::attr::get_pmic1_swa_sequence_order -}; -static constexpr pmic_attr_ptr get_swb_sequence_order[] = -{ - mss::attr::get_pmic0_swb_sequence_order, - mss::attr::get_pmic1_swb_sequence_order -}; -static constexpr pmic_attr_ptr get_swc_sequence_order[] = -{ - mss::attr::get_pmic0_swc_sequence_order, - mss::attr::get_pmic1_swc_sequence_order -}; -static constexpr pmic_attr_ptr get_swd_sequence_order[] = -{ - mss::attr::get_pmic0_swd_sequence_order, - mss::attr::get_pmic1_swd_sequence_order -}; - -// Phase Combination -static constexpr pmic_attr_ptr get_phase_comb[] = -{ - mss::attr::get_pmic0_phase_comb, - mss::attr::get_pmic1_phase_comb -}; - -// EFD Fields - -// Offset -static constexpr pmic_attr_ptr_signed get_efd_swa_voltage_offset[] = -{ - mss::attr::get_efd_pmic0_swa_voltage_offset, - mss::attr::get_efd_pmic1_swa_voltage_offset -}; - -static constexpr pmic_attr_ptr_signed get_efd_swb_voltage_offset[] = -{ - mss::attr::get_efd_pmic0_swb_voltage_offset, - mss::attr::get_efd_pmic1_swb_voltage_offset -}; - -static constexpr pmic_attr_ptr_signed get_efd_swc_voltage_offset[] = -{ - mss::attr::get_efd_pmic0_swc_voltage_offset, - mss::attr::get_efd_pmic1_swc_voltage_offset -}; - -static constexpr pmic_attr_ptr_signed get_efd_swd_voltage_offset[] = -{ - mss::attr::get_efd_pmic0_swd_voltage_offset, - mss::attr::get_efd_pmic1_swd_voltage_offset -}; - -// These arrays allow us to dynamically choose the right attribute getter at runtime based on the rail and mss::pmic::id -static const pmic_attr_ptr* get_volt_setting[] = -{ - mss::pmic::get_swa_voltage_setting, - mss::pmic::get_swb_voltage_setting, - mss::pmic::get_swc_voltage_setting, - mss::pmic::get_swd_voltage_setting -}; - -static const pmic_attr_ptr* get_volt_range_select[] = -{ - mss::pmic::get_swa_voltage_range_select, - mss::pmic::get_swb_voltage_range_select, - mss::pmic::get_swc_voltage_range_select, - mss::pmic::get_swd_voltage_range_select -}; - -static const pmic_attr_ptr_signed* get_volt_offset[] = -{ - mss::pmic::get_swa_voltage_offset, - mss::pmic::get_swb_voltage_offset, - mss::pmic::get_swc_voltage_offset, - mss::pmic::get_swd_voltage_offset -}; - -// EFD Offset + Direction functions -static const pmic_attr_ptr_signed* get_efd_volt_offset[] = -{ - mss::pmic::get_efd_swa_voltage_offset, - mss::pmic::get_efd_swb_voltage_offset, - mss::pmic::get_efd_swc_voltage_offset, - mss::pmic::get_efd_swd_voltage_offset -}; - -// For output traces -static const std::vector PMIC_RAIL_NAMES = {"SWA", "SWB", "SWC", "SWD"}; - -// Attribute setter FP type -typedef fapi2::ReturnCode (*pmic_attr_setter_ptr)(const fapi2::Target& i_target, - uint8_t i_value); -typedef fapi2::ReturnCode (*pmic_attr_setter_ptr_signed)(const fapi2::Target& i_target, - int8_t i_value); - -// Voltage Setting -static constexpr pmic_attr_setter_ptr set_swa_voltage_setting[] = -{ - mss::attr::set_pmic0_swa_voltage_setting, - mss::attr::set_pmic1_swa_voltage_setting -}; -static constexpr pmic_attr_setter_ptr set_swb_voltage_setting[] = -{ - mss::attr::set_pmic0_swb_voltage_setting, - mss::attr::set_pmic1_swb_voltage_setting -}; -static constexpr pmic_attr_setter_ptr set_swc_voltage_setting[] = -{ - mss::attr::set_pmic0_swc_voltage_setting, - mss::attr::set_pmic1_swc_voltage_setting -}; -static constexpr pmic_attr_setter_ptr set_swd_voltage_setting[] = -{ - mss::attr::set_pmic0_swd_voltage_setting, - mss::attr::set_pmic1_swd_voltage_setting -}; - -// Voltage Range Select -static constexpr pmic_attr_setter_ptr set_swa_voltage_range_select[] = -{ - mss::attr::set_pmic0_swa_voltage_range_select, - mss::attr::set_pmic1_swa_voltage_range_select -}; -static constexpr pmic_attr_setter_ptr set_swb_voltage_range_select[] = -{ - mss::attr::set_pmic0_swb_voltage_range_select, - mss::attr::set_pmic1_swb_voltage_range_select -}; -static constexpr pmic_attr_setter_ptr set_swc_voltage_range_select[] = -{ - mss::attr::set_pmic0_swc_voltage_range_select, - mss::attr::set_pmic1_swc_voltage_range_select -}; -static constexpr pmic_attr_setter_ptr set_swd_voltage_range_select[] = -{ - mss::attr::set_pmic0_swd_voltage_range_select, - mss::attr::set_pmic1_swd_voltage_range_select -}; - -// Voltage Offset -static constexpr pmic_attr_setter_ptr_signed set_swa_voltage_offset[] = -{ - mss::attr::set_pmic0_swa_voltage_offset, - mss::attr::set_pmic1_swa_voltage_offset -}; -static constexpr pmic_attr_setter_ptr_signed set_swb_voltage_offset[] = -{ - mss::attr::set_pmic0_swb_voltage_offset, - mss::attr::set_pmic1_swb_voltage_offset -}; -static constexpr pmic_attr_setter_ptr_signed set_swc_voltage_offset[] = -{ - mss::attr::set_pmic0_swc_voltage_offset, - mss::attr::set_pmic1_swc_voltage_offset -}; -static constexpr pmic_attr_setter_ptr_signed set_swd_voltage_offset[] = -{ - mss::attr::set_pmic0_swd_voltage_offset, - mss::attr::set_pmic1_swd_voltage_offset -}; - -// Sequence Delay -static constexpr pmic_attr_setter_ptr set_swa_sequence_delay[] = -{ - mss::attr::set_pmic0_swa_sequence_delay, - mss::attr::set_pmic1_swa_sequence_delay -}; -static constexpr pmic_attr_setter_ptr set_swb_sequence_delay[] = -{ - mss::attr::set_pmic0_swb_sequence_delay, - mss::attr::set_pmic1_swb_sequence_delay -}; -static constexpr pmic_attr_setter_ptr set_swc_sequence_delay[] = -{ - mss::attr::set_pmic0_swc_sequence_delay, - mss::attr::set_pmic1_swc_sequence_delay -}; -static constexpr pmic_attr_setter_ptr set_swd_sequence_delay[] = -{ - mss::attr::set_pmic0_swd_sequence_delay, - mss::attr::set_pmic1_swd_sequence_delay -}; - -// Sequence Order -static constexpr pmic_attr_setter_ptr set_swa_sequence_order[] = -{ - mss::attr::set_pmic0_swa_sequence_order, - mss::attr::set_pmic1_swa_sequence_order -}; -static constexpr pmic_attr_setter_ptr set_swb_sequence_order[] = -{ - mss::attr::set_pmic0_swb_sequence_order, - mss::attr::set_pmic1_swb_sequence_order -}; -static constexpr pmic_attr_setter_ptr set_swc_sequence_order[] = -{ - mss::attr::set_pmic0_swc_sequence_order, - mss::attr::set_pmic1_swc_sequence_order -}; -static constexpr pmic_attr_setter_ptr set_swd_sequence_order[] = -{ - mss::attr::set_pmic0_swd_sequence_order, - mss::attr::set_pmic1_swd_sequence_order -}; - -// Phase Combination -static constexpr pmic_attr_setter_ptr set_phase_comb[] = -{ - mss::attr::set_pmic0_phase_comb, - mss::attr::set_pmic1_phase_comb -}; - -// Offset -static constexpr pmic_attr_setter_ptr_signed set_efd_swa_voltage_offset[] = -{ - mss::attr::set_efd_pmic0_swa_voltage_offset, - mss::attr::set_efd_pmic1_swa_voltage_offset -}; - -static constexpr pmic_attr_setter_ptr_signed set_efd_swb_voltage_offset[] = -{ - mss::attr::set_efd_pmic0_swb_voltage_offset, - mss::attr::set_efd_pmic1_swb_voltage_offset -}; - -static constexpr pmic_attr_setter_ptr_signed set_efd_swc_voltage_offset[] = -{ - mss::attr::set_efd_pmic0_swc_voltage_offset, - mss::attr::set_efd_pmic1_swc_voltage_offset -}; - -static constexpr pmic_attr_setter_ptr_signed set_efd_swd_voltage_offset[] = -{ - mss::attr::set_efd_pmic0_swd_voltage_offset, - mss::attr::set_efd_pmic1_swd_voltage_offset -}; //----------------------------------- // SPD Biasing functions @@ -479,37 +136,6 @@ fapi2::ReturnCode bias_with_spd_voltages( const fapi2::Target& i_ocmb_target, const mss::pmic::id i_id); -/// -/// @brief Calcuate target voltage for PMIC -/// -/// @param[in] i_ocmb_target OCMB parent target of pmic of PMIC (holds the attributes) -/// @param[in] i_id ID of pmic (0,1) -/// @param[in] i_rail RAIL to calculate voltage for -/// @param[out] o_volt_buffer output buffer -/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff success -/// -inline fapi2::ReturnCode calculate_voltage_write_buffer( - const fapi2::Target& i_ocmb_target, - const mss::pmic::id i_id, - const uint8_t i_rail, - fapi2::buffer& o_volt_buffer) -{ - uint8_t l_volt = 0; - int8_t l_volt_offset = 0; - int8_t l_efd_volt_offset = 0; - - // Get the attributes corresponding to the rail and PMIC indices - FAPI_TRY(get_volt_setting[i_rail][i_id](i_ocmb_target, l_volt)); - FAPI_TRY(get_volt_offset[i_rail][i_id](i_ocmb_target, l_volt_offset)); - FAPI_TRY(get_efd_volt_offset[i_rail][i_id](i_ocmb_target, l_efd_volt_offset)); - - // Set output buffer - o_volt_buffer = l_volt + l_volt_offset + l_efd_volt_offset; - -fapi_try_exit: - return fapi2::current_err; -} - /// /// @brief Order PMICs by sequence defined in the SPD /// @@ -539,22 +165,23 @@ inline fapi2::ReturnCode bias_with_spd_voltages( for (uint8_t l_rail_index = mss::pmic::rail::SWA; l_rail_index <= mss::pmic::rail::SWD; ++l_rail_index) { - fapi2::buffer l_volt_buffer; - FAPI_TRY(calculate_voltage_write_buffer(i_ocmb_target, i_id, l_rail_index, l_volt_buffer)); + uint8_t l_volt_bitmap; + FAPI_TRY(calculate_voltage_bitmap_from_attr(i_ocmb_target, i_id, l_rail_index, l_volt_bitmap)); // Since we have unsigned integers, this should check both underflow and overflow - FAPI_ASSERT(l_volt_buffer <= CONSTS::MAX_VOLT_BITMAP, + FAPI_ASSERT(l_volt_bitmap <= CONSTS::MAX_VOLT_BITMAP, fapi2::PMIC_VOLTAGE_OUT_OF_RANGE() .set_TARGET(i_pmic_target) - .set_VOLTAGE_BITMAP(l_volt_buffer) + .set_VOLTAGE_BITMAP(l_volt_bitmap) .set_RAIL(mss::pmic::VOLT_SETTING_ACTIVE_REGS[l_rail_index]), "Voltage out of range as determined by SPD voltage +/- offset for %s of %s", PMIC_RAIL_NAMES[l_rail_index], mss::c_str(i_pmic_target) ); - - l_volt_buffer = l_volt_buffer << CONSTS::SHIFT_VOLTAGE_FOR_REG; - FAPI_TRY(mss::pmic::i2c::reg_write(i_pmic_target, mss::pmic::VOLT_SETTING_ACTIVE_REGS[l_rail_index], l_volt_buffer), - "Error writing address 0x%02hhX of PMIC %s", mss::pmic::VOLT_SETTING_ACTIVE_REGS[l_rail_index], - mss::c_str(i_pmic_target)); + { + fapi2::buffer l_volt_buffer = l_volt_bitmap << CONSTS::SHIFT_VOLTAGE_FOR_REG; + FAPI_TRY(mss::pmic::i2c::reg_write(i_pmic_target, mss::pmic::VOLT_SETTING_ACTIVE_REGS[l_rail_index], l_volt_buffer), + "Error writing address 0x%02hhX of PMIC %s", mss::pmic::VOLT_SETTING_ACTIVE_REGS[l_rail_index], + mss::c_str(i_pmic_target)); + } } @@ -583,13 +210,13 @@ inline fapi2::ReturnCode bias_with_spd_voltages( for (uint8_t l_rail_index = mss::pmic::rail::SWA; l_rail_index <= mss::pmic::rail::SWD; ++l_rail_index) { - fapi2::buffer l_volt_buffer; - FAPI_TRY(calculate_voltage_write_buffer(i_ocmb_target, i_id, l_rail_index, l_volt_buffer)); + uint8_t l_volt_bitmap; + FAPI_TRY(calculate_voltage_bitmap_from_attr(i_ocmb_target, i_id, l_rail_index, l_volt_bitmap)); bool l_overflow = false; uint8_t l_volt_range_select = 0; - FAPI_TRY(get_volt_range_select[l_rail_index][i_id](i_ocmb_target, l_volt_range_select)); + FAPI_TRY(mss::attr::get_volt_range_select[l_rail_index][i_id](i_ocmb_target, l_volt_range_select)); // SWD supports a RANGE 1, but NOT SWA-C if (l_rail_index == mss::pmic::rail::SWD) @@ -616,11 +243,11 @@ inline fapi2::ReturnCode bias_with_spd_voltages( // we can just subtract the difference between range 1 and 0 // which is 600mV -> 800mV // 200mV / 5 = 40 - uint8_t l_old_voltage = uint8_t(l_volt_buffer); - l_volt_buffer = l_volt_buffer - CONSTS::CONVERT_RANGE1_TO_RANGE0; + uint8_t l_old_voltage = l_volt_bitmap; + l_volt_bitmap = l_volt_bitmap - CONSTS::CONVERT_RANGE1_TO_RANGE0; // Check for overflow (the old voltage should be larger unless we rolled over) - if (l_old_voltage < l_volt_buffer) + if (l_old_voltage < l_volt_bitmap) { // Not using an extra xml error for this as overflow implies PMIC_VOLTAGE_OUT_OF_RANGE anyway. FAPI_ERR("Overflow ocurred when converting SPD Range 1 voltage to TI Range 0"); @@ -630,18 +257,19 @@ inline fapi2::ReturnCode bias_with_spd_voltages( } // Check for overflow due to range conversion (SWA-C), but also due to overflow due to offset attributes - FAPI_ASSERT( (!l_overflow) && (l_volt_buffer <= CONSTS::MAX_VOLT_BITMAP), + FAPI_ASSERT( (!l_overflow) && (l_volt_bitmap <= CONSTS::MAX_VOLT_BITMAP), fapi2::PMIC_VOLTAGE_OUT_OF_RANGE() .set_TARGET(i_pmic_target) - .set_VOLTAGE_BITMAP(l_volt_buffer) + .set_VOLTAGE_BITMAP(l_volt_bitmap) .set_RAIL(mss::pmic::VOLT_SETTING_ACTIVE_REGS[l_rail_index]), "Voltage out of range as determined by SPD voltage +/- offset for %s of %s", PMIC_RAIL_NAMES[l_rail_index], mss::c_str(i_pmic_target) ); - - l_volt_buffer = l_volt_buffer << CONSTS::SHIFT_VOLTAGE_FOR_REG; - FAPI_TRY(mss::pmic::i2c::reg_write(i_pmic_target, mss::pmic::VOLT_SETTING_ACTIVE_REGS[l_rail_index], l_volt_buffer), - "Error writing address 0x%02hhX of PMIC %s", mss::pmic::VOLT_SETTING_ACTIVE_REGS[l_rail_index], - mss::c_str(i_pmic_target)); + { + fapi2::buffer l_volt_buffer = l_volt_bitmap << CONSTS::SHIFT_VOLTAGE_FOR_REG; + FAPI_TRY(mss::pmic::i2c::reg_write(i_pmic_target, mss::pmic::VOLT_SETTING_ACTIVE_REGS[l_rail_index], l_volt_buffer), + "Error writing address 0x%02hhX of PMIC %s", mss::pmic::VOLT_SETTING_ACTIVE_REGS[l_rail_index], + mss::c_str(i_pmic_target)); + } } return fapi2::FAPI2_RC_SUCCESS; @@ -715,15 +343,13 @@ inline fapi2::ReturnCode bias_with_spd_settings( const fapi2::Target& i_pmic_target, const fapi2::Target& i_ocmb_target) { - using CONSTS = mss::pmic::consts; // Unlock Vendor Region FAPI_TRY(mss::pmic::unlock_vendor_region(i_pmic_target), "Error unlocking vendor region on PMIC %s", mss::c_str(i_pmic_target)); - { - // PMIC position/ID of the OCMB target. There could be 4 total, but we care about whether its PMIC0(2) or PMIC1(3) - const mss::pmic::id l_relative_pmic_id = static_cast( - mss::index(i_pmic_target) % CONSTS::NUM_UNIQUE_PMICS); + // PMIC position/ID under OCMB target + const mss::pmic::id l_relative_pmic_id = get_relative_pmic_id(i_pmic_target); + // Phase combination FAPI_TRY(mss::pmic::bias_with_spd_phase_comb(i_pmic_target, i_ocmb_target, l_relative_pmic_id)); diff --git a/src/usr/isteps/istep08/makefile b/src/usr/isteps/istep08/makefile index 5b1da4f21dc..052cd195b09 100644 --- a/src/usr/isteps/istep08/makefile +++ b/src/usr/isteps/istep08/makefile @@ -5,7 +5,7 @@ # # OpenPOWER HostBoot Project # -# Contributors Listed Below - COPYRIGHT 2015,2019 +# Contributors Listed Below - COPYRIGHT 2015,2020 # [+] International Business Machines Corp. # # @@ -48,6 +48,7 @@ EXTRAINCDIR += ${ROOTPATH}/src/usr/isteps/ EXTRAINCDIR += ${ROOTPATH}/src/usr/sbeio/ EXTRAINCDIR += ${PROCEDURES_PATH}/hwp/pm/include/registers EXTRAINCDIR += ${COMMON_PATH_OCMB}/procedures/hwp/pmic/ +EXTRAINCDIR += ${COMMON_PATH_OCMB}/procedures/hwp/pmic/lib/ EXTRAINCDIR += ${COMMON_PATH_OCMB}/procedures/hwp/pmic/lib/utils/ EXTRAINCDIR += ${COMMON_PATH_OCMB}/include/ EXTRAINCDIR += ${ROOTPATH}/src/import/