diff --git a/src/build/buildpnor/pnorLayoutAxone.xml b/src/build/buildpnor/pnorLayoutAxone.xml
index 4420b8cc158..150bab112b7 100644
--- a/src/build/buildpnor/pnorLayoutAxone.xml
+++ b/src/build/buildpnor/pnorLayoutAxone.xml
@@ -93,37 +93,19 @@ Layout Description
sideless
-
- DIMM JEDEC (288K)
- DJVPD
-
- 0x31000
- 0x48000
- sideless
-
-
Module VPD (576K)
MVPD
- 0x79000
+ 0x31000
0x90000
sideless
-
- Centaur VPD (288K)
- CVPD
-
- 0x109000
- 0x48000
- sideless
-
-
Hostboot Base (1MB)
HBB
- 0x151000
+ 0xC1000
0x100000
sideless
@@ -132,7 +114,7 @@ Layout Description
Hostboot Data (2MB)
HBD
- 0x251000
+ 0x1C1000
0x200000
sideless
@@ -141,7 +123,7 @@ Layout Description
Hostboot Extended image (14.22MB w/o ECC)
HBI
- 0x451000
+ 0x3C1000
0x1000000
sideless
@@ -150,7 +132,7 @@ Layout Description
SBE-IPL (Staging Area) (752K)
SBE
- 0x1451000
+ 0x13C1000
0xBC000
@@ -160,7 +142,7 @@ Layout Description
HCODE Ref Image (1.125MB)
HCODE
- 0x150D000
+ 0x147D000
0x120000
sideless
@@ -169,7 +151,7 @@ Layout Description
Hostboot Runtime Services for Sapphire (7.0MB)
HBRT
- 0x162D000
+ 0x159D000
0x700000
sideless
@@ -178,7 +160,7 @@ Layout Description
Payload (19.875MB)
PAYLOAD
- 0x1D2D000
+ 0x1C9D000
0x13E0000
sideless
@@ -187,7 +169,7 @@ Layout Description
Special PNOR Test Space (36K)
TEST
- 0x310D000
+ 0x307D000
0x9000
sideless
@@ -198,7 +180,7 @@ Layout Description
from skipping header. Signing is forced in build pnor phase -->
Special PNOR Test Space with Header (36K)
TESTRO
- 0x3116000
+ 0x3086000
0x9000
sideless
@@ -209,7 +191,7 @@ Layout Description
Hostboot Bootloader (28K)
HBBL
- 0x311F000
+ 0x308F000
0x7000
@@ -220,7 +202,7 @@ Layout Description
Global Data (36K)
GLOBAL
- 0x3126000
+ 0x3096000
0x9000
sideless
@@ -228,7 +210,7 @@ Layout Description
Ref Image Ring Overrides (20K)
RINGOVD
- 0x312F000
+ 0x309F000
0x5000
sideless
@@ -236,7 +218,7 @@ Layout Description
SecureBoot Key Transition Partition (16K)
SBKT
- 0x3134000
+ 0x30A4000
0x4000
sideless
@@ -244,7 +226,7 @@ Layout Description
OCC Lid (1.125M)
OCC
- 0x3138000
+ 0x30A8000
0x120000
sideless
@@ -255,7 +237,7 @@ Layout Description
WOFDATA
- 0x3258000
+ 0x31C8000
0x600000
sideless
@@ -264,7 +246,7 @@ Layout Description
FIRDATA (12K)
FIRDATA
- 0x3858000
+ 0x37C8000
0x3000
sideless
@@ -272,7 +254,7 @@ Layout Description
Memory Data (128K)
MEMD
- 0x385B000
+ 0x37CB000
0x20000
sideless
@@ -281,7 +263,7 @@ Layout Description
Secureboot Test Load (12K)
TESTLOAD
- 0x387B000
+ 0x37EB000
0x3000
sideless
@@ -290,7 +272,7 @@ Layout Description
Centaur Hw Ref Image (12K)
CENHWIMG
- 0x387E000
+ 0x37EE000
0x3000
sideless
@@ -299,7 +281,7 @@ Layout Description
Secure Boot (144K)
SECBOOT
- 0x3881000
+ 0x37F1000
0x24000
sideless
@@ -308,7 +290,7 @@ Layout Description
Open CAPI Memory Buffer (OCMB) Firmware (300K)
OCMBFW
- 0x38A5000
+ 0x3815000
0x4B000
sideless
@@ -318,7 +300,7 @@ Layout Description
HDAT Data (16K)
HDAT
- 0x38F0000
+ 0x3860000
0x4000
sideless
@@ -327,7 +309,7 @@ Layout Description
Eeprom Cache(512K)
EECACHE
- 0x38F4000
+ 0x3864000
0x80000
sideless
diff --git a/src/build/mkrules/hbfw/img/makefile b/src/build/mkrules/hbfw/img/makefile
index 878c72b9606..4adf9bdef21 100755
--- a/src/build/mkrules/hbfw/img/makefile
+++ b/src/build/mkrules/hbfw/img/makefile
@@ -208,16 +208,16 @@ BUILD_TYPE_PARAMS = --build-type fspbuild
.endif
# Decide which images to use for each PNOR layout
-GEN_COMMON_BIN_FILES = HBBL=${HBBL_IMG},HBB=${HBB_IMG},HBI=${HBI_IMG},HBRT=${HBRT_IMG},HBEL=EMPTY,GUARD=EMPTY,GLOBAL=EMPTY,CVPD=EMPTY,MVPD=EMPTY,DJVPD=EMPTY,RINGOVD=EMPTY,SBKT=EMPTY
+GEN_COMMON_BIN_FILES = HBBL=${HBBL_IMG},HBB=${HBB_IMG},HBI=${HBI_IMG},HBRT=${HBRT_IMG},HBEL=EMPTY,GUARD=EMPTY,GLOBAL=EMPTY,MVPD=EMPTY,RINGOVD=EMPTY,SBKT=EMPTY
GEN_STANDALONE_BIN_FILES = ${GEN_COMMON_BIN_FILES},TEST=EMPTY,TESTRO=EMPTY,TESTLOAD=EMPTY,PAYLOAD=EMPTY,FIRDATA=EMPTY
.if (${FAKEPNOR} == "")
# Parameters passed into GEN_PNOR_IMAGE_SCRIPT.
.if (${PNOR_LAYOUT_SELECTED} == "STANDALONE")
- GEN_DEFAULT_BIN_FILES = ${GEN_STANDALONE_BIN_FILES},MEMD=${${ZZ_MEMD_IMG}:P}
+ GEN_DEFAULT_BIN_FILES = ${GEN_STANDALONE_BIN_FILES},MEMD=${${ZZ_MEMD_IMG}:P},CVPD=EMPTY,DJVPD=EMPTY
.elif(${PNOR_LAYOUT_SELECTED} == "AXONE")
GEN_DEFAULT_BIN_FILES = ${GEN_STANDALONE_BIN_FILES},EECACHE=EMPTY,MEMD=${${ZZ_MEMD_IMG}:P}
.else
- GEN_DEFAULT_BIN_FILES = ${GEN_COMMON_BIN_FILES},MEMD=${${ZZ_MEMD_IMG}:P}
+ GEN_DEFAULT_BIN_FILES = ${GEN_COMMON_BIN_FILES},MEMD=${${ZZ_MEMD_IMG}:P},CVPD=EMPTY,DJVPD=EMPTY
.endif
DEFAULT_PARAMS = --build-all --emit-eccless ${TARGET_TEST:b--test} ${HB_STANDALONE:b--hb-standalone} \
${CONFIG_SECUREBOOT:b--secureboot} --systemBinFiles ${GEN_DEFAULT_BIN_FILES} \
@@ -476,13 +476,13 @@ gen_system_specific_images: build_sbe_partitions .PMAKE
.if (${PNOR_LAYOUT_SELECTED} == "FSP")
- HOSTBOOT_DEFAULT_SECTIONS = HBBL=${HBBL_FINAL_IMG},HBB=${HBB_FINAL_IMG},HBI=${HBI_FINAL_IMG},HBRT=${HBRT_FINAL_IMG},HBEL=${HBEL_FINAL_IMG},GUARD=${GUARD_FINAL_IMG},GLOBAL=${GLOBAL_FINAL_IMG},CVPD=${CVPD_FINAL_IMG},MVPD=${MVPD_FINAL_IMG},DJVPD=${DJVPD_FINAL_IMG},RINGOVD=${RINGOVD_FINAL_IMG},SBKT=${SBKT_FINAL_IMG}
+ HOSTBOOT_DEFAULT_SECTIONS = HBBL=${HBBL_FINAL_IMG},HBB=${HBB_FINAL_IMG},HBI=${HBI_FINAL_IMG},HBRT=${HBRT_FINAL_IMG},HBEL=${HBEL_FINAL_IMG},GUARD=${GUARD_FINAL_IMG},GLOBAL=${GLOBAL_FINAL_IMG},MVPD=${MVPD_FINAL_IMG},RINGOVD=${RINGOVD_FINAL_IMG},SBKT=${SBKT_FINAL_IMG}
.else
- HOSTBOOT_DEFAULT_SECTIONS = HBBL=${HBBL_FINAL_IMG},HBB=${HBB_FINAL_IMG},HBI=${HBI_FINAL_IMG},HBRT=${HBRT_FINAL_IMG},TEST=${TEST_FINAL_IMG},TESTRO=${TESTRO_FINAL_IMG},TESTLOAD=${TESTLOAD_FINAL_IMG},HBEL=${HBEL_FINAL_IMG},GUARD=${GUARD_FINAL_IMG},GLOBAL=${GLOBAL_FINAL_IMG},PAYLOAD=${PAYLOAD_FINAL_IMG},CVPD=${CVPD_FINAL_IMG},MVPD=${MVPD_FINAL_IMG},DJVPD=${DJVPD_FINAL_IMG},RINGOVD=${RINGOVD_FINAL_IMG},SBKT=${SBKT_FINAL_IMG},FIRDATA=${FIRDATA_FINAL_IMG}
+ HOSTBOOT_DEFAULT_SECTIONS = HBBL=${HBBL_FINAL_IMG},HBB=${HBB_FINAL_IMG},HBI=${HBI_FINAL_IMG},HBRT=${HBRT_FINAL_IMG},TEST=${TEST_FINAL_IMG},TESTRO=${TESTRO_FINAL_IMG},TESTLOAD=${TESTLOAD_FINAL_IMG},HBEL=${HBEL_FINAL_IMG},GUARD=${GUARD_FINAL_IMG},GLOBAL=${GLOBAL_FINAL_IMG},PAYLOAD=${PAYLOAD_FINAL_IMG},MVPD=${MVPD_FINAL_IMG},RINGOVD=${RINGOVD_FINAL_IMG},SBKT=${SBKT_FINAL_IMG},FIRDATA=${FIRDATA_FINAL_IMG}
.endif
-NIMBUS_SECT = HBD=${NIMBUS_HBD_FINAL_IMG},SBE=${NIMBUS_SBE_FINAL_IMG},HCODE=${NIMBUS_HCODE_FINAL_IMG},OCC=${NIMBUS_OCC_FINAL_IMG},WOFDATA=${ZZ_WOFDATA_FINAL_IMG},CENHWIMG=${NIMBUS_CENHWIMG_FINAL_IMG},MEMD=${ZZ_MEMD_FINAL_IMG}
-CUMULUS_SECT = HBD=${CUMULUS_HBD_FINAL_IMG},SBE=${CUMULUS_SBE_FINAL_IMG},HCODE=${CUMULUS_HCODE_FINAL_IMG},OCC=${CUMULUS_OCC_FINAL_IMG},WOFDATA=${ZEPPELIN_WOFDATA_FINAL_IMG},CENHWIMG=${CUMULUS_CENHWIMG_FINAL_IMG},MEMD=${ZEPPELIN_MEMD_FINAL_IMG}
-CUMULUS_CDIMM_SECT = HBD=${CUMULUS_CDIMM_HBD_FINAL_IMG},SBE=${CUMULUS_SBE_FINAL_IMG},HCODE=${CUMULUS_HCODE_FINAL_IMG},OCC=${CUMULUS_OCC_FINAL_IMG},WOFDATA=${ZEPPELIN_WOFDATA_FINAL_IMG},CENHWIMG=${CUMULUS_CENHWIMG_FINAL_IMG},MEMD=${MEMD_FINAL_IMG}
+NIMBUS_SECT = HBD=${NIMBUS_HBD_FINAL_IMG},SBE=${NIMBUS_SBE_FINAL_IMG},HCODE=${NIMBUS_HCODE_FINAL_IMG},OCC=${NIMBUS_OCC_FINAL_IMG},WOFDATA=${ZZ_WOFDATA_FINAL_IMG},CENHWIMG=${NIMBUS_CENHWIMG_FINAL_IMG},MEMD=${ZZ_MEMD_FINAL_IMG},CVPD=${CVPD_FINAL_IMG},DJVPD=${DJVPD_FINAL_IMG}
+CUMULUS_SECT = HBD=${CUMULUS_HBD_FINAL_IMG},SBE=${CUMULUS_SBE_FINAL_IMG},HCODE=${CUMULUS_HCODE_FINAL_IMG},OCC=${CUMULUS_OCC_FINAL_IMG},WOFDATA=${ZEPPELIN_WOFDATA_FINAL_IMG},CENHWIMG=${CUMULUS_CENHWIMG_FINAL_IMG},MEMD=${ZEPPELIN_MEMD_FINAL_IMG},CVPD=${CVPD_FINAL_IMG},DJVPD=${DJVPD_FINAL_IMG}
+CUMULUS_CDIMM_SECT = HBD=${CUMULUS_CDIMM_HBD_FINAL_IMG},SBE=${CUMULUS_SBE_FINAL_IMG},HCODE=${CUMULUS_HCODE_FINAL_IMG},OCC=${CUMULUS_OCC_FINAL_IMG},WOFDATA=${ZEPPELIN_WOFDATA_FINAL_IMG},CENHWIMG=${CUMULUS_CENHWIMG_FINAL_IMG},MEMD=${MEMD_FINAL_IMG},CVPD=${CVPD_FINAL_IMG},DJVPD=${DJVPD_FINAL_IMG}
AXONE_SECT = HBD=${AXONE_HBD_FINAL_IMG},SBE=${AXONE_SBE_FINAL_IMG},HCODE=${AXONE_HCODE_FINAL_IMG},OCC=${AXONE_OCC_FINAL_IMG},WOFDATA=${ZEPPELIN_WOFDATA_FINAL_IMG},CENHWIMG=${AXONE_CENHWIMG_FINAL_IMG},EECACHE=${EECACHE_FINAL_IMG},FIRDATA=${FIRDATA_FINAL_IMG},MEMD=${MEMD_FINAL_IMG}