diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_init.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_init.C
index 52d4b4ad0ac..c296053ce9d 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_init.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_init.C
@@ -666,7 +666,7 @@ fapi2::ReturnCode pm_ocb_reset(
     // hardware procedures.
     FAPI_TRY(fapi2::getScom(i_target, PU_PBAMODE_SCOM, l_buf64),
              "**** ERROR : Failed to fetch PBA mode control status");
-    l_buf64.clearBit<8>();
+    l_buf64.clearBit<PU_PBAMODE_EN_MARKER_ACK>();
     FAPI_TRY(fapi2::putScom(i_target, PU_PBAMODE_SCOM, l_buf64),
              "**** ERROR : Failed to write PBA mode control");
 
@@ -674,6 +674,15 @@ fapi2::ReturnCode pm_ocb_reset(
     FAPI_TRY(fapi2::putScom(i_target, PU_OCB_PIB_OSTOESR, 0),
              "**** ERROR : Failed to write OSTESR");
 
+    // Explicitly disable the OCC Heartbeat (RTC: 172638)
+    // Only clearing the OCB_OCI_OCCHBR_OCC_HEARTBEAT_EN and leaving the
+    // Heartbeat count intact as this may prove useful for debug later.
+    FAPI_TRY(fapi2::getScom(i_target, PU_OCB_OCI_OCCHBR_SCOM, l_buf64),
+             "**** ERROR : Failed to read OCBHBR");
+    l_buf64.clearBit<PU_OCB_OCI_OCCHBR_OCC_HEARTBEAT_EN>();
+    FAPI_TRY(fapi2::putScom(i_target, PU_OCB_OCI_OCCHBR_SCOM, l_buf64),
+             "**** ERROR : Failed to write OCBHBR");
+
 fapi_try_exit:
     return fapi2::current_err;
 }
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_init.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_init.H
index 174a531ef99..8ec4aab9373 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_init.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_init.H
@@ -43,6 +43,7 @@
 #include <p9_pm.H>
 #include <fapi2.H>
 #include <p9_misc_scom_addresses.H>
+#include <p9_misc_scom_addresses_fld.H>
 
 //------------------------------------------------------------------------------
 // Constants definitions