diff --git a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_draminit_mc.C b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_draminit_mc.C index 5bb6919f261..babd24945ac 100644 --- a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_draminit_mc.C +++ b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_draminit_mc.C @@ -85,7 +85,7 @@ extern "C" { // Step Two.1: Check RCD protect time on RDIMM and LRDIMM FAPI_INF( "+++ Check RCD protect time on RDIMM and LRDIMM +++"); //forced this to only run if the test type is NOT DDR4 - as DDR4 ISRDIMMs are having IPL issues - FAPI_TRY(mss_check_RCD_protect_time(l_mba), "---Error During Check RCD protect time"); + //FAPI_TRY(mss_check_RCD_protect_time(l_mba), "---Error During Check RCD protect time"); //Step Two.2: Enable address inversion on each MBA for ALL CARDS FAPI_INF("+++ Setting up adr inversion for port 1 +++"); diff --git a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_draminit_training_advanced.C b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_draminit_training_advanced.C index 7500565d769..b5cd6b0fd37 100755 --- a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_draminit_training_advanced.C +++ b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_draminit_training_advanced.C @@ -145,191 +145,8 @@ extern "C" /// fapi2::ReturnCode p9c_mss_draminit_training_advanced(const fapi2::Target& i_target_mba) { - uint8_t i_mode = 0; - uint64_t i_content_array[8] = {0}; - FAPI_INF("+++++++ Executing mss_draminit_training_advanced +++++++"); - - // Define attribute variables - uint32_t l_attr_mss_freq_u32 = 0; - uint32_t l_attr_mss_volt_u32 = 0; - uint8_t l_num_drops_per_port_u8 = 2; - uint8_t l_num_ranks_per_dimm_u8array[MAX_PORTS_PER_MBA][MAX_DIMM_PER_PORT] = {{0}}; - uint8_t l_port = 0; - uint32_t l_left_margin = 0; - uint32_t l_right_margin = 0; - uint32_t l_shmoo_param = 0; - uint8_t l_dram_type = 0; - uint8_t bin_pda = 0; - uint8_t vref_cal_control = 0; - uint8_t temp_cal_control = 0; - uint32_t int32_cal_control[2] = {0}; - uint64_t int64_cal_control = 0; - fapi2::buffer l_data_buffer_64; - - // Define local variables - uint8_t l_shmoo_type_valid_t = 0; - uint8_t l_shmoo_param_valid_t = 0; - enum dram_type { EMPTY = 0, DDR3 = 1, DDR4 = 2}; - const auto l_target_centaur = i_target_mba.getParent(); - //Save registers pre-shmoo - FAPI_TRY(mcb_SaveAndRestore(i_target_mba, i_content_array, i_mode)); - - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CEN_MSS_FREQ, l_target_centaur, l_attr_mss_freq_u32)); - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CEN_MSS_VOLT, l_target_centaur, l_attr_mss_volt_u32)); - //Preet Add MSS_CAL control here - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CEN_MSS_VREF_CAL_CNTL, l_target_centaur, vref_cal_control)); - FAPI_INF("+++++++++++ - DDR4 - CAL Control - %d ++++++++++++++++++++", vref_cal_control); - - - //const fapi::Target is centaur.mba - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CEN_EFF_NUM_DROPS_PER_PORT, i_target_mba, l_num_drops_per_port_u8)); - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CEN_EFF_NUM_RANKS_PER_DIMM, i_target_mba, l_num_ranks_per_dimm_u8array)); - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CEN_EFF_DRAM_GEN, i_target_mba, l_dram_type)); - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CEN_MCBIST_USER_BANK, i_target_mba, bin_pda)); - - if ((vref_cal_control == 0) && (l_dram_type == fapi2::ENUM_ATTR_CEN_EFF_DRAM_GEN_DDR4) && (bin_pda != 3)) - { - FAPI_INF("+++++++++++++++++++++++++++++ - DDR4 - Skipping - V-Ref CAL Control +++++++++++++++++++++++++++++++++++++++++++++"); - int32_cal_control[0] = 37; - l_shmoo_param_valid_t = 1; - FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_CEN_EFF_SCHMOO_ADDR_MODE, i_target_mba, l_shmoo_param_valid_t)); - FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_CEN_MCBIST_TEST_TYPE, i_target_mba, int32_cal_control[0])); - FAPI_TRY(wr_vref_shmoo_ddr4_bin(i_target_mba), "Write Vref Schmoo Function Failed"); - - // Disable Refresh DDR4 Requirement - if (l_dram_type == fapi2::ENUM_ATTR_CEN_EFF_DRAM_GEN_DDR4) - { - FAPI_INF("************* Disabling Refresh - DDR4 **************"); - FAPI_TRY(fapi2::getScom(i_target_mba, CEN_MBA_MBAREF0Q, l_data_buffer_64)); - l_data_buffer_64.clearBit<0>(); - FAPI_TRY(fapi2::putScom(i_target_mba, CEN_MBA_MBAREF0Q, l_data_buffer_64)); - } - } - - else if ((vref_cal_control != 0) && (l_dram_type == fapi2::ENUM_ATTR_CEN_EFF_DRAM_GEN_DDR4) && (bin_pda != 3)) - { - FAPI_INF("+++++++++++++++++++++++++++++ - DDR4 - CAL Control +++++++++++ Training ++++++++++++ in Progress ++++++++++++++++"); - - temp_cal_control = 8; - FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_CEN_EFF_SCHMOO_PARAM_VALID, i_target_mba, temp_cal_control)); - temp_cal_control = 6; - FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_CEN_EFF_SCHMOO_MODE, i_target_mba, temp_cal_control)); - temp_cal_control = 1; - FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_CEN_MCBIST_USER_BANK, i_target_mba, temp_cal_control)); - temp_cal_control = 2; - FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_CEN_EFF_SCHMOO_TEST_VALID, i_target_mba, temp_cal_control)); - l_shmoo_param_valid_t = 1; - FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_CEN_MCBIST_RANK, i_target_mba, l_shmoo_param_valid_t)); - l_shmoo_param_valid_t = 1; - FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_CEN_EFF_SCHMOO_ADDR_MODE, i_target_mba, l_shmoo_param_valid_t)); - int32_cal_control[0] = 0xFFFFFFFF; - int32_cal_control[1] = 0xFFFFFFFF; - FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_CEN_EFF_DRAM_WR_VREF_SCHMOO, i_target_mba, int32_cal_control)); - int32_cal_control[0] = 37; - FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_CEN_MCBIST_TEST_TYPE, i_target_mba, int32_cal_control[0])); - int64_cal_control = 0x0000000000000000ull; - FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_CEN_MCBIST_START_ADDR, i_target_mba, int64_cal_control)); - int64_cal_control = 0x0000001fc0000000ull; - FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_CEN_MCBIST_END_ADDR, i_target_mba, int64_cal_control)); - } - - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CEN_MCBIST_USER_BANK, i_target_mba, bin_pda)); - - FAPI_INF("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++"); - FAPI_INF("freq = %d on %s.", l_attr_mss_freq_u32, mss::c_str(l_target_centaur)); - FAPI_INF("volt = %d on %s.", l_attr_mss_volt_u32, mss::c_str(l_target_centaur)); - FAPI_INF("num_drops_per_port = %d on %s.", l_num_drops_per_port_u8, mss::c_str(i_target_mba)); - FAPI_INF("num_ranks_per_dimm = [%02d][%02d][%02d][%02d]", - l_num_ranks_per_dimm_u8array[0][0], - l_num_ranks_per_dimm_u8array[0][1], - l_num_ranks_per_dimm_u8array[1][0], - l_num_ranks_per_dimm_u8array[1][1]); - - FAPI_INF("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++"); - - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CEN_EFF_SCHMOO_TEST_VALID, i_target_mba, l_shmoo_type_valid_t)); - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CEN_EFF_SCHMOO_PARAM_VALID, i_target_mba, l_shmoo_param_valid_t)); - - shmoo_type_t l_shmoo_type_valid; - shmoo_param l_shmoo_param_valid; - - l_shmoo_type_valid = (shmoo_type_t)l_shmoo_type_valid_t; - l_shmoo_param_valid = (shmoo_param)l_shmoo_param_valid_t; - FAPI_INF("+++++++++++++++++++++++++ Read Schmoo Attributes ++++++++++++++++++++++++++"); - FAPI_INF("Schmoo param valid = 0x%x on %s", l_shmoo_param_valid, mss::c_str(i_target_mba)); - FAPI_INF("Schmoo test valid = 0x%x on %s", l_shmoo_type_valid, mss::c_str(i_target_mba)); - FAPI_INF("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++"); - //Check for Shmoo Parameter, if anyof them is enabled then go into the loop else the procedure exit - - if ((l_num_ranks_per_dimm_u8array[0][0] > 0) || - (l_num_ranks_per_dimm_u8array[0][1] > 0) || - (l_num_ranks_per_dimm_u8array[1][0] > 0) || - (l_num_ranks_per_dimm_u8array[1][1] > 0)) - { - if ((l_shmoo_param_valid != PARAM_NONE) || - (l_shmoo_type_valid != TEST_NONE)) - { - if ((l_shmoo_param_valid & DRV_IMP) != 0) - { - FAPI_TRY(drv_imped_shmoo(i_target_mba, l_port), "Driver Impedance Schmoo function is Failed"); - } - - if ((l_shmoo_param_valid & SLEW_RATE) != 0) - { - FAPI_TRY(slew_rate_shmoo(i_target_mba, l_port), "Slew Rate Schmoo Function is Failed"); - } - - if ((l_shmoo_param_valid & WR_VREF) != 0) - { - if(bin_pda == 1) - { - FAPI_INF("************* Bin - PDA - Vref_Schmoo **************"); - - FAPI_TRY(wr_vref_shmoo_ddr4_bin(i_target_mba), "Write Vref Schmoo Function is Failed"); - } - else - { - FAPI_TRY(wr_vref_shmoo_ddr4(i_target_mba), "Write Vref Schmoo Function is Failed"); - } - - } - - if ((l_shmoo_param_valid & RD_VREF) != 0) - { - FAPI_TRY(rd_vref_shmoo_ddr4(i_target_mba), "Read Vref Schmoo Function Failed"); - } - - if ((l_shmoo_param_valid & RCV_IMP) != 0) - { - FAPI_TRY(rcv_imp_shmoo(i_target_mba, l_port), "Receiver Impedance Schmoo Function is Failed"); - } + FAPI_INF("+++++++ Skipping mss_draminit_training_advanced +++++++"); - if (((l_shmoo_param_valid == PARAM_NONE))) - { - FAPI_TRY(delay_shmoo(i_target_mba, l_port, l_shmoo_type_valid, - &l_left_margin, &l_right_margin, - l_shmoo_param), "Delay Schmoo Function is Failed"); - } - } - } - - // Disable Refresh DDR4 Requirement - if (l_dram_type == fapi2::ENUM_ATTR_CEN_EFF_DRAM_GEN_DDR4) - { - FAPI_INF("************* Disabling Refresh - DDR4 **************"); - FAPI_TRY(fapi2::getScom(i_target_mba, CEN_MBA_MBAREF0Q, l_data_buffer_64)); - l_data_buffer_64.clearBit<0>(); - FAPI_TRY(fapi2::putScom(i_target_mba, CEN_MBA_MBAREF0Q, l_data_buffer_64)); - } - - // If mss_unmask_draminit_training_advanced_errors gets it's own bad rc, - // it will commit the passed in rc (if non-zero), and return it's own bad rc. - // Else if mss_unmask_draminit_training_advanced_errors runs clean, - // it will just return the passed in rc. - FAPI_TRY(mss_unmask_draminit_training_advanced_errors(i_target_mba), "Unmask Function is Failed"); - FAPI_TRY(mcb_SaveAndRestore(i_target_mba, i_content_array, 1)); - -fapi_try_exit: return fapi2::current_err; }