From 699ec6071a26fe6fc6694a1122e6bd5e38d87d23 Mon Sep 17 00:00:00 2001 From: Lennard Streat Date: Mon, 11 Sep 2017 19:55:05 -0500 Subject: [PATCH] Fix DMI SCOM MCMODE0 issue. Change-Id: Ia320b8765f5915c692956d50526bd538f257e8d1 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46046 Dev-Ready: Jenny Huynh Tested-by: FSP CI Jenkins Tested-by: Jenkins Server Reviewed-by: LENNARD G. STREAT Tested-by: Hostboot CI Reviewed-by: SHELTON LEUNG Reviewed-by: Joseph J. McGill Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46086 Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Daniel M. Crowell --- .../procedures/hwp/initfiles/p9c_dmi_scom.C | 144 +++--------------- .../p9/procedures/hwp/initfiles/p9c_mi_scom.C | 71 ++++++++- .../p9/procedures/hwp/initfiles/p9c_mi_scom.H | 4 +- .../procedures/hwp/nest/p9_chiplet_scominit.C | 2 +- 4 files changed, 91 insertions(+), 130 deletions(-) diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9c_dmi_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9c_dmi_scom.C index 188f46cde7e..87c9d89ce7d 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9c_dmi_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9c_dmi_scom.C @@ -29,23 +29,14 @@ using namespace fapi2; -constexpr uint64_t literal_0 = 0; -constexpr uint64_t literal_1 = 1; -constexpr uint64_t literal_1167 = 1167; -constexpr uint64_t literal_1000 = 1000; -constexpr uint64_t literal_1273 = 1273; -constexpr uint64_t literal_1200 = 1200; -constexpr uint64_t literal_1400 = 1400; -constexpr uint64_t literal_1500 = 1500; -constexpr uint64_t literal_0b01 = 0b01; -constexpr uint64_t literal_5 = 5; -constexpr uint64_t literal_7 = 7; constexpr uint64_t literal_4 = 4; constexpr uint64_t literal_8 = 8; +constexpr uint64_t literal_1 = 1; constexpr uint64_t literal_24 = 24; constexpr uint64_t literal_12 = 12; constexpr uint64_t literal_0b0100 = 0b0100; constexpr uint64_t literal_28 = 28; +constexpr uint64_t literal_0 = 0; constexpr uint64_t literal_0x1 = 0x1; constexpr uint64_t literal_0x3 = 0x3; constexpr uint64_t literal_0x5 = 0x5; @@ -57,6 +48,12 @@ constexpr uint64_t literal_0x26 = 0x26; constexpr uint64_t literal_0x33 = 0x33; constexpr uint64_t literal_0x40 = 0x40; constexpr uint64_t literal_3 = 3; +constexpr uint64_t literal_1167 = 1167; +constexpr uint64_t literal_1000 = 1000; +constexpr uint64_t literal_1273 = 1273; +constexpr uint64_t literal_1200 = 1200; +constexpr uint64_t literal_1400 = 1400; +constexpr uint64_t literal_1500 = 1500; constexpr uint64_t literal_0b0 = 0b0; constexpr uint64_t literal_2 = 2; @@ -68,18 +65,6 @@ fapi2::ReturnCode p9c_dmi_scom(const fapi2::Target& TGT0 fapi2::ATTR_NAME_Type l_chip_id; FAPI_TRY(FAPI_ATTR_GET_PRIVILEGED(fapi2::ATTR_NAME, TGT3, l_chip_id)); FAPI_TRY(FAPI_ATTR_GET_PRIVILEGED(fapi2::ATTR_EC, TGT3, l_chip_ec)); - fapi2::ATTR_CHIP_EC_FEATURE_HW413362_P9UDD11_ASYNC_Type l_TGT3_ATTR_CHIP_EC_FEATURE_HW413362_P9UDD11_ASYNC; - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW413362_P9UDD11_ASYNC, TGT3, - l_TGT3_ATTR_CHIP_EC_FEATURE_HW413362_P9UDD11_ASYNC)); - fapi2::ATTR_MC_SYNC_MODE_Type l_TGT3_ATTR_MC_SYNC_MODE; - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MC_SYNC_MODE, TGT3, l_TGT3_ATTR_MC_SYNC_MODE)); - fapi2::ATTR_FREQ_PB_MHZ_Type l_TGT1_ATTR_FREQ_PB_MHZ; - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FREQ_PB_MHZ, TGT1, l_TGT1_ATTR_FREQ_PB_MHZ)); - fapi2::ATTR_FREQ_MCA_MHZ_Type l_TGT1_ATTR_FREQ_MCA_MHZ; - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FREQ_MCA_MHZ, TGT1, l_TGT1_ATTR_FREQ_MCA_MHZ)); - uint64_t l_def_MCA_FREQ = l_TGT1_ATTR_FREQ_MCA_MHZ; - uint64_t l_def_MN_FREQ_RATIO = ((literal_1000 * l_def_MCA_FREQ) / l_TGT1_ATTR_FREQ_PB_MHZ); - uint64_t l_def_ENABLE_MCU_TIMEOUTS = literal_1; uint64_t l_def_ENABLE_AMO_CACHING = literal_1; uint64_t l_def_ENABLE_AMO_CLEAN_LINES = literal_1; uint64_t l_def_ENABLE_DYNAMIC_64_128B_READS = literal_0; @@ -96,109 +81,20 @@ fapi2::ReturnCode p9c_dmi_scom(const fapi2::Target& TGT0 FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_EPS_READ_CYCLES_T2, TGT1, l_TGT1_ATTR_PROC_EPS_READ_CYCLES_T2)); uint64_t l_def_MC_EPSILON_CFG_T2 = ((l_TGT1_ATTR_PROC_EPS_READ_CYCLES_T2 + literal_6) / literal_4); uint64_t l_def_ENABLE_MCBUSY = literal_1; + uint64_t l_def_ENABLE_MCU_TIMEOUTS = literal_1; uint64_t l_def_MCICFG_REPLAY_DELAY = literal_1; + fapi2::ATTR_MC_SYNC_MODE_Type l_TGT3_ATTR_MC_SYNC_MODE; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MC_SYNC_MODE, TGT3, l_TGT3_ATTR_MC_SYNC_MODE)); + fapi2::ATTR_CHIP_EC_FEATURE_HW413362_P9UDD11_ASYNC_Type l_TGT3_ATTR_CHIP_EC_FEATURE_HW413362_P9UDD11_ASYNC; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW413362_P9UDD11_ASYNC, TGT3, + l_TGT3_ATTR_CHIP_EC_FEATURE_HW413362_P9UDD11_ASYNC)); + fapi2::ATTR_FREQ_PB_MHZ_Type l_TGT1_ATTR_FREQ_PB_MHZ; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FREQ_PB_MHZ, TGT1, l_TGT1_ATTR_FREQ_PB_MHZ)); + fapi2::ATTR_FREQ_MCA_MHZ_Type l_TGT1_ATTR_FREQ_MCA_MHZ; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FREQ_MCA_MHZ, TGT1, l_TGT1_ATTR_FREQ_MCA_MHZ)); + uint64_t l_def_MCA_FREQ = l_TGT1_ATTR_FREQ_MCA_MHZ; + uint64_t l_def_MN_FREQ_RATIO = ((literal_1000 * l_def_MCA_FREQ) / l_TGT1_ATTR_FREQ_PB_MHZ); fapi2::buffer l_scom_buffer; - { - FAPI_TRY(fapi2::getScom( TGT0, 0x5010811ull, l_scom_buffer )); - - if (((l_TGT3_ATTR_MC_SYNC_MODE == literal_1) && (l_TGT3_ATTR_CHIP_EC_FEATURE_HW413362_P9UDD11_ASYNC == literal_0))) - { - constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_ON = 0x1; - l_scom_buffer.insert<6, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_ON ); - } - else if (((l_TGT3_ATTR_MC_SYNC_MODE == literal_1) && (l_TGT3_ATTR_CHIP_EC_FEATURE_HW413362_P9UDD11_ASYNC == literal_1))) - { - constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF = 0x0; - l_scom_buffer.insert<6, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF ); - } - else if (((l_TGT3_ATTR_MC_SYNC_MODE == literal_0) && (l_def_MN_FREQ_RATIO < literal_1167))) - { - constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF = 0x0; - l_scom_buffer.insert<6, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF ); - } - else if ((((l_TGT3_ATTR_MC_SYNC_MODE == literal_0) && (l_def_MN_FREQ_RATIO >= literal_1200)) - && (l_def_MN_FREQ_RATIO < literal_1273))) - { - constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF = 0x0; - l_scom_buffer.insert<6, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF ); - } - else if ((((l_TGT3_ATTR_MC_SYNC_MODE == literal_0) && (l_def_MN_FREQ_RATIO >= literal_1167)) - && (l_def_MN_FREQ_RATIO < literal_1200))) - { - constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF = 0x0; - l_scom_buffer.insert<6, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF ); - } - else if ((((l_TGT3_ATTR_MC_SYNC_MODE == literal_0) && (l_def_MN_FREQ_RATIO >= literal_1273)) - && (l_def_MN_FREQ_RATIO < literal_1400))) - { - constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF = 0x0; - l_scom_buffer.insert<6, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF ); - } - else if ((((l_TGT3_ATTR_MC_SYNC_MODE == literal_0) && (l_def_MN_FREQ_RATIO >= literal_1400)) - && (l_def_MN_FREQ_RATIO < literal_1500))) - { - constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF = 0x0; - l_scom_buffer.insert<6, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF ); - } - - FAPI_TRY(fapi2::putScom(TGT0, 0x5010811ull, l_scom_buffer)); - } - { - FAPI_TRY(fapi2::getScom( TGT0, 0x501081bull, l_scom_buffer )); - - constexpr auto l_MC01_PBI01_SCOMFIR_MCTO_SELECT_LOCAL_HANG_PULSE_OFF = 0x0; - l_scom_buffer.insert<1, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCTO_SELECT_LOCAL_HANG_PULSE_OFF ); - - if ((l_def_ENABLE_MCU_TIMEOUTS == literal_1)) - { - constexpr auto l_MC01_PBI01_SCOMFIR_MCTO_SELECT_PB_HANG_PULSE_ON = 0x1; - l_scom_buffer.insert<0, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCTO_SELECT_PB_HANG_PULSE_ON ); - } - - l_scom_buffer.insert<2, 2, 62, uint64_t>(literal_0b01 ); - - if ((l_def_ENABLE_MCU_TIMEOUTS == literal_1)) - { - constexpr auto l_MC01_PBI01_SCOMFIR_MCTO_DISABLE_HARDWARE_TRACE_MANAGER_HANG_ON = 0x1; - l_scom_buffer.insert<36, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCTO_DISABLE_HARDWARE_TRACE_MANAGER_HANG_ON ); - } - - if ((l_def_ENABLE_MCU_TIMEOUTS == literal_1)) - { - constexpr auto l_MC01_PBI01_SCOMFIR_MCTO_ENABLE_NONMIRROR_HANG_ON = 0x1; - l_scom_buffer.insert<32, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCTO_ENABLE_NONMIRROR_HANG_ON ); - } - - if ((l_def_ENABLE_MCU_TIMEOUTS == literal_1)) - { - constexpr auto l_MC01_PBI01_SCOMFIR_MCTO_ENABLE_MIRROR_HANG_ON = 0x1; - l_scom_buffer.insert<33, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCTO_ENABLE_MIRROR_HANG_ON ); - } - - if ((l_def_ENABLE_MCU_TIMEOUTS == literal_1)) - { - constexpr auto l_MC01_PBI01_SCOMFIR_MCTO_ENABLE_APO_HANG_ON = 0x1; - l_scom_buffer.insert<34, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCTO_ENABLE_APO_HANG_ON ); - } - - if ((l_def_ENABLE_MCU_TIMEOUTS == literal_1)) - { - constexpr auto l_MC01_PBI01_SCOMFIR_MCTO_ENABLE_CLIB_HANG_ON = 0x1; - l_scom_buffer.insert<35, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCTO_ENABLE_CLIB_HANG_ON ); - } - - if ((l_def_ENABLE_MCU_TIMEOUTS == literal_1)) - { - l_scom_buffer.insert<37, 3, 61, uint64_t>(literal_5 ); - } - - if ((l_def_ENABLE_MCU_TIMEOUTS == literal_1)) - { - l_scom_buffer.insert<5, 3, 61, uint64_t>(literal_7 ); - } - - FAPI_TRY(fapi2::putScom(TGT0, 0x501081bull, l_scom_buffer)); - } { FAPI_TRY(fapi2::getScom( TGT0, 0x5010823ull, l_scom_buffer )); diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9c_mi_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9c_mi_scom.C index a86f64a497b..a9c7992bd62 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9c_mi_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9c_mi_scom.C @@ -35,16 +35,37 @@ constexpr uint64_t literal_8 = 8; constexpr uint64_t literal_1 = 1; constexpr uint64_t literal_0x19 = 0x19; constexpr uint64_t literal_0 = 0; +constexpr uint64_t literal_1167 = 1167; +constexpr uint64_t literal_1000 = 1000; +constexpr uint64_t literal_1273 = 1273; +constexpr uint64_t literal_1200 = 1200; +constexpr uint64_t literal_1400 = 1400; +constexpr uint64_t literal_1500 = 1500; constexpr uint64_t literal_0b0000000000001000000 = 0b0000000000001000000; constexpr uint64_t literal_0b0000000000001000 = 0b0000000000001000; constexpr uint64_t literal_0b01 = 0b01; constexpr uint64_t literal_5 = 5; fapi2::ReturnCode p9c_mi_scom(const fapi2::Target& TGT0, - const fapi2::Target& TGT1) + const fapi2::Target& TGT1, const fapi2::Target& TGT2) { { + fapi2::ATTR_EC_Type l_chip_ec; + fapi2::ATTR_NAME_Type l_chip_id; + FAPI_TRY(FAPI_ATTR_GET_PRIVILEGED(fapi2::ATTR_NAME, TGT2, l_chip_id)); + FAPI_TRY(FAPI_ATTR_GET_PRIVILEGED(fapi2::ATTR_EC, TGT2, l_chip_ec)); uint64_t l_def_ENABLE_PREFETCH_DROP_PROMOTE_BASIC = literal_1; + fapi2::ATTR_CHIP_EC_FEATURE_HW413362_P9UDD11_ASYNC_Type l_TGT2_ATTR_CHIP_EC_FEATURE_HW413362_P9UDD11_ASYNC; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW413362_P9UDD11_ASYNC, TGT2, + l_TGT2_ATTR_CHIP_EC_FEATURE_HW413362_P9UDD11_ASYNC)); + fapi2::ATTR_MC_SYNC_MODE_Type l_TGT2_ATTR_MC_SYNC_MODE; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MC_SYNC_MODE, TGT2, l_TGT2_ATTR_MC_SYNC_MODE)); + fapi2::ATTR_FREQ_PB_MHZ_Type l_TGT1_ATTR_FREQ_PB_MHZ; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FREQ_PB_MHZ, TGT1, l_TGT1_ATTR_FREQ_PB_MHZ)); + fapi2::ATTR_FREQ_MCA_MHZ_Type l_TGT1_ATTR_FREQ_MCA_MHZ; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FREQ_MCA_MHZ, TGT1, l_TGT1_ATTR_FREQ_MCA_MHZ)); + uint64_t l_def_MCA_FREQ = l_TGT1_ATTR_FREQ_MCA_MHZ; + uint64_t l_def_MN_FREQ_RATIO = ((literal_1000 * l_def_MCA_FREQ) / l_TGT1_ATTR_FREQ_PB_MHZ); uint64_t l_def_ENABLE_DYNAMIC_64_128B_READS = literal_0; uint64_t l_def_ENABLE_ECRESP = literal_1; uint64_t l_def_ENABLE_AMO_CACHING = literal_1; @@ -73,6 +94,46 @@ fapi2::ReturnCode p9c_mi_scom(const fapi2::Target& TGT0, { FAPI_TRY(fapi2::getScom( TGT0, 0x5010811ull, l_scom_buffer )); + if (((l_TGT2_ATTR_MC_SYNC_MODE == literal_1) && (l_TGT2_ATTR_CHIP_EC_FEATURE_HW413362_P9UDD11_ASYNC == literal_0))) + { + constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_ON = 0x1; + l_scom_buffer.insert<6, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_ON ); + } + else if (((l_TGT2_ATTR_MC_SYNC_MODE == literal_1) && (l_TGT2_ATTR_CHIP_EC_FEATURE_HW413362_P9UDD11_ASYNC == literal_1))) + { + constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF = 0x0; + l_scom_buffer.insert<6, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF ); + } + else if (((l_TGT2_ATTR_MC_SYNC_MODE == literal_0) && (l_def_MN_FREQ_RATIO < literal_1167))) + { + constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF = 0x0; + l_scom_buffer.insert<6, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF ); + } + else if ((((l_TGT2_ATTR_MC_SYNC_MODE == literal_0) && (l_def_MN_FREQ_RATIO >= literal_1200)) + && (l_def_MN_FREQ_RATIO < literal_1273))) + { + constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF = 0x0; + l_scom_buffer.insert<6, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF ); + } + else if ((((l_TGT2_ATTR_MC_SYNC_MODE == literal_0) && (l_def_MN_FREQ_RATIO >= literal_1167)) + && (l_def_MN_FREQ_RATIO < literal_1200))) + { + constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF = 0x0; + l_scom_buffer.insert<6, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF ); + } + else if ((((l_TGT2_ATTR_MC_SYNC_MODE == literal_0) && (l_def_MN_FREQ_RATIO >= literal_1273)) + && (l_def_MN_FREQ_RATIO < literal_1400))) + { + constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF = 0x0; + l_scom_buffer.insert<6, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF ); + } + else if ((((l_TGT2_ATTR_MC_SYNC_MODE == literal_0) && (l_def_MN_FREQ_RATIO >= literal_1400)) + && (l_def_MN_FREQ_RATIO < literal_1500))) + { + constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF = 0x0; + l_scom_buffer.insert<6, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF ); + } + constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_DISABLE_MC_SYNC_ON = 0x1; l_scom_buffer.insert<27, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_DISABLE_MC_SYNC_ON ); constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_DISABLE_MC_PAIR_SYNC_ON = 0x1; @@ -103,8 +164,6 @@ fapi2::ReturnCode p9c_mi_scom(const fapi2::Target& TGT0, l_scom_buffer.insert<7, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_CENTAURP_ENABLE_ECRESP_ON ); } - constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_ON = 0x1; - l_scom_buffer.insert<6, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_ON ); FAPI_TRY(fapi2::putScom(TGT0, 0x5010811ull, l_scom_buffer)); } { @@ -135,6 +194,12 @@ fapi2::ReturnCode p9c_mi_scom(const fapi2::Target& TGT0, constexpr auto l_MC01_PBI01_SCOMFIR_MCTO_SELECT_LOCAL_HANG_PULSE_OFF = 0x0; l_scom_buffer.insert<1, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCTO_SELECT_LOCAL_HANG_PULSE_OFF ); + if ((l_def_ENABLE_MCU_TIMEOUTS == literal_1)) + { + constexpr auto l_MC01_PBI01_SCOMFIR_MCTO_DISABLE_HARDWARE_TRACE_MANAGER_HANG_ON = 0x1; + l_scom_buffer.insert<36, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCTO_DISABLE_HARDWARE_TRACE_MANAGER_HANG_ON ); + } + if ((l_def_ENABLE_MCU_TIMEOUTS == literal_1)) { constexpr auto l_MC01_PBI01_SCOMFIR_MCTO_ENABLE_NONMIRROR_HANG_ON = 0x1; diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9c_mi_scom.H b/src/import/chips/p9/procedures/hwp/initfiles/p9c_mi_scom.H index 0e12df34dd4..327ee94922d 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9c_mi_scom.H +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9c_mi_scom.H @@ -32,13 +32,13 @@ typedef fapi2::ReturnCode (*p9c_mi_scom_FP_t)(const fapi2::Target&, - const fapi2::Target&); + const fapi2::Target&, const fapi2::Target&); extern "C" { fapi2::ReturnCode p9c_mi_scom(const fapi2::Target& TGT0, - const fapi2::Target& TGT1); + const fapi2::Target& TGT1, const fapi2::Target& TGT2); } diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C index 6b2355e2da0..731d57641b9 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C @@ -268,7 +268,7 @@ fapi2::ReturnCode p9_chiplet_scominit(const fapi2::Target