From 7ddeb4d31a5f03587e8518fb1e0a518abaed6e04 Mon Sep 17 00:00:00 2001 From: Matthew Raybuck Date: Thu, 7 Nov 2019 12:17:41 -0600 Subject: [PATCH] Add 100ms wait to disable write protection for BPM There was an issue where without waiting after unlocking the BPM registers we'd fail out of the BPM update. This commit adds a 100ms delay after writing the unlock sequence before reading to verify that the registers were unlocked. Change-Id: Ic8cfeb8dba181d4071bb2d4dccaf367d88840cc2 CQ:SW480382 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/86707 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: TSUNG K YEUNG Reviewed-by: Matt Derksen Reviewed-by: Daniel M Crowell --- src/usr/isteps/nvdimm/bpm_update.C | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/usr/isteps/nvdimm/bpm_update.C b/src/usr/isteps/nvdimm/bpm_update.C index 01366792587..3ffdb595ba7 100644 --- a/src/usr/isteps/nvdimm/bpm_update.C +++ b/src/usr/isteps/nvdimm/bpm_update.C @@ -2302,6 +2302,8 @@ errlHndl_t Bpm::disableWriteProtection() break; } + nanosleep(0, 100 * NS_PER_MSEC); + // Make sure protection was removed uint8_t data = 0; errl = nvdimmReadReg(iv_nvdimm,