From 8e19c8c4ebfc8ed16b4cd2bf654dc8d2ed94a4af Mon Sep 17 00:00:00 2001 From: Nico Fajardo Date: Tue, 21 Jan 2020 14:52:59 -0600 Subject: [PATCH] Adding after_p9a_omi_init.C and p9a-specific fir traits - Updating makefile include path for chips/p9a fir files - Creating USTLFIR/DSTLFIR firTraits - Mapping USTLFIR/DSTLFIR bits per updated p9a_mc addrs - Helper functions for setting USTLFIR and DSTLFIR in after_p9a_omi_init - Adding updated addresses and bits to addresses and fld fixes.H files - Unit test for USTLFIR/DISTLFIR and OMI_FIR Change-Id: Ie8a11e7ce89aa45a7e51fddfc27435b00abfd8a2 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/89321 Tested-by: FSP CI Jenkins Tested-by: Jenkins Server Reviewed-by: Mark Pizzutillo Reviewed-by: ANDRE A MARIN Reviewed-by: MATTHEW I HICKMAN Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: Jennifer A Stofer Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/89348 Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Daniel M Crowell --- .../include/p9a_mc_scom_addresses_fixes.H | 11 +- .../include/p9a_mc_scom_addresses_fld_fixes.H | 110 +++++++++ .../p9/procedures/hwp/memory/p9a_omi_init.C | 50 +++- .../p9/procedures/hwp/memory/p9a_omi_init.H | 6 +- .../p9/procedures/hwp/memory/p9a_omi_init.mk | 5 +- .../procedures/hwp/memory/lib/fir/p9a_fir.H | 221 +++++++++++++++++- 6 files changed, 377 insertions(+), 26 deletions(-) diff --git a/src/import/chips/p9/common/include/p9a_mc_scom_addresses_fixes.H b/src/import/chips/p9/common/include/p9a_mc_scom_addresses_fixes.H index 379c9696a07..d38a30e8713 100644 --- a/src/import/chips/p9/common/include/p9a_mc_scom_addresses_fixes.H +++ b/src/import/chips/p9/common/include/p9a_mc_scom_addresses_fixes.H @@ -37,15 +37,15 @@ #ifndef __P9A_MC_SCOM_ADDRESSES_FIXES_H #define __P9A_MC_SCOM_ADDRESSES_FIXES_H -static const uint64_t P9A_MC_REG2_DL0_ERROR_ACTION = 0x070133DDull; +static const uint64_t P9A_MC_REG2_DL0_ERROR_ACTION = 0x070133DDull; -static const uint64_t P9A_MC_REG2_DL0_RMT_CONFIG = 0x070133D8ull; +static const uint64_t P9A_MC_REG2_DL0_RMT_CONFIG = 0x070133D8ull; -static const uint64_t P9A_MC_REG0_CMN_CONFIG = 0x0701334Eull; +static const uint64_t P9A_MC_REG0_CMN_CONFIG = 0x0701334Eull; -static const uint64_t P9A_MC_REG1_CMN_CONFIG = 0x0701338Eull; +static const uint64_t P9A_MC_REG1_CMN_CONFIG = 0x0701338Eull; -static const uint64_t P9A_MC_REG2_CMN_CONFIG = 0x070133CEull; +static const uint64_t P9A_MC_REG2_CMN_CONFIG = 0x070133CEull; static const uint64_t P9A_MCC_DSTLCFG2 = 0x0701090Eull; @@ -58,4 +58,5 @@ static const uint64_t P9A_MC_REG0_OMI_FIR_ACTION1 = 0x static const uint64_t P9A_MC_REG0_OMI_FIR_MASK_AND = 0x07013344ull; static const uint64_t P9A_MC_REG0_OMI_FIR_MASK_OR = 0x07013345ull; + #endif diff --git a/src/import/chips/p9/common/include/p9a_mc_scom_addresses_fld_fixes.H b/src/import/chips/p9/common/include/p9a_mc_scom_addresses_fld_fixes.H index 2fe02e625fb..3dc900181fe 100644 --- a/src/import/chips/p9/common/include/p9a_mc_scom_addresses_fld_fixes.H +++ b/src/import/chips/p9/common/include/p9a_mc_scom_addresses_fld_fixes.H @@ -117,6 +117,12 @@ static const uint8_t P9A_MC_REG2_DL0_CONFIG1_CFG_PREIPL_PRBS_ENA = 4; static const uint8_t P9A_MC_REG2_DL0_CONFIG1_CFG_PREIPL_PRBS_TIME = 5; static const uint8_t P9A_MC_REG2_DL0_CONFIG1_CFG_PREIPL_PRBS_TIME_LEN = 3; +static const uint8_t P9A_MCC_DSTLFIR_SUBCHANNEL_A_TLX_CHECKSTOP = 0; +static const uint8_t P9A_MCC_DSTLFIR_SUBCHANNEL_A_TLX_RECOVERABLE_ATTENTION = 1; +static const uint8_t P9A_MCC_DSTLFIR_SUBCHANNEL_A_TLX_SPECIAL_ATTENTION = 2; +static const uint8_t P9A_MCC_DSTLFIR_SUBCHANNEL_B_TLX_CHECKSTOP = 4; +static const uint8_t P9A_MCC_DSTLFIR_SUBCHANNEL_B_TLX_RECOVERABLE_ATTENTION = 5; +static const uint8_t P9A_MCC_DSTLFIR_SUBCHANNEL_B_TLX_SPECIAL_ATTENTION = 6; static const uint8_t P9A_MCC_DSTLFIR_CONFIG_REG_RECOVERABLE_PARITY_ERROR = 10 ; static const uint8_t P9A_MCC_DSTLFIR_CONFIG_REG_FATAL_PARITY_ERROR = 11 ; static const uint8_t P9A_MCC_DSTLFIR_SUBCHANNEL_A_TIMEOUT_ERROR = 14 ; @@ -134,4 +140,108 @@ static const uint8_t P9A_MCC_DSTLFIR_SPARE25 = 2 static const uint8_t P9A_MCC_DSTLFIR_INTERNAL_SCOM_ERROR_FIX = 26 ; static const uint8_t P9A_MCC_DSTLFIR_INTERNAL_SCOM_ERROR_CLONE_FIX = 27 ; +static const uint8_t P9A_MCC_DSTLCFG2_CFG_SUBCH_A_FAIL_DIS_LINK_DOWN = 22; +static const uint8_t P9A_MCC_DSTLCFG2_CFG_SUBCH_B_FAIL_DIS_LINK_DOWN = 23; +static const uint8_t P9A_MCC_DSTLCFG2_CFG_SUBCH_A_FAIL_DIS_CH_TIMEOUT = 24; +static const uint8_t P9A_MCC_DSTLCFG2_CFG_SUBCH_B_FAIL_DIS_CH_TIMEOUT = 25; +static const uint8_t P9A_MCC_DSTLCFG2_CFG_SUBCH_A_FAIL_DIS_TLX_XSTOP = 26; +static const uint8_t P9A_MCC_DSTLCFG2_CFG_SUBCH_B_FAIL_DIS_TLX_XSTOP = 27; +static const uint8_t P9A_MCC_DSTLCFG2_SUBCH_A_FAIL_DIS_COUNTER_ERR = 28; +static const uint8_t P9A_MCC_DSTLCFG2_SUBCH_B_FAIL_DIS_COUNTER_ERR = 29; +static const uint8_t P9A_MCC_DSTLCFG2_SUBCH_A_FAIL_DIS_TLXVC3_OVERUSE = 30; +static const uint8_t P9A_MCC_DSTLCFG2_SUBCH_B_FAIL_DIS_TLXVC3_OVERUSE = 31; +static const uint8_t P9A_MCC_DSTLCFG2_CFG_SUBCH_A_FAIL_DIS_DSTL_TIMEOUT = 37; +static const uint8_t P9A_MCC_DSTLCFG2_CFG_SUBCH_B_FAIL_DIS_DSTL_TIMEOUT = 38; + +static const uint8_t P9A_MCC_USTLFIR_CHANA_UNEXP_DATA_ERR = 0; +static const uint8_t P9A_MCC_USTLFIR_CHANB_UNEXP_DATA_ERR = 1; +static const uint8_t P9A_MCC_USTLFIR_READ_SPARE_1 = 17; +static const uint8_t P9A_MCC_USTLFIR_READ_SPARE_2 = 18; +static const uint8_t P9A_MCC_USTLFIR_WRT_SPARE_25 = 25; +static const uint8_t P9A_MCC_USTLFIR_WRT_SPARE_26 = 26; +static const uint8_t P9A_MCC_USTLFIR_CHANA_FAIL_RESP_CHECKSTOP = 27; +static const uint8_t P9A_MCC_USTLFIR_CHANB_FAIL_RESP_CHECKSTOP = 28; +static const uint8_t P9A_MCC_USTLFIR_CHANA_FAIL_RESP_RECOVER = 29; +static const uint8_t P9A_MCC_USTLFIR_CHANB_FAIL_RESP_RECOVER = 30; +static const uint8_t P9A_MCC_USTLFIR_CHANA_LOL_DROP_CHECKSTOP = 31; +static const uint8_t P9A_MCC_USTLFIR_CHANB_LOL_DROP_CHECKSTOP = 32; +static const uint8_t P9A_MCC_USTLFIR_CHANA_LOL_DROP_RECOVER = 33; +static const uint8_t P9A_MCC_USTLFIR_CHANB_LOL_DROP_RECOVER = 34; +static const uint8_t P9A_MCC_USTLFIR_CHANA_FLIT_PARITY_ERROR_FIX = 35; +static const uint8_t P9A_MCC_USTLFIR_CHANB_FLIT_PARITY_ERROR_FIX = 36; +static const uint8_t P9A_MCC_USTLFIR_CHANA_FATAL_PARITY_ERROR = 37; +static const uint8_t P9A_MCC_USTLFIR_CHANB_FATAL_PARITY_ERROR = 38; +static const uint8_t P9A_MCC_USTLFIR_CHANA_BAD_RESP_LOG_VAL = 39; +static const uint8_t P9A_MCC_USTLFIR_CHANB_BAD_RESP_LOG_VAL = 40; +static const uint8_t P9A_MCC_USTLFIR_CHANA_EXCESS_BAD_DATA_BITS = 41; +static const uint8_t P9A_MCC_USTLFIR_CHANB_EXCESS_BAD_DATA_BITS = 42; +static const uint8_t P9A_MCC_USTLFIR_CHANA_COMP_TMPL0_DATA_NOT_MMIO = 43; +static const uint8_t P9A_MCC_USTLFIR_CHANB_COMP_TMPL0_DATA_NOT_MMIO = 44; +static const uint8_t P9A_MCC_USTLFIR_CHANA_MMIO_IN_LOL_MODE = 45; +static const uint8_t P9A_MCC_USTLFIR_CHANB_MMIO_IN_LOL_MODE = 46; +static const uint8_t P9A_MCC_USTLFIR_CHANA_BAD_DATA_FIX = 47; +static const uint8_t P9A_MCC_USTLFIR_CHANB_BAD_DATA_FIX = 48; +static const uint8_t P9A_MCC_USTLFIR_CHANA_EXCESS_DATA_ERROR = 49; +static const uint8_t P9A_MCC_USTLFIR_CHANB_EXCESS_DATA_ERROR = 50; +static const uint8_t P9A_MCC_USTLFIR_CHANA_BADCRC_DATA_NOT_VALID_ERROR = 51; +static const uint8_t P9A_MCC_USTLFIR_CHANB_BADCRC_DATA_NOT_VALID_ERROR = 52; +static const uint8_t P9A_MCC_USTLFIR_CHANA_FIFO_OVERFLOW_ERROR = 53; +static const uint8_t P9A_MCC_USTLFIR_CHANB_FIFO_OVERFLOW_ERROR = 54; +static const uint8_t P9A_MCC_USTLFIR_CHANA_INVALID_CMD_ERROR = 55; +static const uint8_t P9A_MCC_USTLFIR_CHANB_INVALID_CMD_ERROR = 56; +static const uint8_t P9A_MCC_USTLFIR_FATAL_REG_PARITY_ERROR = 57; +static const uint8_t P9A_MCC_USTLFIR_RECOV_REG_PARITY_ERROR = 58; +static const uint8_t P9A_MCC_USTLFIR_CHANA_INVALID_DL_DP_COMBO = 59; +static const uint8_t P9A_MCC_USTLFIR_CHANB_INVALID_DL_DP_COMBO = 60; +static const uint8_t P9A_MCC_USTLFIR_SPARE_61 = 61; +static const uint8_t P9A_MCC_FIR_INTERNAL_PARITY_ERROR = 62; +static const uint8_t P9A_MCC_FIR_INTERNAL_PARITY_ERROR_COPY = 63; + +static const uint8_t P9A_MCC_USTLFAILMASK_RECOVER_ENABLE_MASK_0 = 0; +static const uint8_t P9A_MCC_USTLFAILMASK_RECOVER_ENABLE_MASK_1 = 1; +static const uint8_t P9A_MCC_USTLFAILMASK_RECOVER_ENABLE_MASK_2 = 2; +static const uint8_t P9A_MCC_USTLFAILMASK_RECOVER_ENABLE_MASK_3 = 3; +static const uint8_t P9A_MCC_USTLFAILMASK_RECOVER_ENABLE_MASK_4 = 4; +static const uint8_t P9A_MCC_USTLFAILMASK_RECOVER_ENABLE_MASK_5 = 5; +static const uint8_t P9A_MCC_USTLFAILMASK_RECOVER_ENABLE_MASK_6 = 6; +static const uint8_t P9A_MCC_USTLFAILMASK_RECOVER_ENABLE_MASK_7 = 7; +static const uint8_t P9A_MCC_USTLFAILMASK_RECOVER_ENABLE_MASK_8 = 8; +static const uint8_t P9A_MCC_USTLFAILMASK_RECOVER_ENABLE_MASK_9 = 9; +static const uint8_t P9A_MCC_USTLFAILMASK_RECOVER_ENABLE_MASK_10 = 10; + +static const uint8_t P9A_MCC_USTLFAILMASK_CHECKSTOP_ENABLE_MASK_16 = 16; +static const uint8_t P9A_MCC_USTLFAILMASK_CHECKSTOP_ENABLE_MASK_17 = 17; +static const uint8_t P9A_MCC_USTLFAILMASK_CHECKSTOP_ENABLE_MASK_18 = 18; +static const uint8_t P9A_MCC_USTLFAILMASK_CHECKSTOP_ENABLE_MASK_19 = 19; +static const uint8_t P9A_MCC_USTLFAILMASK_CHECKSTOP_ENABLE_MASK_20 = 20; +static const uint8_t P9A_MCC_USTLFAILMASK_CHECKSTOP_ENABLE_MASK_21 = 21; +static const uint8_t P9A_MCC_USTLFAILMASK_CHECKSTOP_ENABLE_MASK_22 = 22; +static const uint8_t P9A_MCC_USTLFAILMASK_CHECKSTOP_ENABLE_MASK_23 = 23; +static const uint8_t P9A_MCC_USTLFAILMASK_CHECKSTOP_ENABLE_MASK_24 = 24; +static const uint8_t P9A_MCC_USTLFAILMASK_CHECKSTOP_ENABLE_MASK_25 = 25; +static const uint8_t P9A_MCC_USTLFAILMASK_CHECKSTOP_ENABLE_MASK_26 = 26; + +static const uint8_t P9A_MCC_USTLFAILMASK_CHAN_FAIL_ENABLE_MASK_32 = 32; +static const uint8_t P9A_MCC_USTLFAILMASK_CHAN_FAIL_ENABLE_MASK_33 = 33; +static const uint8_t P9A_MCC_USTLFAILMASK_CHAN_FAIL_ENABLE_MASK_34 = 34; +static const uint8_t P9A_MCC_USTLFAILMASK_CHAN_FAIL_ENABLE_MASK_35 = 35; +static const uint8_t P9A_MCC_USTLFAILMASK_CHAN_FAIL_ENABLE_MASK_36 = 36; +static const uint8_t P9A_MCC_USTLFAILMASK_CHAN_FAIL_ENABLE_MASK_37 = 37; +static const uint8_t P9A_MCC_USTLFAILMASK_CHAN_FAIL_ENABLE_MASK_38 = 38; +static const uint8_t P9A_MCC_USTLFAILMASK_CHAN_FAIL_ENABLE_MASK_39 = 39; +static const uint8_t P9A_MCC_USTLFAILMASK_CHAN_FAIL_ENABLE_MASK_40 = 40; +static const uint8_t P9A_MCC_USTLFAILMASK_CHAN_FAIL_ENABLE_MASK_41 = 41; +static const uint8_t P9A_MCC_USTLFAILMASK_CHAN_FAIL_ENABLE_MASK_42 = 42; + +static const uint8_t P9A_MCC_USTLFAILMASK_CHANNEL_FAIL_TYPE_DISABLE_48 = 48; +static const uint8_t P9A_MCC_USTLFAILMASK_CHANNEL_FAIL_TYPE_DISABLE_49 = 49; +static const uint8_t P9A_MCC_USTLFAILMASK_CHANNEL_FAIL_TYPE_DISABLE_50 = 50; +static const uint8_t P9A_MCC_USTLFAILMASK_CHANNEL_FAIL_TYPE_DISABLE_51 = 51; +static const uint8_t P9A_MCC_USTLFAILMASK_CHANNEL_FAIL_TYPE_DISABLE_52 = 52; +static const uint8_t P9A_MCC_USTLFAILMASK_CHANNEL_FAIL_TYPE_DISABLE_53 = 53; +static const uint8_t P9A_MCC_USTLFAILMASK_CHANNEL_FAIL_TYPE_DISABLE_54 = 54; +static const uint8_t P9A_MCC_USTLFAILMASK_CHANNEL_FAIL_TYPE_DISABLE_55 = 55; +static const uint8_t P9A_MCC_USTLFAILMASK_CHANNEL_FAIL_TYPE_DISABLE_56 = 56; +static const uint8_t P9A_MCC_USTLFAILMASK_CHANNEL_FAIL_TYPE_DISABLE_57 = 57; + #endif diff --git a/src/import/chips/p9/procedures/hwp/memory/p9a_omi_init.C b/src/import/chips/p9/procedures/hwp/memory/p9a_omi_init.C index 60d52d748f2..accb9aef5b1 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9a_omi_init.C +++ b/src/import/chips/p9/procedures/hwp/memory/p9a_omi_init.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2018,2019 */ +/* Contributors Listed Below - COPYRIGHT 2018,2020 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -32,16 +32,15 @@ // *HWP Level: 2 // *HWP Consumed by: HB +#include +#include +#include #include #include -#include -#include /// /// @brief Run initfile to enable templates and set pacing. -/// /// @param[in] i_target p9a channel to work on -/// /// @return fapi2:ReturnCode. FAPI2_RC_SUCCESS if success, else error code. /// fapi2::ReturnCode p9a_omi_init_scominit(const fapi2::Target& i_target) @@ -63,9 +62,7 @@ fapi2::ReturnCode p9a_omi_init_scominit(const fapi2::Target& i_target) @@ -106,9 +103,7 @@ fapi_try_exit: /// /// @brief Enable ibm buffer chip low latency mode -/// /// @param[in] i_target p9a channel to work on -/// /// @return fapi2:ReturnCode. FAPI2_RC_SUCCESS if success, else error code. /// fapi2::ReturnCode p9a_omi_init_enable_lol(const fapi2::Target& i_target) @@ -146,11 +141,43 @@ fapi_try_exit: return fapi2::current_err; } +// Putting unmask function in mss::unmask for consistency with p9/EXPL/etc. +namespace mss +{ + +namespace unmask +{ + /// -/// @brief Finalize the OMI +/// @brief Initialize Axone DSTLFIR mask bits after p9a omi init +/// @param[in] i_target MCC target to find targets to initialize +/// @return fapi2:ReturnCode FAPI2_RC_SUCCESS if success, else error code /// -/// @param[in] i_target p9a channel to work on +fapi2::ReturnCode after_p9a_omi_init(const fapi2::Target& i_target) +{ + // Get parent MC from MCC to do necessary OMI FIR unmasks + const auto& l_mc = mss::find_target(i_target); + FAPI_TRY(after_p9a_omi_init_omi_fir_helper(l_mc)); + + // Set all bits on MCC DSTLFIR per FIR XML spec + FAPI_TRY(after_p9a_omi_init_dstlfir_helper(i_target)); + + // Set all bits on MCC USTLFIR per FIR XML spec + FAPI_TRY(after_p9a_omi_init_ustlfir_helper(i_target)); + +fapi_try_exit: + + FAPI_DBG("Exiting with return code : 0x%08X...", (uint64_t) fapi2::current_err); + return fapi2::current_err; +} + +} // end unmask ns + +} // end mss ns + /// +/// @brief Finalize the OMI +/// @param[in] i_target p9a channel to work on /// @return fapi2:ReturnCode. FAPI2_RC_SUCCESS if success, else error code. /// fapi2::ReturnCode p9a_omi_init(const fapi2::Target& i_target) @@ -158,6 +185,7 @@ fapi2::ReturnCode p9a_omi_init(const fapi2::Target& i_ta FAPI_TRY(p9a_omi_init_scominit(i_target)); FAPI_TRY(p9a_omi_init_enable_templates(i_target)); FAPI_TRY(p9a_omi_init_enable_lol(i_target)); + FAPI_TRY(mss::unmask::after_p9a_omi_init(i_target)); fapi_try_exit: diff --git a/src/import/chips/p9/procedures/hwp/memory/p9a_omi_init.H b/src/import/chips/p9/procedures/hwp/memory/p9a_omi_init.H index a6e73f34262..5c8beff7b99 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9a_omi_init.H +++ b/src/import/chips/p9/procedures/hwp/memory/p9a_omi_init.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2018 */ +/* Contributors Listed Below - COPYRIGHT 2018,2020 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -33,8 +33,8 @@ // *HWP Consumed by: HB -#ifndef __P9A_OMI_INIT_H_ -#define __P9A_OMI_INIT_H_ +#ifndef _P9A_OMI_INIT_H_ +#define _P9A_OMI_INIT_H_ #include diff --git a/src/import/chips/p9/procedures/hwp/memory/p9a_omi_init.mk b/src/import/chips/p9/procedures/hwp/memory/p9a_omi_init.mk index 16db79d51f6..496eea36904 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9a_omi_init.mk +++ b/src/import/chips/p9/procedures/hwp/memory/p9a_omi_init.mk @@ -5,7 +5,7 @@ # # OpenPOWER HostBoot Project # -# Contributors Listed Below - COPYRIGHT 2018 +# Contributors Listed Below - COPYRIGHT 2018,2020 # [+] International Business Machines Corp. # # @@ -23,5 +23,8 @@ # # IBM_PROLOG_END_TAG # Makefile for p9a_omi_init HWP + PROCEDURE=p9a_omi_init +$(eval $(call ADD_MODULE_INCDIR,$(PROCEDURE),$(ROOTPATH)/chips/p9a/procedures/hwp/memory/)) +$(eval $(call ADD_MODULE_INCDIR,$(PROCEDURE),$(ROOTPATH))) $(call BUILD_PROCEDURE) diff --git a/src/import/chips/p9a/procedures/hwp/memory/lib/fir/p9a_fir.H b/src/import/chips/p9a/procedures/hwp/memory/lib/fir/p9a_fir.H index 4c844c6c3cb..26336dab35a 100644 --- a/src/import/chips/p9a/procedures/hwp/memory/lib/fir/p9a_fir.H +++ b/src/import/chips/p9a/procedures/hwp/memory/lib/fir/p9a_fir.H @@ -44,6 +44,184 @@ namespace mss namespace unmask { +/// +/// @brief Helper function to perform p9a MCC DSTLFIR unmasks +/// @param[in] i_target MCC target to find targets to initialize +/// @return fapi2:ReturnCode FAPI2_RC_SUCCESS if success, else error code +/// +inline fapi2::ReturnCode after_p9a_omi_init_dstlfir_helper(const fapi2::Target& i_target) +{ + fapi2::ReturnCode l_rc = fapi2::FAPI2_RC_SUCCESS; + fapi2::buffer l_reg_data; + + mss::fir::reg l_p9a_mcc_dstlfir_reg(i_target, l_rc); + FAPI_TRY(l_rc, "for target %s unable to create fir::reg for 0x%016x", mss::c_str(i_target), P9A_MCC_DSTLFIR); + + FAPI_TRY(l_p9a_mcc_dstlfir_reg.template local_checkstop() + .template recoverable_error() + .template attention() + .template local_checkstop() + .template recoverable_error() + .template attention() + .template recoverable_error() + .template recoverable_error() + .write()); // close FAPI_TRY + + using MCCT = mss::mccTraits; + + // Set bits of DSTLCFG for specific channel fail enables/disables + // NOTE: These are outside of standard FIR procedure and handle enabling a full OMI channel checkstop + FAPI_TRY(fapi2::getScom(i_target, MCCT::DSTL_CFG, l_reg_data)); + + l_reg_data.setBit(); + + FAPI_TRY(fapi2::putScom(i_target, MCCT::DSTL_CFG, l_reg_data)); + + // Set bits of DSTLCFG2 for specific channel fail enables/disables + // NOTE: These are outside of standard FIR procedure and handle enabling a full OMI channel checkstop + FAPI_TRY(fapi2::getScom(i_target, MCCT::DSTL_CFG2, l_reg_data)); + + l_reg_data.clearBit() + .clearBit() + .clearBit() + .clearBit() + .clearBit() + .clearBit() + .clearBit() + .clearBit() + .clearBit() + .clearBit() + .setBit() + .setBit(); + + FAPI_TRY(fapi2::putScom(i_target, MCCT::DSTL_CFG2, l_reg_data)); + +fapi_try_exit: + + return fapi2::current_err; +} + +/// +/// @brief Helper function to perform p9a MCC USTLFIR unmasks +/// @param[in] i_target MCC target to find targets to initialize +/// @return fapi2:ReturnCode FAPI2_RC_SUCCESS if success, else error code +/// +inline fapi2::ReturnCode after_p9a_omi_init_ustlfir_helper(const fapi2::Target& i_target) +{ + fapi2::ReturnCode l_rc = fapi2::FAPI2_RC_SUCCESS; + fapi2::buffer l_reg_data; + + mss::fir::reg l_p9a_mcc_ustlfir_reg(i_target, l_rc); + FAPI_TRY(l_rc, "for target %s unable to create fir::reg for 0x%016x", mss::c_str(i_target), P9A_MCC_USTLFIR); + + // Perform all USTLFIR unmasks per RAS unmask spec + FAPI_TRY(l_p9a_mcc_ustlfir_reg.template local_checkstop() + .template local_checkstop() + .template local_checkstop() + .template local_checkstop() + .template recoverable_error() + .template recoverable_error() + .template checkstop() + .template checkstop() + .template checkstop() + .template checkstop() + .template checkstop() + .template checkstop() + .template checkstop() + .template checkstop() + .template recoverable_error() + .template recoverable_error() + .template checkstop() + .template checkstop() + .template local_checkstop() + .template local_checkstop() + .template recoverable_error() + .template recoverable_error() + .template recoverable_error() + .template recoverable_error() + .template local_checkstop() + .template local_checkstop() + .template local_checkstop() + .template local_checkstop() + .template local_checkstop() + .template local_checkstop() + .template local_checkstop() + .template local_checkstop() + .template local_checkstop() + .template local_checkstop() + .template recoverable_error() + .template recoverable_error() + .template local_checkstop() + .template local_checkstop() + .template local_checkstop() + .template local_checkstop() + .template local_checkstop() + .template local_checkstop() + .template local_checkstop() + .template local_checkstop() + .template checkstop() + .template recoverable_error() + .template local_checkstop() + .template local_checkstop() + .write()); // close FAPI_TRY + + using MCCT = mss::mccTraits; + + // Set bits of USTLFIRMASK for specific channel fail enables/disables + // NOTE: These are outside of standard FIR procedure and handle enabling a full OMI channel checkstop + FAPI_TRY(fapi2::getScom(i_target, MCCT::USTL_FAILMASK, l_reg_data)); + + l_reg_data.clearBit() + .setBit() + .setBit() + .setBit() + .setBit() + .setBit() + .setBit() + .setBit() + .setBit() + .clearBit() + .clearBit() + .clearBit() + .clearBit() + .clearBit() + .clearBit() + .clearBit() + .clearBit() + .clearBit() + .clearBit() + .clearBit() + .setBit() + .setBit() + .clearBit() + .clearBit() + .clearBit() + .clearBit() + .clearBit() + .clearBit() + .clearBit() + .clearBit() + .clearBit() + .setBit() + .setBit() + .clearBit() + .clearBit() + .clearBit() + .clearBit() + .clearBit() + .clearBit() + .clearBit() + .clearBit() + .clearBit() + .clearBit(); + + FAPI_TRY(fapi2::putScom(i_target, MCCT::USTL_FAILMASK, l_reg_data)); + +fapi_try_exit: + + return fapi2::current_err; +} + /// /// @brief Clear error bits P9A_MC_REGm_DLn_ERROR_MASK registers m[0:2], n[0:2] since they are now "active" /// @tparam R the REG_DL register we want to write to @@ -53,15 +231,15 @@ namespace unmask /// template inline fapi2::ReturnCode setup_reg_dl_helper(const fapi2::Target& i_target, - mss::states i_state) + const mss::states i_state) { fapi2::buffer l_reg_data; - FAPI_TRY(mss::getScom(i_target, R, l_reg_data)); - l_reg_data.writeBit(i_state); - l_reg_data.writeBit(i_state); - l_reg_data.writeBit(i_state); - FAPI_TRY(mss::putScom(i_target, R, l_reg_data)); + FAPI_TRY(fapi2::getScom(i_target, R, l_reg_data)); + l_reg_data.writeBit(i_state) + .writeBit(i_state) + .writeBit(i_state); + FAPI_TRY(fapi2::putScom(i_target, R, l_reg_data)); fapi_try_exit: return fapi2::current_err; @@ -212,6 +390,37 @@ inline fapi2::ReturnCode after_p9a_chiplet_scominit(const fapi2::Target& i_target) +{ + fapi2::ReturnCode l_rc = fapi2::FAPI2_RC_SUCCESS; + fapi2::buffer l_reg_data; + + mss::fir::reg l_p9a_mc_omi_fir_reg(i_target, l_rc); + FAPI_TRY(l_rc, "for target %s unable to create fir::reg for 0x%016x", mss::c_str(i_target), P9A_MC_REG0_OMI_FIR); + + FAPI_TRY(l_p9a_mc_omi_fir_reg.template recoverable_error().write()); + + using MCT = mss::mcTraits; + + // Clear ERROR_MASK on REGm_DLn 0:2 registers because they are now considered valid + FAPI_TRY(setup_reg_dl_helper(i_target, mss::LOW)); + FAPI_TRY(setup_reg_dl_helper(i_target, mss::LOW)); + FAPI_TRY(setup_reg_dl_helper(i_target, mss::LOW)); + FAPI_TRY(setup_reg_dl_helper(i_target, mss::LOW)); + FAPI_TRY(setup_reg_dl_helper(i_target, mss::LOW)); + FAPI_TRY(setup_reg_dl_helper(i_target, mss::LOW)); + FAPI_TRY(setup_reg_dl_helper(i_target, mss::LOW)); + FAPI_TRY(setup_reg_dl_helper(i_target, mss::LOW)); + FAPI_TRY(setup_reg_dl_helper(i_target, mss::LOW)); + fapi_try_exit: return fapi2::current_err;