From 97517fa73c61b025b7a44367e10753fdeef12827 Mon Sep 17 00:00:00 2001 From: Stephen Glancy Date: Thu, 14 Feb 2019 11:33:59 -0500 Subject: [PATCH] Adds explorer training response display functions Change-Id: I2e5c8ef08cda7abf83a322d2a3b0e01de2aaee41 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71902 Tested-by: FSP CI Jenkins Tested-by: Jenkins Server Tested-by: HWSV CI Tested-by: Hostboot CI Reviewed-by: Louis Stermole Reviewed-by: Mark Pizzutillo Reviewed-by: Jennifer A. Stofer Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76117 Reviewed-by: Christian R. Geddes Tested-by: Christian R. Geddes --- .../common/include/exp_data_structs.H | 3 +- .../procedures/hwp/memory/exp_draminit.C | 1 + .../hwp/memory/lib/phy/exp_train_display.H | 85 +++++++++++++++++-- .../hwp/memory/lib/shared/exp_consts.H | 10 +++ .../lib/utils/shared/mss_generic_consts.H | 1 + 5 files changed, 94 insertions(+), 6 deletions(-) diff --git a/src/import/chips/ocmb/explorer/common/include/exp_data_structs.H b/src/import/chips/ocmb/explorer/common/include/exp_data_structs.H index df319eff176..56f641637e0 100644 --- a/src/import/chips/ocmb/explorer/common/include/exp_data_structs.H +++ b/src/import/chips/ocmb/explorer/common/include/exp_data_structs.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2018 */ +/* Contributors Listed Below - COPYRIGHT 2018,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -63,6 +63,7 @@ enum exp_struct_sizes TRAINING_RESPONSE_NUM_LANES = 80, TRAINING_RESPONSE_NUM_RC = 27, TRAINING_RESPONSE_MR6_SIZE = TRAINING_RESPONSE_NUM_RANKS * TRAINING_RESPONSE_NUM_DRAM, + RCW_8BIT_CUTOFF = 16, }; /// diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_draminit.C b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_draminit.C index 1a7abba827d..046a6252f81 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_draminit.C +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_draminit.C @@ -35,6 +35,7 @@ #include #include +#include #include #include #include diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/phy/exp_train_display.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/phy/exp_train_display.H index f4afb90f726..a71bffce64e 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/phy/exp_train_display.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/phy/exp_train_display.H @@ -49,18 +49,93 @@ namespace exp namespace train { /// -/// @brief Displays all training information +/// @brief Displays training information +/// @param[in] i_target the OCMB target +/// @param[in] i_lane the lane for the training information +/// @param[in] i_data the training data for this lane +/// +void display_lane_results(const fapi2::Target& i_target, + const uint64_t i_lane, + const uint16_t i_data); + + +/// +/// @brief Displays lane failure information after training +/// @param[in] i_target the OCMB target +/// @param[in] i_training_info the training information to display +/// +void display_lane_info(const fapi2::Target& i_target, + const user_response_msdg_t& i_training_info); + +/// +/// @brief Displays MRS information /// @param[in] i_target the OCMB target /// @param[in] i_training_info the training information to display /// @return returns FAPI2_RC_SUCCESS iff the procedure executes successfully -/// @note This is a place holder to help avoid merge conflicts /// -inline fapi2::ReturnCode display_info(const fapi2::Target& i_target, - const user_response_msdg_t& i_training_info) +fapi2::ReturnCode display_mrs_info(const fapi2::Target& i_target, + const user_response_msdg_t& i_training_info); + +/// +/// @brief Displays RCW information for a single 8-bit RCW +/// @param[in] i_target the OCMB target +/// @param[in] i_dimm the dimm number associated w/ the RCW +/// @param[in] i_func_space the function space for the RCW +/// @param[in] i_rcw_number RCW number +/// @param[in] i_data data associated with the RCW +/// +inline void display_rcw_8bit(const fapi2::Target& i_target, + const uint64_t i_dimm, + const uint64_t i_func_space, + const uint64_t i_rcw_number, + const uint8_t i_data) +{ + const uint64_t l_rcw_print_number = i_rcw_number - exp_struct_sizes::RCW_8BIT_CUTOFF; + FAPI_DBG("%s DIMM%u F%uRC%xX: 0x%02x", mss::c_str(i_target), i_dimm, i_func_space, l_rcw_print_number, i_data); +} + +/// +/// @brief Displays RCW information for a single 4-bit RCW +/// @param[in] i_target the OCMB target +/// @param[in] i_dimm the dimm number associated w/ the RCW +/// @param[in] i_func_space the function space for the RCW +/// @param[in] i_rcw_number RCW number +/// @param[in] i_data data associated with the RCW +/// +inline void display_rcw_4bit(const fapi2::Target& i_target, + const uint64_t i_dimm, + const uint64_t i_func_space, + const uint64_t i_rcw_number, + const uint8_t i_data) { - return fapi2::FAPI2_RC_SUCCESS; + FAPI_DBG("%s DIMM%u F%uRC%02x: 0x%02x", mss::c_str(i_target), i_dimm, i_func_space, i_rcw_number, i_data); } +/// +/// @brief Displays all RCW information +/// @param[in] i_target the OCMB target +/// @param[in] i_training_info the training information to display +/// +void display_rcw_info(const fapi2::Target& i_target, + const user_response_msdg_t& i_training_info); + +/// +/// @brief Displays command to command response timing +/// @param[in] i_target the OCMB target +/// @param[in] i_training_info the training information to display +/// @return returns FAPI2_RC_SUCCESS iff the procedure executes successfully +/// +fapi2::ReturnCode display_response_timing(const fapi2::Target& i_target, + const user_response_msdg_t& i_training_info); + +/// +/// @brief Displays all training information +/// @param[in] i_target the OCMB target +/// @param[in] i_training_info the training information to display +/// @return returns FAPI2_RC_SUCCESS iff the procedure executes successfully +/// +fapi2::ReturnCode display_info(const fapi2::Target& i_target, + const user_response_msdg_t& i_training_info); } // ns train } // ns exp diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H index c55d2d4d531..4457ed3e72f 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H @@ -118,6 +118,16 @@ enum ecid_consts REG_BIT_OFFSET = 32, }; +/// +/// @brief generic explorer constants +/// +enum generic_consts +{ + // Number of DRAM for x4 vs x8 + EXP_NUM_DRAM_X4 = 20, + EXP_NUM_DRAM_X8 = 10, +}; + namespace i2c { diff --git a/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H b/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H index e294c399b0f..4d7f8afe709 100644 --- a/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H +++ b/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H @@ -543,6 +543,7 @@ enum class throttle_type }; + /// /// @brief Trait classes for mc_type /// @tparam MC the mc_type