diff --git a/src/usr/diag/prdf/common/plat/p9/p9_capp.rule b/src/usr/diag/prdf/common/plat/p9/p9_capp.rule
index 1e702bf5eee..8027b497b0a 100644
--- a/src/usr/diag/prdf/common/plat/p9/p9_capp.rule
+++ b/src/usr/diag/prdf/common/plat/p9/p9_capp.rule
@@ -281,12 +281,12 @@ group gCXAFIR filter singlebit, cs_root_cause
     /** CXAFIR[29]
      *  CXA: PB Addr Error detected by APC : ld
      */
-    (rCXAFIR, bit(29)) ? level2_th_1;
+    (rCXAFIR, bit(29)) ? self_M_level2_L_th_1;
 
     /** CXAFIR[30]
      *  CXA PB Addr Err detected by APC : st
      */
-    (rCXAFIR, bit(30)) ? level2_th_1;
+    (rCXAFIR, bit(30)) ? self_M_level2_L_th_1;
 
     /** CXAFIR[31]
      *  CXA: PPHB0 or PHB1 i linkdown
diff --git a/src/usr/diag/prdf/common/plat/p9/p9_cumulus.rule b/src/usr/diag/prdf/common/plat/p9/p9_cumulus.rule
index 92055069e95..b5d259254b4 100644
--- a/src/usr/diag/prdf/common/plat/p9/p9_cumulus.rule
+++ b/src/usr/diag/prdf/common/plat/p9/p9_cumulus.rule
@@ -3625,12 +3625,12 @@ group gVASFIR filter singlebit, cs_root_cause
     /** VASFIR[6]
      *  PB(CQ) Addr Error CRESP on Read
      */
-    (rVASFIR, bit(6)) ? self_th_1;
+    (rVASFIR, bit(6)) ? self_M_level2_L_th_1;
 
     /** VASFIR[7]
      *  PB (CQ) Address Error CRESP on Write
      */
-    (rVASFIR, bit(7)) ? self_th_1;
+    (rVASFIR, bit(7)) ? self_M_level2_L_th_1;
 
     /** VASFIR[8]
      *  Egress Correctable ECC Error
@@ -4569,7 +4569,7 @@ group gPBCENTFIR filter singlebit, cs_root_cause
     /** PBCENTFIR[5]
      *  pb cresp addr error
      */
-    (rPBCENTFIR, bit(5)) ? threshold_and_mask_self;
+    (rPBCENTFIR, bit(5)) ? defaultMaskedError;
 
     /** PBCENTFIR[6]
      *  pb cresp error
@@ -4817,7 +4817,7 @@ group gPBAFIR filter singlebit, cs_root_cause
     /** PBAFIR[1]
      *  PBA CRESP Addr Error for Read
      */
-    (rPBAFIR, bit(1)) ? level2_th_1;
+    (rPBAFIR, bit(1)) ? self_M_level2_L_th_1;
 
     /** PBAFIR[2]
      *  PBA Read Data Timeout
@@ -4872,7 +4872,7 @@ group gPBAFIR filter singlebit, cs_root_cause
     /** PBAFIR[12]
      *  PBA CRESP Addr Error for Write
      */
-    (rPBAFIR, bit(12)) ? level2_th_1;
+    (rPBAFIR, bit(12)) ? self_M_level2_L_th_1;
 
     /** PBAFIR[13]
      *  PBA Invalid CRESP
@@ -4902,7 +4902,7 @@ group gPBAFIR filter singlebit, cs_root_cause
     /** PBAFIR[18]
      *  PBA CRESP Addr Error for BC Write
      */
-    (rPBAFIR, bit(18)) ? level2_th_1;
+    (rPBAFIR, bit(18)) ? self_M_level2_L_th_1;
 
     /** PBAFIR[19]
      *  BCUE Read Data Parity Error OR MRDERR
@@ -4922,7 +4922,7 @@ group gPBAFIR filter singlebit, cs_root_cause
     /** PBAFIR[22]
      *  PBA CRESP Addr Error for BC Read
      */
-    (rPBAFIR, bit(22)) ? level2_th_1;
+    (rPBAFIR, bit(22)) ? self_M_level2_L_th_1;
 
     /** PBAFIR[23]
      *  PBA Read Data Timeout
@@ -5123,32 +5123,32 @@ group gPSIHBFIR filter singlebit, cs_root_cause
     /** PSIHBFIR[15]
      *  PSI Interrupt address Error
      */
-    (rPSIHBFIR, bit(15)) ? level2_M_self_L_th_1;
+    (rPSIHBFIR, bit(15)) ? self_M_level2_L_th_1;
 
     /** PSIHBFIR[16]
      *  OCC Interrupt address Error
      */
-    (rPSIHBFIR, bit(16)) ? level2_M_self_L_th_1;
+    (rPSIHBFIR, bit(16)) ? self_M_level2_L_th_1;
 
     /** PSIHBFIR[17]
      *  FSI Interrupt address Error
      */
-    (rPSIHBFIR, bit(17)) ? level2_M_self_L_th_1;
+    (rPSIHBFIR, bit(17)) ? self_M_level2_L_th_1;
 
     /** PSIHBFIR[18]
      *  LPC Interrupt address Error
      */
-    (rPSIHBFIR, bit(18)) ? level2_M_self_L_th_1;
+    (rPSIHBFIR, bit(18)) ? self_M_level2_L_th_1;
 
     /** PSIHBFIR[19]
      *  LOCAL ERROR Interrupt address Error
      */
-    (rPSIHBFIR, bit(19)) ? level2_M_self_L_th_1;
+    (rPSIHBFIR, bit(19)) ? self_M_level2_L_th_1;
 
     /** PSIHBFIR[20]
      *  HOST ERROR Interrupt address Error
      */
-    (rPSIHBFIR, bit(20)) ? level2_M_self_L_th_1;
+    (rPSIHBFIR, bit(20)) ? self_M_level2_L_th_1;
 
     /** PSIHBFIR[21]
      *  PSI global error bit 0
@@ -5418,12 +5418,12 @@ group gNMMUCQFIR filter singlebit, cs_root_cause
     /** NMMUCQFIR[2]
      *  PowerBus read address error
      */
-    (rNMMUCQFIR, bit(2)) ? level2_th_1;
+    (rNMMUCQFIR, bit(2)) ? self_M_level2_L_th_1;
 
     /** NMMUCQFIR[3]
      *  PowerBus write address error
      */
-    (rNMMUCQFIR, bit(3)) ? level2_th_1;
+    (rNMMUCQFIR, bit(3)) ? self_M_level2_L_th_1;
 
     /** NMMUCQFIR[4]
      *  PowerBus miscellaneous error
@@ -5641,7 +5641,7 @@ group gNMMUFIR filter singlebit, cs_root_cause
     /** NMMUFIR[21]
      *  Address error cresp detected by twsm
      */
-    (rNMMUFIR, bit(21)) ? level2_th_1;
+    (rNMMUFIR, bit(21)) ? self_M_level2_L_th_1;
 
     /** NMMUFIR[22]
      *  PTE update fail due to armwf mismatch.
@@ -5651,7 +5651,7 @@ group gNMMUFIR filter singlebit, cs_root_cause
     /** NMMUFIR[23]
      *  Address error cresp detected by twsm
      */
-    (rNMMUFIR, bit(23)) ? level2_th_1;
+    (rNMMUFIR, bit(23)) ? self_M_level2_L_th_1;
 
     /** NMMUFIR[24]
      *  Unsupported radix cfg for guest-side .
@@ -5957,17 +5957,17 @@ group gINTCQFIR filter singlebit, cs_root_cause
     /** INTCQFIR[33]
      *  INT_CQ_FIR_WRQ_BAD_CRESP:
      */
-    (rINTCQFIR, bit(33)) ? level2_M_self_L_th_1;
+    (rINTCQFIR, bit(33)) ? self_M_level2_L_th_1;
 
     /** INTCQFIR[34]
      *  INT_CQ_FIR_RDQ_BAD_CRESP:
      */
-    (rINTCQFIR, bit(34)) ? level2_M_self_L_th_1;
+    (rINTCQFIR, bit(34)) ? self_M_level2_L_th_1;
 
     /** INTCQFIR[35]
      *  INT_CQ_FIR_INTQ_BAD_CRESP:
      */
-    (rINTCQFIR, bit(35)) ? level2_M_self_L_th_1;
+    (rINTCQFIR, bit(35)) ? self_M_level2_L_th_1;
 
     /** INTCQFIR[36]
      *  INT_CQ_FIR_BAD_128K_VP_OP:
@@ -6827,7 +6827,7 @@ group gNPU0FIR filter singlebit, cs_root_cause( 1, 2, 3, 4, 5, 6, 7, 9, 10, 16,
     /** NPU0FIR[23]
      *  CQ CTL/SM PBF PowerBus Fatal Error
      */
-    (rNPU0FIR, bit(23)) ? level2_M_self_L_th_1;
+    (rNPU0FIR, bit(23)) ? self_M_level2_L_th_1;
 
     /** NPU0FIR[24]
      *  PowerBus configuration error
diff --git a/src/usr/diag/prdf/common/plat/p9/p9_ex.rule b/src/usr/diag/prdf/common/plat/p9/p9_ex.rule
index 8ae78080e71..1c6427704e8 100644
--- a/src/usr/diag/prdf/common/plat/p9/p9_ex.rule
+++ b/src/usr/diag/prdf/common/plat/p9/p9_ex.rule
@@ -335,12 +335,12 @@ group gL2FIR filter singlebit, cs_root_cause( 1, 17, 18, 20 )
     /** L2FIR[17]
      *  (RC) load received pb cresp addr error
      */
-    (rL2FIR, bit(17)) ? level2_th_1_UERE;
+    (rL2FIR, bit(17)) ? self_M_level2_L_th_1;
 
     /** L2FIR[18]
      *  (RC) store received pb cresp addr error
      */
-    (rL2FIR, bit(18)) ? level2_th_1;
+    (rL2FIR, bit(18)) ? self_M_level2_L_th_1;
 
     /** L2FIR[19]
      *  Rc or NCU Pb data CE error
@@ -375,7 +375,7 @@ group gL2FIR filter singlebit, cs_root_cause( 1, 17, 18, 20 )
     /** L2FIR[25]
      *  L2 castout or CN cresp addr err
      */
-    (rL2FIR, bit(25)) ? self_th_1;
+    (rL2FIR, bit(25)) ? self_M_level2_L_th_1;
 
     /** L2FIR[26]
      *  LVDIR tracking PE
@@ -441,7 +441,7 @@ rule rNCUFIR
     NCUFIR & ~NCUFIR_MASK & ~NCUFIR_ACT0 &  NCUFIR_ACT1;
 };
 
-group gNCUFIR filter singlebit, cs_root_cause( 8 )
+group gNCUFIR filter singlebit, cs_root_cause( 3, 4, 7, 8 )
 {
     /** NCUFIR[0]
      *  NCU store queue control error
@@ -461,12 +461,12 @@ group gNCUFIR filter singlebit, cs_root_cause( 8 )
     /** NCUFIR[3]
      *  NCU Store Address Error
      */
-    (rNCUFIR, bit(3)) ? level2_M_self_L_th_1;
+    (rNCUFIR, bit(3)) ? self_M_level2_L_th_1;
 
     /** NCUFIR[4]
      *  NCU load Address Error
      */
-    (rNCUFIR, bit(4)) ? level2_M_self_L_th_1;
+    (rNCUFIR, bit(4)) ? self_M_level2_L_th_1;
 
     /** NCUFIR[5]
      *  Store received ack_dead.
@@ -481,7 +481,7 @@ group gNCUFIR filter singlebit, cs_root_cause( 8 )
     /** NCUFIR[7]
      *  MSGSND received addr_err
      */
-    (rNCUFIR, bit(7)) ? level2_M_self_L_th_1;
+    (rNCUFIR, bit(7)) ? self_M_level2_L_th_1;
 
     /** NCUFIR[8]
      *  NCU Store Queue Data Parity Err
@@ -506,7 +506,7 @@ group gNCUFIR filter singlebit, cs_root_cause( 8 )
     /** NCUFIR[12]
      *  ima cresp addr error
      */
-    (rNCUFIR, bit(12)) ? self_th_1;
+    (rNCUFIR, bit(12)) ? self_M_level2_L_th_1;
 
     /** NCUFIR[13]
      *  ima received ack_dead
@@ -516,17 +516,17 @@ group gNCUFIR filter singlebit, cs_root_cause( 8 )
     /** NCUFIR[14]
      *  pmisc cresp addr err
      */
-    (rNCUFIR, bit(14)) ? level2_M_self_L_th_1;
+    (rNCUFIR, bit(14)) ? self_M_level2_L_th_1;
 
     /** NCUFIR[15]
      *  PPE read cresp address error
      */
-    (rNCUFIR, bit(15)) ? level2_th_1;
+    (rNCUFIR, bit(15)) ? self_M_level2_L_th_1;
 
     /** NCUFIR[16]
      *  PPE write cresp address error
      */
-    (rNCUFIR, bit(16)) ? level2_th_1;
+    (rNCUFIR, bit(16)) ? self_M_level2_L_th_1;
 
     /** NCUFIR[17]
      *  ppe read received ack dead
@@ -667,7 +667,7 @@ group gL3FIR filter singlebit, cs_root_cause( 5, 8, 11, 17, 21 )
     /** L3FIR[17]
      *  Received addr_error cresp for Prefetch
      */
-    (rL3FIR, bit(17)) ? self_th_1;
+    (rL3FIR, bit(17)) ? self_M_level2_L_th_1;
 
     /** L3FIR[18]
      *  An L3 machine hung waiting for PB cresp
diff --git a/src/usr/diag/prdf/common/plat/p9/p9_nimbus.rule b/src/usr/diag/prdf/common/plat/p9/p9_nimbus.rule
index 5c526e88073..9a9845cdb94 100644
--- a/src/usr/diag/prdf/common/plat/p9/p9_nimbus.rule
+++ b/src/usr/diag/prdf/common/plat/p9/p9_nimbus.rule
@@ -3684,12 +3684,12 @@ group gVASFIR filter singlebit, cs_root_cause
     /** VASFIR[6]
      *  PB(CQ) Addr Error CRESP on Read
      */
-    (rVASFIR, bit(6)) ? self_th_1;
+    (rVASFIR, bit(6)) ? self_M_level2_L_th_1;
 
     /** VASFIR[7]
      *  PB (CQ) Address Error CRESP on Write
      */
-    (rVASFIR, bit(7)) ? self_th_1;
+    (rVASFIR, bit(7)) ? self_M_level2_L_th_1;
 
     /** VASFIR[8]
      *  Egress Correctable ECC Error
@@ -5119,7 +5119,7 @@ group gPBCENTFIR filter singlebit, cs_root_cause
     /** PBCENTFIR[5]
      *  pb cresp addr error
      */
-    (rPBCENTFIR, bit(5)) ? threshold_and_mask_self;
+    (rPBCENTFIR, bit(5)) ? defaultMaskedError;
 
     /** PBCENTFIR[6]
      *  pb cresp error
@@ -5367,7 +5367,7 @@ group gPBAFIR filter singlebit, cs_root_cause
     /** PBAFIR[1]
      *  PBA CRESP Addr Error for Read
      */
-    (rPBAFIR, bit(1)) ? level2_th_1;
+    (rPBAFIR, bit(1)) ? self_M_level2_L_th_1;
 
     /** PBAFIR[2]
      *  PBA Read Data Timeout
@@ -5422,7 +5422,7 @@ group gPBAFIR filter singlebit, cs_root_cause
     /** PBAFIR[12]
      *  PBA CRESP Addr Error for Write
      */
-    (rPBAFIR, bit(12)) ? level2_th_1;
+    (rPBAFIR, bit(12)) ? self_M_level2_L_th_1;
 
     /** PBAFIR[13]
      *  PBA Invalid CRESP
@@ -5452,7 +5452,7 @@ group gPBAFIR filter singlebit, cs_root_cause
     /** PBAFIR[18]
      *  PBA CRESP Addr Error for BC Write
      */
-    (rPBAFIR, bit(18)) ? level2_th_1;
+    (rPBAFIR, bit(18)) ? self_M_level2_L_th_1;
 
     /** PBAFIR[19]
      *  BCUE Read Data Parity Error OR MRDERR
@@ -5472,7 +5472,7 @@ group gPBAFIR filter singlebit, cs_root_cause
     /** PBAFIR[22]
      *  PBA CRESP Addr Error for BC Read
      */
-    (rPBAFIR, bit(22)) ? level2_th_1;
+    (rPBAFIR, bit(22)) ? self_M_level2_L_th_1;
 
     /** PBAFIR[23]
      *  PBA Read Data Timeout
@@ -5673,32 +5673,32 @@ group gPSIHBFIR filter singlebit, cs_root_cause
     /** PSIHBFIR[15]
      *  PSI Interrupt address Error
      */
-    (rPSIHBFIR, bit(15)) ? level2_M_self_L_th_1;
+    (rPSIHBFIR, bit(15)) ? self_M_level2_L_th_1;
 
     /** PSIHBFIR[16]
      *  OCC Interrupt address Error
      */
-    (rPSIHBFIR, bit(16)) ? level2_M_self_L_th_1;
+    (rPSIHBFIR, bit(16)) ? self_M_level2_L_th_1;
 
     /** PSIHBFIR[17]
      *  FSI Interrupt address Error
      */
-    (rPSIHBFIR, bit(17)) ? level2_M_self_L_th_1;
+    (rPSIHBFIR, bit(17)) ? self_M_level2_L_th_1;
 
     /** PSIHBFIR[18]
      *  LPC Interrupt address Error
      */
-    (rPSIHBFIR, bit(18)) ? level2_M_self_L_th_1;
+    (rPSIHBFIR, bit(18)) ? self_M_level2_L_th_1;
 
     /** PSIHBFIR[19]
      *  LOCAL ERROR Interrupt address Error
      */
-    (rPSIHBFIR, bit(19)) ? level2_M_self_L_th_1;
+    (rPSIHBFIR, bit(19)) ? self_M_level2_L_th_1;
 
     /** PSIHBFIR[20]
      *  HOST ERROR Interrupt address Error
      */
-    (rPSIHBFIR, bit(20)) ? level2_M_self_L_th_1;
+    (rPSIHBFIR, bit(20)) ? self_M_level2_L_th_1;
 
     /** PSIHBFIR[21]
      *  PSI global error bit 0
@@ -5968,12 +5968,12 @@ group gNMMUCQFIR filter singlebit, cs_root_cause
     /** NMMUCQFIR[2]
      *  PowerBus read address error
      */
-    (rNMMUCQFIR, bit(2)) ? level2_th_1;
+    (rNMMUCQFIR, bit(2)) ? self_M_level2_L_th_1;
 
     /** NMMUCQFIR[3]
      *  PowerBus write address error
      */
-    (rNMMUCQFIR, bit(3)) ? level2_th_1;
+    (rNMMUCQFIR, bit(3)) ? self_M_level2_L_th_1;
 
     /** NMMUCQFIR[4]
      *  PowerBus miscellaneous error
@@ -6191,7 +6191,7 @@ group gNMMUFIR filter singlebit, cs_root_cause
     /** NMMUFIR[21]
      *  Address error cresp detected by twsm
      */
-    (rNMMUFIR, bit(21)) ? level2_th_1;
+    (rNMMUFIR, bit(21)) ? self_M_level2_L_th_1;
 
     /** NMMUFIR[22]
      *  PTE update fail due to armwf mismatch.
@@ -6201,7 +6201,7 @@ group gNMMUFIR filter singlebit, cs_root_cause
     /** NMMUFIR[23]
      *  Address error cresp detected by twsm
      */
-    (rNMMUFIR, bit(23)) ? level2_th_1;
+    (rNMMUFIR, bit(23)) ? self_M_level2_L_th_1;
 
     /** NMMUFIR[24]
      *  Unsupported radix cfg for guest-side .
@@ -6507,17 +6507,17 @@ group gINTCQFIR filter singlebit, cs_root_cause
     /** INTCQFIR[33]
      *  INT_CQ_FIR_WRQ_BAD_CRESP:
      */
-    (rINTCQFIR, bit(33)) ? level2_M_self_L_th_1;
+    (rINTCQFIR, bit(33)) ? self_M_level2_L_th_1;
 
     /** INTCQFIR[34]
      *  INT_CQ_FIR_RDQ_BAD_CRESP:
      */
-    (rINTCQFIR, bit(34)) ? level2_M_self_L_th_1;
+    (rINTCQFIR, bit(34)) ? self_M_level2_L_th_1;
 
     /** INTCQFIR[35]
      *  INT_CQ_FIR_INTQ_BAD_CRESP:
      */
-    (rINTCQFIR, bit(35)) ? level2_M_self_L_th_1;
+    (rINTCQFIR, bit(35)) ? self_M_level2_L_th_1;
 
     /** INTCQFIR[36]
      *  INT_CQ_FIR_BAD_128K_VP_OP:
@@ -7377,7 +7377,7 @@ group gNPU0FIR filter singlebit, cs_root_cause( 1, 2, 3, 4, 5, 6, 7, 9, 10, 16,
     /** NPU0FIR[23]
      *  CQ CTL/SM PBF PowerBus Fatal Error
      */
-    (rNPU0FIR, bit(23)) ? level2_M_self_L_th_1;
+    (rNPU0FIR, bit(23)) ? self_M_level2_L_th_1;
 
     /** NPU0FIR[24]
      *  PowerBus configuration error