From f9d0c39c1389705f432ce0d4f5bfd121f9a3279f Mon Sep 17 00:00:00 2001 From: Christian Geddes Date: Fri, 26 Jul 2019 15:23:36 -0500 Subject: [PATCH] Skip phase 2 of IDEC check for ocmb targets for gemini We did not figure out what register to read prior to bringup. This commit will allow progress on the gemini swift machines until we determine the correct register to read. Change-Id: I7319e3fc204efe08c4cc38cf354df28cca87346b Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/81213 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Matt Derksen Reviewed-by: Roland Veloz Reviewed-by: Daniel M Crowell --- src/usr/hwas/hwasPlat.C | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/usr/hwas/hwasPlat.C b/src/usr/hwas/hwasPlat.C index 0fd519cdb38..505c5921aa0 100644 --- a/src/usr/hwas/hwasPlat.C +++ b/src/usr/hwas/hwasPlat.C @@ -734,7 +734,9 @@ errlHndl_t ocmbIdecPhase2(const TARGETING::TargetHandle_t& i_target) const uint16_t translatedId = i_target->getAttr(); - if (id != translatedId) + //@TODO RTC-209353: Read IDEC for Gemini. + if ( translatedId != POWER_CHIPID::GEMINI_16 && + id != translatedId) { HWAS_ERR("ocmbIdecPhase2> OCMB Chip Id and associated SPD Chip Id " "don't match: OCMB ID=0x%.4X; Translated SPD ID=0x%.4X;", @@ -776,7 +778,9 @@ errlHndl_t ocmbIdecPhase2(const TARGETING::TargetHandle_t& i_target) const uint8_t translatedEc = i_target->getAttr(); - if (ec != translatedEc) + //@TODO RTC-209353: Read IDEC for Gemini. + if (translatedId != POWER_CHIPID::GEMINI_16 && + ec != translatedEc) { HWAS_ERR("ocmbIdecPhase2> OCMB Revision and associated SPD " "Revision don't match: OCMB EC=0x%.2X; "