From 261681fb1aeb1ae9108fc30e377b4ce14a30e76a Mon Sep 17 00:00:00 2001
From: William Bryan <wilbryan@us.ibm.com>
Date: Wed, 6 Sep 2017 11:01:29 -0500
Subject: [PATCH] GPU OpenPOWER Build Path

Change-Id: I9803c93ff2b640f9f5f782d4f5506e5a53a586fd
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45709
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
---
 src/Makefile       | 34 ++++++++++++++++++++++++++++++++--
 src/occ_405/main.c |  2 +-
 2 files changed, 33 insertions(+), 3 deletions(-)

diff --git a/src/Makefile b/src/Makefile
index 83e8994e..62ee4a48 100755
--- a/src/Makefile
+++ b/src/Makefile
@@ -5,7 +5,7 @@
 #
 # OpenPOWER OnChipController Project
 #
-# Contributors Listed Below - COPYRIGHT 2014,2016
+# Contributors Listed Below - COPYRIGHT 2014,2017
 # [+] International Business Machines Corp.
 #
 #
@@ -30,6 +30,10 @@ ifndef BASE_SRCDIR
 BASE_SRCDIR = $(abspath ./)
 endif
 
+ifndef BASE_BINDIR
+BASE_BINDIR = $(abspath ../bin)
+endif
+
 OBJDIR = $(BASE_OBJDIR)$(SUB_OBJDIR)
 SRCDIR = $(BASE_SRCDIR)$(SUB_SRCDIR)
 
@@ -53,7 +57,11 @@ THASH	= $(PPETRACEPP_DIR)/tracehash.pl
 
 OCC_405_IMAGE_NAME = occ_405
 OCC_GPE0_IMAGE_NAME = occ_gpe0
+ifndef OPOCC_GPU_SUPPORT
 OCC_GPE1_IMAGE_NAME = occ_gpe1
+else
+OCC_GPE1_IMAGE_NAME = gpu_gpe1
+endif
 OCC_BOOTLOADER_DIR_NAME = occBootLoader
 OCC_BOOTLOADER_NAME = bootloader
 IMAGE_HDR_SCRIPT = imageHdrScript
@@ -62,12 +70,21 @@ COMBINE_IMAGE_SUBDIRS = occBootLoader occ_405 occ_gpe0 occ_gpe1
 COMBINEIMAGE = $(MAKE) combineImage -C $(dir)
 IMAGEFILE = $(OBJDIR)/image.bin
 
+
+ifndef OPOCC_GPU_SUPPORT
 NEEDED_IMAGES = \
      $(OBJDIR)/$(OCC_BOOTLOADER_DIR_NAME)/$(IMAGE_HDR_SCRIPT) \
      $(OBJDIR)/$(OCC_405_IMAGE_NAME)/$(OCC_405_IMAGE_NAME).out \
      $(OBJDIR)/$(OCC_GPE0_IMAGE_NAME)/$(OCC_GPE0_IMAGE_NAME).out \
      $(OBJDIR)/$(OCC_GPE1_IMAGE_NAME)/$(OCC_GPE1_IMAGE_NAME).out \
-     $(OBJDIR)/$(OCC_BOOTLOADER_DIR_NAME)/$(OCC_BOOTLOADER_NAME).out \
+     $(OBJDIR)/$(OCC_BOOTLOADER_DIR_NAME)/$(OCC_BOOTLOADER_NAME).out
+else
+NEEDED_IMAGES = \
+     $(OBJDIR)/$(OCC_BOOTLOADER_DIR_NAME)/$(IMAGE_HDR_SCRIPT) \
+     $(OBJDIR)/$(OCC_405_IMAGE_NAME)/$(OCC_405_IMAGE_NAME).out \
+     $(OBJDIR)/$(OCC_GPE0_IMAGE_NAME)/$(OCC_GPE0_IMAGE_NAME).out \
+     $(OBJDIR)/$(OCC_BOOTLOADER_DIR_NAME)/$(OCC_BOOTLOADER_NAME).out
+endif
 
 .PHONY : all
 all: ppetools $(NEEDED_IMAGES) combineImage tracehash
@@ -87,6 +104,7 @@ $(PPETOOLS_OBJDIR):
 .PHONY : needed_images
 needed_images: $(NEEDED_IMAGES)
 
+ifndef OPOCC_GPU_SUPPORT
 .PHONY : combineImage
 combineImage: $(NEEDED_IMAGES)
 	rm -rf $(IMAGEFILE)
@@ -97,6 +115,18 @@ combineImage: $(NEEDED_IMAGES)
 	$(OBJDIR)/$(OCC_GPE1_IMAGE_NAME)/$(OCC_GPE1_IMAGE_NAME).bin \
     t2 \
 	`md5sum $(OBJDIR)/$(OCC_405_IMAGE_NAME)/$(OCC_405_IMAGE_NAME).bin | cut -c 1-4`
+else
+.PHONY : combineImage
+combineImage: $(NEEDED_IMAGES)
+	rm -rf $(IMAGEFILE)
+	BASE_OBJDIR=$(BASE_OBJDIR) $(OBJDIR)/$(OCC_BOOTLOADER_DIR_NAME)/$(IMAGE_HDR_SCRIPT) \
+    $(OBJDIR)/$(OCC_BOOTLOADER_DIR_NAME)/$(OCC_BOOTLOADER_NAME).bin \
+	$(OBJDIR)/$(OCC_405_IMAGE_NAME)/$(OCC_405_IMAGE_NAME).bin \
+	$(OBJDIR)/$(OCC_GPE0_IMAGE_NAME)/$(OCC_GPE0_IMAGE_NAME).bin \
+	$(BASE_BINDIR)/$(OCC_GPE1_IMAGE_NAME).bin \
+    t2 \
+	`md5sum $(OBJDIR)/$(OCC_405_IMAGE_NAME)/$(OCC_405_IMAGE_NAME).bin | cut -c 1-4`
+endif
 
 #clean the obj directory
 .PHONY : clean
diff --git a/src/occ_405/main.c b/src/occ_405/main.c
index a6418060..35267b7e 100755
--- a/src/occ_405/main.c
+++ b/src/occ_405/main.c
@@ -306,7 +306,7 @@ void occ_hw_error_isr(void *private, SsxIrqId irq, int priority)
     //set bit 50 of the OCC LFIR so that the PRDF component will log an error and callout the processor
     //TMGT will also see a problem and log an error but it will be informational.
 
-    // TODO: Determine how to set this without a SCOM.
+    // TODO: Determine how to set this without a SCOM. (RTC 134619)
 
     //Halt occ so that hardware will enter safe mode
     OCC_HALT(ERRL_RC_OCC_HW_ERROR);