diff --git a/src/import/chips/p9/procedures/ppe/pk/kernel/pk.h b/src/import/chips/p9/procedures/ppe/pk/kernel/pk.h index 95c71d6a8..307258192 100644 --- a/src/import/chips/p9/procedures/ppe/pk/kernel/pk.h +++ b/src/import/chips/p9/procedures/ppe/pk/kernel/pk.h @@ -5,7 +5,7 @@ /* */ /* OpenPOWER sbe Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -59,6 +59,9 @@ #include "pk_kernel.h" //#include "pk_io.h" +#define compile_assert(name,e) \ + enum { compile_assert__##name = 1/(e) }; + #ifndef __ASSEMBLER__ #define MIN(X, Y) \ diff --git a/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_spr.h b/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_spr.h index 3aeb8a187..090a18a76 100644 --- a/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_spr.h +++ b/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_spr.h @@ -5,7 +5,7 @@ /* */ /* OpenPOWER sbe Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2017 */ +/* Contributors Listed Below - COPYRIGHT 2015,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -138,6 +138,10 @@ typedef union asm volatile ("mfspr %0, %1" : "=r" (__value) : "i" (sprn) : "memory"); \ __value;}) +#define mfpir() \ + ({uint32_t __value; \ + asm volatile ("mfspr %0, 1023" : "=r" (__value) : : "memory"); \ + __value;}) /// Move to SPR /// diff --git a/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42math.h b/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42math.h index c1277e4f8..6603e29a8 100644 --- a/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42math.h +++ b/src/import/chips/p9/procedures/ppe/pk/ppe42/ppe42math.h @@ -5,7 +5,7 @@ /* */ /* OpenPOWER sbe Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016 */ +/* Contributors Listed Below - COPYRIGHT 2016,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -25,6 +25,26 @@ #ifndef _MATH_H #define _MATH_H +// Provide a way to use the native 16-bit multiply instruction +// Unfortunately the compiler does not know to use it +/// Signed 16 bit multiply, 32 bit product +#define muls16(x,y) \ + ({\ + int32_t __x = (x); \ + int32_t __y = (y); \ + int32_t __z; \ + asm volatile ("mullhw %0,%1,%2" : "=r" (__z) : "r" (__x), "r" (__y) : "cc"); \ + __z;}) + +/// Unsigned 16 bit multiply, 32 bit product +#define mulu16(x,y) \ + ({\ + uint32_t __x = (x); \ + uint32_t __y = (y); \ + uint32_t __z; \ + asm volatile("mullhwu %0,%1,%2" : "=r" (__z) : "r" (__x), "r" (__y) : "cc"); \ + __z;}) + #ifdef __cplusplus extern "C" { diff --git a/src/import/chips/p9/procedures/ppe/pk/std/std_init.c b/src/import/chips/p9/procedures/ppe/pk/std/std_init.c index c0952c028..e4377b389 100644 --- a/src/import/chips/p9/procedures/ppe/pk/std/std_init.c +++ b/src/import/chips/p9/procedures/ppe/pk/std/std_init.c @@ -5,7 +5,7 @@ /* */ /* OpenPOWER sbe Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -40,30 +40,22 @@ void __hwmacro_setup(void) { - //mask all interrupts - out64(STD_LCL_EIMR_OR, 0xffffffffffffffffull); - - //Set all interrupts to active low, level sensitive by default - out64(STD_LCL_EIPR_CLR, 0xffffffffffffffffull); - out64(STD_LCL_EITR_CLR, 0xffffffffffffffffull); - - //set up the configured type - out64(STD_LCL_EITR_OR, g_ext_irqs_type); + //mask all interrupts to prevent spurious pulse to PPE + out64(STD_LCL_EIMR, 0xffffffffffffffffull); //set up the configured polarity - out64(STD_LCL_EIPR_OR, g_ext_irqs_polarity); + out64(STD_LCL_EIPR, g_ext_irqs_polarity); - //clear the status of all active-high interrupts (has no affect on - //level sensitive interrupts) - out64(STD_LCL_EISR_CLR, g_ext_irqs_polarity); + //set up the configured type + out64(STD_LCL_EITR, g_ext_irqs_type); - //clear the status of all active-low interrupts (has no affect on - //level sensitive interrupts) - out64(STD_LCL_EISR_OR, ~g_ext_irqs_polarity); + //clear the status of all edge interrupts + out64(STD_LCL_EISR_CLR, g_ext_irqs_type); //unmask the interrupts that are to be enabled by default out64(STD_LCL_EIMR_CLR, g_ext_irqs_enable); //wait for the last operation to complete sync(); + }