From 7fb7f3bee6772903deb9c28685d77a0da8984a4a Mon Sep 17 00:00:00 2001 From: Adam Hale Date: Thu, 13 Jul 2017 16:20:21 -0500 Subject: [PATCH] compact suspend ffdc Change-Id: Ide9bb843b4b4526afe2432a58c5086e3fcb49f3c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43122 Tested-by: FSP CI Jenkins Tested-by: Jenkins Server Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: Gregory S. Still Reviewed-by: AMIT J. TENDOLKAR Reviewed-by: Jennifer A. Stofer Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43393 Reviewed-by: Sachin Gupta --- src/build/import_hwp_mk/istepmpipl/Makefile | 2 +- .../istepmpipl/istepmpiplfiles.mk | 1 + .../hwp/lib/p9_collect_suspend_ffdc.C | 135 +++++++++--------- .../hwp/lib/p9_collect_suspend_ffdc.H | 5 +- .../p9/procedures/hwp/pm/p9_suspend_powman.C | 32 ++--- .../p9/procedures/hwp/pm/p9_suspend_powman.H | 9 +- .../error_info/p9_suspend_powman_errors.xml | 47 +++--- 7 files changed, 116 insertions(+), 115 deletions(-) diff --git a/src/build/import_hwp_mk/istepmpipl/Makefile b/src/build/import_hwp_mk/istepmpipl/Makefile index 6742a13ee..df369fe07 100644 --- a/src/build/import_hwp_mk/istepmpipl/Makefile +++ b/src/build/import_hwp_mk/istepmpipl/Makefile @@ -31,7 +31,7 @@ export SUB_OBJDIR = /$(IMPORT_OBJDIR)/istepmpipl include img_defs.mk include istepmpiplfiles.mk -export VPATH = $(PERV_SRCDIR):$(NEST_SRCDIR):$(CACHE_SRCDIR):$(CORE_SRCDIR):$(PM_SRCDIR):$(INITFILES_SRCDIR):$(LIB_SRCDIR) +export VPATH = $(PERV_SRCDIR):$(NEST_SRCDIR):$(CACHE_SRCDIR):$(CORE_SRCDIR):$(PM_SRCDIR):$(INITFILES_SRCDIR):$(HWPLIB_SRCDIR) ifneq ($(ddlevel), DD2) GCC-CFLAGS += -mlongcall diff --git a/src/build/import_hwp_mk/istepmpipl/istepmpiplfiles.mk b/src/build/import_hwp_mk/istepmpipl/istepmpiplfiles.mk index b4bc9e0f9..84ceb427e 100644 --- a/src/build/import_hwp_mk/istepmpipl/istepmpiplfiles.mk +++ b/src/build/import_hwp_mk/istepmpipl/istepmpiplfiles.mk @@ -51,6 +51,7 @@ ISTEPMPIPL-CPP-SOURCES +=p9_pm_pfet_control.C ISTEPMPIPL-CPP-SOURCES +=p9_suspend_io.C ISTEPMPIPL-CPP-SOURCES +=p9_perv_sbe_cmn.C ISTEPMPIPL-CPP-SOURCES +=p9_suspend_powman.C +ISTEPMPIPL-CPP-SOURCES +=p9_collect_suspend_ffdc.C ISTEPMPIPL-C-SOURCES = ISTEPMPIPL-S-SOURCES = diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_collect_suspend_ffdc.C b/src/import/chips/p9/procedures/hwp/lib/p9_collect_suspend_ffdc.C index ca97c9d0f..635a58a49 100644 --- a/src/import/chips/p9/procedures/hwp/lib/p9_collect_suspend_ffdc.C +++ b/src/import/chips/p9/procedures/hwp/lib/p9_collect_suspend_ffdc.C @@ -22,23 +22,23 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -#if 0 // tmp dummy file to enable ppe manual mirror #include #include -#include -#include +#include +#include + +#ifdef DD2 // PPE RAMming is supported on SBE only for DD2 + #include + #include +#endif #define NUM_SCOMS 28 #define NUM_LOC_VARS 19 #define NUM_BYTE_RANGES 52 #define CME_OFF 0x00000000BADCE0FF -uint32_t g_scom = 0; -uint32_t g_byte = 8; -uint64_t g_ffdcScoms[NUM_LOC_VARS]; -uint32_t g_index = 0; -const uint32_t g_byteranges[NUM_BYTE_RANGES] = +const uint32_t byteranges[NUM_BYTE_RANGES] = { 0x07, //PGPE XIR 0x07, //PGPE XIR @@ -65,48 +65,41 @@ const uint32_t g_byteranges[NUM_BYTE_RANGES] = 0x47, 0x47, 0x47, 0x47, 0x47, 0x47, //CME[0-5] IAR 0x47, 0x47, 0x47, 0x47, 0x47, 0x47 //CME[6-11] IAR }; // -const uint64_t masks[8] = -{ - 0xFF, - 0xFFFF, - 0xFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFFFF, - 0xFFFFFFFFFFFF, - 0xFFFFFFFFFFFFFF, - 0xFFFFFFFFFFFFFFFF -}; + uint64_t extract(uint64_t data, uint32_t low, uint32_t high) { - return ((data >> (56 - (high << 3))) & masks[(high - low)]); + uint32_t bitshift = (high - low) * 8; + return ((data >> (56 - (high << 3))) & (0xFFFFFFFFFFFFFFFF >> (56 - bitshift))); } -void add_data(uint64_t l_data64) + +void add_data(uint64_t l_data64, uint32_t& index, uint32_t& byte, uint32_t& scom, uint64_t* ffdcScoms) { - //first nibble hold2 low g_byte - uint32_t low = g_byteranges[g_index] >> 4; - //second nibble holds high g_byte - uint32_t high = g_byteranges[g_index] & 0xFF; - g_index++; + //first nibble hold2 low byte + uint32_t low = byteranges[index] >> 4; + //second nibble holds high byte + uint32_t high = byteranges[index] & 0xFF; + index++; uint32_t length = (high - low) + 1; - //gets data between low and high g_byte inclusive + //gets data between low and high byte inclusive uint64_t data = extract(l_data64, low, high); - if(g_byte - length < 0)//if length of data greater than remaining space in current local variable + if(byte - length < 0)//if length of data greater than remaining space in current local variable { - length -= g_byte; - g_ffdcScoms[g_scom] |= (data >> (length << 3)); //stores what will fit in current variable - data &= masks[length]; //sets up remaining data to be stored in next variable - g_scom++; - g_byte = 8; + length -= byte; + ffdcScoms[scom] |= (data >> (length << 3)); //stores what will fit in current variable + uint32_t bitshift = (high - low) * 8; + data &= (0xFFFFFFFFFFFFFFFF >> (56 - bitshift)); //sets up remaining data to be stored in next variable + scom++; + byte = 8; } - g_ffdcScoms[g_scom] |= (data << ((length - g_byte) << 3)); //stores data in current variable - g_byte -= length; + ffdcScoms[scom] |= (data << ((length - byte) << 3)); //stores data in current variable + byte -= length; - if(!g_byte) //if no space left in current local variable move to next + if(!byte) //if no space left in current local variable move to next { - g_scom++; - g_byte = 8; + scom++; + byte = 8; } } @@ -114,6 +107,10 @@ fapi2::ReturnCode p9_collect_suspend_ffdc (const fapi2::Target& i_target) { FAPI_INF (">> p9_collect_suspend_ffdc.exe"); + uint32_t scom = 0; + uint32_t byte = 8; + uint64_t ffdcScoms[NUM_LOC_VARS]; + uint32_t index = 0; fapi2::buffer l_data64; std::vector ppe_regs; @@ -121,9 +118,11 @@ p9_collect_suspend_ffdc (const fapi2::Target& i_ta for(sbe_index = 0; sbe_index < NUM_LOC_VARS; sbe_index++) { - g_ffdcScoms[sbe_index] = 0; + ffdcScoms[sbe_index] = 0xDEADC0DEDEADC0DE; } +// SBE does not support ppe ffdc on DD1 +#ifdef DD2 ///Collect PGPE Data p9_sbe_ppe_ffdc ( i_target, PGPE_BASE_ADDRESS, @@ -131,7 +130,7 @@ p9_collect_suspend_ffdc (const fapi2::Target& i_ta for(sbe_index = 0; sbe_index < ppe_regs.size(); sbe_index++) { - add_data(ppe_regs[sbe_index]); + add_data(ppe_regs[sbe_index], index, byte, scom, ffdcScoms); } //Collect SGPE Data @@ -141,9 +140,16 @@ p9_collect_suspend_ffdc (const fapi2::Target& i_ta for(sbe_index = 0; sbe_index < ppe_regs.size(); sbe_index++) { - add_data(ppe_regs[sbe_index]); + add_data(ppe_regs[sbe_index], index, byte, scom, ffdcScoms); } +#else + // Each call to p9_sbe_ppe_ffdc would add REG_FFDC_IDX_MAX elements. + // These are defaulted in DD1 on SBE, so simply account for those in the + // ffdcScoms index by incrementing accordingly + index += 8; // (REG_FFDC_IDX_MAX * 2); +#endif // DD2 + //Collect All other SCOMs uint32_t scoms[NUM_SCOMS] = { @@ -166,7 +172,7 @@ p9_collect_suspend_ffdc (const fapi2::Target& i_ta fapi2::getScom ( i_target, scoms[getscom_index], l_data64 ); - add_data(l_data64); + add_data(l_data64, index, byte, scom, ffdcScoms); } @@ -195,11 +201,11 @@ p9_collect_suspend_ffdc (const fapi2::Target& i_ta fapi2::getScom( i_target, DBGPRO[ex], l_data64 ); - add_data(l_data64); + add_data(l_data64, index, byte, scom, ffdcScoms); } else { - add_data(CME_OFF); //inject data which informs cme is offline + add_data(CME_OFF, index, byte, scom, ffdcScoms); //inject data which informs cme is offline } } @@ -207,31 +213,28 @@ p9_collect_suspend_ffdc (const fapi2::Target& i_ta FAPI_ASSERT ( false, fapi2::SUSPEND_FFDC() .set_PROC_CHIP_TARGET (i_target) - .set_PGPE_XSR_AND_IAR (g_ffdcScoms[0]) - .set_PGPE_IR_AND_EDR (g_ffdcScoms[1]) - .set_PGPE_LR_AND_SPRG0 (g_ffdcScoms[2]) - .set_PGPE_SRR0_AND_SRR1 (g_ffdcScoms[3]) - .set_SGPE_XSR_AND_IAR (g_ffdcScoms[4]) - .set_SGPE_IR_AND_EDR (g_ffdcScoms[5]) - .set_SGPE_LR_AND_SPRG0 (g_ffdcScoms[6]) - .set_SGPE_SRR0_AND_SRR1 (g_ffdcScoms[7]) - .set_OCCS2_AND_OCCFLG (g_ffdcScoms[8]) - .set_OPIT2C_0_THROUGH_7_B0 (g_ffdcScoms[9]) - .set_OPIT2C_8_THROUGH_15_B0 (g_ffdcScoms[10]) - .set_OPIT2C_16_THROUGH_23_B0 (g_ffdcScoms[11]) - .set_QCSR_B0_TO_B1_AND_CCSR_B0_TO_B2_AND_3B_EMPTY (g_ffdcScoms[12]) - .set_CME0_IAR_AND_CME1_IAR (g_ffdcScoms[13]) - .set_CME2_IAR_AND_CME3_IAR (g_ffdcScoms[14]) - .set_CME4_IAR_AND_CME5_IAR (g_ffdcScoms[15]) - .set_CME6_IAR_AND_CME7_IAR (g_ffdcScoms[16]) - .set_CME8_IAR_AND_CME9_IAR (g_ffdcScoms[17]) - .set_CME10_IAR_AND_CME11_IAR (g_ffdcScoms[18]), + .set_PGPE_XSR_AND_IAR (ffdcScoms[0]) + .set_PGPE_IR_AND_EDR (ffdcScoms[1]) + .set_PGPE_LR_AND_SPRG0 (ffdcScoms[2]) + .set_PGPE_SRR0_AND_SRR1 (ffdcScoms[3]) + .set_SGPE_XSR_AND_IAR (ffdcScoms[4]) + .set_SGPE_IR_AND_EDR (ffdcScoms[5]) + .set_SGPE_LR_AND_SPRG0 (ffdcScoms[6]) + .set_SGPE_SRR0_AND_SRR1 (ffdcScoms[7]) + .set_OCCS2_AND_OCCFLG (ffdcScoms[8]) + .set_OPIT2C_0_THROUGH_7_B0 (ffdcScoms[9]) + .set_OPIT2C_8_THROUGH_15_B0 (ffdcScoms[10]) + .set_OPIT2C_16_THROUGH_23_B0 (ffdcScoms[11]) + .set_QCSR_B0_TO_B1_AND_CCSR_B0_TO_B2_AND_3B_EMPTY (ffdcScoms[12]) + .set_CME0_IAR_AND_CME1_IAR (ffdcScoms[13]) + .set_CME2_IAR_AND_CME3_IAR (ffdcScoms[14]) + .set_CME4_IAR_AND_CME5_IAR (ffdcScoms[15]) + .set_CME6_IAR_AND_CME7_IAR (ffdcScoms[16]) + .set_CME8_IAR_AND_CME9_IAR (ffdcScoms[17]) + .set_CME10_IAR_AND_CME11_IAR (ffdcScoms[18]), "Suspend FFDC"); fapi_try_exit: FAPI_INF ("<< p9_collect_suspend_ffdc"); return fapi2::current_err; } - -#endif - diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_collect_suspend_ffdc.H b/src/import/chips/p9/procedures/hwp/lib/p9_collect_suspend_ffdc.H index f0c8e5565..2fed207b3 100644 --- a/src/import/chips/p9/procedures/hwp/lib/p9_collect_suspend_ffdc.H +++ b/src/import/chips/p9/procedures/hwp/lib/p9_collect_suspend_ffdc.H @@ -27,11 +27,10 @@ /// /// *HWP HW Owner : Adam Hale /// *HWP HW Backup Owner : Brian Vanderpool -/// *HWP FW Owner : Raja Das +/// *HWP FW Owner : Raja Das /// *HWP Team : PM /// *HWP Level : 3 /// *HWP Consumed by : SBE -#if 0 // tmp change to enable manual mirror to ppe #ifndef __P9_COLLECT_SUSPEND_FFDC_H__ #define __P9_COLLECT_SUSPEND_FFDC_H__ @@ -65,5 +64,3 @@ p9_collect_suspend_ffdc ( ); #endif // __P9_COLLECT_SUSPEND_FFDC_H__ -#endif - diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_suspend_powman.C b/src/import/chips/p9/procedures/hwp/pm/p9_suspend_powman.C index 31d12ace1..e2e1857f9 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_suspend_powman.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_suspend_powman.C @@ -28,10 +28,10 @@ /// @file p9_suspend_powman.C /// @brief Suspend the OCC/PM /// -// *HWP HWP Owner Christina Graves clgraves@us.ibm.com -// *HWP FW Owner: Thi Tran thi@us.ibm.com +// *HWP HWP Owner Adam Hale Adam.Samuel.Hale@ibm.com +// *HWP FW Owner: Raja Das rajadas2@in.ibm.com // *HWP Team: PM -// *HWP Level: 2 +// *HWP Level: 3 // *HWP Consumed by: SBE // //-------------------------------------------------------------------------- @@ -53,10 +53,7 @@ #include #include #include - -static const uint64_t GPE2_BASE_ADDRESS = 0x00064010; -static const uint64_t GPE3_BASE_ADDRESS = 0x00066010; -static const uint64_t CME_BASE_ADDRESS = 0x10012010; +#include static const uint64_t POLLTIME_US = 1; static const uint64_t POLLTIME_MCYCLES = 4000; @@ -75,13 +72,10 @@ extern "C" { fapi2::ReturnCode p9_suspend_powman(const fapi2::Target& i_target) { FAPI_DBG("Entering p9_suspend_powman...\n") - fapi2::buffer l_occflg_data(0); fapi2::buffer l_occs2_data(0); fapi2::buffer l_ocr_reg_data(0); fapi2::buffer l_pgpe_xsr(0); - auto l_quad_vector = i_target.getChildren(); - auto l_core_vector = i_target.getChildren(); bool l_pgpe_in_safe_mode = false; bool l_pgpe_suspended = false; @@ -132,14 +126,6 @@ extern "C" { } } - // if timeout, hwp fails - /*FAPI_ASSERT(l_pgpe_in_safe_mode, - fapi2::P9_PGPE_SAFEMODE_TIMEOUT().set_PROC_CHIP_TARGET(i_target).set_PPE_BASE_ADDRESSES(ppe_addresses), - "PGPE did not signal that it entered safe mode"); - */ - //FAPI_DBG("Entered Safe Mode Successfully!\n"); - - //SBE issues "halt OCC complex" to stop OCC instructions l_ocr_reg_data.setBit(); FAPI_TRY(fapi2::putScom(i_target, PU_OCB_PIB_OCR_OR, l_ocr_reg_data), "Error writing to OCR register"); @@ -165,9 +151,13 @@ extern "C" { } //if timeout, hwp fails - FAPI_ASSERT(l_pgpe_suspended, - fapi2::P9_PGPE_SUSPEND_TIMEOUT().set_PROC_CHIP_TARGET(i_target), - "PGPE did not signal that PM Complex Suspend Finished"); + if(!l_pgpe_suspended) + { + FAPI_ERR("PGPE did not signal that PM Complex Suspend Finished"); + FAPI_TRY ( p9_collect_suspend_ffdc ( + i_target)); + } + FAPI_DBG("Suspend Power Management Successful!\n"); } else diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_suspend_powman.H b/src/import/chips/p9/procedures/hwp/pm/p9_suspend_powman.H index 237e854f8..1f4d4fb3f 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_suspend_powman.H +++ b/src/import/chips/p9/procedures/hwp/pm/p9_suspend_powman.H @@ -27,20 +27,19 @@ /// @file p9_suspend_powman.H /// @brief Suspend the OCC/PM // -// *HWP HWP Owner: Christina Graves clgraves@us.ibm.com -// *HWP FW Owner: Thi Tran thi@us.ibm.com +// *HWP HWP Owner: Adam Hale Adam.Samuel.Hale@ibm.com +// *HWP FW Owner: Raja Das rajadas2@in.ibm.com // *HWP Team: PM -// *HWP Level: 2 +// *HWP Level: 3 // *HWP Consumed by: SBE // ---------------------------------------------------------------------------------- #ifndef P9_SUSPEND_POWMAN__ -#define P9_SUSPEND_POWMAN_ +#define P9_SUSPEND_POWMAN__ //------------------------------------------------------- // Includes //------------------------------------------------------- - #include //------------------------------------------------------- diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_suspend_powman_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_suspend_powman_errors.xml index f50442d6b..dbba01875 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_suspend_powman_errors.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_suspend_powman_errors.xml @@ -26,27 +26,38 @@ - RC_P9_PGPE_SAFEMODE_TIMEOUT + RC_SUSPEND_FFDC - Procedure: p9_suspend_powman - The PGPE Timed out trying to get to safe mode + OCC Complex Suspend binary ffdc data PROC_CHIP_TARGET - PPE_BASE_ADDRESSES - + PGPE_XSR_AND_IAR + PGPE_IR_AND_EDR + PGPE_LR_AND_SPRG0 + PGPE_SRR0_AND_SRR1 + SGPE_XSR_AND_IAR + SGPE_IR_AND_EDR + SGPE_LR_AND_SPRG0 + SGPE_SRR0_AND_SRR1 + OCCS2_AND_OCCFLG + OPIT2C_0_THROUGH_7_B0 + OPIT2C_8_THROUGH_15_B0 + OPIT2C_16_THROUGH_23_B0 + QCSR_B0_TO_B1_AND_CCSR_B0_TO_B2_AND_3B_EMPTY + CME0_IAR_AND_CME1_IAR + CME2_IAR_AND_CME3_IAR + CME4_IAR_AND_CME5_IAR + CME6_IAR_AND_CME7_IAR + CME8_IAR_AND_CME9_IAR + CME10_IAR_AND_CME11_IAR + + CODE + HIGH + + + LVL_SUPPORT + LOW + - - - RC_P9_PGPE_SUSPEND_TIMEOUT - - Procedure: p9_suspend_powman - The PGPE Timed out trying to suspend - - PROC_CHIP_TARGET - - - - -