From c9669109179298fdf933737a848f75f7933d1db2 Mon Sep 17 00:00:00 2001 From: Joe McGill Date: Mon, 10 Jun 2019 09:01:40 -0400 Subject: [PATCH] update i2c bit rate divisor for p9a p9a i2cm HW changes require nest/4/2/4 programming Change-Id: Ib29c307fa2250f5096578809e3d0cb10a027086e Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78640 Tested-by: FSP CI Jenkins Tested-by: Jenkins Server Tested-by: PPE CI Tested-by: HWSV CI Tested-by: Hostboot CI Reviewed-by: Joachim Fenkes Reviewed-by: Benjamin Gass Reviewed-by: Joseph J. McGill Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78664 Reviewed-by: RAJA DAS --- .../procedures/hwp/perv/p9_sbe_gear_switcher.C | 9 +++++++-- .../xml/attribute_info/chip_ec_attributes.xml | 17 +++++++++++++++++ .../xml/attribute_info/p9_sbe_attributes.xml | 5 +++++ 3 files changed, 29 insertions(+), 2 deletions(-) diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.C index 8778d245c..4e53572b0 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER sbe Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2017 */ +/* Contributors Listed Below - COPYRIGHT 2015,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -58,6 +58,7 @@ fapi2::ReturnCode p9_sbe_gear_switcher_apply_i2c_bit_rate_divisor_setting( { uint8_t l_attr_nest_pll_bucket = 0; const fapi2::Target FAPI_SYSTEM; + fapi2::ATTR_CHIP_EC_FEATURE_I2CM_INTERNAL_CLK_DIV2_Type l_i2cm_internal_clk_div2 = 0; fapi2::buffer l_mb_bit_rate_divisor; fapi2::buffer l_data64; @@ -68,7 +69,11 @@ fapi2::ReturnCode p9_sbe_gear_switcher_apply_i2c_bit_rate_divisor_setting( l_attr_nest_pll_bucket)); FAPI_DBG("ATTR_NEST_PLL_BUCKET value: %d", l_attr_nest_pll_bucket); - l_mb_bit_rate_divisor = NEST_PLL_FREQ_I2CDIV_LIST[l_attr_nest_pll_bucket - 1]; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_I2CM_INTERNAL_CLK_DIV2, i_target_chip, l_i2cm_internal_clk_div2)); + + l_mb_bit_rate_divisor = NEST_PLL_FREQ_I2CDIV_LIST[l_attr_nest_pll_bucket - 1] * + ((l_i2cm_internal_clk_div2) ? (2) : (1)); + FAPI_DBG("bit_rate_divisor value: %d", l_mb_bit_rate_divisor); FAPI_DBG("Adjust I2C bit rate divisor setting in I2CM B Mode Reg"); diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index 50cbad479..d895c05e8 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -132,6 +132,23 @@ + + ATTR_CHIP_EC_FEATURE_I2CM_INTERNAL_CLK_DIV2 + TARGET_TYPE_PROC_CHIP + + I2CM internal clock divider is div2 , not div4 + + + + ENUM_ATTR_NAME_AXONE + + 0x10 + GREATER_THAN_OR_EQUAL + + + + + ATTR_CHIP_EC_FEATURE_NOT_DD1_FBC_AND_ALINK TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml index 9954493aa..efce389b7 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml @@ -628,4 +628,9 @@ attribute tank ATTR_LPC_CONSOLE_CNFG 0x00 + + ATTR_CHIP_EC_FEATURE_I2CM_INTERNAL_CLK_DIV2 + + +