From db0336533babbab87922eee17fa08366db3a6577 Mon Sep 17 00:00:00 2001 From: Joe McGill Date: Sun, 9 Jul 2017 14:00:53 -0500 Subject: [PATCH] p9.npu.scom.initfile -- FIR updates to align with RAS XML documentation create feature attribute to qualify FIR2 inits update FIR2 XML,inits based on current review feedback Change-Id: Ib105de1f106ab5bd14684b688c3d2a1b17121d16 Original-Change-Id: I8a1a8a92e4f4ee24b308f0bb731a953f098edc72 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42910 Tested-by: Jenkins Server Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: Zane C. Shelley Reviewed-by: Kevin F. Reick Reviewed-by: Jenny Huynh Reviewed-by: Joseph J. McGill --- .../xml/attribute_info/chip_ec_attributes.xml | 35 +++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index a38819e3e..32925e4cf 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -3893,6 +3893,24 @@ + + + ATTR_CHIP_EC_FEATURE_DISABLE_NPU_FREEZE + TARGET_TYPE_PROC_CHIP + + True if NPU freeze (unit checkstop) should be disabled + + + + ENUM_ATTR_NAME_NIMBUS + + 0x20 + LESS_THAN + + + + + ATTR_CHIP_EC_FEATURE_NOT_HW399276 TARGET_TYPE_PROC_CHIP @@ -4080,6 +4098,23 @@ + + ATTR_CHIP_EC_FEATURE_NO_NPU2_FIR + TARGET_TYPE_PROC_CHIP + + Nimbus DD1 only: NPU2 FIR not present + + + + ENUM_ATTR_NAME_NIMBUS + + 0x20 + LESS_THAN + + + + + ATTR_CHIP_EC_FEATURE_HW399466