diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index 1fcffd139..0dc6e5443 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -392,23 +392,6 @@ - - ATTR_CHIP_EC_FEATURE_HW376110 - TARGET_TYPE_PROC_CHIP - - HW376110 - - - - ENUM_ATTR_NAME_NIMBUS - - 0x20 - LESS_THAN - - - - - ATTR_CHIP_EC_FEATURE_HW375534 TARGET_TYPE_PROC_CHIP @@ -426,23 +409,6 @@ - - ATTR_CHIP_EC_FEATURE_HW366164 - TARGET_TYPE_PROC_CHIP - - HW366164 - SRQ Fullness Control - - - - ENUM_ATTR_NAME_NIMBUS - - 0x20 - LESS_THAN - - - - - ATTR_CHIP_EC_FEATURE_HW366248 TARGET_TYPE_PROC_CHIP @@ -2691,6 +2657,40 @@ + + ATTR_CHIP_EC_FEATURE_HW384794 + TARGET_TYPE_PROC_CHIP + + Workaround for defect where clock enables to PHY were incorrectly driven + + + + ENUM_ATTR_NAME_NIMBUS + + 0x20 + LESS_THAN + + + + + + + ATTR_CHIP_EC_FEATURE_HW375732 + TARGET_TYPE_PROC_CHIP + + Workaround for Data mismatch discovered by Geyzer at certain async frequency ratios + + + + ENUM_ATTR_NAME_NIMBUS + + 0x20 + LESS_THAN + + + + + ATTR_CHIP_EC_FEATURE_MSS_TRAINING_BAD_BITS TARGET_TYPE_PROC_CHIP @@ -2935,6 +2935,23 @@ + + ATTR_CHIP_EC_FEATURE_HW401131 + TARGET_TYPE_PROC_CHIP + + Since amo cache clean line disabled for dd2, fix for HW401131 must also be disabled. + + + + ENUM_ATTR_NAME_NIMBUS + + 0x20 + GREATER_THAN_OR_EQUAL + + + + + ATTR_CHIP_EC_FEATURE_RING_SAVE_MPIPL TARGET_TYPE_PROC_CHIP @@ -2985,6 +3002,58 @@ + + + ATTR_CHIP_EC_FEATURE_HW399466 + TARGET_TYPE_PROC_CHIP + + Enable fix for HW399466 where all read data for amo smi ops is sent to rmw buffer. + + + + ENUM_ATTR_NAME_NIMBUS + + 0x20 + GREATER_THAN_OR_EQUAL + + + + + + + ATTR_CHIP_EC_FEATURE_HW355538 + TARGET_TYPE_PROC_CHIP + + Enable fix for HW355538 that enables write MDI to 1 for retry UE. + + + + ENUM_ATTR_NAME_NIMBUS + + 0x20 + GREATER_THAN_OR_EQUAL + + + + + + + ATTR_CHIP_EC_FEATURE_NEW_MC_DD2_SETTINGS + TARGET_TYPE_PROC_CHIP + + Not workaround or defect related. Just new dials to be set that are new in memory controller for DD2. + + + + ENUM_ATTR_NAME_NIMBUS + + 0x20 + GREATER_THAN_OR_EQUAL + + + + +