From 1ed21a831cdc07ac2895498ab115c93827d70d97 Mon Sep 17 00:00:00 2001 From: Oliver O'Halloran Date: Tue, 5 Nov 2019 18:43:52 +1100 Subject: [PATCH] platforms/qemu: Add slot table MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a slot table to our QEMU platform file to allow testing slot functions and so that we have the basic infrastructure in place. The slot names are the bus names that Qemu assigns to the subordiate bus of the root port (i.e. where actual devices should go). Devices can be added under a specific phb by specifying that bus. E.g. -drive file=./disk1.img,format=raw,if=none,id=nvme0 \ -device nvme,drive=nvme0,bus=pcie.1 Places an NVMe device under the root port of PHB0001. The six slots here will cover each of the six PHBs that exist in the default P9 model. The P8 model has three (since that's what a Venice has), but the extra slots shouldn't cause any problems. Reviewed-by: Cédric Le Goater Signed-off-by: Oliver O'Halloran --- platforms/qemu/qemu.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/platforms/qemu/qemu.c b/platforms/qemu/qemu.c index 757c086d4a22..c73bf255f9b4 100644 --- a/platforms/qemu/qemu.c +++ b/platforms/qemu/qemu.c @@ -10,6 +10,23 @@ static bool bt_device_present; +ST_PLUGGABLE(qemu_slot0, "pcie.0"); +ST_PLUGGABLE(qemu_slot1, "pcie.1"); +ST_PLUGGABLE(qemu_slot2, "pcie.2"); +ST_PLUGGABLE(qemu_slot3, "pcie.3"); +ST_PLUGGABLE(qemu_slot4, "pcie.4"); +ST_PLUGGABLE(qemu_slot5, "pcie.5"); + +static const struct slot_table_entry qemu_phb_table[] = { + ST_PHB_ENTRY(0, 0, qemu_slot0), + ST_PHB_ENTRY(0, 1, qemu_slot1), + ST_PHB_ENTRY(0, 2, qemu_slot2), + ST_PHB_ENTRY(0, 3, qemu_slot3), + ST_PHB_ENTRY(0, 4, qemu_slot4), + ST_PHB_ENTRY(0, 5, qemu_slot5), + { .etype = st_end }, +}; + static bool qemu_probe_common(const char *compat) { struct dt_node *n; @@ -24,6 +41,8 @@ static bool qemu_probe_common(const char *compat) bt_device_present = true; } + slot_table_init(qemu_phb_table); + return true; } @@ -58,6 +77,7 @@ DECLARE_PLATFORM(qemu) = { .external_irq = astbmc_ext_irq_serirq_cpld, .cec_power_down = astbmc_ipmi_power_down, .cec_reboot = astbmc_ipmi_reboot, + .pci_get_slot_info = slot_table_get_slot_info, .start_preload_resource = flash_start_preload_resource, .resource_loaded = flash_resource_loaded, .terminate = ipmi_terminate, @@ -74,6 +94,7 @@ DECLARE_PLATFORM(qemu_powernv8) = { .external_irq = astbmc_ext_irq_serirq_cpld, .cec_power_down = astbmc_ipmi_power_down, .cec_reboot = astbmc_ipmi_reboot, + .pci_get_slot_info = slot_table_get_slot_info, .start_preload_resource = flash_start_preload_resource, .resource_loaded = flash_resource_loaded, .exit = astbmc_exit, @@ -91,6 +112,7 @@ DECLARE_PLATFORM(qemu_powernv9) = { .external_irq = astbmc_ext_irq_serirq_cpld, .cec_power_down = astbmc_ipmi_power_down, .cec_reboot = astbmc_ipmi_reboot, + .pci_get_slot_info = slot_table_get_slot_info, .start_preload_resource = flash_start_preload_resource, .resource_loaded = flash_resource_loaded, .exit = astbmc_exit,