From 906d25d864a1d72c948a475570c53ca88081afb3 Mon Sep 17 00:00:00 2001 From: Michael Neuling Date: Tue, 12 Sep 2017 14:56:15 +1000 Subject: [PATCH] phb4: Move nvram read of pci-eeh-mmio init Move nvram read to the PHB4 init code so that's it's only read once, rather than every time we go though PHB reset. Signed-off-by: Michael Neuling Signed-off-by: Stewart Smith --- hw/phb4.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/hw/phb4.c b/hw/phb4.c index a40db68d2e8e..39e1204a8c1f 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -140,6 +140,7 @@ static void phb4_init_hw(struct phb4 *p, bool first_init); static bool verbose_eeh; static bool pci_tracing; +static bool pci_eeh_mmio; enum capi_dma_tvt { CAPI_DMA_TVT0, @@ -4169,7 +4170,7 @@ static void phb4_init_hw(struct phb4 *p, bool first_init) val |= PHB_CTRLR_IRQ_STORE_EOI; } - if (nvram_query_eq("pci-eeh-mmio", "disabled")) + if (!pci_eeh_mmio) val |= PHB_CTRLR_MMIO_EEH_DISABLE; out_be64(p->regs + PHB_CTRLR, val); @@ -4946,6 +4947,7 @@ void probe_phb4(void) prlog(PR_INFO, "PHB4: Verbose EEH enabled\n"); pci_tracing = nvram_query_eq("pci-tracing", "true"); + pci_eeh_mmio = !nvram_query_eq("pci-eeh-mmio", "disabled"); /* Look for PBCQ XSCOM nodes */ dt_for_each_compatible(dt_root, np, "ibm,power9-pbcq") phb4_probe_pbcq(np);