diff --git a/llvm/lib/Target/RISCV/RISCVInstrFormatsCOREV.td b/llvm/lib/Target/RISCV/RISCVInstrFormatsCOREV.td
index fc26ed9be13a..5c6d97c615e4 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrFormatsCOREV.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrFormatsCOREV.td
@@ -128,7 +128,7 @@ class RVInstAlu_rri<bits<2> funct2, bits<3> funct3, dag outs, dag ins,
   let Inst{19-15} = rs1;
   let Inst{14-12} = funct3;
   let Inst{11-7} = rd;
-  let Opcode = OPC_CUSTOM2.Value;
+  let Opcode = OPC_CUSTOM1.Value;
 }
 
 class RVInstAlu_rr<bits<7> funct7, bits<3> funct3, dag outs, dag ins,
@@ -143,7 +143,7 @@ class RVInstAlu_rr<bits<7> funct7, bits<3> funct3, dag outs, dag ins,
   let Inst{19-15} = rs1;
   let Inst{14-12} = funct3;
   let Inst{11-7} = rd;
-  let Opcode = OPC_OP.Value;
+  let Opcode = OPC_CUSTOM1.Value;
 }
 
 class RVInstAlu_ri<bits<7> funct7, bits<3> funct3, dag outs, dag ins,
@@ -158,7 +158,7 @@ class RVInstAlu_ri<bits<7> funct7, bits<3> funct3, dag outs, dag ins,
   let Inst{19-15} = rs1;
   let Inst{14-12} = funct3;
   let Inst{11-7} = rd;
-  let Opcode = OPC_OP.Value;
+  let Opcode = OPC_CUSTOM1.Value;
 }
 
 class RVInstAlu_r<bits<7> funct7, bits<3> funct3, dag outs, dag ins,
@@ -173,7 +173,7 @@ class RVInstAlu_r<bits<7> funct7, bits<3> funct3, dag outs, dag ins,
   let Inst{19-15} = rs1;
   let Inst{14-12} = funct3;
   let Inst{11-7} = rd;
-  let Opcode = OPC_OP.Value;
+  let Opcode = OPC_CUSTOM1.Value;
 }
 
 class RVInstImmBranch<bits<3> funct3, dag outs, dag ins,
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoCOREV.td b/llvm/lib/Target/RISCV/RISCVInstrInfoCOREV.td
index d249ef9833b8..b4157bd3875d 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoCOREV.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoCOREV.td
@@ -181,106 +181,106 @@ let Predicates = [HasExtXCoreVMac], hasSideEffects = 0, mayLoad = 0, mayStore =
 
 let Predicates = [HasExtXCoreVAlu], hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
   // General ALU Operations
-  def CV_ABS    : RVInstAlu_r<0b0000010, 0b000, (outs GPR:$rd), (ins GPR:$rs1),
+  def CV_ABS    : RVInstAlu_r<0b0101000, 0b011, (outs GPR:$rd), (ins GPR:$rs1),
                               "cv.abs", "$rd, $rs1", []>,
                   Sched<[]>;
-  def CV_SLET   : RVInstAlu_rr<0b0000010, 0b010, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2),
+  def CV_SLET   : RVInstAlu_rr<0b0101001, 0b011, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2),
                                "cv.slet", "$rd, $rs1, $rs2", []>,
                   Sched<[]>;
-  def CV_SLETU  : RVInstAlu_rr<0b0000010, 0b011, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2),
+  def CV_SLETU  : RVInstAlu_rr<0b0101010, 0b011, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2),
                                "cv.sletu", "$rd, $rs1, $rs2", []>,
                   Sched<[]>;
-  def CV_MIN    : RVInstAlu_rr<0b0000010, 0b100, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2),
+  def CV_MIN    : RVInstAlu_rr<0b0101011, 0b011, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2),
                                "cv.min", "$rd, $rs1, $rs2", []>,
                   Sched<[]>;
-  def CV_MINU   : RVInstAlu_rr<0b0000010, 0b101, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2),
+  def CV_MINU   : RVInstAlu_rr<0b0101100, 0b011, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2),
                                "cv.minu", "$rd, $rs1, $rs2", []>,
                   Sched<[]>;
-  def CV_MAX    : RVInstAlu_rr<0b0000010, 0b110, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2),
+  def CV_MAX    : RVInstAlu_rr<0b0101101, 0b011, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2),
                                "cv.max", "$rd, $rs1, $rs2", []>,
                   Sched<[]>;
-  def CV_MAXU   : RVInstAlu_rr<0b0000010, 0b111, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2),
+  def CV_MAXU   : RVInstAlu_rr<0b0101110, 0b011, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2),
                                "cv.maxu", "$rd, $rs1, $rs2", []>,
                   Sched<[]>;
-  def CV_EXTHS  : RVInstAlu_r<0b0001000, 0b100, (outs GPR:$rd), (ins GPR:$rs1),
+  def CV_EXTHS  : RVInstAlu_r<0b0101111, 0b011, (outs GPR:$rd), (ins GPR:$rs1),
                               "cv.exths", "$rd, $rs1", []>,
                   Sched<[]>;
-  def CV_EXTHZ  : RVInstAlu_r<0b0001000, 0b101, (outs GPR:$rd), (ins GPR:$rs1),
+  def CV_EXTHZ  : RVInstAlu_r<0b0110000, 0b011, (outs GPR:$rd), (ins GPR:$rs1),
                               "cv.exthz", "$rd, $rs1", []>,
                   Sched<[]>;
-  def CV_EXTBS  : RVInstAlu_r<0b0001000, 0b110, (outs GPR:$rd), (ins GPR:$rs1),
+  def CV_EXTBS  : RVInstAlu_r<0b0110001, 0b011, (outs GPR:$rd), (ins GPR:$rs1),
                               "cv.extbs", "$rd, $rs1", []>,
                   Sched<[]>;
-  def CV_EXTBZ  : RVInstAlu_r<0b0001000, 0b111, (outs GPR:$rd), (ins GPR:$rs1),
+  def CV_EXTBZ  : RVInstAlu_r<0b0110010, 0b011, (outs GPR:$rd), (ins GPR:$rs1),
                               "cv.extbz", "$rd, $rs1", []>,
                   Sched<[]>;
 
-  def CV_CLIP   : RVInstAlu_ri<0b0001010, 0b001, (outs GPR:$rd), (ins GPR:$rs1, uimm5:$imm5),
+  def CV_CLIP   : RVInstAlu_ri<0b0111000, 0b011, (outs GPR:$rd), (ins GPR:$rs1, uimm5:$imm5),
                                "cv.clip", "$rd, $rs1, $imm5", []>,
                   Sched<[]>;
-  def CV_CLIPU  : RVInstAlu_ri<0b0001010, 0b010, (outs GPR:$rd), (ins GPR:$rs1, uimm5:$imm5),
+  def CV_CLIPU  : RVInstAlu_ri<0b0111001, 0b011, (outs GPR:$rd), (ins GPR:$rs1, uimm5:$imm5),
                                "cv.clipu", "$rd, $rs1, $imm5", []>,
                   Sched<[]>;
-  def CV_CLIPR  : RVInstAlu_rr<0b0001010, 0b101, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2),
+  def CV_CLIPR  : RVInstAlu_rr<0b0111010, 0b011, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2),
                                "cv.clipr", "$rd, $rs1, $rs2", []>,
                   Sched<[]>;
-  def CV_CLIPUR : RVInstAlu_rr<0b0001010, 0b110, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2),
+  def CV_CLIPUR : RVInstAlu_rr<0b0111011, 0b011, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2),
                                "cv.clipur", "$rd, $rs1, $rs2", []>,
                   Sched<[]>;
 
   def CV_ADDN   : RVInstAlu_rri<0b00, 0b010, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2, uimm5:$imm5),
                                 "cv.addn", "$rd, $rs1, $rs2, $imm5", []>,
                   Sched<[]>;
-  def CV_ADDUN  : RVInstAlu_rri<0b10, 0b010, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2, uimm5:$imm5),
+  def CV_ADDUN  : RVInstAlu_rri<0b01, 0b010, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2, uimm5:$imm5),
                                 "cv.addun", "$rd, $rs1, $rs2, $imm5", []>,
                   Sched<[]>;
-  def CV_ADDRN  : RVInstAlu_rri<0b00, 0b110, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2, uimm5:$imm5),
+  def CV_ADDRN  : RVInstAlu_rri<0b10, 0b010, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2, uimm5:$imm5),
                                 "cv.addrn", "$rd, $rs1, $rs2, $imm5", []>,
                   Sched<[]>;
-  def CV_ADDURN : RVInstAlu_rri<0b10, 0b110, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2, uimm5:$imm5),
+  def CV_ADDURN : RVInstAlu_rri<0b11, 0b010, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2, uimm5:$imm5),
                                 "cv.addurn", "$rd, $rs1, $rs2, $imm5", []>,
                   Sched<[]>;
   def CV_SUBN   : RVInstAlu_rri<0b00, 0b011, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2, uimm5:$imm5),
                                 "cv.subn", "$rd, $rs1, $rs2, $imm5", []>,
                   Sched<[]>;
-  def CV_SUBUN  : RVInstAlu_rri<0b10, 0b011, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2, uimm5:$imm5),
+  def CV_SUBUN  : RVInstAlu_rri<0b01, 0b011, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2, uimm5:$imm5),
                                 "cv.subun", "$rd, $rs1, $rs2, $imm5", []>,
                   Sched<[]>;
-  def CV_SUBRN  : RVInstAlu_rri<0b00, 0b111, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2, uimm5:$imm5),
+  def CV_SUBRN  : RVInstAlu_rri<0b10, 0b011, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2, uimm5:$imm5),
                                 "cv.subrn", "$rd, $rs1, $rs2, $imm5", []>,
                   Sched<[]>;
-  def CV_SUBURN : RVInstAlu_rri<0b10, 0b111, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2, uimm5:$imm5),
+  def CV_SUBURN : RVInstAlu_rri<0b11, 0b011, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2, uimm5:$imm5),
                                 "cv.suburn", "$rd, $rs1, $rs2, $imm5", []>,
                   Sched<[]>;
 } // Predicates = [HasExtXCoreVAlu], hasSideEffects = 0, mayLoad = 0, mayStore = 0
 
-let Predicates = [HasExtXCoreVAlu], hasSideEffects = 0, mayLoad = 0, mayStore = 0, Opcode = OPC_CUSTOM2.Value, Constraints = "$rd = $rd_wb" in {
-  def CV_ADDNR   : RVInstAlu_rr<0b0100000, 0b010, (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2),
+let Predicates = [HasExtXCoreVAlu], hasSideEffects = 0, mayLoad = 0, mayStore = 0, Opcode = OPC_CUSTOM1.Value, Constraints = "$rd = $rd_wb" in {
+  def CV_ADDNR   : RVInstAlu_rr<0b1000000, 0b011, (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2),
                                 "cv.addnr", "$rd, $rs1, $rs2", []>,
                    Sched<[]>;
-  def CV_ADDUNR  : RVInstAlu_rr<0b1100000, 0b010, (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2),
+  def CV_ADDUNR  : RVInstAlu_rr<0b1000001, 0b011, (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2),
                                 "cv.addunr", "$rd, $rs1, $rs2", []>,
                    Sched<[]>;
-  def CV_ADDRNR  : RVInstAlu_rr<0b0100000, 0b110, (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2),
+  def CV_ADDRNR  : RVInstAlu_rr<0b1000010, 0b011, (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2),
                                 "cv.addrnr", "$rd, $rs1, $rs2", []>,
                    Sched<[]>;
-  def CV_ADDURNR : RVInstAlu_rr<0b1100000, 0b110, (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2),
+  def CV_ADDURNR : RVInstAlu_rr<0b1000011, 0b011, (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2),
                                 "cv.addurnr", "$rd, $rs1, $rs2", []>,
                    Sched<[]>;
-  def CV_SUBNR   : RVInstAlu_rr<0b0100000, 0b011, (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2),
+  def CV_SUBNR   : RVInstAlu_rr<0b1000100, 0b011, (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2),
                                 "cv.subnr", "$rd, $rs1, $rs2", []>,
                    Sched<[]>;
-  def CV_SUBUNR  : RVInstAlu_rr<0b1100000, 0b011, (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2),
+  def CV_SUBUNR  : RVInstAlu_rr<0b1000101, 0b011, (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2),
                                 "cv.subunr", "$rd, $rs1, $rs2", []>,
                    Sched<[]>;
-  def CV_SUBRNR  : RVInstAlu_rr<0b0100000, 0b111, (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2),
+  def CV_SUBRNR  : RVInstAlu_rr<0b1000110, 0b011, (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2),
                                 "cv.subrnr", "$rd, $rs1, $rs2", []>,
                    Sched<[]>;
-  def CV_SUBURNR : RVInstAlu_rr<0b1100000, 0b111, (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2),
+  def CV_SUBURNR : RVInstAlu_rr<0b1000111, 0b011, (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2),
                                 "cv.suburnr", "$rd, $rs1, $rs2", []>,
                    Sched<[]>;
 
-} // Predicates = [HasExtXCoreVAlu], hasSideEffects = 0, mayLoad = 0, mayStore = 0, Opcode = OPC_CUSTOM2.Value, Constraints = "$rd = $rd_wb"
+} // Predicates = [HasExtXCoreVAlu], hasSideEffects = 0, mayLoad = 0, mayStore = 0, Opcode = OPC_CUSTOM1.Value, Constraints = "$rd = $rd_wb"
 
 let Predicates = [HasExtXCoreVAlu], hasSideEffects = 0, mayLoad = 0, mayStore = 0, isBranch = 1, isTerminator = 1 in {
   // Immediate branching operations
diff --git a/llvm/test/MC/RISCV/corev/alu-all-extensions.s b/llvm/test/MC/RISCV/corev/alu-all-extensions.s
index 1d851b9f8de7..e9e1c040cebc 100644
--- a/llvm/test/MC/RISCV/corev/alu-all-extensions.s
+++ b/llvm/test/MC/RISCV/corev/alu-all-extensions.s
@@ -5,129 +5,129 @@
 
 cv.abs t0, t1
 # CHECK-INSTR: cv.abs t0, t1
-# CHECK-ENCODING: [0xb3,0x02,0x03,0x04]
+# CHECK-ENCODING: [0xab,0x32,0x03,0x50]
 
 cv.slet t0, t1, t2
 # CHECK-INSTR: cv.slet t0, t1, t2
-# CHECK-ENCODING: [0xb3,0x22,0x73,0x04]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x52]
 
 cv.sletu t0, t1, t2
 # CHECK-INSTR: cv.sletu t0, t1, t2
-# CHECK-ENCODING: [0xb3,0x32,0x73,0x04]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x54]
 
 cv.min t0, t1, t2
 # CHECK-INSTR: cv.min t0, t1, t2
-# CHECK-ENCODING: [0xb3,0x42,0x73,0x04]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x56]
 
 cv.minu t0, t1, t2
 # CHECK-INSTR: cv.minu t0, t1, t2
-# CHECK-ENCODING: [0xb3,0x52,0x73,0x04]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x58]
 
 cv.max t0, t1, t2
 # CHECK-INSTR: cv.max t0, t1, t2
-# CHECK-ENCODING: [0xb3,0x62,0x73,0x04]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x5a]
 
 cv.maxu t0, t1, t2
 # CHECK-INSTR: cv.maxu t0, t1, t2
-# CHECK-ENCODING: [0xb3,0x72,0x73,0x04]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x5c]
 
 cv.exths t0, t1
 # CHECK-INSTR: cv.exths t0, t1
-# CHECK-ENCODING: [0xb3,0x42,0x03,0x10]
+# CHECK-ENCODING: [0xab,0x32,0x03,0x5e]
 
 cv.exthz t0, t1
 # CHECK-INSTR: cv.exthz t0, t1
-# CHECK-ENCODING: [0xb3,0x52,0x03,0x10]
+# CHECK-ENCODING: [0xab,0x32,0x03,0x60]
 
 cv.extbs t0, t1
 # CHECK-INSTR: cv.extbs t0, t1
-# CHECK-ENCODING: [0xb3,0x62,0x03,0x10]
+# CHECK-ENCODING: [0xab,0x32,0x03,0x62]
 
 cv.extbz t0, t1
 # CHECK-INSTR: cv.extbz t0, t1
-# CHECK-ENCODING: [0xb3,0x72,0x03,0x10]
+# CHECK-ENCODING: [0xab,0x32,0x03,0x64]
 
 
 cv.clip t0, t1, 5
 # CHECK-INSTR: cv.clip t0, t1, 5
-# CHECK-ENCODING: [0xb3,0x12,0x53,0x14]
+# CHECK-ENCODING: [0xab,0x32,0x53,0x70]
 
 cv.clipu t0, t1, 5
 # CHECK-INSTR: cv.clipu t0, t1, 5
-# CHECK-ENCODING: [0xb3,0x22,0x53,0x14]
+# CHECK-ENCODING: [0xab,0x32,0x53,0x72]
 
 cv.clipr t0, t1, t2
 # CHECK-INSTR: cv.clipr t0, t1, t2
-# CHECK-ENCODING: [0xb3,0x52,0x73,0x14]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x74]
 
 cv.clipur t0, t1, t2
 # CHECK-INSTR: cv.clipur t0, t1, t2
-# CHECK-ENCODING: [0xb3,0x62,0x73,0x14]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x76]
 
 
 cv.addn t0, t1, t2, 5
 # CHECK-INSTR: cv.addn t0, t1, t2, 5
-# CHECK-ENCODING: [0xdb,0x22,0x73,0x0a]
+# CHECK-ENCODING: [0xab,0x22,0x73,0x0a]
 
 cv.addun t0, t1, t2, 5
 # CHECK-INSTR: cv.addun t0, t1, t2, 5
-# CHECK-ENCODING: [0xdb,0x22,0x73,0x8a]
+# CHECK-ENCODING: [0xab,0x22,0x73,0x4a]
 
 cv.addrn t0, t1, t2, 5
 # CHECK-INSTR: cv.addrn t0, t1, t2, 5
-# CHECK-ENCODING: [0xdb,0x62,0x73,0x0a]
+# CHECK-ENCODING: [0xab,0x22,0x73,0x8a]
 
 cv.addurn t0, t1, t2, 5
 # CHECK-INSTR: cv.addurn t0, t1, t2, 5
-# CHECK-ENCODING: [0xdb,0x62,0x73,0x8a]
+# CHECK-ENCODING: [0xab,0x22,0x73,0xca]
 
 cv.subn t0, t1, t2, 5
 # CHECK-INSTR: cv.subn t0, t1, t2, 5
-# CHECK-ENCODING: [0xdb,0x32,0x73,0x0a]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x0a]
 
 cv.subun t0, t1, t2, 5
 # CHECK-INSTR: cv.subun t0, t1, t2, 5
-# CHECK-ENCODING: [0xdb,0x32,0x73,0x8a]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x4a]
 
 cv.subrn t0, t1, t2, 5
 # CHECK-INSTR: cv.subrn t0, t1, t2, 5
-# CHECK-ENCODING: [0xdb,0x72,0x73,0x0a]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x8a]
 
 cv.suburn t0, t1, t2, 5
 # CHECK-INSTR: cv.suburn t0, t1, t2, 5
-# CHECK-ENCODING: [0xdb,0x72,0x73,0x8a]
+# CHECK-ENCODING: [0xab,0x32,0x73,0xca]
 
 cv.addnr t0, t1, t2
 # CHECK-INSTR: cv.addnr t0, t1, t2
-# CHECK-ENCODING: [0xdb,0x22,0x73,0x40]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x80]
 
 cv.addunr t0, t1, t2
 # CHECK-INSTR: cv.addunr t0, t1, t2
-# CHECK-ENCODING: [0xdb,0x22,0x73,0xc0]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x82]
 
 cv.addrnr t0, t1, t2
 # CHECK-INSTR: cv.addrnr t0, t1, t2
-# CHECK-ENCODING: [0xdb,0x62,0x73,0x40]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x84]
 
 cv.addurnr t0, t1, t2
 # CHECK-INSTR: cv.addurnr t0, t1, t2
-# CHECK-ENCODING: [0xdb,0x62,0x73,0xc0]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x86]
 
 cv.subnr t0, t1, t2
 # CHECK-INSTR: cv.subnr t0, t1, t2
-# CHECK-ENCODING: [0xdb,0x32,0x73,0x40]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x88]
 
 cv.subunr t0, t1, t2
 # CHECK-INSTR: cv.subunr t0, t1, t2
-# CHECK-ENCODING: [0xdb,0x32,0x73,0xc0]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x8a]
 
 cv.subrnr t0, t1, t2
 # CHECK-INSTR: cv.subrnr t0, t1, t2
-# CHECK-ENCODING: [0xdb,0x72,0x73,0x40]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x8c]
 
 cv.suburnr t0, t1, t2
 # CHECK-INSTR: cv.suburnr t0, t1, t2
-# CHECK-ENCODING: [0xdb,0x72,0x73,0xc0]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x8e]
 
 
 cv.beqimm t0, 0, 0
diff --git a/llvm/test/MC/RISCV/corev/alu/abs.s b/llvm/test/MC/RISCV/corev/alu/abs.s
index fe2c41d34ce2..5580ca3de083 100644
--- a/llvm/test/MC/RISCV/corev/alu/abs.s
+++ b/llvm/test/MC/RISCV/corev/alu/abs.s
@@ -3,8 +3,8 @@
 
 cv.abs t0, t1
 # CHECK-INSTR: cv.abs t0, t1
-# CHECK-ENCODING: [0xb3,0x02,0x03,0x04]
+# CHECK-ENCODING: [0xab,0x32,0x03,0x50]
 
 cv.abs a0, a1
 # CHECK-INSTR: cv.abs a0, a1
-# CHECK-ENCODING: [0x33,0x85,0x05,0x04]
+# CHECK-ENCODING: [0x2b,0xb5,0x05,0x50]
diff --git a/llvm/test/MC/RISCV/corev/alu/addn.s b/llvm/test/MC/RISCV/corev/alu/addn.s
index 2bba92b84d88..dbca89732f4b 100644
--- a/llvm/test/MC/RISCV/corev/alu/addn.s
+++ b/llvm/test/MC/RISCV/corev/alu/addn.s
@@ -3,12 +3,12 @@
 
 cv.addn t0, t1, t2, 0
 # CHECK-INSTR: cv.addn t0, t1, t2, 0
-# CHECK-ENCODING: [0xdb,0x22,0x73,0x00]
+# CHECK-ENCODING: [0xab,0x22,0x73,0x00]
 
 cv.addn t0, t1, t2, 16
 # CHECK-INSTR: cv.addn t0, t1, t2, 16
-# CHECK-ENCODING: [0xdb,0x22,0x73,0x20]
+# CHECK-ENCODING: [0xab,0x22,0x73,0x20]
 
 cv.addn a0, a1, zero, 31
 # CHECK-INSTR: cv.addn a0, a1, zero, 31
-# CHECK-ENCODING: [0x5b,0xa5,0x05,0x3e]
+# CHECK-ENCODING: [0x2b,0xa5,0x05,0x3e]
diff --git a/llvm/test/MC/RISCV/corev/alu/addnr.s b/llvm/test/MC/RISCV/corev/alu/addnr.s
index 37ee87e6ff64..f72bf511fbfc 100644
--- a/llvm/test/MC/RISCV/corev/alu/addnr.s
+++ b/llvm/test/MC/RISCV/corev/alu/addnr.s
@@ -3,8 +3,8 @@
 
 cv.addnr t0, t1, t2
 # CHECK-INSTR: cv.addnr t0, t1, t2
-# CHECK-ENCODING: [0xdb,0x22,0x73,0x40]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x80]
 
 cv.addnr a0, a1, a2
 # CHECK-INSTR: cv.addnr a0, a1, a2
-# CHECK-ENCODING: [0x5b,0xa5,0xc5,0x40]
+# CHECK-ENCODING: [0x2b,0xb5,0xc5,0x80]
diff --git a/llvm/test/MC/RISCV/corev/alu/addrn.s b/llvm/test/MC/RISCV/corev/alu/addrn.s
index c81ff8a17e85..4cdeb13c7de1 100644
--- a/llvm/test/MC/RISCV/corev/alu/addrn.s
+++ b/llvm/test/MC/RISCV/corev/alu/addrn.s
@@ -3,12 +3,12 @@
 
 cv.addrn t0, t1, t2, 0
 # CHECK-INSTR: cv.addrn t0, t1, t2, 0
-# CHECK-ENCODING: [0xdb,0x62,0x73,0x00]
+# CHECK-ENCODING: [0xab,0x22,0x73,0x80]
 
 cv.addrn t0, t1, t2, 16
 # CHECK-INSTR: cv.addrn t0, t1, t2, 16
-# CHECK-ENCODING: [0xdb,0x62,0x73,0x20]
+# CHECK-ENCODING: [0xab,0x22,0x73,0xa0]
 
 cv.addrn a0, a1, zero, 31
 # CHECK-INSTR: cv.addrn a0, a1, zero, 31
-# CHECK-ENCODING: [0x5b,0xe5,0x05,0x3e]
+# CHECK-ENCODING: [0x2b,0xa5,0x05,0xbe]
diff --git a/llvm/test/MC/RISCV/corev/alu/addrnr.s b/llvm/test/MC/RISCV/corev/alu/addrnr.s
index e9e507e541e8..e49f7d26b713 100644
--- a/llvm/test/MC/RISCV/corev/alu/addrnr.s
+++ b/llvm/test/MC/RISCV/corev/alu/addrnr.s
@@ -3,8 +3,8 @@
 
 cv.addrnr t0, t1, t2
 # CHECK-INSTR: cv.addrnr t0, t1, t2
-# CHECK-ENCODING: [0xdb,0x62,0x73,0x40]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x84]
 
 cv.addrnr a0, a1, a2
 # CHECK-INSTR: cv.addrnr a0, a1, a2
-# CHECK-ENCODING: [0x5b,0xe5,0xc5,0x40]
+# CHECK-ENCODING: [0x2b,0xb5,0xc5,0x84]
diff --git a/llvm/test/MC/RISCV/corev/alu/addun.s b/llvm/test/MC/RISCV/corev/alu/addun.s
index 3f1c11b676a7..b980489ec0e4 100644
--- a/llvm/test/MC/RISCV/corev/alu/addun.s
+++ b/llvm/test/MC/RISCV/corev/alu/addun.s
@@ -3,12 +3,12 @@
 
 cv.addun t0, t1, t2, 0
 # CHECK-INSTR: cv.addun t0, t1, t2, 0
-# CHECK-ENCODING: [0xdb,0x22,0x73,0x80]
+# CHECK-ENCODING: [0xab,0x22,0x73,0x40]
 
 cv.addun t0, t1, t2, 16
 # CHECK-INSTR: cv.addun t0, t1, t2, 16
-# CHECK-ENCODING: [0xdb,0x22,0x73,0xa0]
+# CHECK-ENCODING: [0xab,0x22,0x73,0x60]
 
 cv.addun a0, a1, zero, 31
 # CHECK-INSTR: cv.addun a0, a1, zero, 31
-# CHECK-ENCODING: [0x5b,0xa5,0x05,0xbe]
+# CHECK-ENCODING: [0x2b,0xa5,0x05,0x7e]
diff --git a/llvm/test/MC/RISCV/corev/alu/addunr.s b/llvm/test/MC/RISCV/corev/alu/addunr.s
index a0bf3e7e0113..8ec9501bc396 100644
--- a/llvm/test/MC/RISCV/corev/alu/addunr.s
+++ b/llvm/test/MC/RISCV/corev/alu/addunr.s
@@ -3,8 +3,8 @@
 
 cv.addunr t0, t1, t2
 # CHECK-INSTR: cv.addunr t0, t1, t2
-# CHECK-ENCODING: [0xdb,0x22,0x73,0xc0]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x82]
 
 cv.addunr a0, a1, a2
 # CHECK-INSTR: cv.addunr a0, a1, a2
-# CHECK-ENCODING: [0x5b,0xa5,0xc5,0xc0]
+# CHECK-ENCODING: [0x2b,0xb5,0xc5,0x82]
diff --git a/llvm/test/MC/RISCV/corev/alu/addurn.s b/llvm/test/MC/RISCV/corev/alu/addurn.s
index a3bea2947c32..6f4c40db74d0 100644
--- a/llvm/test/MC/RISCV/corev/alu/addurn.s
+++ b/llvm/test/MC/RISCV/corev/alu/addurn.s
@@ -3,12 +3,12 @@
 
 cv.addurn t0, t1, t2, 0
 # CHECK-INSTR: cv.addurn t0, t1, t2, 0
-# CHECK-ENCODING: [0xdb,0x62,0x73,0x80]
+# CHECK-ENCODING: [0xab,0x22,0x73,0xc0]
 
 cv.addurn t0, t1, t2, 16
 # CHECK-INSTR: cv.addurn t0, t1, t2, 16
-# CHECK-ENCODING: [0xdb,0x62,0x73,0xa0]
+# CHECK-ENCODING: [0xab,0x22,0x73,0xe0]
 
 cv.addurn a0, a1, zero, 31
 # CHECK-INSTR: cv.addurn a0, a1, zero, 31
-# CHECK-ENCODING: [0x5b,0xe5,0x05,0xbe]
+# CHECK-ENCODING: [0x2b,0xa5,0x05,0xfe]
diff --git a/llvm/test/MC/RISCV/corev/alu/addurnr.s b/llvm/test/MC/RISCV/corev/alu/addurnr.s
index 86cc08f3be7a..8620d37b0938 100644
--- a/llvm/test/MC/RISCV/corev/alu/addurnr.s
+++ b/llvm/test/MC/RISCV/corev/alu/addurnr.s
@@ -3,8 +3,8 @@
 
 cv.addurnr t0, t1, t2
 # CHECK-INSTR: cv.addurnr t0, t1, t2
-# CHECK-ENCODING: [0xdb,0x62,0x73,0xc0]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x86]
 
 cv.addurnr a0, a1, a2
 # CHECK-INSTR: cv.addurnr a0, a1, a2
-# CHECK-ENCODING: [0x5b,0xe5,0xc5,0xc0]
+# CHECK-ENCODING: [0x2b,0xb5,0xc5,0x86]
diff --git a/llvm/test/MC/RISCV/corev/alu/clip.s b/llvm/test/MC/RISCV/corev/alu/clip.s
index 46061b324bd1..31c0e2658312 100644
--- a/llvm/test/MC/RISCV/corev/alu/clip.s
+++ b/llvm/test/MC/RISCV/corev/alu/clip.s
@@ -3,12 +3,12 @@
 
 cv.clip t0, t1, 0
 # CHECK-INSTR: cv.clip t0, t1, 0
-# CHECK-ENCODING: [0xb3,0x12,0x03,0x14]
+# CHECK-ENCODING: [0xab,0x32,0x03,0x70]
 
 cv.clip t0, t1, 16
 # CHECK-INSTR: cv.clip t0, t1, 16
-# CHECK-ENCODING: [0xb3,0x12,0x03,0x15]
+# CHECK-ENCODING: [0xab,0x32,0x03,0x71]
 
 cv.clip a0, zero, 31
 # CHECK-INSTR: cv.clip a0, zero, 31
-# CHECK-ENCODING: [0x33,0x15,0xf0,0x15]
+# CHECK-ENCODING: [0x2b,0x35,0xf0,0x71]
diff --git a/llvm/test/MC/RISCV/corev/alu/clipr.s b/llvm/test/MC/RISCV/corev/alu/clipr.s
index 734ec550335c..6d246e3194bf 100644
--- a/llvm/test/MC/RISCV/corev/alu/clipr.s
+++ b/llvm/test/MC/RISCV/corev/alu/clipr.s
@@ -3,8 +3,8 @@
 
 cv.clipr t0, t1, t2
 # CHECK-INSTR: cv.clipr t0, t1, t2
-# CHECK-ENCODING: [0xb3,0x52,0x73,0x14]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x74]
 
 cv.clipr a0, a1, a2
 # CHECK-INSTR: cv.clipr a0, a1, a2
-# CHECK-ENCODING: [0x33,0xd5,0xc5,0x14]
+# CHECK-ENCODING: [0x2b,0xb5,0xc5,0x74]
diff --git a/llvm/test/MC/RISCV/corev/alu/clipu.s b/llvm/test/MC/RISCV/corev/alu/clipu.s
index fe52f88658c5..1c295b9e6366 100644
--- a/llvm/test/MC/RISCV/corev/alu/clipu.s
+++ b/llvm/test/MC/RISCV/corev/alu/clipu.s
@@ -3,12 +3,12 @@
 
 cv.clipu t0, t1, 0
 # CHECK-INSTR: cv.clipu t0, t1, 0
-# CHECK-ENCODING: [0xb3,0x22,0x03,0x14]
+# CHECK-ENCODING: [0xab,0x32,0x03,0x72]
 
 cv.clipu t0, t1, 16
 # CHECK-INSTR: cv.clipu t0, t1, 16
-# CHECK-ENCODING: [0xb3,0x22,0x03,0x15]
+# CHECK-ENCODING: [0xab,0x32,0x03,0x73]
 
 cv.clipu a0, zero, 31
 # CHECK-INSTR: cv.clipu a0, zero, 31
-# CHECK-ENCODING: [0x33,0x25,0xf0,0x15]
+# CHECK-ENCODING: [0x2b,0x35,0xf0,0x73]
diff --git a/llvm/test/MC/RISCV/corev/alu/clipur.s b/llvm/test/MC/RISCV/corev/alu/clipur.s
index c01cebbf5306..cb366989fb87 100644
--- a/llvm/test/MC/RISCV/corev/alu/clipur.s
+++ b/llvm/test/MC/RISCV/corev/alu/clipur.s
@@ -3,8 +3,8 @@
 
 cv.clipur t0, t1, t2
 # CHECK-INSTR: cv.clipur t0, t1, t2
-# CHECK-ENCODING: [0xb3,0x62,0x73,0x14]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x76]
 
 cv.clipur a0, a1, a2
 # CHECK-INSTR: cv.clipur a0, a1, a2
-# CHECK-ENCODING: [0x33,0xe5,0xc5,0x14]
+# CHECK-ENCODING: [0x2b,0xb5,0xc5,0x76]
diff --git a/llvm/test/MC/RISCV/corev/alu/extbs.s b/llvm/test/MC/RISCV/corev/alu/extbs.s
index c6ffb0c23c44..0f6102d093b7 100644
--- a/llvm/test/MC/RISCV/corev/alu/extbs.s
+++ b/llvm/test/MC/RISCV/corev/alu/extbs.s
@@ -3,8 +3,8 @@
 
 cv.extbs t0, t1
 # CHECK-INSTR: cv.extbs t0, t1
-# CHECK-ENCODING: [0xb3,0x62,0x03,0x10]
+# CHECK-ENCODING: [0xab,0x32,0x03,0x62]
 
 cv.extbs a0, a1
 # CHECK-INSTR: cv.extbs a0, a1
-# CHECK-ENCODING: [0x33,0xe5,0x05,0x10]
+# CHECK-ENCODING: [0x2b,0xb5,0x05,0x62]
diff --git a/llvm/test/MC/RISCV/corev/alu/extbz.s b/llvm/test/MC/RISCV/corev/alu/extbz.s
index bd47e45c344e..9589de286e0e 100644
--- a/llvm/test/MC/RISCV/corev/alu/extbz.s
+++ b/llvm/test/MC/RISCV/corev/alu/extbz.s
@@ -3,8 +3,8 @@
 
 cv.extbz t0, t1
 # CHECK-INSTR: cv.extbz t0, t1
-# CHECK-ENCODING: [0xb3,0x72,0x03,0x10]
+# CHECK-ENCODING: [0xab,0x32,0x03,0x64]
 
 cv.extbz a0, a1
 # CHECK-INSTR: cv.extbz a0, a1
-# CHECK-ENCODING: [0x33,0xf5,0x05,0x10]
+# CHECK-ENCODING: [0x2b,0xb5,0x05,0x64]
diff --git a/llvm/test/MC/RISCV/corev/alu/exths.s b/llvm/test/MC/RISCV/corev/alu/exths.s
index 6966ab783dc3..06dc96bf7848 100644
--- a/llvm/test/MC/RISCV/corev/alu/exths.s
+++ b/llvm/test/MC/RISCV/corev/alu/exths.s
@@ -3,8 +3,8 @@
 
 cv.exths t0, t1
 # CHECK-INSTR: cv.exths t0, t1
-# CHECK-ENCODING: [0xb3,0x42,0x03,0x10]
+# CHECK-ENCODING: [0xab,0x32,0x03,0x5e]
 
 cv.exths a0, a1
 # CHECK-INSTR: cv.exths a0, a1
-# CHECK-ENCODING: [0x33,0xc5,0x05,0x10]
+# CHECK-ENCODING: [0x2b,0xb5,0x05,0x5e]
diff --git a/llvm/test/MC/RISCV/corev/alu/exthz.s b/llvm/test/MC/RISCV/corev/alu/exthz.s
index d590e20864f0..0ea469eed43a 100644
--- a/llvm/test/MC/RISCV/corev/alu/exthz.s
+++ b/llvm/test/MC/RISCV/corev/alu/exthz.s
@@ -3,8 +3,8 @@
 
 cv.exthz t0, t1
 # CHECK-INSTR: cv.exthz t0, t1
-# CHECK-ENCODING: [0xb3,0x52,0x03,0x10]
+# CHECK-ENCODING: [0xab,0x32,0x03,0x60]
 
 cv.exthz a0, a1
 # CHECK-INSTR: cv.exthz a0, a1
-# CHECK-ENCODING: [0x33,0xd5,0x05,0x10]
+# CHECK-ENCODING: [0x2b,0xb5,0x05,0x60]
diff --git a/llvm/test/MC/RISCV/corev/alu/max.s b/llvm/test/MC/RISCV/corev/alu/max.s
index 481f244c2e16..c698cbe7dd28 100644
--- a/llvm/test/MC/RISCV/corev/alu/max.s
+++ b/llvm/test/MC/RISCV/corev/alu/max.s
@@ -3,8 +3,8 @@
 
 cv.max t0, t1, t2
 # CHECK-INSTR: cv.max t0, t1, t2
-# CHECK-ENCODING: [0xb3,0x62,0x73,0x04]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x5a]
 
 cv.max a0, a1, a2
 # CHECK-INSTR: cv.max a0, a1, a2
-# CHECK-ENCODING: [0x33,0xe5,0xc5,0x04]
+# CHECK-ENCODING: [0x2b,0xb5,0xc5,0x5a]
diff --git a/llvm/test/MC/RISCV/corev/alu/maxu.s b/llvm/test/MC/RISCV/corev/alu/maxu.s
index 823871ab23fa..8a26f7959b77 100644
--- a/llvm/test/MC/RISCV/corev/alu/maxu.s
+++ b/llvm/test/MC/RISCV/corev/alu/maxu.s
@@ -3,8 +3,8 @@
 
 cv.maxu t0, t1, t2
 # CHECK-INSTR: cv.maxu t0, t1, t2
-# CHECK-ENCODING: [0xb3,0x72,0x73,0x04]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x5c]
 
 cv.maxu a0, a1, a2
 # CHECK-INSTR: cv.maxu a0, a1, a2
-# CHECK-ENCODING: [0x33,0xf5,0xc5,0x04]
+# CHECK-ENCODING: [0x2b,0xb5,0xc5,0x5c]
diff --git a/llvm/test/MC/RISCV/corev/alu/min.s b/llvm/test/MC/RISCV/corev/alu/min.s
index 411ffdc031bc..2c2994f4748e 100644
--- a/llvm/test/MC/RISCV/corev/alu/min.s
+++ b/llvm/test/MC/RISCV/corev/alu/min.s
@@ -3,8 +3,8 @@
 
 cv.min t0, t1, t2
 # CHECK-INSTR: cv.min t0, t1, t2
-# CHECK-ENCODING: [0xb3,0x42,0x73,0x04]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x56]
 
 cv.min a0, a1, a2
 # CHECK-INSTR: cv.min a0, a1, a2
-# CHECK-ENCODING: [0x33,0xc5,0xc5,0x04]
+# CHECK-ENCODING: [0x2b,0xb5,0xc5,0x56]
diff --git a/llvm/test/MC/RISCV/corev/alu/minu.s b/llvm/test/MC/RISCV/corev/alu/minu.s
index 118722bfc23a..60d3bcc78b21 100644
--- a/llvm/test/MC/RISCV/corev/alu/minu.s
+++ b/llvm/test/MC/RISCV/corev/alu/minu.s
@@ -3,8 +3,8 @@
 
 cv.minu t0, t1, t2
 # CHECK-INSTR: cv.minu t0, t1, t2
-# CHECK-ENCODING: [0xb3,0x52,0x73,0x04]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x58]
 
 cv.minu a0, a1, a2
 # CHECK-INSTR: cv.minu a0, a1, a2
-# CHECK-ENCODING: [0x33,0xd5,0xc5,0x04]
+# CHECK-ENCODING: [0x2b,0xb5,0xc5,0x58]
diff --git a/llvm/test/MC/RISCV/corev/alu/slet.s b/llvm/test/MC/RISCV/corev/alu/slet.s
index 0f12621be921..1745a8c85613 100644
--- a/llvm/test/MC/RISCV/corev/alu/slet.s
+++ b/llvm/test/MC/RISCV/corev/alu/slet.s
@@ -3,8 +3,8 @@
 
 cv.slet t0, t1, t2
 # CHECK-INSTR: cv.slet t0, t1, t2
-# CHECK-ENCODING: [0xb3,0x22,0x73,0x04]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x52]
 
 cv.slet a0, a1, a2
 # CHECK-INSTR: cv.slet a0, a1, a2
-# CHECK-ENCODING: [0x33,0xa5,0xc5,0x04]
+# CHECK-ENCODING: [0x2b,0xb5,0xc5,0x52]
diff --git a/llvm/test/MC/RISCV/corev/alu/sletu.s b/llvm/test/MC/RISCV/corev/alu/sletu.s
index 70fdc9017b5c..ee0725489048 100644
--- a/llvm/test/MC/RISCV/corev/alu/sletu.s
+++ b/llvm/test/MC/RISCV/corev/alu/sletu.s
@@ -3,8 +3,8 @@
 
 cv.sletu t0, t1, t2
 # CHECK-INSTR: cv.sletu t0, t1, t2
-# CHECK-ENCODING: [0xb3,0x32,0x73,0x04]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x54]
 
 cv.sletu a0, a1, a2
 # CHECK-INSTR: cv.sletu a0, a1, a2
-# CHECK-ENCODING: [0x33,0xb5,0xc5,0x04]
+# CHECK-ENCODING: [0x2b,0xb5,0xc5,0x54]
diff --git a/llvm/test/MC/RISCV/corev/alu/subn.s b/llvm/test/MC/RISCV/corev/alu/subn.s
index f5f160100948..8740566a8e69 100644
--- a/llvm/test/MC/RISCV/corev/alu/subn.s
+++ b/llvm/test/MC/RISCV/corev/alu/subn.s
@@ -3,12 +3,12 @@
 
 cv.subn t0, t1, t2, 0
 # CHECK-INSTR: cv.subn t0, t1, t2, 0
-# CHECK-ENCODING: [0xdb,0x32,0x73,0x00]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x00]
 
 cv.subn t0, t1, t2, 16
 # CHECK-INSTR: cv.subn t0, t1, t2, 16
-# CHECK-ENCODING: [0xdb,0x32,0x73,0x20]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x20]
 
 cv.subn a0, a1, zero, 31
 # CHECK-INSTR: cv.subn a0, a1, zero, 31
-# CHECK-ENCODING: [0x5b,0xb5,0x05,0x3e]
+# CHECK-ENCODING: [0x2b,0xb5,0x05,0x3e]
diff --git a/llvm/test/MC/RISCV/corev/alu/subnr.s b/llvm/test/MC/RISCV/corev/alu/subnr.s
index c28774fe801f..87c89f1a2a29 100644
--- a/llvm/test/MC/RISCV/corev/alu/subnr.s
+++ b/llvm/test/MC/RISCV/corev/alu/subnr.s
@@ -3,8 +3,8 @@
 
 cv.subnr t0, t1, t2
 # CHECK-INSTR: cv.subnr t0, t1, t2
-# CHECK-ENCODING: [0xdb,0x32,0x73,0x40]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x88]
 
 cv.subnr a0, a1, a2
 # CHECK-INSTR: cv.subnr a0, a1, a2
-# CHECK-ENCODING: [0x5b,0xb5,0xc5,0x40]
+# CHECK-ENCODING: [0x2b,0xb5,0xc5,0x88]
diff --git a/llvm/test/MC/RISCV/corev/alu/subrn.s b/llvm/test/MC/RISCV/corev/alu/subrn.s
index e580728de788..1dac0e21f787 100644
--- a/llvm/test/MC/RISCV/corev/alu/subrn.s
+++ b/llvm/test/MC/RISCV/corev/alu/subrn.s
@@ -3,12 +3,12 @@
 
 cv.subrn t0, t1, t2, 0
 # CHECK-INSTR: cv.subrn t0, t1, t2, 0
-# CHECK-ENCODING: [0xdb,0x72,0x73,0x00]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x80]
 
 cv.subrn t0, t1, t2, 16
 # CHECK-INSTR: cv.subrn t0, t1, t2, 16
-# CHECK-ENCODING: [0xdb,0x72,0x73,0x20]
+# CHECK-ENCODING: [0xab,0x32,0x73,0xa0]
 
 cv.subrn a0, a1, zero, 31
 # CHECK-INSTR: cv.subrn a0, a1, zero, 31
-# CHECK-ENCODING: [0x5b,0xf5,0x05,0x3e]
+# CHECK-ENCODING: [0x2b,0xb5,0x05,0xbe]
diff --git a/llvm/test/MC/RISCV/corev/alu/subrnr.s b/llvm/test/MC/RISCV/corev/alu/subrnr.s
index 70c60c27c58e..73286e500337 100644
--- a/llvm/test/MC/RISCV/corev/alu/subrnr.s
+++ b/llvm/test/MC/RISCV/corev/alu/subrnr.s
@@ -3,8 +3,8 @@
 
 cv.subrnr t0, t1, t2
 # CHECK-INSTR: cv.subrnr t0, t1, t2
-# CHECK-ENCODING: [0xdb,0x72,0x73,0x40]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x8c]
 
 cv.subrnr a0, a1, a2
 # CHECK-INSTR: cv.subrnr a0, a1, a2
-# CHECK-ENCODING: [0x5b,0xf5,0xc5,0x40]
+# CHECK-ENCODING: [0x2b,0xb5,0xc5,0x8c]
diff --git a/llvm/test/MC/RISCV/corev/alu/subun.s b/llvm/test/MC/RISCV/corev/alu/subun.s
index 647c0e1faa35..323bd5afc65b 100644
--- a/llvm/test/MC/RISCV/corev/alu/subun.s
+++ b/llvm/test/MC/RISCV/corev/alu/subun.s
@@ -3,12 +3,12 @@
 
 cv.subun t0, t1, t2, 0
 # CHECK-INSTR: cv.subun t0, t1, t2, 0
-# CHECK-ENCODING: [0xdb,0x32,0x73,0x80]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x40]
 
 cv.subun t0, t1, t2, 16
 # CHECK-INSTR: cv.subun t0, t1, t2, 16
-# CHECK-ENCODING: [0xdb,0x32,0x73,0xa0]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x60]
 
 cv.subun a0, a1, zero, 31
 # CHECK-INSTR: cv.subun a0, a1, zero, 31
-# CHECK-ENCODING: [0x5b,0xb5,0x05,0xbe]
+# CHECK-ENCODING: [0x2b,0xb5,0x05,0x7e]
diff --git a/llvm/test/MC/RISCV/corev/alu/subunr.s b/llvm/test/MC/RISCV/corev/alu/subunr.s
index c4217f6d4da6..cd9a60c189e1 100644
--- a/llvm/test/MC/RISCV/corev/alu/subunr.s
+++ b/llvm/test/MC/RISCV/corev/alu/subunr.s
@@ -3,8 +3,8 @@
 
 cv.subunr t0, t1, t2
 # CHECK-INSTR: cv.subunr t0, t1, t2
-# CHECK-ENCODING: [0xdb,0x32,0x73,0xc0]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x8a]
 
 cv.subunr a0, a1, a2
 # CHECK-INSTR: cv.subunr a0, a1, a2
-# CHECK-ENCODING: [0x5b,0xb5,0xc5,0xc0]
+# CHECK-ENCODING: [0x2b,0xb5,0xc5,0x8a]
diff --git a/llvm/test/MC/RISCV/corev/alu/suburn.s b/llvm/test/MC/RISCV/corev/alu/suburn.s
index df13661f412d..6b8963aeb67f 100644
--- a/llvm/test/MC/RISCV/corev/alu/suburn.s
+++ b/llvm/test/MC/RISCV/corev/alu/suburn.s
@@ -3,12 +3,12 @@
 
 cv.suburn t0, t1, t2, 0
 # CHECK-INSTR: cv.suburn t0, t1, t2, 0
-# CHECK-ENCODING: [0xdb,0x72,0x73,0x80]
+# CHECK-ENCODING: [0xab,0x32,0x73,0xc0]
 
 cv.suburn t0, t1, t2, 16
 # CHECK-INSTR: cv.suburn t0, t1, t2, 16
-# CHECK-ENCODING: [0xdb,0x72,0x73,0xa0]
+# CHECK-ENCODING: [0xab,0x32,0x73,0xe0]
 
 cv.suburn a0, a1, zero, 31
 # CHECK-INSTR: cv.suburn a0, a1, zero, 31
-# CHECK-ENCODING: [0x5b,0xf5,0x05,0xbe]
+# CHECK-ENCODING: [0x2b,0xb5,0x05,0xfe]
diff --git a/llvm/test/MC/RISCV/corev/alu/suburnr.s b/llvm/test/MC/RISCV/corev/alu/suburnr.s
index cd44bd42c93a..cf724afd86a9 100644
--- a/llvm/test/MC/RISCV/corev/alu/suburnr.s
+++ b/llvm/test/MC/RISCV/corev/alu/suburnr.s
@@ -3,8 +3,8 @@
 
 cv.suburnr t0, t1, t2
 # CHECK-INSTR: cv.suburnr t0, t1, t2
-# CHECK-ENCODING: [0xdb,0x72,0x73,0xc0]
+# CHECK-ENCODING: [0xab,0x32,0x73,0x8e]
 
 cv.suburnr a0, a1, a2
 # CHECK-INSTR: cv.suburnr a0, a1, a2
-# CHECK-ENCODING: [0x5b,0xf5,0xc5,0xc0]
+# CHECK-ENCODING: [0x2b,0xb5,0xc5,0x8e]