Skip to content

Commit 145dfed

Browse files
Yanhong ZhuRealFYang
authored andcommitted
8284937: riscv: should not allocate special register for temp
Reviewed-by: fyang, fjiang, yadongwang
1 parent 87faa85 commit 145dfed

File tree

2 files changed

+32
-32
lines changed

2 files changed

+32
-32
lines changed

src/hotspot/cpu/riscv/riscv.ad

Lines changed: 28 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -2148,42 +2148,42 @@ encode %{
21482148
}
21492149
%}
21502150

2151-
enc_class riscv_enc_cmpxchgw(iRegINoSp res, memory mem, iRegINoSp oldval, iRegINoSp newval) %{
2151+
enc_class riscv_enc_cmpxchgw(iRegINoSp res, memory mem, iRegI oldval, iRegI newval) %{
21522152
C2_MacroAssembler _masm(&cbuf);
21532153
__ cmpxchg(as_Register($mem$$base), $oldval$$Register, $newval$$Register, Assembler::int32,
21542154
/*acquire*/ Assembler::relaxed, /*release*/ Assembler::rl, $res$$Register,
21552155
/*result as bool*/ true);
21562156
%}
21572157

2158-
enc_class riscv_enc_cmpxchgn(iRegINoSp res, memory mem, iRegINoSp oldval, iRegINoSp newval) %{
2158+
enc_class riscv_enc_cmpxchgn(iRegINoSp res, memory mem, iRegI oldval, iRegI newval) %{
21592159
C2_MacroAssembler _masm(&cbuf);
21602160
__ cmpxchg(as_Register($mem$$base), $oldval$$Register, $newval$$Register, Assembler::uint32,
21612161
/*acquire*/ Assembler::relaxed, /*release*/ Assembler::rl, $res$$Register,
21622162
/*result as bool*/ true);
21632163
%}
21642164

2165-
enc_class riscv_enc_cmpxchg(iRegINoSp res, memory mem, iRegLNoSp oldval, iRegLNoSp newval) %{
2165+
enc_class riscv_enc_cmpxchg(iRegINoSp res, memory mem, iRegL oldval, iRegL newval) %{
21662166
C2_MacroAssembler _masm(&cbuf);
21672167
__ cmpxchg(as_Register($mem$$base), $oldval$$Register, $newval$$Register, Assembler::int64,
21682168
/*acquire*/ Assembler::relaxed, /*release*/ Assembler::rl, $res$$Register,
21692169
/*result as bool*/ true);
21702170
%}
21712171

2172-
enc_class riscv_enc_cmpxchgw_acq(iRegINoSp res, memory mem, iRegINoSp oldval, iRegINoSp newval) %{
2172+
enc_class riscv_enc_cmpxchgw_acq(iRegINoSp res, memory mem, iRegI oldval, iRegI newval) %{
21732173
C2_MacroAssembler _masm(&cbuf);
21742174
__ cmpxchg(as_Register($mem$$base), $oldval$$Register, $newval$$Register, Assembler::int32,
21752175
/*acquire*/ Assembler::aq, /*release*/ Assembler::rl, $res$$Register,
21762176
/*result as bool*/ true);
21772177
%}
21782178

2179-
enc_class riscv_enc_cmpxchgn_acq(iRegINoSp res, memory mem, iRegINoSp oldval, iRegINoSp newval) %{
2179+
enc_class riscv_enc_cmpxchgn_acq(iRegINoSp res, memory mem, iRegI oldval, iRegI newval) %{
21802180
C2_MacroAssembler _masm(&cbuf);
21812181
__ cmpxchg(as_Register($mem$$base), $oldval$$Register, $newval$$Register, Assembler::uint32,
21822182
/*acquire*/ Assembler::aq, /*release*/ Assembler::rl, $res$$Register,
21832183
/*result as bool*/ true);
21842184
%}
21852185

2186-
enc_class riscv_enc_cmpxchg_acq(iRegINoSp res, memory mem, iRegLNoSp oldval, iRegLNoSp newval) %{
2186+
enc_class riscv_enc_cmpxchg_acq(iRegINoSp res, memory mem, iRegL oldval, iRegL newval) %{
21872187
C2_MacroAssembler _masm(&cbuf);
21882188
__ cmpxchg(as_Register($mem$$base), $oldval$$Register, $newval$$Register, Assembler::int64,
21892189
/*acquire*/ Assembler::aq, /*release*/ Assembler::rl, $res$$Register,
@@ -2320,7 +2320,7 @@ encode %{
23202320
%}
23212321

23222322
// using the cr register as the bool result: 0 for success; others failed.
2323-
enc_class riscv_enc_fast_lock(iRegP object, iRegP box, iRegP tmp1, iRegP tmp2) %{
2323+
enc_class riscv_enc_fast_lock(iRegP object, iRegP box, iRegPNoSp tmp1, iRegPNoSp tmp2) %{
23242324
C2_MacroAssembler _masm(&cbuf);
23252325
Register flag = t1;
23262326
Register oop = as_Register($object$$reg);
@@ -2414,7 +2414,7 @@ encode %{
24142414
%}
24152415

24162416
// using cr flag to indicate the fast_unlock result: 0 for success; others failed.
2417-
enc_class riscv_enc_fast_unlock(iRegP object, iRegP box, iRegP tmp1, iRegP tmp2) %{
2417+
enc_class riscv_enc_fast_unlock(iRegP object, iRegP box, iRegPNoSp tmp1, iRegPNoSp tmp2) %{
24182418
C2_MacroAssembler _masm(&cbuf);
24192419
Register flag = t1;
24202420
Register oop = as_Register($object$$reg);
@@ -5192,7 +5192,7 @@ instruct storePConditional(memory heap_top_ptr, iRegP oldval, iRegP newval, rFla
51925192
ins_pipe(pipe_serial);
51935193
%}
51945194

5195-
instruct storeLConditional(indirect mem, iRegLNoSp oldval, iRegLNoSp newval, rFlagsReg cr)
5195+
instruct storeLConditional(indirect mem, iRegL oldval, iRegL newval, rFlagsReg cr)
51965196
%{
51975197
match(Set cr (StoreLConditional mem (Binary oldval newval)));
51985198

@@ -5214,7 +5214,7 @@ instruct storeLConditional(indirect mem, iRegLNoSp oldval, iRegLNoSp newval, rFl
52145214

52155215
// storeIConditional also has acquire semantics, for no better reason
52165216
// than matching storeLConditional.
5217-
instruct storeIConditional(indirect mem, iRegINoSp oldval, iRegINoSp newval, rFlagsReg cr)
5217+
instruct storeIConditional(indirect mem, iRegI oldval, iRegI newval, rFlagsReg cr)
52185218
%{
52195219
match(Set cr (StoreIConditional mem (Binary oldval newval)));
52205220

@@ -5237,7 +5237,7 @@ instruct storeIConditional(indirect mem, iRegINoSp oldval, iRegINoSp newval, rFl
52375237
// standard CompareAndSwapX when we are using barriers
52385238
// these have higher priority than the rules selected by a predicate
52395239
instruct compareAndSwapB(iRegINoSp res, indirect mem, iRegI_R12 oldval, iRegI_R13 newval,
5240-
iRegI tmp1, iRegI tmp2, iRegI tmp3, rFlagsReg cr)
5240+
iRegINoSp tmp1, iRegINoSp tmp2, iRegINoSp tmp3, rFlagsReg cr)
52415241
%{
52425242
match(Set res (CompareAndSwapB mem (Binary oldval newval)));
52435243

@@ -5260,7 +5260,7 @@ instruct compareAndSwapB(iRegINoSp res, indirect mem, iRegI_R12 oldval, iRegI_R1
52605260
%}
52615261

52625262
instruct compareAndSwapS(iRegINoSp res, indirect mem, iRegI_R12 oldval, iRegI_R13 newval,
5263-
iRegI tmp1, iRegI tmp2, iRegI tmp3, rFlagsReg cr)
5263+
iRegINoSp tmp1, iRegINoSp tmp2, iRegINoSp tmp3, rFlagsReg cr)
52645264
%{
52655265
match(Set res (CompareAndSwapS mem (Binary oldval newval)));
52665266

@@ -5282,7 +5282,7 @@ instruct compareAndSwapS(iRegINoSp res, indirect mem, iRegI_R12 oldval, iRegI_R1
52825282
ins_pipe(pipe_slow);
52835283
%}
52845284

5285-
instruct compareAndSwapI(iRegINoSp res, indirect mem, iRegINoSp oldval, iRegINoSp newval)
5285+
instruct compareAndSwapI(iRegINoSp res, indirect mem, iRegI oldval, iRegI newval)
52865286
%{
52875287
match(Set res (CompareAndSwapI mem (Binary oldval newval)));
52885288

@@ -5298,7 +5298,7 @@ instruct compareAndSwapI(iRegINoSp res, indirect mem, iRegINoSp oldval, iRegINoS
52985298
ins_pipe(pipe_slow);
52995299
%}
53005300

5301-
instruct compareAndSwapL(iRegINoSp res, indirect mem, iRegLNoSp oldval, iRegLNoSp newval)
5301+
instruct compareAndSwapL(iRegINoSp res, indirect mem, iRegL oldval, iRegL newval)
53025302
%{
53035303
match(Set res (CompareAndSwapL mem (Binary oldval newval)));
53045304

@@ -5332,7 +5332,7 @@ instruct compareAndSwapP(iRegINoSp res, indirect mem, iRegP oldval, iRegP newval
53325332
ins_pipe(pipe_slow);
53335333
%}
53345334

5335-
instruct compareAndSwapN(iRegINoSp res, indirect mem, iRegNNoSp oldval, iRegNNoSp newval)
5335+
instruct compareAndSwapN(iRegINoSp res, indirect mem, iRegN oldval, iRegN newval)
53365336
%{
53375337
match(Set res (CompareAndSwapN mem (Binary oldval newval)));
53385338

@@ -5350,7 +5350,7 @@ instruct compareAndSwapN(iRegINoSp res, indirect mem, iRegNNoSp oldval, iRegNNoS
53505350

53515351
// alternative CompareAndSwapX when we are eliding barriers
53525352
instruct compareAndSwapBAcq(iRegINoSp res, indirect mem, iRegI_R12 oldval, iRegI_R13 newval,
5353-
iRegI tmp1, iRegI tmp2, iRegI tmp3, rFlagsReg cr)
5353+
iRegINoSp tmp1, iRegINoSp tmp2, iRegINoSp tmp3, rFlagsReg cr)
53545354
%{
53555355
predicate(needs_acquiring_load_reserved(n));
53565356

@@ -5375,7 +5375,7 @@ instruct compareAndSwapBAcq(iRegINoSp res, indirect mem, iRegI_R12 oldval, iRegI
53755375
%}
53765376

53775377
instruct compareAndSwapSAcq(iRegINoSp res, indirect mem, iRegI_R12 oldval, iRegI_R13 newval,
5378-
iRegI tmp1, iRegI tmp2, iRegI tmp3, rFlagsReg cr)
5378+
iRegINoSp tmp1, iRegINoSp tmp2, iRegINoSp tmp3, rFlagsReg cr)
53795379
%{
53805380
predicate(needs_acquiring_load_reserved(n));
53815381

@@ -5399,7 +5399,7 @@ instruct compareAndSwapSAcq(iRegINoSp res, indirect mem, iRegI_R12 oldval, iRegI
53995399
ins_pipe(pipe_slow);
54005400
%}
54015401

5402-
instruct compareAndSwapIAcq(iRegINoSp res, indirect mem, iRegINoSp oldval, iRegINoSp newval)
5402+
instruct compareAndSwapIAcq(iRegINoSp res, indirect mem, iRegI oldval, iRegI newval)
54035403
%{
54045404
predicate(needs_acquiring_load_reserved(n));
54055405

@@ -5417,7 +5417,7 @@ instruct compareAndSwapIAcq(iRegINoSp res, indirect mem, iRegINoSp oldval, iRegI
54175417
ins_pipe(pipe_slow);
54185418
%}
54195419

5420-
instruct compareAndSwapLAcq(iRegINoSp res, indirect mem, iRegLNoSp oldval, iRegLNoSp newval)
5420+
instruct compareAndSwapLAcq(iRegINoSp res, indirect mem, iRegL oldval, iRegL newval)
54215421
%{
54225422
predicate(needs_acquiring_load_reserved(n));
54235423

@@ -5453,7 +5453,7 @@ instruct compareAndSwapPAcq(iRegINoSp res, indirect mem, iRegP oldval, iRegP new
54535453
ins_pipe(pipe_slow);
54545454
%}
54555455

5456-
instruct compareAndSwapNAcq(iRegINoSp res, indirect mem, iRegNNoSp oldval, iRegNNoSp newval)
5456+
instruct compareAndSwapNAcq(iRegINoSp res, indirect mem, iRegN oldval, iRegN newval)
54575457
%{
54585458
predicate(needs_acquiring_load_reserved(n));
54595459

@@ -5478,7 +5478,7 @@ instruct compareAndSwapNAcq(iRegINoSp res, indirect mem, iRegNNoSp oldval, iRegN
54785478
// can't check the type of memory ordering here, so we always emit a
54795479
// sc_d(w) with rl bit set.
54805480
instruct compareAndExchangeB(iRegINoSp res, indirect mem, iRegI_R12 oldval, iRegI_R13 newval,
5481-
iRegI tmp1, iRegI tmp2, iRegI tmp3, rFlagsReg cr)
5481+
iRegINoSp tmp1, iRegINoSp tmp2, iRegINoSp tmp3, rFlagsReg cr)
54825482
%{
54835483
match(Set res (CompareAndExchangeB mem (Binary oldval newval)));
54845484

@@ -5500,7 +5500,7 @@ instruct compareAndExchangeB(iRegINoSp res, indirect mem, iRegI_R12 oldval, iReg
55005500
%}
55015501

55025502
instruct compareAndExchangeS(iRegINoSp res, indirect mem, iRegI_R12 oldval, iRegI_R13 newval,
5503-
iRegI tmp1, iRegI tmp2, iRegI tmp3, rFlagsReg cr)
5503+
iRegINoSp tmp1, iRegINoSp tmp2, iRegINoSp tmp3, rFlagsReg cr)
55045504
%{
55055505
match(Set res (CompareAndExchangeS mem (Binary oldval newval)));
55065506

@@ -5603,7 +5603,7 @@ instruct compareAndExchangeP(iRegPNoSp res, indirect mem, iRegP oldval, iRegP ne
56035603
%}
56045604

56055605
instruct compareAndExchangeBAcq(iRegINoSp res, indirect mem, iRegI_R12 oldval, iRegI_R13 newval,
5606-
iRegI tmp1, iRegI tmp2, iRegI tmp3, rFlagsReg cr)
5606+
iRegINoSp tmp1, iRegINoSp tmp2, iRegINoSp tmp3, rFlagsReg cr)
56075607
%{
56085608
predicate(needs_acquiring_load_reserved(n));
56095609

@@ -5627,7 +5627,7 @@ instruct compareAndExchangeBAcq(iRegINoSp res, indirect mem, iRegI_R12 oldval, i
56275627
%}
56285628

56295629
instruct compareAndExchangeSAcq(iRegINoSp res, indirect mem, iRegI_R12 oldval, iRegI_R13 newval,
5630-
iRegI tmp1, iRegI tmp2, iRegI tmp3, rFlagsReg cr)
5630+
iRegINoSp tmp1, iRegINoSp tmp2, iRegINoSp tmp3, rFlagsReg cr)
56315631
%{
56325632
predicate(needs_acquiring_load_reserved(n));
56335633

@@ -5739,7 +5739,7 @@ instruct compareAndExchangePAcq(iRegPNoSp res, indirect mem, iRegP oldval, iRegP
57395739
%}
57405740

57415741
instruct weakCompareAndSwapB(iRegINoSp res, indirect mem, iRegI_R12 oldval, iRegI_R13 newval,
5742-
iRegI tmp1, iRegI tmp2, iRegI tmp3, rFlagsReg cr)
5742+
iRegINoSp tmp1, iRegINoSp tmp2, iRegINoSp tmp3, rFlagsReg cr)
57435743
%{
57445744
match(Set res (WeakCompareAndSwapB mem (Binary oldval newval)));
57455745

@@ -5763,7 +5763,7 @@ instruct weakCompareAndSwapB(iRegINoSp res, indirect mem, iRegI_R12 oldval, iReg
57635763
%}
57645764

57655765
instruct weakCompareAndSwapS(iRegINoSp res, indirect mem, iRegI_R12 oldval, iRegI_R13 newval,
5766-
iRegI tmp1, iRegI tmp2, iRegI tmp3, rFlagsReg cr)
5766+
iRegINoSp tmp1, iRegINoSp tmp2, iRegINoSp tmp3, rFlagsReg cr)
57675767
%{
57685768
match(Set res (WeakCompareAndSwapS mem (Binary oldval newval)));
57695769

@@ -5868,7 +5868,7 @@ instruct weakCompareAndSwapP(iRegINoSp res, indirect mem, iRegP oldval, iRegP ne
58685868
%}
58695869

58705870
instruct weakCompareAndSwapBAcq(iRegINoSp res, indirect mem, iRegI_R12 oldval, iRegI_R13 newval,
5871-
iRegI tmp1, iRegI tmp2, iRegI tmp3, rFlagsReg cr)
5871+
iRegINoSp tmp1, iRegINoSp tmp2, iRegINoSp tmp3, rFlagsReg cr)
58725872
%{
58735873
predicate(needs_acquiring_load_reserved(n));
58745874

@@ -5894,7 +5894,7 @@ instruct weakCompareAndSwapBAcq(iRegINoSp res, indirect mem, iRegI_R12 oldval, i
58945894
%}
58955895

58965896
instruct weakCompareAndSwapSAcq(iRegINoSp res, indirect mem, iRegI_R12 oldval, iRegI_R13 newval,
5897-
iRegI tmp1, iRegI tmp2, iRegI tmp3, rFlagsReg cr)
5897+
iRegINoSp tmp1, iRegINoSp tmp2, iRegINoSp tmp3, rFlagsReg cr)
58985898
%{
58995899
predicate(needs_acquiring_load_reserved(n));
59005900

src/hotspot/cpu/riscv/riscv_v.ad

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1946,7 +1946,7 @@ instruct vstring_compareLU(iRegP_R11 str1, iRegI_R12 cnt1, iRegP_R13 str2, iRegI
19461946

19471947
// fast byte[] to char[] inflation
19481948
instruct vstring_inflate(Universe dummy, iRegP_R10 src, iRegP_R11 dst, iRegI_R12 len,
1949-
vReg_V1 v1, vReg_V2 v2, vReg_V3 v3, iRegL tmp)
1949+
vReg_V1 v1, vReg_V2 v2, vReg_V3 v3, iRegLNoSp tmp)
19501950
%{
19511951
predicate(UseRVV);
19521952
match(Set dummy (StrInflatedCopy src (Binary dst len)));
@@ -1961,7 +1961,7 @@ instruct vstring_inflate(Universe dummy, iRegP_R10 src, iRegP_R11 dst, iRegI_R12
19611961

19621962
// encode char[] to byte[] in ISO_8859_1
19631963
instruct vencode_iso_array(iRegP_R12 src, iRegP_R11 dst, iRegI_R13 len, iRegI_R10 result,
1964-
vReg_V1 v1, vReg_V2 v2, vReg_V3 v3, iRegL tmp)
1964+
vReg_V1 v1, vReg_V2 v2, vReg_V3 v3, iRegLNoSp tmp)
19651965
%{
19661966
predicate(UseRVV);
19671967
match(Set result (EncodeISOArray src (Binary dst len)));
@@ -1978,7 +1978,7 @@ instruct vencode_iso_array(iRegP_R12 src, iRegP_R11 dst, iRegI_R13 len, iRegI_R1
19781978

19791979
// fast char[] to byte[] compression
19801980
instruct vstring_compress(iRegP_R12 src, iRegP_R11 dst, iRegI_R13 len, iRegI_R10 result,
1981-
vReg_V1 v1, vReg_V2 v2, vReg_V3 v3, iRegL tmp)
1981+
vReg_V1 v1, vReg_V2 v2, vReg_V3 v3, iRegLNoSp tmp)
19821982
%{
19831983
predicate(UseRVV);
19841984
match(Set result (StrCompressedCopy src (Binary dst len)));
@@ -1994,7 +1994,7 @@ instruct vstring_compress(iRegP_R12 src, iRegP_R11 dst, iRegI_R13 len, iRegI_R10
19941994
%}
19951995

19961996
instruct vcount_positives(iRegP_R11 ary, iRegI_R12 len, iRegI_R10 result,
1997-
vReg_V1 v1, vReg_V2 v2, vReg_V3 v3, iRegL tmp)
1997+
vReg_V1 v1, vReg_V2 v2, vReg_V3 v3, iRegLNoSp tmp)
19981998
%{
19991999
predicate(UseRVV);
20002000
match(Set result (CountPositives ary len));

0 commit comments

Comments
 (0)