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8343471: RISC-V: compiler/cpuflags/TestAESIntrinsicsOnUnsupportedConfig.java fails after JDK-8334999
Reviewed-by: syan, mli
1 parent 67907d5 commit 20f3aaf

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-10
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+14
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src/hotspot/cpu/riscv/vm_version_riscv.cpp

+14-10
Original file line numberDiff line numberDiff line change
@@ -122,11 +122,6 @@ void VM_Version::common_initialize() {
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FLAG_SET_DEFAULT(AllocatePrefetchDistance, 0);
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}
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if (UseAESCTRIntrinsics) {
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warning("AES/CTR intrinsics are not available on this CPU");
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FLAG_SET_DEFAULT(UseAESCTRIntrinsics, false);
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}
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if (UseZba) {
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if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
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FLAG_SET_DEFAULT(UseCRC32Intrinsics, true);
@@ -428,14 +423,23 @@ void VM_Version::c2_initialize() {
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warning("UseAESIntrinsics enabled, but UseAES not, enabling");
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UseAES = true;
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}
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} else if (UseAESIntrinsics || UseAES) {
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if (!FLAG_IS_DEFAULT(UseAESIntrinsics) || !FLAG_IS_DEFAULT(UseAES)) {
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warning("AES intrinsics require Zvkn extension (not available on this CPU).");
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} else {
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if (UseAES) {
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warning("AES instructions are not available on this CPU");
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FLAG_SET_DEFAULT(UseAES, false);
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}
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if (UseAESIntrinsics) {
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warning("AES intrinsics are not available on this CPU");
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FLAG_SET_DEFAULT(UseAESIntrinsics, false);
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}
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FLAG_SET_DEFAULT(UseAES, false);
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FLAG_SET_DEFAULT(UseAESIntrinsics, false);
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}
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if (UseAESCTRIntrinsics) {
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warning("AES/CTR intrinsics are not available on this CPU");
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FLAG_SET_DEFAULT(UseAESCTRIntrinsics, false);
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}
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}
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#endif // COMPILER2
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void VM_Version::initialize_cpu_information(void) {

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