8335367: [s390] Add support for load immediate on condition instructions.

Reviewed-by: lucy, amitkumar

Author: mmatti-sw

src/hotspot/cpu/s390/assembler_s390.hpp

@@ -637,6 +637,11 @@ class Assembler : public AbstractAssembler {
 #define LCDBR_ZOPC  (unsigned  int)(179 << 24 | 19 << 16)
 #define LCXBR_ZOPC  (unsigned  int)(179 << 24 | 67 << 16)
 
+ // Load Halfword Immediate on Condition
+ #define LOCHI_ZOPC   (unsigned long)(0xECL << 40 | 0x42L)
+ #define LOCHHI_ZOPC  (unsigned long)(0xECL << 40 | 0x4EL)
+ #define LOCGHI_ZOPC  (unsigned long)(0xECL << 40 | 0x46L)
+
 // Add
 // RR, signed
 #define AR_ZOPC     (unsigned  int)(26 << 8)
@@ -987,8 +992,8 @@ class Assembler : public AbstractAssembler {
 #define BASR_ZOPC   (unsigned  int)(13 << 8)
 #define BCT_ZOPC    (unsigned  int)(70 << 24)
 #define BCTR_ZOPC   (unsigned  int)(6 << 8)
-#define BCTG_ZOPC   (unsigned  int)(227L << 40 | 70)
-#define BCTGR_ZOPC  (unsigned long)(0xb946 << 16)
+#define BCTG_ZOPC   (unsigned long)(227L << 40 | 70)
+#define BCTGR_ZOPC  (unsigned  int)(0xb946 << 16)
 // Absolute
 #define BC_ZOPC     (unsigned  int)(71 << 24)
 #define BAL_ZOPC    (unsigned  int)(69 << 24)
@@ -2075,6 +2080,11 @@ class Assembler : public AbstractAssembler {
   inline void z_llilh(Register r1, int64_t i2);                 // r1 = i2_imm16    ; uint64 <- (uint16<<16)
   inline void z_llill(Register r1, int64_t i2);                 // r1 = i2_imm16    ; uint64 <- uint16
 
+  // load halfword immediate on condition
+  inline void z_lochi( Register r1, int64_t i2, branch_condition m3);  // load immediate r1[32-63] = i2_simm16   ; int32 <- int16
+  inline void z_lochhi(Register r1, int64_t i2, branch_condition m3);  // load immediate r1[ 0-31] = i2_simm16   ; int32 <- int16
+  inline void z_locghi(Register r1, int64_t i2, branch_condition m3);  // load immediate r1[ 0-63] = i2_simm16   ; int64 <- int16
+
   // insert immediate
   inline void z_ic(  Register r1, int64_t d2, Register x2, Register b2); // insert character
   inline void z_icy( Register r1, int64_t d2, Register x2, Register b2); // insert character

src/hotspot/cpu/s390/assembler_s390.inline.hpp

@@ -245,6 +245,11 @@ inline void Assembler::z_stcm (Register r1, int64_t m3, int64_t d2, Register b2)
 inline void Assembler::z_stcmy(Register r1, int64_t m3, int64_t d2, Register b2) { emit_48( STCMY_ZOPC | regt(r1, 8, 48) | uimm4(m3, 12, 48) | rsymask_48(d2, b2)); }
 inline void Assembler::z_stcmh(Register r1, int64_t m3, int64_t d2, Register b2) { emit_48( STCMH_ZOPC | regt(r1, 8, 48) | uimm4(m3, 12, 48) | rsymask_48(d2, b2)); }
 
+// load halfword immediate on condition
+inline void Assembler::z_lochi(Register r1, int64_t i2, branch_condition m3) { emit_48( LOCHI_ZOPC | reg(r1, 8, 48) | simm16(i2, 16, 48) | uimm4(m3, 12, 48)); }
+inline void Assembler::z_lochhi(Register r1, int64_t i2, branch_condition m3) { emit_48( LOCHHI_ZOPC | reg(r1, 8, 48) | simm16(i2, 16, 48) | uimm4(m3, 12, 48)); }
+inline void Assembler::z_locghi(Register r1, int64_t i2, branch_condition m3) { emit_48( LOCGHI_ZOPC | reg(r1, 8, 48) | simm16(i2, 16, 48) | uimm4(m3, 12, 48)); }
+
 // memory-immediate instructions (8-bit immediate)
 inline void Assembler::z_cli( int64_t d1, Register b1, int64_t i2) { emit_32( CLI_ZOPC  | rsmask_32( d1, b1) | uimm8(i2, 8, 32)); }
 inline void Assembler::z_mvi( int64_t d1, Register b1, int64_t i2) { emit_32( MVI_ZOPC  | rsmask_32( d1, b1) | imm8(i2, 8, 32)); }

src/hotspot/cpu/s390/macroAssembler_s390.cpp

@@ -3426,7 +3426,7 @@ void MacroAssembler::lookup_secondary_supers_table_const(Register r_sub_klass,
   z_bru(L_done); // pass whatever result we got from a slow path
 
   bind(L_failure);
-  // TODO: use load immediate on condition and z_bru above will not be required
+
   z_lghi(r_result, 1);
 
   bind(L_done);