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8292203: AArch64: Represent Registers as values
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Reviewed-by: kvn, aph
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Vladimir Ivanov committed Aug 25, 2022
1 parent 251bff6 commit 2fe0ce0
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Showing 15 changed files with 474 additions and 406 deletions.
6 changes: 3 additions & 3 deletions src/hotspot/cpu/aarch64/aarch64.ad
Original file line number Diff line number Diff line change
Expand Up @@ -1909,19 +1909,19 @@ static enum RC rc_class(OptoReg::Name reg) {
}

// we have 32 int registers * 2 halves
int slots_of_int_registers = RegisterImpl::max_slots_per_register * RegisterImpl::number_of_registers;
int slots_of_int_registers = Register::number_of_registers * Register::max_slots_per_register;

if (reg < slots_of_int_registers) {
return rc_int;
}

// we have 32 float register * 8 halves
int slots_of_float_registers = FloatRegisterImpl::max_slots_per_register * FloatRegisterImpl::number_of_registers;
int slots_of_float_registers = FloatRegister::number_of_registers * FloatRegister::max_slots_per_register;
if (reg < slots_of_int_registers + slots_of_float_registers) {
return rc_float;
}

int slots_of_predicate_registers = PRegisterImpl::max_slots_per_register * PRegisterImpl::number_of_registers;
int slots_of_predicate_registers = PRegister::number_of_registers * PRegister::max_slots_per_register;
if (reg < slots_of_int_registers + slots_of_float_registers + slots_of_predicate_registers) {
return rc_predicate;
}
Expand Down
123 changes: 55 additions & 68 deletions src/hotspot/cpu/aarch64/assembler_aarch64.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -62,23 +62,23 @@ class Argument {
};
};

REGISTER_DECLARATION(Register, c_rarg0, r0);
REGISTER_DECLARATION(Register, c_rarg1, r1);
REGISTER_DECLARATION(Register, c_rarg2, r2);
REGISTER_DECLARATION(Register, c_rarg3, r3);
REGISTER_DECLARATION(Register, c_rarg4, r4);
REGISTER_DECLARATION(Register, c_rarg5, r5);
REGISTER_DECLARATION(Register, c_rarg6, r6);
REGISTER_DECLARATION(Register, c_rarg7, r7);

REGISTER_DECLARATION(FloatRegister, c_farg0, v0);
REGISTER_DECLARATION(FloatRegister, c_farg1, v1);
REGISTER_DECLARATION(FloatRegister, c_farg2, v2);
REGISTER_DECLARATION(FloatRegister, c_farg3, v3);
REGISTER_DECLARATION(FloatRegister, c_farg4, v4);
REGISTER_DECLARATION(FloatRegister, c_farg5, v5);
REGISTER_DECLARATION(FloatRegister, c_farg6, v6);
REGISTER_DECLARATION(FloatRegister, c_farg7, v7);
constexpr Register c_rarg0 = r0;
constexpr Register c_rarg1 = r1;
constexpr Register c_rarg2 = r2;
constexpr Register c_rarg3 = r3;
constexpr Register c_rarg4 = r4;
constexpr Register c_rarg5 = r5;
constexpr Register c_rarg6 = r6;
constexpr Register c_rarg7 = r7;

constexpr FloatRegister c_farg0 = v0;
constexpr FloatRegister c_farg1 = v1;
constexpr FloatRegister c_farg2 = v2;
constexpr FloatRegister c_farg3 = v3;
constexpr FloatRegister c_farg4 = v4;
constexpr FloatRegister c_farg5 = v5;
constexpr FloatRegister c_farg6 = v6;
constexpr FloatRegister c_farg7 = v7;

// Symbolically name the register arguments used by the Java calling convention.
// We have control over the convention for java so we can do what we please.
Expand All @@ -96,25 +96,25 @@ REGISTER_DECLARATION(FloatRegister, c_farg7, v7);
// |--------------------------------------------------------------------|


REGISTER_DECLARATION(Register, j_rarg0, c_rarg1);
REGISTER_DECLARATION(Register, j_rarg1, c_rarg2);
REGISTER_DECLARATION(Register, j_rarg2, c_rarg3);
REGISTER_DECLARATION(Register, j_rarg3, c_rarg4);
REGISTER_DECLARATION(Register, j_rarg4, c_rarg5);
REGISTER_DECLARATION(Register, j_rarg5, c_rarg6);
REGISTER_DECLARATION(Register, j_rarg6, c_rarg7);
REGISTER_DECLARATION(Register, j_rarg7, c_rarg0);
constexpr Register j_rarg0 = c_rarg1;
constexpr Register j_rarg1 = c_rarg2;
constexpr Register j_rarg2 = c_rarg3;
constexpr Register j_rarg3 = c_rarg4;
constexpr Register j_rarg4 = c_rarg5;
constexpr Register j_rarg5 = c_rarg6;
constexpr Register j_rarg6 = c_rarg7;
constexpr Register j_rarg7 = c_rarg0;

// Java floating args are passed as per C

REGISTER_DECLARATION(FloatRegister, j_farg0, v0);
REGISTER_DECLARATION(FloatRegister, j_farg1, v1);
REGISTER_DECLARATION(FloatRegister, j_farg2, v2);
REGISTER_DECLARATION(FloatRegister, j_farg3, v3);
REGISTER_DECLARATION(FloatRegister, j_farg4, v4);
REGISTER_DECLARATION(FloatRegister, j_farg5, v5);
REGISTER_DECLARATION(FloatRegister, j_farg6, v6);
REGISTER_DECLARATION(FloatRegister, j_farg7, v7);
constexpr FloatRegister j_farg0 = v0;
constexpr FloatRegister j_farg1 = v1;
constexpr FloatRegister j_farg2 = v2;
constexpr FloatRegister j_farg3 = v3;
constexpr FloatRegister j_farg4 = v4;
constexpr FloatRegister j_farg5 = v5;
constexpr FloatRegister j_farg6 = v6;
constexpr FloatRegister j_farg7 = v7;

// registers used to hold VM data either temporarily within a method
// or across method calls
Expand All @@ -123,40 +123,28 @@ REGISTER_DECLARATION(FloatRegister, j_farg7, v7);

// r8 is used for indirect result location return
// we use it and r9 as scratch registers
REGISTER_DECLARATION(Register, rscratch1, r8);
REGISTER_DECLARATION(Register, rscratch2, r9);
constexpr Register rscratch1 = r8;
constexpr Register rscratch2 = r9;

// current method -- must be in a call-clobbered register
REGISTER_DECLARATION(Register, rmethod, r12);
constexpr Register rmethod = r12;

// non-volatile (callee-save) registers are r16-29
// of which the following are dedicated global state

// link register
REGISTER_DECLARATION(Register, lr, r30);
// frame pointer
REGISTER_DECLARATION(Register, rfp, r29);
// current thread
REGISTER_DECLARATION(Register, rthread, r28);
// base of heap
REGISTER_DECLARATION(Register, rheapbase, r27);
// constant pool cache
REGISTER_DECLARATION(Register, rcpool, r26);
// r25 is a callee-saved temp
// REGISTER_DECLARATION(Register, unused, r25);
// locals on stack
REGISTER_DECLARATION(Register, rlocals, r24);
// bytecode pointer
REGISTER_DECLARATION(Register, rbcp, r22);
// Dispatch table base
REGISTER_DECLARATION(Register, rdispatch, r21);
// Java expression stack pointer
REGISTER_DECLARATION(Register, esp, r20);
// Sender's SP while in interpreter
REGISTER_DECLARATION(Register, r19_sender_sp, r19);
constexpr Register lr = r30; // link register
constexpr Register rfp = r29; // frame pointer
constexpr Register rthread = r28; // current thread
constexpr Register rheapbase = r27; // base of heap
constexpr Register rcpool = r26; // constant pool cache
constexpr Register rlocals = r24; // locals on stack
constexpr Register rbcp = r22; // bytecode pointer
constexpr Register rdispatch = r21; // dispatch table base
constexpr Register esp = r20; // Java expression stack pointer
constexpr Register r19_sender_sp = r19; // sender's SP while in interpreter

// Preserved predicate register with all elements set TRUE.
REGISTER_DECLARATION(PRegister, ptrue, p7);
constexpr PRegister ptrue = p7;

#define assert_cond(ARG1) assert(ARG1, #ARG1)

Expand Down Expand Up @@ -277,29 +265,29 @@ class Instruction_aarch64 {
}

void rf(Register r, int lsb) {
f(r->encoding_nocheck(), lsb + 4, lsb);
f(r->raw_encoding(), lsb + 4, lsb);
}

// reg|ZR
void zrf(Register r, int lsb) {
f(r->encoding_nocheck() - (r == zr), lsb + 4, lsb);
f(r->raw_encoding() - (r == zr), lsb + 4, lsb);
}

// reg|SP
void srf(Register r, int lsb) {
f(r == sp ? 31 : r->encoding_nocheck(), lsb + 4, lsb);
f(r == sp ? 31 : r->raw_encoding(), lsb + 4, lsb);
}

void rf(FloatRegister r, int lsb) {
f(r->encoding_nocheck(), lsb + 4, lsb);
f(r->raw_encoding(), lsb + 4, lsb);
}

void prf(PRegister r, int lsb) {
f(r->encoding_nocheck(), lsb + 3, lsb);
f(r->raw_encoding(), lsb + 3, lsb);
}

void pgrf(PRegister r, int lsb) {
f(r->encoding_nocheck(), lsb + 2, lsb);
f(r->raw_encoding(), lsb + 2, lsb);
}

unsigned get(int msb = 31, int lsb = 0) {
Expand Down Expand Up @@ -329,7 +317,7 @@ class Post : public PrePost {
Register _idx;
bool _is_postreg;
public:
Post(Register reg, int o) : PrePost(reg, o) { _idx = NULL; _is_postreg = false; }
Post(Register reg, int o) : PrePost(reg, o) { _idx = noreg; _is_postreg = false; }
Post(Register reg, Register idx) : PrePost(reg, 0) { _idx = idx; _is_postreg = true; }
Register idx_reg() { return _idx; }
bool is_postreg() {return _is_postreg; }
Expand Down Expand Up @@ -627,8 +615,7 @@ class InternalAddress: public Address {
InternalAddress(address target) : Address(target, relocInfo::internal_word_type) {}
};

const int FPUStateSizeInWords = FloatRegisterImpl::number_of_registers *
FloatRegisterImpl::save_slots_per_register;
const int FPUStateSizeInWords = FloatRegister::number_of_registers * FloatRegister::save_slots_per_register;

typedef enum {
PLDL1KEEP = 0b00000, PLDL1STRM, PLDL2KEEP, PLDL2STRM, PLDL3KEEP, PLDL3STRM,
Expand Down
4 changes: 2 additions & 2 deletions src/hotspot/cpu/aarch64/c1_Defs_aarch64.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -41,8 +41,8 @@ enum {

// registers
enum {
pd_nof_cpu_regs_frame_map = RegisterImpl::number_of_registers, // number of registers used during code emission
pd_nof_fpu_regs_frame_map = FloatRegisterImpl::number_of_registers, // number of registers used during code emission
pd_nof_cpu_regs_frame_map = Register::number_of_registers, // number of GP registers used during code emission
pd_nof_fpu_regs_frame_map = FloatRegister::number_of_registers, // number of FP registers used during code emission

pd_nof_caller_save_cpu_regs_frame_map = 19 - 2 /* rscratch1 and rscratch2 */ R18_RESERVED_ONLY(- 1), // number of registers killed by calls
pd_nof_caller_save_fpu_regs_frame_map = 32, // number of registers killed by calls
Expand Down
6 changes: 3 additions & 3 deletions src/hotspot/cpu/aarch64/jvmciCodeInstaller_aarch64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -175,11 +175,11 @@ void CodeInstaller::pd_relocate_poll(address pc, jint mark, JVMCI_TRAPS) {

// convert JVMCI register indices (as used in oop maps) to HotSpot registers
VMReg CodeInstaller::get_hotspot_reg(jint jvmci_reg, JVMCI_TRAPS) {
if (jvmci_reg < RegisterImpl::number_of_registers) {
if (jvmci_reg < Register::number_of_registers) {
return as_Register(jvmci_reg)->as_VMReg();
} else {
jint floatRegisterNumber = jvmci_reg - RegisterImpl::number_of_declared_registers;
if (floatRegisterNumber >= 0 && floatRegisterNumber < FloatRegisterImpl::number_of_registers) {
jint floatRegisterNumber = jvmci_reg - Register::number_of_declared_registers;
if (floatRegisterNumber >= 0 && floatRegisterNumber < FloatRegister::number_of_registers) {
return as_FloatRegister(floatRegisterNumber)->as_VMReg();
}
JVMCI_ERROR_NULL("invalid register number: %d", jvmci_reg);
Expand Down
24 changes: 12 additions & 12 deletions src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2198,7 +2198,7 @@ int MacroAssembler::push(unsigned int bitset, Register stack) {
regs[count++] = reg;
bitset >>= 1;
}
regs[count++] = zr->encoding_nocheck();
regs[count++] = zr->raw_encoding();
count &= ~1; // Only push an even number of regs

if (count) {
Expand Down Expand Up @@ -2228,7 +2228,7 @@ int MacroAssembler::pop(unsigned int bitset, Register stack) {
regs[count++] = reg;
bitset >>= 1;
}
regs[count++] = zr->encoding_nocheck();
regs[count++] = zr->raw_encoding();
count &= ~1;

for (int i = 2; i < count; i += 2) {
Expand Down Expand Up @@ -2383,9 +2383,9 @@ int MacroAssembler::push_p(unsigned int bitset, Register stack) {
return 0;
}

unsigned char regs[PRegisterImpl::number_of_saved_registers];
unsigned char regs[PRegister::number_of_saved_registers];
int count = 0;
for (int reg = 0; reg < PRegisterImpl::number_of_saved_registers; reg++) {
for (int reg = 0; reg < PRegister::number_of_saved_registers; reg++) {
if (1 & bitset)
regs[count++] = reg;
bitset >>= 1;
Expand Down Expand Up @@ -2420,9 +2420,9 @@ int MacroAssembler::pop_p(unsigned int bitset, Register stack) {
return 0;
}

unsigned char regs[PRegisterImpl::number_of_saved_registers];
unsigned char regs[PRegister::number_of_saved_registers];
int count = 0;
for (int reg = 0; reg < PRegisterImpl::number_of_saved_registers; reg++) {
for (int reg = 0; reg < PRegister::number_of_saved_registers; reg++) {
if (1 & bitset)
regs[count++] = reg;
bitset >>= 1;
Expand Down Expand Up @@ -2910,8 +2910,8 @@ void MacroAssembler::push_CPU_state(bool save_vectors, bool use_sve,
int sve_vector_size_in_bytes, int total_predicate_in_bytes) {
push(RegSet::range(r0, r29), sp); // integer registers except lr & sp
if (save_vectors && use_sve && sve_vector_size_in_bytes > 16) {
sub(sp, sp, sve_vector_size_in_bytes * FloatRegisterImpl::number_of_registers);
for (int i = 0; i < FloatRegisterImpl::number_of_registers; i++) {
sub(sp, sp, sve_vector_size_in_bytes * FloatRegister::number_of_registers);
for (int i = 0; i < FloatRegister::number_of_registers; i++) {
sve_str(as_FloatRegister(i), Address(sp, i));
}
} else {
Expand All @@ -2926,7 +2926,7 @@ void MacroAssembler::push_CPU_state(bool save_vectors, bool use_sve,
}
if (save_vectors && use_sve && total_predicate_in_bytes > 0) {
sub(sp, sp, total_predicate_in_bytes);
for (int i = 0; i < PRegisterImpl::number_of_saved_registers; i++) {
for (int i = 0; i < PRegister::number_of_saved_registers; i++) {
sve_str(as_PRegister(i), Address(sp, i));
}
}
Expand All @@ -2935,16 +2935,16 @@ void MacroAssembler::push_CPU_state(bool save_vectors, bool use_sve,
void MacroAssembler::pop_CPU_state(bool restore_vectors, bool use_sve,
int sve_vector_size_in_bytes, int total_predicate_in_bytes) {
if (restore_vectors && use_sve && total_predicate_in_bytes > 0) {
for (int i = PRegisterImpl::number_of_saved_registers - 1; i >= 0; i--) {
for (int i = PRegister::number_of_saved_registers - 1; i >= 0; i--) {
sve_ldr(as_PRegister(i), Address(sp, i));
}
add(sp, sp, total_predicate_in_bytes);
}
if (restore_vectors && use_sve && sve_vector_size_in_bytes > 16) {
for (int i = FloatRegisterImpl::number_of_registers - 1; i >= 0; i--) {
for (int i = FloatRegister::number_of_registers - 1; i >= 0; i--) {
sve_ldr(as_FloatRegister(i), Address(sp, i));
}
add(sp, sp, sve_vector_size_in_bytes * FloatRegisterImpl::number_of_registers);
add(sp, sp, sve_vector_size_in_bytes * FloatRegister::number_of_registers);
} else {
int step = (restore_vectors ? 8 : 4) * wordSize;
for (int i = 0; i <= 28; i += 4)
Expand Down

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