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8344304: [s390x] ubsan: negation of -2147483648 cannot be represented in type 'int'
Reviewed-by: lucy, dlong
1 parent 7ec36bb commit 43b337e

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3 files changed

+41
-4
lines changed

3 files changed

+41
-4
lines changed

src/hotspot/cpu/s390/c1_LIRAssembler_s390.cpp

+6-2
Original file line numberDiff line numberDiff line change
@@ -1532,8 +1532,12 @@ void LIR_Assembler::arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr
15321532
// cpu register - constant
15331533
jint c = right->as_constant_ptr()->as_jint();
15341534
switch (code) {
1535-
case lir_add: __ z_agfi(lreg, c); break;
1536-
case lir_sub: __ z_agfi(lreg, -c); break; // note: -min_jint == min_jint
1535+
case lir_add:
1536+
__ add2reg_32(lreg, c);
1537+
break;
1538+
case lir_sub:
1539+
__ add2reg_32(lreg, java_negate(c));
1540+
break;
15371541
case lir_mul: __ z_msfi(lreg, c); break;
15381542
default: ShouldNotReachHere();
15391543
}

src/hotspot/cpu/s390/macroAssembler_s390.cpp

+32-1
Original file line numberDiff line numberDiff line change
@@ -657,7 +657,7 @@ void MacroAssembler::add2reg(Register r1, int64_t imm, Register r2) {
657657
z_aghik(r1, r2, imm);
658658
return;
659659
}
660-
z_lgr(r1, r2);
660+
lgr_if_needed(r1, r2);
661661
z_aghi(r1, imm);
662662
return;
663663
}
@@ -681,6 +681,37 @@ void MacroAssembler::add2reg(Register r1, int64_t imm, Register r2) {
681681
z_agfi(r1, imm);
682682
}
683683

684+
void MacroAssembler::add2reg_32(Register r1, int64_t imm, Register r2) {
685+
assert(Immediate::is_simm32(imm), "probably an implicit conversion went wrong");
686+
687+
if (r2 == noreg) { r2 = r1; }
688+
689+
// Handle special case imm == 0.
690+
if (imm == 0) {
691+
lr_if_needed(r1, r2);
692+
// Nothing else to do.
693+
return;
694+
}
695+
696+
if (Immediate::is_simm16(imm)) {
697+
if (r1 == r2){
698+
z_ahi(r1, imm);
699+
return;
700+
}
701+
if (VM_Version::has_DistinctOpnds()) {
702+
z_ahik(r1, r2, imm);
703+
return;
704+
}
705+
lr_if_needed(r1, r2);
706+
z_ahi(r1, imm);
707+
return;
708+
}
709+
710+
// imm is simm32
711+
lr_if_needed(r1, r2);
712+
z_afi(r1, imm);
713+
}
714+
684715
// Generic operation r := b + x + d
685716
//
686717
// Addition of several operands with address generation semantics - sort of:

src/hotspot/cpu/s390/macroAssembler_s390.hpp

+3-1
Original file line numberDiff line numberDiff line change
@@ -156,7 +156,9 @@ class MacroAssembler: public Assembler {
156156
unsigned int mul_reg64_const16(Register rval, Register work, int cval);
157157

158158
// Generic operation r1 := r2 + imm.
159-
void add2reg(Register r1, int64_t imm, Register r2 = noreg);
159+
void add2reg (Register r1, int64_t imm, Register r2 = noreg);
160+
void add2reg_32(Register r1, int64_t imm, Register r2 = noreg);
161+
160162
// Generic operation r := b + x + d.
161163
void add2reg_with_index(Register r, int64_t d, Register x, Register b = noreg);
162164

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