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8293290: RISC-V: Explicitly pass a third temp register to MacroAssembler::store_heap_oop
Reviewed-by: shade
1 parent 48b3ab0 commit 5bed9f7

16 files changed

+71
-69
lines changed

‎src/hotspot/cpu/riscv/gc/g1/g1BarrierSetAssembler_riscv.cpp

+8-8
Original file line numberDiff line numberDiff line change
@@ -272,36 +272,36 @@ void G1BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorator
272272
}
273273

274274
void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
275-
Address dst, Register val, Register tmp1, Register tmp2) {
275+
Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
276276
// flatten object address if needed
277277
if (dst.offset() == 0) {
278-
if (dst.base() != x13) {
279-
__ mv(x13, dst.base());
278+
if (dst.base() != tmp3) {
279+
__ mv(tmp3, dst.base());
280280
}
281281
} else {
282-
__ la(x13, dst);
282+
__ la(tmp3, dst);
283283
}
284284

285285
g1_write_barrier_pre(masm,
286-
x13 /* obj */,
286+
tmp3 /* obj */,
287287
tmp2 /* pre_val */,
288288
xthread /* thread */,
289289
tmp1 /* tmp */,
290290
val != noreg /* tosca_live */,
291291
false /* expand_call */);
292292

293293
if (val == noreg) {
294-
BarrierSetAssembler::store_at(masm, decorators, type, Address(x13, 0), noreg, noreg, noreg);
294+
BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), noreg, noreg, noreg, noreg);
295295
} else {
296296
// G1 barrier needs uncompressed oop for region cross check.
297297
Register new_val = val;
298298
if (UseCompressedOops) {
299299
new_val = t1;
300300
__ mv(new_val, val);
301301
}
302-
BarrierSetAssembler::store_at(masm, decorators, type, Address(x13, 0), val, noreg, noreg);
302+
BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), val, noreg, noreg, noreg);
303303
g1_write_barrier_post(masm,
304-
x13 /* store_adr */,
304+
tmp3 /* store_adr */,
305305
new_val /* new_val */,
306306
xthread /* thread */,
307307
tmp1 /* tmp */,

‎src/hotspot/cpu/riscv/gc/g1/g1BarrierSetAssembler_riscv.hpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -60,7 +60,7 @@ class G1BarrierSetAssembler: public ModRefBarrierSetAssembler {
6060
Register tmp2);
6161

6262
virtual void oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
63-
Address dst, Register val, Register tmp1, Register tmp2);
63+
Address dst, Register val, Register tmp1, Register tmp2, Register tmp3);
6464

6565
public:
6666
#ifdef COMPILER1

‎src/hotspot/cpu/riscv/gc/shared/barrierSetAssembler_riscv.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -79,7 +79,7 @@ void BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators,
7979
}
8080

8181
void BarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
82-
Address dst, Register val, Register tmp1, Register tmp2) {
82+
Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
8383
bool in_heap = (decorators & IN_HEAP) != 0;
8484
bool in_native = (decorators & IN_NATIVE) != 0;
8585
switch (type) {

‎src/hotspot/cpu/riscv/gc/shared/barrierSetAssembler_riscv.hpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -52,7 +52,7 @@ class BarrierSetAssembler: public CHeapObj<mtGC> {
5252
virtual void load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
5353
Register dst, Address src, Register tmp1, Register tmp_thread);
5454
virtual void store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
55-
Address dst, Register val, Register tmp1, Register tmp2);
55+
Address dst, Register val, Register tmp1, Register tmp2, Register tmp3);
5656

5757
virtual void try_resolve_jobject_in_native(MacroAssembler* masm, Register jni_env,
5858
Register obj, Register tmp, Label& slowpath);

‎src/hotspot/cpu/riscv/gc/shared/cardTableBarrierSetAssembler_riscv.cpp

+5-5
Original file line numberDiff line numberDiff line change
@@ -88,21 +88,21 @@ void CardTableBarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembl
8888
}
8989

9090
void CardTableBarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
91-
Address dst, Register val, Register tmp1, Register tmp2) {
91+
Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
9292
bool in_heap = (decorators & IN_HEAP) != 0;
9393
bool is_array = (decorators & IS_ARRAY) != 0;
9494
bool on_anonymous = (decorators & ON_UNKNOWN_OOP_REF) != 0;
9595
bool precise = is_array || on_anonymous;
9696

9797
bool needs_post_barrier = val != noreg && in_heap;
98-
BarrierSetAssembler::store_at(masm, decorators, type, dst, val, noreg, noreg);
98+
BarrierSetAssembler::store_at(masm, decorators, type, dst, val, noreg, noreg, noreg);
9999
if (needs_post_barrier) {
100100
// flatten object address if needed
101101
if (!precise || dst.offset() == 0) {
102-
store_check(masm, dst.base(), x13);
102+
store_check(masm, dst.base(), tmp3);
103103
} else {
104-
__ la(x13, dst);
105-
store_check(masm, x13, t0);
104+
__ la(tmp3, dst);
105+
store_check(masm, tmp3, t0);
106106
}
107107
}
108108
}

‎src/hotspot/cpu/riscv/gc/shared/cardTableBarrierSetAssembler_riscv.hpp

+2-2
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/*
22
* Copyright (c) 2018, 2019, Oracle and/or its affiliates. All rights reserved.
3-
* Copyright (c) 2020, 2021, Huawei Technologies Co., Ltd. All rights reserved.
3+
* Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved.
44
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
55
*
66
* This code is free software; you can redistribute it and/or modify it
@@ -36,7 +36,7 @@ class CardTableBarrierSetAssembler: public ModRefBarrierSetAssembler {
3636
virtual void gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
3737
Register start, Register count, Register tmp, RegSet saved_regs);
3838
virtual void oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
39-
Address dst, Register val, Register tmp1, Register tmp2);
39+
Address dst, Register val, Register tmp1, Register tmp2, Register tmp3);
4040
};
4141

4242
#endif // #ifndef CPU_RISCV_GC_SHARED_CARDTABLEBARRIERSETASSEMBLER_RISCV_HPP

‎src/hotspot/cpu/riscv/gc/shared/modRefBarrierSetAssembler_riscv.cpp

+3-3
Original file line numberDiff line numberDiff line change
@@ -45,10 +45,10 @@ void ModRefBarrierSetAssembler::arraycopy_epilogue(MacroAssembler* masm, Decorat
4545
}
4646

4747
void ModRefBarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
48-
Address dst, Register val, Register tmp1, Register tmp2) {
48+
Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
4949
if (is_reference_type(type)) {
50-
oop_store_at(masm, decorators, type, dst, val, tmp1, tmp2);
50+
oop_store_at(masm, decorators, type, dst, val, tmp1, tmp2, tmp3);
5151
} else {
52-
BarrierSetAssembler::store_at(masm, decorators, type, dst, val, tmp1, tmp2);
52+
BarrierSetAssembler::store_at(masm, decorators, type, dst, val, tmp1, tmp2, tmp3);
5353
}
5454
}

‎src/hotspot/cpu/riscv/gc/shared/modRefBarrierSetAssembler_riscv.hpp

+3-3
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/*
22
* Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved.
3-
* Copyright (c) 2020, 2021, Huawei Technologies Co., Ltd. All rights reserved.
3+
* Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved.
44
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
55
*
66
* This code is free software; you can redistribute it and/or modify it
@@ -41,15 +41,15 @@ class ModRefBarrierSetAssembler: public BarrierSetAssembler {
4141
Register start, Register count, Register tmp, RegSet saved_regs) {}
4242

4343
virtual void oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
44-
Address dst, Register val, Register tmp1, Register tmp2) = 0;
44+
Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) = 0;
4545

4646
public:
4747
virtual void arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
4848
Register src, Register dst, Register count, RegSet saved_regs);
4949
virtual void arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
5050
Register start, Register count, Register tmp, RegSet saved_regs);
5151
virtual void store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
52-
Address dst, Register val, Register tmp1, Register tmp2);
52+
Address dst, Register val, Register tmp1, Register tmp2, Register tmp3);
5353
};
5454

5555
#endif // CPU_RISCV_GC_SHARED_MODREFBARRIERSETASSEMBLER_RISCV_HPP

‎src/hotspot/cpu/riscv/gc/shenandoah/shenandoahBarrierSetAssembler_riscv.cpp

+8-8
Original file line numberDiff line numberDiff line change
@@ -394,32 +394,32 @@ void ShenandoahBarrierSetAssembler::load_at(MacroAssembler* masm,
394394
}
395395

396396
void ShenandoahBarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
397-
Address dst, Register val, Register tmp1, Register tmp2) {
397+
Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
398398
bool on_oop = is_reference_type(type);
399399
if (!on_oop) {
400-
BarrierSetAssembler::store_at(masm, decorators, type, dst, val, tmp1, tmp2);
400+
BarrierSetAssembler::store_at(masm, decorators, type, dst, val, tmp1, tmp2, tmp3);
401401
return;
402402
}
403403

404404
// flatten object address if needed
405405
if (dst.offset() == 0) {
406-
if (dst.base() != x13) {
407-
__ mv(x13, dst.base());
406+
if (dst.base() != tmp3) {
407+
__ mv(tmp3, dst.base());
408408
}
409409
} else {
410-
__ la(x13, dst);
410+
__ la(tmp3, dst);
411411
}
412412

413413
shenandoah_write_barrier_pre(masm,
414-
x13 /* obj */,
414+
tmp3 /* obj */,
415415
tmp2 /* pre_val */,
416416
xthread /* thread */,
417417
tmp1 /* tmp */,
418418
val != noreg /* tosca_live */,
419419
false /* expand_call */);
420420

421421
if (val == noreg) {
422-
BarrierSetAssembler::store_at(masm, decorators, type, Address(x13, 0), noreg, noreg, noreg);
422+
BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), noreg, noreg, noreg, noreg);
423423
} else {
424424
iu_barrier(masm, val, tmp1);
425425
// G1 barrier needs uncompressed oop for region cross check.
@@ -428,7 +428,7 @@ void ShenandoahBarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet
428428
new_val = t1;
429429
__ mv(new_val, val);
430430
}
431-
BarrierSetAssembler::store_at(masm, decorators, type, Address(x13, 0), val, noreg, noreg);
431+
BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), val, noreg, noreg, noreg);
432432
}
433433
}
434434

‎src/hotspot/cpu/riscv/gc/shenandoah/shenandoahBarrierSetAssembler_riscv.hpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -78,7 +78,7 @@ class ShenandoahBarrierSetAssembler: public BarrierSetAssembler {
7878
virtual void load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
7979
Register dst, Address src, Register tmp1, Register tmp_thread);
8080
virtual void store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
81-
Address dst, Register val, Register tmp1, Register tmp2);
81+
Address dst, Register val, Register tmp1, Register tmp2, Register tmp3);
8282

8383
virtual void try_resolve_jobject_in_native(MacroAssembler* masm, Register jni_env,
8484
Register obj, Register tmp, Label& slowpath);

‎src/hotspot/cpu/riscv/gc/z/zBarrierSetAssembler_riscv.cpp

+4-3
Original file line numberDiff line numberDiff line change
@@ -111,15 +111,16 @@ void ZBarrierSetAssembler::store_at(MacroAssembler* masm,
111111
Address dst,
112112
Register val,
113113
Register tmp1,
114-
Register tmp2) {
114+
Register tmp2,
115+
Register tmp3) {
115116
// Verify value
116117
if (is_reference_type(type)) {
117118
// Note that src could be noreg, which means we
118119
// are storing null and can skip verification.
119120
if (val != noreg) {
120121
Label done;
121122

122-
// tmp1 and tmp2 are often set to noreg.
123+
// tmp1, tmp2 and tmp3 are often set to noreg.
123124
RegSet savedRegs = RegSet::of(t0);
124125
__ push_reg(savedRegs, sp);
125126

@@ -134,7 +135,7 @@ void ZBarrierSetAssembler::store_at(MacroAssembler* masm,
134135
}
135136

136137
// Store value
137-
BarrierSetAssembler::store_at(masm, decorators, type, dst, val, tmp1, tmp2);
138+
BarrierSetAssembler::store_at(masm, decorators, type, dst, val, tmp1, tmp2, noreg);
138139
}
139140

140141
#endif // ASSERT

‎src/hotspot/cpu/riscv/gc/z/zBarrierSetAssembler_riscv.hpp

+2-1
Original file line numberDiff line numberDiff line change
@@ -61,7 +61,8 @@ class ZBarrierSetAssembler : public ZBarrierSetAssemblerBase {
6161
Address dst,
6262
Register val,
6363
Register tmp1,
64-
Register tmp2);
64+
Register tmp2,
65+
Register tmp3);
6566
#endif // ASSERT
6667

6768
virtual void arraycopy_prologue(MacroAssembler* masm,

‎src/hotspot/cpu/riscv/macroAssembler_riscv.cpp

+6-6
Original file line numberDiff line numberDiff line change
@@ -1780,14 +1780,14 @@ void MacroAssembler::null_check(Register reg, int offset) {
17801780

17811781
void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
17821782
Address dst, Register src,
1783-
Register tmp1, Register thread_tmp) {
1783+
Register tmp1, Register tmp2, Register tmp3) {
17841784
BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
17851785
decorators = AccessInternal::decorator_fixup(decorators);
17861786
bool as_raw = (decorators & AS_RAW) != 0;
17871787
if (as_raw) {
1788-
bs->BarrierSetAssembler::store_at(this, decorators, type, dst, src, tmp1, thread_tmp);
1788+
bs->BarrierSetAssembler::store_at(this, decorators, type, dst, src, tmp1, tmp2, tmp3);
17891789
} else {
1790-
bs->store_at(this, decorators, type, dst, src, tmp1, thread_tmp);
1790+
bs->store_at(this, decorators, type, dst, src, tmp1, tmp2, tmp3);
17911791
}
17921792
}
17931793

@@ -1955,8 +1955,8 @@ void MacroAssembler::decode_heap_oop(Register d, Register s) {
19551955
}
19561956

19571957
void MacroAssembler::store_heap_oop(Address dst, Register src, Register tmp1,
1958-
Register thread_tmp, DecoratorSet decorators) {
1959-
access_store_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, thread_tmp);
1958+
Register tmp2, Register tmp3, DecoratorSet decorators) {
1959+
access_store_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2, tmp3);
19601960
}
19611961

19621962
void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
@@ -1971,7 +1971,7 @@ void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register
19711971

19721972
// Used for storing NULLs.
19731973
void MacroAssembler::store_heap_oop_null(Address dst) {
1974-
access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg);
1974+
access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
19751975
}
19761976

19771977
int MacroAssembler::corrected_idivl(Register result, Register rs1, Register rs2,

‎src/hotspot/cpu/riscv/macroAssembler_riscv.hpp

+2-2
Original file line numberDiff line numberDiff line change
@@ -185,7 +185,7 @@ class MacroAssembler: public Assembler {
185185
void access_load_at(BasicType type, DecoratorSet decorators, Register dst,
186186
Address src, Register tmp1, Register thread_tmp);
187187
void access_store_at(BasicType type, DecoratorSet decorators, Address dst,
188-
Register src, Register tmp1, Register thread_tmp);
188+
Register src, Register tmp1, Register tmp2, Register tmp3);
189189
void load_klass(Register dst, Register src);
190190
void store_klass(Register dst, Register src);
191191
void cmp_klass(Register oop, Register trial_klass, Register tmp, Label &L);
@@ -205,7 +205,7 @@ class MacroAssembler: public Assembler {
205205
void load_heap_oop_not_null(Register dst, Address src, Register tmp1 = noreg,
206206
Register thread_tmp = noreg, DecoratorSet decorators = 0);
207207
void store_heap_oop(Address dst, Register src, Register tmp1 = noreg,
208-
Register thread_tmp = noreg, DecoratorSet decorators = 0);
208+
Register tmp2 = noreg, Register tmp3 = noreg, DecoratorSet decorators = 0);
209209

210210
void store_klass_gap(Register dst, Register src);
211211

‎src/hotspot/cpu/riscv/stubGenerator_riscv.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -1558,7 +1558,7 @@ class StubGenerator: public StubCodeGenerator {
15581558
__ align(OptoLoopAlignment);
15591559

15601560
__ BIND(L_store_element);
1561-
__ store_heap_oop(Address(to, 0), copied_oop, noreg, noreg, AS_RAW); // store the oop
1561+
__ store_heap_oop(Address(to, 0), copied_oop, noreg, noreg, noreg, AS_RAW); // store the oop
15621562
__ add(to, to, UseCompressedOops ? 4 : 8);
15631563
__ sub(count, count, 1);
15641564
__ beqz(count, L_do_card_marks);

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