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8292564: x86: Remove redundant casts in Assembler usages
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Reviewed-by: iveresov, kvn, shade
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Vladimir Ivanov committed Aug 19, 2022
1 parent 7244dd6 commit 6a8a531
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Showing 23 changed files with 132 additions and 167 deletions.
21 changes: 0 additions & 21 deletions src/hotspot/cpu/x86/assembler_x86.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -949,10 +949,6 @@ class Assembler : public AbstractAssembler {

void pop(Register dst);

// These are dummies to prevent surprise implicit conversions to Register
void push(void* v);
void pop(void* v);

// These do register sized moves/scans
void rep_mov();
void rep_stos();
Expand Down Expand Up @@ -1108,10 +1104,6 @@ class Assembler : public AbstractAssembler {
void cmpq(Register dst, Register src);
void cmpq(Register dst, Address src);

// these are dummies used to catch attempting to convert NULL to Register
void cmpl(Register dst, void* junk); // dummy
void cmpq(Register dst, void* junk); // dummy

void cmpw(Address dst, int imm16);

void cmpxchg8 (Address adr);
Expand Down Expand Up @@ -1613,24 +1605,12 @@ class Assembler : public AbstractAssembler {
void movl(Register dst, Address src);
void movl(Address dst, Register src);

// These dummies prevent using movl from converting a zero (like NULL) into Register
// by giving the compiler two choices it can't resolve

void movl(Address dst, void* junk);
void movl(Register dst, void* junk);

#ifdef _LP64
void movq(Register dst, Register src);
void movq(Register dst, Address src);
void movq(Address dst, Register src);
void movq(Address dst, int32_t imm32);
void movq(Register dst, int32_t imm32);

// These dummies prevent using movq from converting a zero (like NULL) into Register
// by giving the compiler two choices it can't resolve

void movq(Address dst, void* dummy);
void movq(Register dst, void* dummy);
#endif

// Move Quadword
Expand All @@ -1653,7 +1633,6 @@ class Assembler : public AbstractAssembler {

void movslq(Register dst, Address src);
void movslq(Register dst, Register src);
void movslq(Register dst, void* src); // Dummy declaration to cause NULL to be ambiguous
#endif

void movswl(Register dst, Address src);
Expand Down
18 changes: 9 additions & 9 deletions src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -319,7 +319,7 @@ void LIR_Assembler::osr_entry() {
// verify the interpreter's monitor has a non-null object
{
Label L;
__ cmpptr(Address(OSR_buf, slot_offset + 1*BytesPerWord), (int32_t)NULL_WORD);
__ cmpptr(Address(OSR_buf, slot_offset + 1*BytesPerWord), NULL_WORD);
__ jcc(Assembler::notZero, L);
__ stop("locked object is NULL");
__ bind(L);
Expand Down Expand Up @@ -440,8 +440,8 @@ int LIR_Assembler::emit_unwind_handler() {
Register thread = NOT_LP64(rsi) LP64_ONLY(r15_thread);
NOT_LP64(__ get_thread(thread));
__ movptr(rax, Address(thread, JavaThread::exception_oop_offset()));
__ movptr(Address(thread, JavaThread::exception_oop_offset()), (intptr_t)NULL_WORD);
__ movptr(Address(thread, JavaThread::exception_pc_offset()), (intptr_t)NULL_WORD);
__ movptr(Address(thread, JavaThread::exception_oop_offset()), NULL_WORD);
__ movptr(Address(thread, JavaThread::exception_pc_offset()), NULL_WORD);

__ bind(_unwind_handler_entry);
__ verify_not_null_oop(rax);
Expand Down Expand Up @@ -733,7 +733,7 @@ void LIR_Assembler::const2mem(LIR_Opr src, LIR_Opr dest, BasicType type, CodeEmi
case T_ARRAY:
if (c->as_jobject() == NULL) {
if (UseCompressedOops && !wide) {
__ movl(as_Address(addr), (int32_t)NULL_WORD);
__ movl(as_Address(addr), NULL_WORD);
} else {
#ifdef _LP64
__ xorptr(rscratch1, rscratch1);
Expand Down Expand Up @@ -1659,7 +1659,7 @@ void LIR_Assembler::type_profile_helper(Register mdo,
for (uint i = 0; i < ReceiverTypeData::row_limit(); i++) {
Label next_test;
Address recv_addr(mdo, md->byte_offset_of_slot(data, ReceiverTypeData::receiver_offset(i)));
__ cmpptr(recv_addr, (intptr_t)NULL_WORD);
__ cmpptr(recv_addr, NULL_WORD);
__ jccb(Assembler::notEqual, next_test);
__ movptr(recv_addr, recv);
__ movptr(Address(mdo, md->byte_offset_of_slot(data, ReceiverTypeData::receiver_count_offset(i))), DataLayout::counter_increment);
Expand Down Expand Up @@ -1711,7 +1711,7 @@ void LIR_Assembler::emit_typecheck_helper(LIR_OpTypeCheck *op, Label* success, L

assert_different_registers(obj, k_RInfo, klass_RInfo);

__ cmpptr(obj, (int32_t)NULL_WORD);
__ cmpptr(obj, NULL_WORD);
if (op->should_profile()) {
Label not_null;
__ jccb(Assembler::notEqual, not_null);
Expand Down Expand Up @@ -1857,7 +1857,7 @@ void LIR_Assembler::emit_opTypeCheck(LIR_OpTypeCheck* op) {
Label *success_target = op->should_profile() ? &profile_cast_success : &done;
Label *failure_target = op->should_profile() ? &profile_cast_failure : stub->entry();

__ cmpptr(value, (int32_t)NULL_WORD);
__ cmpptr(value, NULL_WORD);
if (op->should_profile()) {
Label not_null;
__ jccb(Assembler::notEqual, not_null);
Expand Down Expand Up @@ -2663,15 +2663,15 @@ void LIR_Assembler::comp_op(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2,
assert(condition == lir_cond_equal || condition == lir_cond_notEqual, "oops");
Metadata* m = c->as_metadata();
if (m == NULL) {
__ cmpptr(reg1, (int32_t)0);
__ cmpptr(reg1, NULL_WORD);
} else {
ShouldNotReachHere();
}
} else if (is_reference_type(c->type())) {
// In 64bit oops are single register
jobject o = c->as_jobject();
if (o == NULL) {
__ cmpptr(reg1, (int32_t)NULL_WORD);
__ cmpptr(reg1, NULL_WORD);
} else {
__ cmpoop(reg1, o);
}
Expand Down
7 changes: 3 additions & 4 deletions src/hotspot/cpu/x86/c1_MacroAssembler_x86.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -146,8 +146,7 @@ void C1_MacroAssembler::try_allocate(Register obj, Register var_size_in_bytes, i
void C1_MacroAssembler::initialize_header(Register obj, Register klass, Register len, Register t1, Register t2) {
assert_different_registers(obj, klass, len);
Register tmp_encode_klass = LP64_ONLY(rscratch1) NOT_LP64(noreg);
// This assumes that all prototype bits fit in an int32_t
movptr(Address(obj, oopDesc::mark_offset_in_bytes ()), (int32_t)(intptr_t)markWord::prototype().value());
movptr(Address(obj, oopDesc::mark_offset_in_bytes()), checked_cast<int32_t>(markWord::prototype().value()));
#ifdef _LP64
if (UseCompressedClassPointers) { // Take care not to kill klass
movptr(t1, klass);
Expand Down Expand Up @@ -253,12 +252,12 @@ void C1_MacroAssembler::allocate_array(Register obj, Register len, Register t1,
assert(!(BytesPerWord & 1), "must be a multiple of 2 for masking code to work");

// check for negative or excessive length
cmpptr(len, (int32_t)max_array_allocation_length);
cmpptr(len, checked_cast<int32_t>(max_array_allocation_length));
jcc(Assembler::above, slow_case);

const Register arr_size = t2; // okay to be the same
// align object end
movptr(arr_size, (int32_t)header_size * BytesPerWord + MinObjAlignmentInBytesMask);
movptr(arr_size, header_size * BytesPerWord + MinObjAlignmentInBytesMask);
lea(arr_size, Address(arr_size, len, f));
andptr(arr_size, ~MinObjAlignmentInBytesMask);

Expand Down
10 changes: 5 additions & 5 deletions src/hotspot/cpu/x86/c1_Runtime1_x86.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -110,7 +110,7 @@ int StubAssembler::call_RT(Register oop_result1, Register metadata_result, addre

// check for pending exceptions
{ Label L;
cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
cmpptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
jcc(Assembler::equal, L);
// exception pending => remove activation and forward to exception handler
movptr(rax, Address(thread, Thread::pending_exception_offset()));
Expand Down Expand Up @@ -729,7 +729,7 @@ OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler *sasm) {
// check that fields in JavaThread for exception oop and issuing pc are
// empty before writing to them
Label oop_empty;
__ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t) NULL_WORD);
__ cmpptr(Address(thread, JavaThread::exception_oop_offset()), NULL_WORD);
__ jcc(Assembler::equal, oop_empty);
__ stop("exception oop already set");
__ bind(oop_empty);
Expand Down Expand Up @@ -911,7 +911,7 @@ OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {

// check for pending exceptions
{ Label L;
__ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
__ cmpptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
__ jcc(Assembler::equal, L);
// exception pending => remove activation and forward to exception handler

Expand All @@ -935,13 +935,13 @@ OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
#ifdef ASSERT
// check that fields in JavaThread for exception oop and issuing pc are empty
Label oop_empty;
__ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD);
__ cmpptr(Address(thread, JavaThread::exception_oop_offset()), NULL_WORD);
__ jcc(Assembler::equal, oop_empty);
__ stop("exception oop must be empty");
__ bind(oop_empty);

Label pc_empty;
__ cmpptr(Address(thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
__ cmpptr(Address(thread, JavaThread::exception_pc_offset()), NULL_WORD);
__ jcc(Assembler::equal, pc_empty);
__ stop("exception pc must be empty");
__ bind(pc_empty);
Expand Down
15 changes: 7 additions & 8 deletions src/hotspot/cpu/x86/c2_MacroAssembler_x86.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -411,8 +411,7 @@ void C2_MacroAssembler::rtm_inflated_locking(Register objReg, Register boxReg, R
Label L_rtm_retry, L_decrement_retry, L_on_abort;
int owner_offset = OM_OFFSET_NO_MONITOR_VALUE_TAG(owner);

// Without cast to int32_t this style of movptr will destroy r10 which is typically obj.
movptr(Address(boxReg, 0), (int32_t)intptr_t(markWord::unused_mark().value()));
movptr(Address(boxReg, 0), checked_cast<int32_t>(markWord::unused_mark().value()));
movptr(boxReg, tmpReg); // Save ObjectMonitor address

if (RTMRetryCount > 0) {
Expand Down Expand Up @@ -693,7 +692,7 @@ void C2_MacroAssembler::fast_lock(Register objReg, Register boxReg, Register tmp
cmpxchgptr(r15_thread, Address(scrReg, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner)));
// Unconditionally set box->_displaced_header = markWord::unused_mark().
// Without cast to int32_t this style of movptr will destroy r10 which is typically obj.
movptr(Address(boxReg, 0), (int32_t)intptr_t(markWord::unused_mark().value()));
movptr(Address(boxReg, 0), checked_cast<int32_t>(markWord::unused_mark().value()));
// Propagate ICC.ZF from CAS above into DONE_LABEL.
jccb(Assembler::equal, COUNT); // CAS above succeeded; propagate ZF = 1 (success)

Expand Down Expand Up @@ -788,7 +787,7 @@ void C2_MacroAssembler::fast_unlock(Register objReg, Register boxReg, Register t
#endif

if (!UseHeavyMonitors) {
cmpptr(Address(boxReg, 0), (int32_t)NULL_WORD); // Examine the displaced header
cmpptr(Address(boxReg, 0), NULL_WORD); // Examine the displaced header
jcc (Assembler::zero, COUNT); // 0 indicates recursive stack-lock
}
movptr(tmpReg, Address(objReg, oopDesc::mark_offset_in_bytes())); // Examine the object's markword
Expand Down Expand Up @@ -878,7 +877,7 @@ void C2_MacroAssembler::fast_unlock(Register objReg, Register boxReg, Register t
orptr(boxReg, Address(tmpReg, OM_OFFSET_NO_MONITOR_VALUE_TAG(EntryList)));
jccb (Assembler::notZero, CheckSucc);
// Without cast to int32_t this style of movptr will destroy r10 which is typically obj.
movptr(Address(tmpReg, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner)), (int32_t)NULL_WORD);
movptr(Address(tmpReg, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner)), NULL_WORD);
jmpb (DONE_LABEL);

// Try to avoid passing control into the slow_path ...
Expand All @@ -888,12 +887,12 @@ void C2_MacroAssembler::fast_unlock(Register objReg, Register boxReg, Register t
// Effectively: if (succ == null) goto slow path
// The code reduces the window for a race, however,
// and thus benefits performance.
cmpptr(Address(tmpReg, OM_OFFSET_NO_MONITOR_VALUE_TAG(succ)), (int32_t)NULL_WORD);
cmpptr(Address(tmpReg, OM_OFFSET_NO_MONITOR_VALUE_TAG(succ)), NULL_WORD);
jccb (Assembler::zero, LGoSlowPath);

xorptr(boxReg, boxReg);
// Without cast to int32_t this style of movptr will destroy r10 which is typically obj.
movptr(Address(tmpReg, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner)), (int32_t)NULL_WORD);
movptr(Address(tmpReg, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner)), NULL_WORD);

// Memory barrier/fence
// Dekker pivot point -- fulcrum : ST Owner; MEMBAR; LD Succ
Expand All @@ -904,7 +903,7 @@ void C2_MacroAssembler::fast_unlock(Register objReg, Register boxReg, Register t
// (mov box,0; xchgq box, &m->Owner; LD _succ) .
lock(); addl(Address(rsp, 0), 0);

cmpptr(Address(tmpReg, OM_OFFSET_NO_MONITOR_VALUE_TAG(succ)), (int32_t)NULL_WORD);
cmpptr(Address(tmpReg, OM_OFFSET_NO_MONITOR_VALUE_TAG(succ)), NULL_WORD);
jccb (Assembler::notZero, LSuccess);

// Rare inopportune interleaving - race.
Expand Down
20 changes: 10 additions & 10 deletions src/hotspot/cpu/x86/gc/g1/g1BarrierSetAssembler_x86.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -204,7 +204,7 @@ void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
}

// Is the previous value null?
__ cmpptr(pre_val, (int32_t) NULL_WORD);
__ cmpptr(pre_val, NULL_WORD);
__ jcc(Assembler::equal, done);

// Can we store original value in the thread's buffer?
Expand Down Expand Up @@ -293,7 +293,7 @@ void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,

// crosses regions, storing NULL?

__ cmpptr(new_val, (int32_t) NULL_WORD);
__ cmpptr(new_val, NULL_WORD);
__ jcc(Assembler::equal, done);

// storing region crossing non-NULL, is card already dirty?
Expand All @@ -308,18 +308,18 @@ void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
__ movptr(cardtable, (intptr_t)ct->card_table()->byte_map_base());
__ addptr(card_addr, cardtable);

__ cmpb(Address(card_addr, 0), (int)G1CardTable::g1_young_card_val());
__ cmpb(Address(card_addr, 0), G1CardTable::g1_young_card_val());
__ jcc(Assembler::equal, done);

__ membar(Assembler::Membar_mask_bits(Assembler::StoreLoad));
__ cmpb(Address(card_addr, 0), (int)G1CardTable::dirty_card_val());
__ cmpb(Address(card_addr, 0), G1CardTable::dirty_card_val());
__ jcc(Assembler::equal, done);


// storing a region crossing, non-NULL oop, card is clean.
// dirty card and log.

__ movb(Address(card_addr, 0), (int)G1CardTable::dirty_card_val());
__ movb(Address(card_addr, 0), G1CardTable::dirty_card_val());

__ movptr(tmp2, queue_index);
__ testptr(tmp2, tmp2);
Expand Down Expand Up @@ -420,7 +420,7 @@ void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrier
ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/);
}

__ cmpptr(pre_val_reg, (int32_t)NULL_WORD);
__ cmpptr(pre_val_reg, NULL_WORD);
__ jcc(Assembler::equal, *stub->continuation());
ce->store_parameter(stub->pre_val()->as_register(), 0);
__ call(RuntimeAddress(bs->pre_barrier_c1_runtime_code_blob()->code_begin()));
Expand All @@ -434,7 +434,7 @@ void G1BarrierSetAssembler::gen_post_barrier_stub(LIR_Assembler* ce, G1PostBarri
assert(stub->addr()->is_register(), "Precondition.");
assert(stub->new_val()->is_register(), "Precondition.");
Register new_val_reg = stub->new_val()->as_register();
__ cmpptr(new_val_reg, (int32_t) NULL_WORD);
__ cmpptr(new_val_reg, NULL_WORD);
__ jcc(Assembler::equal, *stub->continuation());
ce->store_parameter(stub->addr()->as_pointer_register(), 0);
__ call(RuntimeAddress(bs->post_barrier_c1_runtime_code_blob()->code_begin()));
Expand Down Expand Up @@ -533,17 +533,17 @@ void G1BarrierSetAssembler::generate_c1_post_barrier_runtime_stub(StubAssembler*

NOT_LP64(__ get_thread(thread);)

__ cmpb(Address(card_addr, 0), (int)G1CardTable::g1_young_card_val());
__ cmpb(Address(card_addr, 0), G1CardTable::g1_young_card_val());
__ jcc(Assembler::equal, done);

__ membar(Assembler::Membar_mask_bits(Assembler::StoreLoad));
__ cmpb(Address(card_addr, 0), (int)CardTable::dirty_card_val());
__ cmpb(Address(card_addr, 0), CardTable::dirty_card_val());
__ jcc(Assembler::equal, done);

// storing region crossing non-NULL, card is clean.
// dirty card and log.

__ movb(Address(card_addr, 0), (int)CardTable::dirty_card_val());
__ movb(Address(card_addr, 0), CardTable::dirty_card_val());

const Register tmp = rdx;
__ push(rdx);
Expand Down
6 changes: 3 additions & 3 deletions src/hotspot/cpu/x86/gc/shared/barrierSetAssembler_x86.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -117,12 +117,12 @@ void BarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet decorators
assert(!is_not_null, "inconsistent access");
#ifdef _LP64
if (UseCompressedOops) {
__ movl(dst, (int32_t)NULL_WORD);
__ movl(dst, NULL_WORD);
} else {
__ movslq(dst, (int32_t)NULL_WORD);
__ movslq(dst, NULL_WORD);
}
#else
__ movl(dst, (int32_t)NULL_WORD);
__ movl(dst, NULL_WORD);
#endif
} else {
#ifdef _LP64
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -233,7 +233,7 @@ void ShenandoahBarrierSetAssembler::satb_write_barrier_pre(MacroAssembler* masm,
}

// Is the previous value null?
__ cmpptr(pre_val, (int32_t) NULL_WORD);
__ cmpptr(pre_val, NULL_WORD);
__ jcc(Assembler::equal, done);

// Can we store original value in the thread's buffer?
Expand Down Expand Up @@ -849,7 +849,7 @@ void ShenandoahBarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, Shen
ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/);
}

__ cmpptr(pre_val_reg, (int32_t)NULL_WORD);
__ cmpptr(pre_val_reg, NULL_WORD);
__ jcc(Assembler::equal, *stub->continuation());
ce->store_parameter(stub->pre_val()->as_register(), 0);
__ call(RuntimeAddress(bs->pre_barrier_c1_runtime_code_blob()->code_begin()));
Expand Down

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